Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 07/31/17 20:55, Michael S. Tsirkin wrote: > On Mon, Jul 31, 2017 at 08:16:49PM +0200, Laszlo Ersek wrote: >> OK. If the proposed solution with the r/o mem base/limit registers is >> rooted in the spec (and I think it indeed must be; apparently this would >> be the same as what we're already

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Mon, Jul 31, 2017 at 08:16:49PM +0200, Laszlo Ersek wrote: > OK. If the proposed solution with the r/o mem base/limit registers is > rooted in the spec (and I think it indeed must be; apparently this would > be the same as what we're already planning for IO disablement), then > that's a strong

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Mon, Jul 31, 2017 at 01:06:23PM +0300, Marcel Apfelbaum wrote: > On 29/07/2017 2:12, Michael S. Tsirkin wrote: > > On Thu, Jul 27, 2017 at 12:39:54PM +0300, Marcel Apfelbaum wrote: > > > On 27/07/2017 2:28, Michael S. Tsirkin wrote: > > > > On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 07/29/17 01:15, Michael S. Tsirkin wrote: > On Thu, Jul 27, 2017 at 03:58:58PM +0200, Laszlo Ersek wrote: >> On 07/27/17 11:39, Marcel Apfelbaum wrote: >>> On 27/07/2017 2:28, Michael S. Tsirkin wrote: On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: > 2017-07-26

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 29/07/2017 2:12, Michael S. Tsirkin wrote: On Thu, Jul 27, 2017 at 12:39:54PM +0300, Marcel Apfelbaum wrote: On 27/07/2017 2:28, Michael S. Tsirkin wrote: On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin :

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Thu, Jul 27, 2017 at 03:58:58PM +0200, Laszlo Ersek wrote: > On 07/27/17 11:39, Marcel Apfelbaum wrote: > > On 27/07/2017 2:28, Michael S. Tsirkin wrote: > >> On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: > >>> 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Thu, Jul 27, 2017 at 12:39:54PM +0300, Marcel Apfelbaum wrote: > On 27/07/2017 2:28, Michael S. Tsirkin wrote: > > On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: > > > 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : > > > > On Sun, Jul 23, 2017 at

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 07/27/17 11:39, Marcel Apfelbaum wrote: > On 27/07/2017 2:28, Michael S. Tsirkin wrote: >> On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: >>> 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : On Sun, Jul 23, 2017 at 01:15:41AM +0300, Aleksandr

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 27/07/2017 2:28, Michael S. Tsirkin wrote: On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : On Sun, Jul 23, 2017 at 01:15:41AM +0300, Aleksandr Bezzubikov wrote: On PCI init PCI bridges may need some

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: > 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : > > On Sun, Jul 23, 2017 at 01:15:41AM +0300, Aleksandr Bezzubikov wrote: > >> On PCI init PCI bridges may need some > >> extra info about bus number to reserve,

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 07/26/17 23:54, Alexander Bezzubikov wrote: > 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : >> On Sun, Jul 23, 2017 at 01:15:41AM +0300, Aleksandr Bezzubikov wrote: >>> +PCIBridgeQemuCap cap; >> >> This leaks info to guest. You want to init all fields here: >> >> cap = {

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : > On Sun, Jul 23, 2017 at 01:15:41AM +0300, Aleksandr Bezzubikov wrote: >> On PCI init PCI bridges may need some >> extra info about bus number to reserve, IO, memory and >> prefetchable memory limits. QEMU can provide this >> with

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Sun, Jul 23, 2017 at 01:15:41AM +0300, Aleksandr Bezzubikov wrote: > On PCI init PCI bridges may need some > extra info about bus number to reserve, IO, memory and > prefetchable memory limits. QEMU can provide this > with special with a special > vendor-specific PCI capability. > > Sizes of

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 23/07/2017 19:19, Alexander Bezzubikov wrote: 2017-07-23 18:57 GMT+03:00 Marcel Apfelbaum >: On 23/07/2017 1:15, Aleksandr Bezzubikov wrote: On PCI init PCI bridges may need some extra info about bus number to reserve, IO,

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

2017-07-23 18:57 GMT+03:00 Marcel Apfelbaum : > On 23/07/2017 1:15, Aleksandr Bezzubikov wrote: > >> On PCI init PCI bridges may need some >> extra info about bus number to reserve, IO, memory and >> prefetchable memory limits. QEMU can provide this >> with special

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 23/07/2017 1:15, Aleksandr Bezzubikov wrote: On PCI init PCI bridges may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with special vendor-specific PCI capability. Sizes of limits match ones from PCI Type 1 Configuration