Hi,
> +/
> + * Page table
> + /
> +void *gen_identity_page_table(u64 max_addr)
> +{
> +/* Map directly all the addresses */
> +u32 pt_entries = (max_addr +
On Mon, Sep 21, 2015 at 12:03:29PM -0400, Kevin O'Connor wrote:
> According to my Intel docs, PAE supports the same 52bit physical
> address range that x86_64 supports.
Thinking about this further, I could see changing SeaBIOS' 32bit code
to always use PAE mode (when available). Doing so would
On Mon, Sep 21, 2015 at 04:38:00PM +0200, Marc Marí wrote:
> On Mon, 21 Sep 2015 15:57:56 +0200
> Gerd Hoffmann wrote:
> > > +/
> > > + * Page table
> > > +
On Mon, 21 Sep 2015 17:00:51 +0200
Paolo Bonzini wrote:
>
>
> On 21/09/2015 16:38, Marc Marí wrote:
> > True. Tried with 2M. The memory used went down from 8M to 24K more
> > or less, and the time for the copying went down by 4ms (from 15ms to
> > 11ms). The other option
On Mon, 21 Sep 2015 12:03:29 -0400
"Kevin O'Connor" wrote:
> On Mon, Sep 21, 2015 at 04:38:00PM +0200, Marc Marí wrote:
> > On Mon, 21 Sep 2015 15:57:56 +0200
> > Gerd Hoffmann wrote:
> > > >
On Mon, Sep 21, 2015 at 06:23:54PM +0200, Marc Marí wrote:
> On Mon, 21 Sep 2015 12:03:29 -0400
> "Kevin O'Connor" wrote:
> > Also, your code seems to run regular 32bit code when in "long mode" -
> > is that valid?
>
> It doesn't crash. And I think it's valid. When
On Mon, 21 Sep 2015 15:57:56 +0200
Gerd Hoffmann wrote:
> Hi,
>
> > +/
> > + * Page table
> > + /
> > +void *gen_identity_page_table(u64 max_addr)
On 21/09/2015 16:38, Marc Marí wrote:
> True. Tried with 2M. The memory used went down from 8M to 24K more or
> less, and the time for the copying went down by 4ms (from 15ms to
> 11ms). The other option is 1GB. I'll test later if it's enabled in QEMU
> CPUs.
Only in some AMD CPUs (plus "-cpu