The MODESEGMENT condition is backwards, with the effect that
mmconfig mode is not used to configure pci bars during POST.
Oops. Fix it.
The only real mode pci config space access seems to come from the
ipxe option rom initialiation. Which happens to work via mmconfig
because it runs in big
Dear Gerd,
Am 25.05.20 um 11:06 schrieb Gerd Hoffmann:
The MODESEGMENT condition is backwards, with the effect that
mmconfig mode is not used to configure pci bars during POST.
Oops. Fix it.
The only real mode pci config space access seems to come from the
ipxe option rom initialiation.
On Mon, May 25, 2020 at 11:06:27AM +0200, Gerd Hoffmann wrote:
> The MODESEGMENT condition is backwards, with the effect that
> mmconfig mode is not used to configure pci bars during POST.
>
> Oops. Fix it.
Thanks. I went ahead and committed this patch.
-Kevin
On Mon, May 25, 2020 at 05:19:23PM +, Mogens Jensen wrote:
> On Friday, May 15, 2020 2:17 AM, Kevin O'Connor wrote:
> > On Tue, May 12, 2020 at 03:39:58PM +, Mogens Jensen wrote:
> > > I would expect that it should not matter that flash disk is inserted in
> > > USB port, as long as no
‐‐‐ Original Message ‐‐‐
On Friday, May 15, 2020 2:17 AM, Kevin O'Connor wrote:
> On Tue, May 12, 2020 at 03:39:58PM +, Mogens Jensen wrote:
>
> > First posted this question to coreboot mailing list, but on second thought,
> > I think this is the right place.
> > I have experimentet
