I'm posting it to get an oppinion on one of possible approaches
on where to map a hotplug memory.
This patch assumes that a space for hotplug memory is located right
after RamSizeOver4G region and QEMU will provide romfile to specify
where it ends so that BIOS could know from what base to start
On Wed, 09 Oct 2013 15:12:08 +0200
Gerd Hoffmann kra...@redhat.com wrote:
On Mi, 2013-10-09 at 14:23 +0200, Igor Mammedov wrote:
I'm posting it to get an oppinion on one of possible approaches
on where to map a hotplug memory.
This patch assumes that a space for hotplug memory is
On Mon, Oct 07, 2013 at 01:16:30PM +0300, Evgeny Budilovsky wrote:
Signed-off-by: Evgeny Budilovsky evgeny.budilov...@ravellosystems.com
Thanks for submitting.
I'm fine with the patch. But can you expand on what pvscsi is, what
advantages there is for an user to enable it, what hypervisors
On Thu, Oct 03, 2013 at 04:06:24PM +0300, Michael S. Tsirkin wrote:
IASL stores it's revision in each table header it generates.
That's a problem since guests see a change each time
they move between hypervisors.
We generally fill our own info for tables,
but we forgot to do this for the
On Mi, 2013-10-09 at 14:23 +0200, Igor Mammedov wrote:
I'm posting it to get an oppinion on one of possible approaches
on where to map a hotplug memory.
This patch assumes that a space for hotplug memory is located right
after RamSizeOver4G region and QEMU will provide romfile to specify
On Mon, Oct 07, 2013 at 12:02:23PM +0200, Gerd Hoffmann wrote:
On Mi, 2013-10-02 at 21:38 -0400, Kevin O'Connor wrote:
This series converts the AHCI driver to run entirely in 32bit mode.
Currently, ahci will only jump into 32bit mode when it needs to access
the ahci device's PCI config
On Wed, Oct 09, 2013 at 08:33:40PM -0400, Kevin O'Connor wrote:
On Thu, Oct 03, 2013 at 04:06:24PM +0300, Michael S. Tsirkin wrote:
IASL stores it's revision in each table header it generates.
That's a problem since guests see a change each time
they move between hypervisors.
We generally
On Thu, Oct 10, 2013 at 3:30 AM, Kevin O'Connor ke...@koconnor.net wrote:
On Mon, Oct 07, 2013 at 01:16:30PM +0300, Evgeny Budilovsky wrote:
Signed-off-by: Evgeny Budilovsky evgeny.budilov...@ravellosystems.com
Thanks for submitting.
I'm fine with the patch. But can you expand on what
On Wed, Oct 09, 2013 at 02:23:04PM +0200, Igor Mammedov wrote:
I'm posting it to get an oppinion on one of possible approaches
on where to map a hotplug memory.
This patch assumes that a space for hotplug memory is located right
after RamSizeOver4G region and QEMU will provide romfile to
On Thu, 10 Oct 2013 15:21:32 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Oct 10, 2013 at 02:14:16PM +0200, Gerd Hoffmann wrote:
Hi,
I think the simplest way to do all this is simply to tell seabios
that we have more memory. seabios already programs 64 bit BARs
higher
On Thu, 10 Oct 2013 14:42:07 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
I think the issue is with legacy guests.
E.g. if VCPU claims to support 50 bit of memory
do we put high PCI memory at 1 50?
If yes old guests which expect at most 40 bit
will not be able to use
Hi,
So far from QEMU side it's partially (only memory region mapping and not ACPI
window) configurable via {i440FX-pcihost|q35-pcihost}.pci-hole64-size property
/me looks.
Hmm, so the pci-hole64 memory region basically covers all non-memory
area, leaving no free space.
The window
On Thu, Oct 10, 2013 at 12:56:23PM +0200, Gerd Hoffmann wrote:
Hi,
So far from QEMU side it's partially (only memory region mapping and not
ACPI
window) configurable via {i440FX-pcihost|q35-pcihost}.pci-hole64-size
property
/me looks.
Hmm, so the pci-hole64 memory region
Hi,
I think the simplest way to do all this is simply to tell seabios
that we have more memory. seabios already programs 64 bit BARs
higher than memory.
Hmm? As I understand Igor just wants some address space for memory
hotplug. So there wouldn't be memory there (yet). And telling
Kevin,
Comments are inline.
Thanks,
Dave
- Original Message -
From: Kevin O'Connor ke...@koconnor.net
To: Dave Frodin dave.fro...@se-eng.com
Cc: seabios seabios@seabios.org
Sent: Tuesday, October 8, 2013 7:26:25 PM
Subject: Re: [SeaBIOS] MP Table corruption
On Tue, Oct 08, 2013
On Thu, Oct 10, 2013 at 02:14:16PM +0200, Gerd Hoffmann wrote:
Hi,
I think the simplest way to do all this is simply to tell seabios
that we have more memory. seabios already programs 64 bit BARs
higher than memory.
Hmm? As I understand Igor just wants some address space for memory
On Thu, 10 Oct 2013 15:21:55 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
Guess we can just go with Igor's approach then. etc/mem64-end is a
pretty bad name to say please map 64bit pci bars here though.
reasoning bind was to tell BIOS where RAM ends and let it decide what
to
Hi,
I think the issue is with legacy guests.
E.g. if VCPU claims to support 50 bit of memory
do we put high PCI memory at 1 50?
If yes old guests which expect at most 40 bit
will not be able to use it.
Hmm. Sure such guests exist?
I wouldn't be surprised. At least some
On Mi, 2013-09-25 at 09:41 +0200, Gerd Hoffmann wrote:
Unbreaks parallel builds.
Pushed now.
cheers,
Gerd
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Hi,
Guess we can just go with Igor's approach then. etc/mem64-end is a
pretty bad name to say please map 64bit pci bars here though.
reasoning bind was to tell BIOS where RAM ends and let it decide what
to do with this information.
But we could do other way around and use etc/pci-info
On Fr, 2013-09-27 at 11:04 +0200, Gerd Hoffmann wrote:
Add a config option to specify the rom size wanted. Default is zero,
which will automatically figure the needed size.
Pushed now.
cheers,
Gerd
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