[SeaBIOS] [PATCH v6 2/3] pci: add QEMU-specific PCI capability structure

On PCI init PCI bridge devices may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with special vendor-specific PCI capability. This capability is intended to be used only for Red Hat PCI bridges, i.e. QEMU cooperation.

Re: [SeaBIOS] [PATCH v6 0/4] Generic PCIE-PCI Bridge

2017-08-13 18:49 GMT+03:00 Aleksandr Bezzubikov : > This series introduces a new device - Generic PCI Express to PCI bridge, > and also makes all necessary changes to enable hotplug of the bridge itself > and any device into the bridge. > > Changes v5->v6: > 1. Fix indentation

[SeaBIOS] [PATCH v6 3/3] pci: enable RedHat PCI bridges to reserve additional resource on PCI init

In case of Red Hat Generic PCIE Root Port reserve additional buses and/or IO/MEM/PREF space, which values are provided in a vendor-specific capability. Signed-off-by: Aleksandr Bezzubikov --- src/fw/pciinit.c | 99 +---

[SeaBIOS] [PATCH v6 1/3] pci: refactor pci_find_capapibilty to get bdf as the first argument instead of the whole pci_device

Refactor pci_find_capability function to get bdf instead of a whole pci_device* as the only necessary field for this function is still bdf. Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Marcel Apfelbaum --- src/fw/pciinit.c| 4 ++-- src/hw/pci.c

[SeaBIOS] [PATCH v6 0/3] Red Hat PCI bridge resource reserve capability

Now PCI bridges get a bus range number on a system init, basing on currently plugged devices. That's why when one wants to hotplug another bridge, it needs his child bus, which the parent is unable to provide (speaking about virtual device). The suggested workaround is to have vendor-specific

[SeaBIOS] [PATCH v6 3/4] hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port

To enable hotplugging of a newly created pcie-pci-bridge, we need to tell firmware (e.g. SeaBIOS) to reserve additional buses or IO/MEM/PREF space for pcie-root-port. Additional bus reservation allows us to hotplug pcie-pci-bridge into this root port. The number of buses and IO/MEM/PREF space to

[SeaBIOS] [PATCH v6 1/4] hw/pci: introduce pcie-pci-bridge device

Introduce a new PCIExpress-to-PCI Bridge device, which is a hot-pluggable PCI Express device and supports devices hot-plug with SHPC. This device is intended to replace the DMI-to-PCI Bridge. Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Marcel Apfelbaum

[SeaBIOS] [PATCH v6 4/4] docs: update documentation considering PCIE-PCI bridge

Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Laszlo Ersek Reviewed-by: Marcel Apfelbaum --- docs/pcie.txt| 49 ++-- docs/pcie_pci_bridge.txt | 114 +++ 2 files

[SeaBIOS] [PATCH v6 2/4] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On PCI init PCI bridges may need some extra info about bus number, IO, memory and prefetchable memory to reserve. QEMU can provide this with a special vendor-specific PCI capability. Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Marcel Apfelbaum ---

[SeaBIOS] [PATCH v6 0/4] Generic PCIE-PCI Bridge

This series introduces a new device - Generic PCI Express to PCI bridge, and also makes all necessary changes to enable hotplug of the bridge itself and any device into the bridge. Changes v5->v6: 1. Fix indentation in the cap creation function (addresses Marcel's comment) 2. Simplify capability

Re: [SeaBIOS] [PATCH v5 3/3] pci: enable RedHat PCI bridges to reserve additional resource on PCI init

On 11/08/2017 2:21, Aleksandr Bezzubikov wrote: In case of Red Hat Generic PCIE Root Port reserve additional buses and/or IO/MEM/PREF space, which values are provided in a vendor-specific capability. Signed-off-by: Aleksandr Bezzubikov --- src/fw/dev-pci.h | 2 +-

Re: [SeaBIOS] [PATCH v5 3/3] pci: enable RedHat PCI bridges to reserve additional resource on PCI init

On 11/08/2017 2:21, Aleksandr Bezzubikov wrote: In case of Red Hat Generic PCIE Root Port reserve additional buses and/or IO/MEM/PREF space, which values are provided in a vendor-specific capability. Hi Aleksandr, Signed-off-by: Aleksandr Bezzubikov ---

Re: [SeaBIOS] [PATCH v5 4/4] docs: update documentation considering PCIE-PCI bridge

On 11/08/2017 2:31, Aleksandr Bezzubikov wrote: Signed-off-by: Aleksandr Bezzubikov --- docs/pcie.txt| 49 ++-- docs/pcie_pci_bridge.txt | 115 +++ 2 files changed, 141 insertions(+), 23

Re: [SeaBIOS] [PATCH v5 2/4] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On 11/08/2017 2:31, Aleksandr Bezzubikov wrote: On PCI init PCI bridges may need some extra info about bus number, IO, memory and prefetchable memory to reserve. QEMU can provide this with a special vendor-specific PCI capability. Hi Aleksandr, I only have a few very small comments, other

Re: [SeaBIOS] [PATCH v5 1/4] hw/pci: introduce pcie-pci-bridge device

On 11/08/2017 2:31, Aleksandr Bezzubikov wrote: Introduce a new PCIExpress-to-PCI Bridge device, which is a hot-pluggable PCI Express device and supports devices hot-plug with SHPC. This device is intended to replace the DMI-to-PCI Bridge. Signed-off-by: Aleksandr Bezzubikov