Re: [SeaBIOS] synching GPE0_BLK between OVMF and qemu

2012-04-28 Thread Jordan Justen
On Sat, Apr 28, 2012 at 00:08, Gleb Natapov g...@redhat.com wrote: On Fri, Apr 27, 2012 at 02:55:48PM -0700, Jordan Justen wrote: But, if qemu could be changed, could it be made to match the PIIX4 datasheet? We try not to change QEMU in non backwards compatible way. We can implement PMBA and

Re: [SeaBIOS] synching GPE0_BLK between OVMF and qemu

2012-04-27 Thread Gleb Natapov
On Fri, Apr 27, 2012 at 07:24:48PM +0200, Laszlo Ersek wrote: On 04/27/12 17:12, Jordan Justen wrote: On Fri, Apr 27, 2012 at 07:31, Laszlo Ersek ler...@redhat.com wrote: edk2's OvmfPkg/AcpiTables/Platform.h specifies GPE0_BLK at 0x40C, while qemu's hw/acpi_piix4.c expects the guest to

Re: [SeaBIOS] synching GPE0_BLK between OVMF and qemu

2012-04-27 Thread Laszlo Ersek
On 04/27/12 20:09, Gleb Natapov wrote: On Fri, Apr 27, 2012 at 07:24:48PM +0200, Laszlo Ersek wrote: From 5.2.9 Fixed ACPI Description Table (FADT) in the ACPI spec (v5.0) it would appear OVMF can freely choose where to put GPE0_BLK, in both senses (ie. port address considered alone, and also

Re: [SeaBIOS] synching GPE0_BLK between OVMF and qemu

2012-04-27 Thread Gleb Natapov
On Fri, Apr 27, 2012 at 08:47:00PM +0200, Laszlo Ersek wrote: On 04/27/12 20:09, Gleb Natapov wrote: On Fri, Apr 27, 2012 at 07:24:48PM +0200, Laszlo Ersek wrote: From 5.2.9 Fixed ACPI Description Table (FADT) in the ACPI spec (v5.0) it would appear OVMF can freely choose where to put

Re: [SeaBIOS] synching GPE0_BLK between OVMF and qemu

2012-04-27 Thread Jordan Justen
On Fri, Apr 27, 2012 at 11:47, Laszlo Ersek ler...@redhat.com wrote: This was how I interpreted our discussion with Jordan: L: Shouldn't qemu OVMF agree on GPE0? J: Why? Anyway, OVMF should be correct, because all ACPI registers are in one tight bunch, starting from 0x400. L: None of those