Re: [SeaBIOS] [PATCH] shadow: set code segment to high rom region when enabling RAM

2018-12-17 Thread Евгений Яковлев
On 14.12.2018 21:45, Kevin O'Connor wrote: On Fri, Dec 14, 2018 at 01:08:46PM +0300, Евгений Яковлев wrote: I think we have a problem right now if during emulation first pci config write in __make_bios_writeable_intel we decide to issue qmp system_reset. Based on what i could gather from

Re: [SeaBIOS] [PATCH] shadow: set code segment to high rom region when enabling RAM

2018-12-14 Thread Евгений Яковлев
Hi Kevin, Yep, we're seeing this in practice (more on that follows). However you are absolutely right about call using a displacement (and i didn't know that!): e8 c1 f5 ff ff  call   ed161 Right now i don't see anything like that in disassembly, but we're still kind of one