Gerhard Sittig [2016-11-02 20:39]:
Hi,
> When I looked at several places in the sigrok's subprojects'
> sources, I noticed the absence of common endianess conversion
> helpers. All affected call sites appear to open code the
> respective functions.
In my (quite old) checkout, there are some end
Andreas Zschunke [2016-03-05 22:31]:
> - add possibility to set threshold voltage (my first try failed) -> is
> this even possible in sigrok for logic analyzers?
That should be SR_CONF_VOLTAGE_THRESHOLD, IIRC.
Regards,
Tilman
--
A: Because it messes up the order in which people normally read
Johannes Bauer [2015-11-28 21:48]:
Hi,
> /home/joe/bin/sigrok/lib/libsigrok.so: undefined reference to `er_err'
Sounds like someone typo'd sr_err(). That typo doesn't seem to be in git
though. Check your local clones?
> [pulseview]
> -- checking for modules 'libsigrokxx>=0.3.0;libsigrokdecode>=
This fixes a bunch of warnings when compiling with -Wwrite-strings.
---
include/libsigrok/libsigrok.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/libsigrok/libsigrok.h b/include/libsigrok/libsigrok.h
index 6c67f57..d7b39e1 100644
--- a/include/libsigrok/libsigro
Tilman Sauerbeck [2015-10-11 21:33]:
> I'm currently working on support for the LeCroy Logicstudio logic
> analyzer in libsigrok.
> [...]
> So the driver shouldn't be merged yet, but if anyone is curious:
> git://git.code-monkey.de/libsigrok.git
> http://git.code-
Trying to configure an invalid capture ratio would reset the
previously configured value. Instead, we should just reject the
new value and keep the original one.
---
I didn't actually test this patch since I own none of the hardware for
the affected drivers.
src/hardware/beaglelogic/api.c
Hi,
I'm currently working on support for the LeCroy Logicstudio logic
analyzer in libsigrok.
At the moment, continuous acquisition seems to be working, but that's
about it.
Missing stuff that I should be able to figure out:
- Configurable sample rate
- Hardware triggers (I know how to configure
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