Module Name:src
Committed By: skrll
Date: Sun May 16 09:02:04 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
s/ENTRY/ENTRY_NP/ in a few places
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/riscv/riscv/locore.S
Pleas
Module Name:src
Committed By: skrll
Date: Sat May 1 07:11:12 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: autoconf.c
Log Message:
Enable interrupts at the end of cpu_configure
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/riscv/aut
Module Name:src
Committed By: skrll
Date: Sat May 1 07:10:34 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Quick hack to make this link
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/riscv/riscv/locore.S
Please not
Module Name:src
Committed By: skrll
Date: Sat May 1 06:48:51 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: db_disasm.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/riscv/db_disasm.c
Please note tha
Module Name:src
Committed By: skrll
Date: Tue Apr 20 10:15:34 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: db_disasm.c
Log Message:
KNF
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/db_disasm.c
Please note that diffs are not
Module Name:src
Committed By: skrll
Date: Tue Apr 20 10:01:37 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: db_disasm.c
Log Message:
compile fixes
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/db_disasm.c
Please note that diff
Module Name:src
Committed By: skrll
Date: Sat Nov 14 13:05:14 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: trap.c
Log Message:
Improve dump_trapframe output layout and fix printing of s6/s7
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/
Module Name:src
Committed By: skrll
Date: Tue Nov 10 06:58:46 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: spl.S
Log Message:
Revamp to the point it builds, but needs more work
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/spl
Module Name:src
Committed By: skrll
Date: Sun Nov 8 10:08:28 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Fix register usage
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/riscv/riscv/locore.S
Please note that dif
Module Name:src
Committed By: skrll
Date: Sun Nov 8 08:12:17 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Fix a typo
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/riscv/riscv/locore.S
Please note that diffs are n
Module Name:src
Committed By: skrll
Date: Sun Nov 8 08:11:15 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Remove unnecessary local labels
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/riscv/riscv/locore.S
Please
Module Name:src
Committed By: skrll
Date: Sun Nov 8 08:07:43 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Use correct instruction to load address of exception_userexit into RA
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/
Module Name:src
Committed By: skrll
Date: Wed Nov 4 20:04:01 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: trap.c vm_machdep.c
Log Message:
Miscellaneous updates to reflect riscv-privileged-20190608.pdf
Some from zmcgrew@
To generate a diff of this commit:
cvs rdi
Module Name:src
Committed By: skrll
Date: Sun Nov 1 21:06:22 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: trap.c
Log Message:
Remove unused variable
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/riscv/riscv/trap.c
Please note that diffs
Module Name:src
Committed By: skrll
Date: Sun Nov 1 21:01:49 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: clock_machdep.c
Log Message:
Don't shadow 'hz'
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/clock_machdep.c
Please no
Module Name:src
Committed By: skrll
Date: Sun Nov 1 20:56:24 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: trap.c
Log Message:
Typo in a trap name
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/riscv/trap.c
Please note that diffs ar
Module Name:src
Committed By: skrll
Date: Sat Oct 31 15:18:09 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Use the 'mv' pseudo-instruction instead of the 'move' equivalent as 'mv'
is mentioned in the ISA documentation and it's used elsewhere. T
Module Name:src
Committed By: skrll
Date: Mon Apr 6 20:26:17 UTC 2020
Modified Files:
src/sys/arch/riscv/riscv: trap.c
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/trap.c
Please note that diffs are not pub
Module Name:src
Committed By: christos
Date: Mon Apr 23 15:40:33 UTC 2018
Modified Files:
src/sys/arch/riscv/riscv: db_machdep.c
Log Message:
PR/53206: David Binderman: fix array bounds comparison in KASSERT.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 sr
Module Name:src
Committed By: maya
Date: Mon Feb 5 10:41:12 UTC 2018
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Fix tyop
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/riscv/locore.S
Please note that diffs are not pu
Module Name:src
Committed By: kamil
Date: Mon Dec 5 07:24:16 UTC 2016
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Fix cpu_switchto(9) prototype in a comment
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/locore.S
Module Name:src
Committed By: matt
Date: Tue Mar 31 11:53:14 UTC 2015
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Accept the one instruction penalty and just use PTR_LA instead of doing
the relocs ourselves.
To generate a diff of this commit:
cvs rdif
Module Name:src
Committed By: matt
Date: Tue Mar 31 11:48:10 UTC 2015
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Fix botch on putting user stack pointer into trapframe.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/ri
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:30:50 UTC 2015
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Since there is only "scratch" system register for use on exception, come
up with a new scheme for its use. Use PTR_LA, INT_S/INT_L, etc.
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:15:26 UTC 2015
Modified Files:
src/sys/arch/riscv/riscv: spl.S
Log Message:
Get curcpu() from L_CPU(tp)
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/spl.S
Please note that dif
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:14:57 UTC 2015
Modified Files:
src/sys/arch/riscv/riscv: pmap_machdep.c
Log Message:
Use sfence.vm instruction and change ptbr cse to sptbr csr
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:12:47 UTC 2015
Modified Files:
src/sys/arch/riscv/riscv: genassym.cf
Log Message:
Add L_MD_TP
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/genassym.cf
Please note that diffs a
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