CVS commit: src/sys/dev/ieee1394

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:39:27 UTC 2017 Modified Files: src/sys/dev/ieee1394: fwdev.c Log Message: memory leak, found by Mootja; it seems that we should check the return value of 'fw_bindadd' in several other places, but whatever To

CVS commit: src/sys/dev/ieee1394

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:39:27 UTC 2017 Modified Files: src/sys/dev/ieee1394: fwdev.c Log Message: memory leak, found by Mootja; it seems that we should check the return value of 'fw_bindadd' in several other places, but whatever To

CVS commit: src/sys/arch/ia64/stand/ia64/ski

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:04:37 UTC 2017 Modified Files: src/sys/arch/ia64/stand/ia64/ski: devicename.c Log Message: uninitialized variable, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9

CVS commit: src/sys/arch/acorn32/podulebus

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:07:23 UTC 2017 Modified Files: src/sys/arch/acorn32/podulebus: if_ie.c Log Message: spl leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/acorn32/podulebus/if_ie.c

CVS commit: src/sys/arch/acorn32/podulebus

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:07:23 UTC 2017 Modified Files: src/sys/arch/acorn32/podulebus: if_ie.c Log Message: spl leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/acorn32/podulebus/if_ie.c

CVS commit: src/sys/dev/hpc

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:21:00 UTC 2017 Modified Files: src/sys/dev/hpc: hpcapm.c Log Message: spl leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/dev/hpc/hpcapm.c Please note that diffs are not

CVS commit: src/sys/dev/hpc

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:21:00 UTC 2017 Modified Files: src/sys/dev/hpc: hpcapm.c Log Message: spl leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/dev/hpc/hpcapm.c Please note that diffs are not

CVS commit: src/sys/arch/arm/gemini

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:44:04 UTC 2017 Modified Files: src/sys/arch/arm/gemini: if_gpn.c Log Message: NULL deref, found by Mootja; not sure how to fix it, so just add a big XXX To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8

CVS commit: src/sys/arch/arm/gemini

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:44:04 UTC 2017 Modified Files: src/sys/arch/arm/gemini: if_gpn.c Log Message: NULL deref, found by Mootja; not sure how to fix it, so just add a big XXX To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8

CVS commit: src/sys/arch/bebox/stand/boot

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:15:04 UTC 2017 Modified Files: src/sys/arch/bebox/stand/boot: siop.c Log Message: uninitialized var, found by Mootja; don't know which value to put, so add a big XXX To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/bebox/stand/boot

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:15:04 UTC 2017 Modified Files: src/sys/arch/bebox/stand/boot: siop.c Log Message: uninitialized var, found by Mootja; don't know which value to put, so add a big XXX To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/arm/imx

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:11:30 UTC 2017 Modified Files: src/sys/arch/arm/imx: imx51_ipuv3.c Log Message: memory leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx51_ipuv3.c Please

CVS commit: src/sys/arch/arm/imx

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:11:30 UTC 2017 Modified Files: src/sys/arch/arm/imx: imx51_ipuv3.c Log Message: memory leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx51_ipuv3.c Please

CVS commit: src/sys/dev/ata

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:29:32 UTC 2017 Modified Files: src/sys/dev/ata: ata_raid_subr.c Log Message: dumb instruction To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/dev/ata/ata_raid_subr.c Please note that diffs are

CVS commit: src/sys/dev/ata

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:29:32 UTC 2017 Modified Files: src/sys/dev/ata: ata_raid_subr.c Log Message: dumb instruction To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/dev/ata/ata_raid_subr.c Please note that diffs are

CVS commit: src/sys/dev/ppbus

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:27:13 UTC 2017 Modified Files: src/sys/dev/ppbus: if_plip.c Log Message: spl leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/dev/ppbus/if_plip.c Please note that diffs

CVS commit: src/sys/dev/ppbus

2017-06-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jun 25 12:27:13 UTC 2017 Modified Files: src/sys/dev/ppbus: if_plip.c Log Message: spl leak, found by Mootja To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/dev/ppbus/if_plip.c Please note that diffs

Re: CVS commit: src/sys/arch

2017-06-14 Thread Maxime Villard
Le 14/06/2017 à 15:34, Joerg Sonnenberger a écrit : On Wed, Jun 14, 2017 at 12:27:24PM +, Maxime Villard wrote: Module Name:src Committed By: maxv Date: Wed Jun 14 12:27:24 UTC 2017 Modified Files: src/sys/arch/amd64/include: param.h src/sys/arch/i386

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 06:32:52 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Reorder these loops to reduce the number of enter->flush. I figured out yesterday that this has a clear impact: a system with 16TB of hard-coded

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 06:32:52 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Reorder these loops to reduce the number of enter->flush. I figured out yesterday that this has a clear impact: a system with 16TB of hard-coded

Re: CVS commit: src/sys

2017-06-15 Thread Maxime Villard
Le 14/06/2017 à 20:07, Manuel Bouyer a écrit : On Wed, Jun 14, 2017 at 05:48:41PM +, Maxime Villard wrote: Module Name:src Committed By: maxv Date: Wed Jun 14 17:48:41 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmc.c src/sys/secmodel/suser

Re: CVS commit: src/sys

2017-06-15 Thread Maxime Villard
Le 15/06/2017 à 10:28, Manuel Bouyer a écrit : On Thu, Jun 15, 2017 at 10:11:21AM +0200, Maxime Villard wrote: There were several strong objections to our change in this thread: http://mail-index.netbsd.org/tech-kern/2017/03/28/msg021705.html Man, that's another thread. My commit is about

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 09:31:48 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Mmh, correctly handle the physmem % lvl == 0 case. Don't know how I didn't see this in the first place. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 09:31:48 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Mmh, correctly handle the physmem % lvl == 0 case. Don't know how I didn't see this in the first place. To generate a diff of this commit: cvs

Re: CVS commit: src/sys

2017-06-15 Thread Maxime Villard
Le 15/06/2017 à 12:01, Manuel Bouyer a écrit : On Thu, Jun 15, 2017 at 11:14:27AM +0200, Maxime Villard wrote: I can't see how this improves the security. AFAIK on linux PMCs can be used without root. We don't do application tracking, contrary to linux. That is, we don't save/restore

CVS commit: src/sys/arch/amd64/include

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 11:25:52 UTC 2017 Modified Files: src/sys/arch/amd64/include: vmparam.h Log Message: Correct these values. They must be consistent with NKL4_MAX_ENTRIES, otherwise the kernel thinks it has ~126TB of va while pmap knows

CVS commit: src/sys/arch/amd64/include

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 11:25:52 UTC 2017 Modified Files: src/sys/arch/amd64/include: vmparam.h Log Message: Correct these values. They must be consistent with NKL4_MAX_ENTRIES, otherwise the kernel thinks it has ~126TB of va while pmap knows

Re: CVS commit: src/sys/arch

2017-06-15 Thread Maxime Villard
Le 15/06/2017 à 14:15, Joerg Sonnenberger a écrit : On Thu, Jun 15, 2017 at 07:29:22AM +0200, Maxime Villard wrote: Le 14/06/2017 à 15:34, Joerg Sonnenberger a écrit : On Wed, Jun 14, 2017 at 12:27:24PM +, Maxime Villard wrote: Module Name:src Committed By: maxv Date: Wed

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 13:42:56 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Fix a subtle but important bug in pmap_growkernel. When adding new toplevel slots to pmap_kernel, we are implicitly using the recursive slot;

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 13:42:56 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Fix a subtle but important bug in pmap_growkernel. When adding new toplevel slots to pmap_kernel, we are implicitly using the recursive slot;

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 07:05:32 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Limit the size of the direct map with a 2MB granularity (instead of 1GB). This way if there's a computation error somewhere we will fault

CVS commit: src/sys/arch/x86/x86

2017-06-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Jun 15 07:05:32 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Limit the size of the direct map with a 2MB granularity (instead of 1GB). This way if there's a computation error somewhere we will fault

CVS commit: src/sys/arch/x86/x86

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 07:45:13 UTC 2017 Modified Files: src/sys/arch/x86/x86: vm_machdep.c Log Message: Check (inside), not (!outside). It explains the two install failures reported between pmap.h::r1.65 and vmparam.h::r1.40. To generate a

CVS commit: src/sys/arch/x86/x86

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 07:45:13 UTC 2017 Modified Files: src/sys/arch/x86/x86: vm_machdep.c Log Message: Check (inside), not (!outside). It explains the two install failures reported between pmap.h::r1.65 and vmparam.h::r1.40. To generate a

CVS commit: src/sys/arch/x86/include

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 08:07:03 UTC 2017 Modified Files: src/sys/arch/x86/include: pmap.h Log Message: Actually, use slot 456 instead, so that it fits a cache line. To generate a diff of this commit: cvs rdiff -u -r1.66 -r1.67

CVS commit: src/sys/arch/x86/include

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 08:07:03 UTC 2017 Modified Files: src/sys/arch/x86/include: pmap.h Log Message: Actually, use slot 456 instead, so that it fits a cache line. To generate a diff of this commit: cvs rdiff -u -r1.66 -r1.67

CVS commit: src/sys/arch/amd64/include

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 08:40:46 UTC 2017 Modified Files: src/sys/arch/amd64/include: pmap.h vmparam.h Log Message: Increase the kernel heap size from 512GB to 32TB, in such a way that it is able to map the maximum amount of ram supported twice

CVS commit: src/sys/arch/amd64/include

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 08:40:46 UTC 2017 Modified Files: src/sys/arch/amd64/include: pmap.h vmparam.h Log Message: Increase the kernel heap size from 512GB to 32TB, in such a way that it is able to map the maximum amount of ram supported twice

CVS commit: src/sys/arch/i386/i386

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 09:32:53 UTC 2017 Modified Files: src/sys/arch/i386/i386: gdt.c Log Message: Remove dead and broken code. It is not a bad idea to implement USER_LDT on Xen, but it certainly shouldn't be done this way. To generate a

CVS commit: src/sys/arch/i386/i386

2017-06-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jun 17 09:32:53 UTC 2017 Modified Files: src/sys/arch/i386/i386: gdt.c Log Message: Remove dead and broken code. It is not a bad idea to implement USER_LDT on Xen, but it certainly shouldn't be done this way. To generate a

CVS commit: src/sys/arch/x86/include

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 12:49:37 UTC 2017 Modified Files: src/sys/arch/x86/include: pmap.h Log Message: Move the direct map from slot 509 to slot 460. We will increase its size dynamically. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/x86/include

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 12:49:37 UTC 2017 Modified Files: src/sys/arch/x86/include: pmap.h Log Message: Move the direct map from slot 509 to slot 460. We will increase its size dynamically. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 12:27:24 UTC 2017 Modified Files: src/sys/arch/amd64/include: param.h src/sys/arch/i386/include: param.h src/sys/arch/x86/x86: x86_machdep.c Log Message: Define MAXPHYSMEM globally. To generate a diff

CVS commit: src/sys/arch

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 12:27:24 UTC 2017 Modified Files: src/sys/arch/amd64/include: param.h src/sys/arch/i386/include: param.h src/sys/arch/x86/x86: x86_machdep.c Log Message: Define MAXPHYSMEM globally. To generate a diff

CVS commit: src/sys/arch/x86

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 14:17:15 UTC 2017 Modified Files: src/sys/arch/x86/include: pmap.h src/sys/arch/x86/x86: pmap.c Log Message: Give the direct map 32 slots (16TB of va). This matches MAXPHYSMEM, in such a way that the direct map

CVS commit: src/sys/arch/x86

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 14:17:15 UTC 2017 Modified Files: src/sys/arch/x86/include: pmap.h src/sys/arch/x86/x86: pmap.c Log Message: Give the direct map 32 slots (16TB of va). This matches MAXPHYSMEM, in such a way that the direct map

CVS commit: src/sys/arch/i386/i386

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:21:04 UTC 2017 Modified Files: src/sys/arch/i386/i386: i386_trap.S Log Message: Disable interrupts for T_NMI (inline calltrap). Note that there's still a way to evade the NMI mode here, if a segment register faults in

CVS commit: src/sys/arch/i386/i386

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:21:04 UTC 2017 Modified Files: src/sys/arch/i386/i386: i386_trap.S Log Message: Disable interrupts for T_NMI (inline calltrap). Note that there's still a way to evade the NMI mode here, if a segment register faults in

CVS commit: src/sys

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:48:41 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmc.c src/sys/secmodel/suser: secmodel_suser.c src/sys/sys: kauth.h Log Message: Make the PMC syscalls privileged. To generate a diff of this

CVS commit: src/sys/arch/i386/i386

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:02:16 UTC 2017 Modified Files: src/sys/arch/i386/i386: i386_trap.S Log Message: style To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/i386/i386/i386_trap.S Please note that diffs are not

CVS commit: src/sys/arch/i386/include

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:09:00 UTC 2017 Modified Files: src/sys/arch/i386/include: frameasm.h Log Message: style To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/i386/include/frameasm.h Please note that diffs are

CVS commit: src/sys/arch/i386/include

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:09:00 UTC 2017 Modified Files: src/sys/arch/i386/include: frameasm.h Log Message: style To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/i386/include/frameasm.h Please note that diffs are

CVS commit: src/sys

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:48:41 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmc.c src/sys/secmodel/suser: secmodel_suser.c src/sys/sys: kauth.h Log Message: Make the PMC syscalls privileged. To generate a diff of this

CVS commit: src/usr.bin/pmc

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:54:01 UTC 2017 Modified Files: src/usr.bin/pmc: pmc.c Log Message: Check argc, and add a message. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/usr.bin/pmc/pmc.c Please note that diffs are not

CVS commit: src/sys/arch/i386/i386

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:02:16 UTC 2017 Modified Files: src/sys/arch/i386/i386: i386_trap.S Log Message: style To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/i386/i386/i386_trap.S Please note that diffs are not

CVS commit: src/usr.bin/pmc

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 17:54:01 UTC 2017 Modified Files: src/usr.bin/pmc: pmc.c Log Message: Check argc, and add a message. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/usr.bin/pmc/pmc.c Please note that diffs are not

CVS commit: src/sys/arch/amd64/conf

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 07:45:45 UTC 2017 Modified Files: src/sys/arch/amd64/conf: kern.ldscript Log Message: Fix a pretty dumb mistake I made in r1.22: the alignment needs to be in the bss, otherwise the bootloader will use memory before

CVS commit: src/sys/arch/amd64/conf

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 07:45:45 UTC 2017 Modified Files: src/sys/arch/amd64/conf: kern.ldscript Log Message: Fix a pretty dumb mistake I made in r1.22: the alignment needs to be in the bss, otherwise the bootloader will use memory before

CVS commit: src/sys/arch/x86/x86

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 08:12:22 UTC 2017 Modified Files: src/sys/arch/x86/x86: x86_machdep.c Log Message: Fix a bug introduced in bus_space.c::r1.39. This check too is hard-coded. Might have had a cumulative effect on PR/52000. To generate a

CVS commit: src/sys/arch/x86/x86

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 08:12:22 UTC 2017 Modified Files: src/sys/arch/x86/x86: x86_machdep.c Log Message: Fix a bug introduced in bus_space.c::r1.39. This check too is hard-coded. Might have had a cumulative effect on PR/52000. To generate a

CVS commit: src/sys/arch/x86/include

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 08:45:42 UTC 2017 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: Add EFER_TCE. This would be an interesting feature to have, since it reduces the indirect cost of invlpg; but I'm not convinced the

CVS commit: src/sys/arch/x86/include

2017-06-14 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 14 08:45:42 UTC 2017 Modified Files: src/sys/arch/x86/include: specialreg.h Log Message: Add EFER_TCE. This would be an interesting feature to have, since it reduces the indirect cost of invlpg; but I'm not convinced the

CVS commit: src/sys/arch/amd64

2017-09-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Sep 15 17:32:12 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S locore.S src/sys/arch/amd64/include: frameasm.h Log Message: Declare INTRFASTEXIT as a function, so that there is only one iretq in the

CVS commit: src/sys/arch/amd64/amd64

2017-09-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Sep 15 17:22:09 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: trap.c Log Message: Obviously, I was being absolutely dumb here; it's XEN, not Xen. To generate a diff of this commit: cvs rdiff -u -r1.99 -r1.100

CVS commit: src/sys/arch/amd64/amd64

2017-09-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Sep 15 17:22:09 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: trap.c Log Message: Obviously, I was being absolutely dumb here; it's XEN, not Xen. To generate a diff of this commit: cvs rdiff -u -r1.99 -r1.100

CVS commit: src/sys/arch/amd64

2017-09-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Sep 15 17:32:12 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S locore.S src/sys/arch/amd64/include: frameasm.h Log Message: Declare INTRFASTEXIT as a function, so that there is only one iretq in the

CVS commit: src/sys/arch

2017-09-16 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 16 09:28:38 UTC 2017 Modified Files: src/sys/arch/x86/include: cpu.h src/sys/arch/xen/x86: x86_xpmap.c Log Message: Move xpq_idx into cpu_info, to prevent false sharing between CPUs. Saves 10s when doing a

CVS commit: src/sys/arch

2017-09-16 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 16 09:28:38 UTC 2017 Modified Files: src/sys/arch/x86/include: cpu.h src/sys/arch/xen/x86: x86_xpmap.c Log Message: Move xpq_idx into cpu_info, to prevent false sharing between CPUs. Saves 10s when doing a

CVS commit: src/sys/arch/amd64/acpi

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 10:18:49 UTC 2017 Modified Files: src/sys/arch/amd64/acpi: acpi_wakeup_low.S Log Message: Make sure %edx is clear. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/amd64/acpi/acpi_wakeup_low.S

CVS commit: src/sys/arch/amd64/acpi

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 10:18:49 UTC 2017 Modified Files: src/sys/arch/amd64/acpi: acpi_wakeup_low.S Log Message: Make sure %edx is clear. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/amd64/acpi/acpi_wakeup_low.S

CVS commit: src/sys/arch/x86/acpi

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 10:00:00 UTC 2017 Modified Files: src/sys/arch/x86/acpi: acpi_wakeup.c Log Message: Reinitialize the PAT MSR when waking up, otherwise the write-combined pages become write-through. To generate a diff of this commit:

CVS commit: src/sys/arch/x86/acpi

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 10:00:00 UTC 2017 Modified Files: src/sys/arch/x86/acpi: acpi_wakeup.c Log Message: Reinitialize the PAT MSR when waking up, otherwise the write-combined pages become write-through. To generate a diff of this commit:

CVS commit: src/sys/arch/x86/x86

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 11:01:32 UTC 2017 Modified Files: src/sys/arch/x86/x86: x86_machdep.c Log Message: Make MTRR_GET privileged, the structures are not always zeroed (thereby leaking information), and beyond that we are not particularly

CVS commit: src/sys/arch/x86/x86

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 11:01:32 UTC 2017 Modified Files: src/sys/arch/x86/x86: x86_machdep.c Log Message: Make MTRR_GET privileged, the structures are not always zeroed (thereby leaking information), and beyond that we are not particularly

CVS commit: src/sys/arch/x86/acpi

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 10:38:59 UTC 2017 Modified Files: src/sys/arch/x86/acpi: acpi_wakeup.c Log Message: Initialize the errata MSRs when waking up, otherwise they are clear and we're re-enabling certain CPU bugs. To generate a diff of this

CVS commit: src/sys/arch/x86/acpi

2017-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 23 10:38:59 UTC 2017 Modified Files: src/sys/arch/x86/acpi: acpi_wakeup.c Log Message: Initialize the errata MSRs when waking up, otherwise they are clear and we're re-enabling certain CPU bugs. To generate a diff of this

CVS commit: src/sys/arch/i386

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:59:23 UTC 2017 Modified Files: src/sys/arch/i386/i386: locore.S src/sys/arch/i386/include: frameasm.h Log Message: Declare INTRFASTEXIT as a function, like amd64; will be expanded soon. To generate a diff of

CVS commit: src/sys/arch/i386

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:59:23 UTC 2017 Modified Files: src/sys/arch/i386/i386: locore.S src/sys/arch/i386/include: frameasm.h Log Message: Declare INTRFASTEXIT as a function, like amd64; will be expanded soon. To generate a diff of

CVS commit: src/sys/arch/i386/include

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:11:19 UTC 2017 Removed Files: src/sys/arch/i386/include: tlog.h Log Message: Remove tlog.h - unused now. Note that it is not installed. To generate a diff of this commit: cvs rdiff -u -r1.4 -r0

CVS commit: src/sys/arch/i386/include

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:11:19 UTC 2017 Removed Files: src/sys/arch/i386/include: tlog.h Log Message: Remove tlog.h - unused now. Note that it is not installed. To generate a diff of this commit: cvs rdiff -u -r1.4 -r0

CVS commit: src/sys

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:41:35 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: netbsd32_machdep.c trap.c src/sys/arch/amd64/include: cpu.h segments.h src/sys/arch/i386/i386: compat_13_machdep.c compat_16_machdep.c

CVS commit: src/sys

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:41:35 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: netbsd32_machdep.c trap.c src/sys/arch/amd64/include: cpu.h segments.h src/sys/arch/i386/i386: compat_13_machdep.c compat_16_machdep.c

CVS commit: src/sys/arch

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:04:52 UTC 2017 Modified Files: src/sys/arch/i386/i386: db_interface.c genassym.cf machdep.c src/sys/arch/i386/include: frameasm.h src/sys/arch/x86/x86: cpu.c src/sys/arch/xen/x86: cpu.c Log

CVS commit: src/sys/arch

2017-09-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Sep 17 09:04:52 UTC 2017 Modified Files: src/sys/arch/i386/i386: db_interface.c genassym.cf machdep.c src/sys/arch/i386/include: frameasm.h src/sys/arch/x86/x86: cpu.c src/sys/arch/xen/x86: cpu.c Log

CVS commit: src/sys/arch/x86/x86

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 13:49:38 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Use roundup instead. Otherwise some (userland) pages could get mapped in the text large pages. We were using roundup to improve performance on

CVS commit: src/sys/lib/libsa

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 13:51:31 UTC 2017 Modified Files: src/sys/lib/libsa: loadfile_elf32.c Log Message: Improve comments. To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/lib/libsa/loadfile_elf32.c Please note that

CVS commit: src/sys/arch/x86/x86

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 13:49:38 UTC 2017 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: Use roundup instead. Otherwise some (userland) pages could get mapped in the text large pages. We were using roundup to improve performance on

CVS commit: src/sys/lib/libsa

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 13:51:31 UTC 2017 Modified Files: src/sys/lib/libsa: loadfile_elf32.c Log Message: Improve comments. To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/lib/libsa/loadfile_elf32.c Please note that

CVS commit: src/sys/arch

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 09:06:50 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: machdep.c src/sys/arch/amd64/conf: GENERIC_KASLR files.amd64 src/sys/arch/i386/conf: files.i386 src/sys/arch/x86/x86: pmap.c

CVS commit: src/sys/arch

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 09:06:50 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: machdep.c src/sys/arch/amd64/conf: GENERIC_KASLR files.amd64 src/sys/arch/i386/conf: files.i386 src/sys/arch/x86/x86: pmap.c

CVS commit: src/sys/arch/amd64

2017-10-08 Thread Maxime Villard
Foundation + * by Maxime Villard. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions

CVS commit: src/sys/arch/amd64

2017-10-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 8 08:26:01 UTC 2017 Modified Files: src/sys/arch/amd64/conf: files.amd64 Added Files: src/sys/arch/amd64/amd64: prekern.c Log Message: Add the prekern entry point in the kernel. To generate a diff of this commit:

Re: CVS commit: src/sys/arch/x86/x86

2017-10-03 Thread Maxime Villard
Le 03/10/2017 à 21:14, Joerg Sonnenberger a écrit : I'm not responding to this nonsensical thread anymore, everything got told months ago. The option is here, people don't need to give a damn about it unless they explicitly want to - which is still legitimate in some cases, including for kaslr,

CVS commit: src/sys/arch/amd64/stand

2017-10-10 Thread Maxime Villard
+ * by Maxime Villard. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions

CVS commit: src/sys/arch/amd64/stand

2017-10-10 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Tue Oct 10 09:29:14 UTC 2017 Added Files: src/sys/arch/amd64/stand: Makefile src/sys/arch/amd64/stand/prekern: Makefile console.c elf.c locore.S mm.c pdir.h prekern.c prekern.h prekern.ldscript redef.h trap.S

CVS commit: src/sys/arch/amd64/stand/prekern

2017-10-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 15 06:37:32 UTC 2017 Modified Files: src/sys/arch/amd64/stand/prekern: mm.c Log Message: Descend the page tree from L4 to L1, instead of allocating a separate branch and linking it at the end. This way we don't need to

CVS commit: src/sys/arch/amd64/stand/prekern

2017-10-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 15 06:37:32 UTC 2017 Modified Files: src/sys/arch/amd64/stand/prekern: mm.c Log Message: Descend the page tree from L4 to L1, instead of allocating a separate branch and linking it at the end. This way we don't need to

CVS commit: src/sys/arch

2017-10-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 15 10:58:32 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: cpufunc.S machdep.c src/sys/arch/x86/x86: sys_machdep.c src/sys/arch/xen/x86: xenfunc.c Log Message: Add setusergs on Xen, and simplify. To

CVS commit: src/sys/arch

2017-10-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 15 10:58:32 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: cpufunc.S machdep.c src/sys/arch/x86/x86: sys_machdep.c src/sys/arch/xen/x86: xenfunc.c Log Message: Add setusergs on Xen, and simplify. To

CVS commit: src/sys

2017-10-15 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 15 11:36:15 UTC 2017 Modified Files: src/sys/arch/amd64/amd64: netbsd32_machdep.c src/sys/compat/linux32/arch/amd64: linux32_machdep.c Log Message: Make sure the 32bit LWPs don't have MDL_IRET set. That's not a

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