CVS commit: src/sys/dev/nvmm/x86

2023-11-06 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Mon Nov  6 17:02:17 UTC 2023

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm_x86_vmx: vmx_vmptrst: Sprinkle __diagused to fix clang !DIAGNOSTIC build


To generate a diff of this commit:
cvs rdiff -u -r1.85 -r1.86 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.85 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.86
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.85	Tue Sep 13 20:10:04 2022
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Mon Nov  6 17:02:17 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.85 2022/09/13 20:10:04 riastradh Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.86 2023/11/06 17:02:17 rin Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.85 2022/09/13 20:10:04 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.86 2023/11/06 17:02:17 rin Exp $");
 
 #include 
 #include 
@@ -135,7 +135,7 @@ vmx_vmwrite(uint64_t field, uint64_t val
 	);
 }
 
-static inline paddr_t
+static inline paddr_t __diagused
 vmx_vmptrst(void)
 {
 	paddr_t pa;



CVS commit: src/sys/dev/nvmm/x86

2023-11-06 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Mon Nov  6 17:02:17 UTC 2023

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm_x86_vmx: vmx_vmptrst: Sprinkle __diagused to fix clang !DIAGNOSTIC build


To generate a diff of this commit:
cvs rdiff -u -r1.85 -r1.86 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2023-02-22 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Thu Feb 23 02:54:02 UTC 2023

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm: Filter CR4 bits on x86 SVM (AMD).

In particular, prohibit PKE, Protection Key Enable, which requires
some additional management of CPU state by nvmm.


To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.84 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.85
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.84	Sat Aug 20 23:48:51 2022
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Thu Feb 23 02:54:02 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.84 2022/08/20 23:48:51 riastradh Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.85 2023/02/23 02:54:02 riastradh Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.84 2022/08/20 23:48:51 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.85 2023/02/23 02:54:02 riastradh Exp $");
 
 #include 
 #include 
@@ -523,6 +523,33 @@ static uint64_t svm_xcr0_mask __read_mos
 #define CR4_TLB_FLUSH \
 	(CR4_PSE|CR4_PAE|CR4_PGE|CR4_PCIDE|CR4_SMEP)
 
+#define CR4_VALID \
+	(CR4_VME |			\
+	 CR4_PVI |			\
+	 CR4_TSD |			\
+	 CR4_DE |			\
+	 CR4_PSE |			\
+	 CR4_PAE |			\
+	 CR4_MCE |			\
+	 CR4_PGE |			\
+	 CR4_PCE |			\
+	 CR4_OSFXSR |			\
+	 CR4_OSXMMEXCPT |		\
+	 CR4_UMIP |			\
+	 /* CR4_LA57 excluded */	\
+	 /* bit 13 reserved on AMD */	\
+	 /* bit 14 reserved on AMD */	\
+	 /* bit 15 reserved on AMD */	\
+	 CR4_FSGSBASE |			\
+	 CR4_PCIDE |			\
+	 CR4_OSXSAVE |			\
+	 /* bit 19 reserved on AMD */	\
+	 CR4_SMEP |			\
+	 CR4_SMAP			\
+	 /* CR4_PKE excluded */		\
+	 /* CR4_CET excluded */		\
+	 /* bits 24:63 reserved on AMD */)
+
 /* -- */
 
 struct svm_machdata {
@@ -1853,6 +1880,7 @@ svm_vcpu_setstate(struct nvmm_cpu *vcpu)
 		vmcb->state.cr2 = state->crs[NVMM_X64_CR_CR2];
 		vmcb->state.cr3 = state->crs[NVMM_X64_CR_CR3];
 		vmcb->state.cr4 = state->crs[NVMM_X64_CR_CR4];
+		vmcb->state.cr4 &= CR4_VALID;
 
 		vmcb->ctrl.v &= ~VMCB_CTRL_V_TPR;
 		vmcb->ctrl.v |= __SHIFTIN(state->crs[NVMM_X64_CR_CR8],



CVS commit: src/sys/dev/nvmm/x86

2023-02-22 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Thu Feb 23 02:54:02 UTC 2023

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm: Filter CR4 bits on x86 SVM (AMD).

In particular, prohibit PKE, Protection Key Enable, which requires
some additional management of CPU state by nvmm.


To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2022-05-13 Thread Tobias Nygren
Module Name:src
Committed By:   tnn
Date:   Fri May 13 19:34:47 UTC 2022

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm_x86_vmx.c: remove an #ifdef DIAGNOSTIC, it is wrong since r1.66


To generate a diff of this commit:
cvs rdiff -u -r1.82 -r1.83 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.82 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.83
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.82	Fri Mar 26 15:59:53 2021
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Fri May 13 19:34:47 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.82 2021/03/26 15:59:53 reinoud Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.83 2022/05/13 19:34:47 tnn Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.82 2021/03/26 15:59:53 reinoud Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.83 2022/05/13 19:34:47 tnn Exp $");
 
 #include 
 #include 
@@ -134,7 +134,6 @@ vmx_vmwrite(uint64_t field, uint64_t val
 	);
 }
 
-#ifdef DIAGNOSTIC
 static inline paddr_t
 vmx_vmptrst(void)
 {
@@ -149,7 +148,6 @@ vmx_vmptrst(void)
 
 	return pa;
 }
-#endif
 
 static inline void
 vmx_vmptrld(paddr_t *pa)



CVS commit: src/sys/dev/nvmm/x86

2022-05-13 Thread Tobias Nygren
Module Name:src
Committed By:   tnn
Date:   Fri May 13 19:34:47 UTC 2022

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm_x86_vmx.c: remove an #ifdef DIAGNOSTIC, it is wrong since r1.66


To generate a diff of this commit:
cvs rdiff -u -r1.82 -r1.83 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-09-08 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Sep  8 17:00:07 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: improve the handling of CR0

 - CR0_ET is hard-wired to 1 in the cpu, so force CR0_ET to 1 in the
   shadow.
 - Clarify.


To generate a diff of this commit:
cvs rdiff -u -r1.78 -r1.79 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.78 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.79
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.78	Sun Sep  6 02:18:53 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Sep  8 17:00:07 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.78 2020/09/06 02:18:53 riastradh Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.79 2020/09/08 17:00:07 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.78 2020/09/06 02:18:53 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.79 2020/09/08 17:00:07 maxv Exp $");
 
 #include 
 #include 
@@ -728,8 +728,8 @@ static uint64_t vmx_xcr0_mask __read_mos
 #define MSRBM_NPAGES	1
 #define MSRBM_SIZE	(MSRBM_NPAGES * PAGE_SIZE)
 
-#define CR0_STATIC \
-	(CR0_NW|CR0_CD|CR0_ET)
+#define CR0_STATIC_MASK \
+	(CR0_ET | CR0_NW | CR0_CD)
 
 #define CR4_VALID \
 	(CR4_VME |			\
@@ -1572,7 +1572,7 @@ vmx_inkernel_handle_cr0(struct nvmm_mach
 uint64_t qual)
 {
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
-	uint64_t type, gpr, oldcr0, cr0;
+	uint64_t type, gpr, oldcr0, realcr0, fakecr0;
 	uint64_t efer, ctls1;
 
 	type = __SHIFTOUT(qual, VMX_QUAL_CR_TYPE);
@@ -1584,15 +1584,24 @@ vmx_inkernel_handle_cr0(struct nvmm_mach
 	KASSERT(gpr < 16);
 
 	if (gpr == NVMM_X64_GPR_RSP) {
-		gpr = vmx_vmread(VMCS_GUEST_RSP);
+		fakecr0 = vmx_vmread(VMCS_GUEST_RSP);
 	} else {
-		gpr = cpudata->gprs[gpr];
+		fakecr0 = cpudata->gprs[gpr];
 	}
 
-	cr0 = gpr | CR0_NE | CR0_ET;
-	cr0 &= ~(CR0_NW|CR0_CD);
+	/*
+	 * fakecr0 is the value the guest believes is in %cr0. realcr0 is the
+	 * actual value in %cr0.
+	 *
+	 * In fakecr0 we must force CR0_ET to 1.
+	 *
+	 * In realcr0 we must force CR0_NW and CR0_CD to 0, and CR0_ET and
+	 * CR0_NE to 1.
+	 */
+	fakecr0 |= CR0_ET;
+	realcr0 = (fakecr0 & ~CR0_STATIC_MASK) | CR0_ET | CR0_NE;
 
-	if (vmx_check_cr(cr0, vmx_cr0_fixed0, vmx_cr0_fixed1) == -1) {
+	if (vmx_check_cr(realcr0, vmx_cr0_fixed0, vmx_cr0_fixed1) == -1) {
 		return -1;
 	}
 
@@ -1601,7 +1610,7 @@ vmx_inkernel_handle_cr0(struct nvmm_mach
 	 * from CR3.
 	 */
 
-	if (cr0 & CR0_PG) {
+	if (realcr0 & CR0_PG) {
 		ctls1 = vmx_vmread(VMCS_ENTRY_CTLS);
 		efer = vmx_vmread(VMCS_GUEST_IA32_EFER);
 		if (efer & EFER_LME) {
@@ -1615,14 +1624,14 @@ vmx_inkernel_handle_cr0(struct nvmm_mach
 		vmx_vmwrite(VMCS_ENTRY_CTLS, ctls1);
 	}
 
-	oldcr0 = (vmx_vmread(VMCS_CR0_SHADOW) & CR0_STATIC) |
-	(vmx_vmread(VMCS_GUEST_CR0) & ~CR0_STATIC);
-	if ((oldcr0 ^ gpr) & CR0_TLB_FLUSH) {
+	oldcr0 = (vmx_vmread(VMCS_CR0_SHADOW) & CR0_STATIC_MASK) |
+	(vmx_vmread(VMCS_GUEST_CR0) & ~CR0_STATIC_MASK);
+	if ((oldcr0 ^ fakecr0) & CR0_TLB_FLUSH) {
 		cpudata->gtlb_want_flush = true;
 	}
 
-	vmx_vmwrite(VMCS_CR0_SHADOW, gpr);
-	vmx_vmwrite(VMCS_GUEST_CR0, cr0);
+	vmx_vmwrite(VMCS_CR0_SHADOW, fakecr0);
+	vmx_vmwrite(VMCS_GUEST_CR0, realcr0);
 	vmx_inkernel_advance();
 	return 0;
 }
@@ -2574,15 +2583,26 @@ vmx_vcpu_setstate(struct nvmm_cpu *vcpu)
 
 	if (flags & NVMM_X64_STATE_CRS) {
 		/*
-		 * CR0_NE and CR4_VMXE are mandatory.
+		 * CR0_ET must be 1 both in the shadow and the real register.
+		 * CR0_NE must be 1 in the real register.
+		 * CR0_NW and CR0_CD must be 0 in the real register.
 		 */
-		vmx_vmwrite(VMCS_CR0_SHADOW, state->crs[NVMM_X64_CR_CR0]);
+		vmx_vmwrite(VMCS_CR0_SHADOW,
+		(state->crs[NVMM_X64_CR_CR0] & CR0_STATIC_MASK) |
+		CR0_ET);
 		vmx_vmwrite(VMCS_GUEST_CR0,
-		state->crs[NVMM_X64_CR_CR0] | CR0_NE);
+		(state->crs[NVMM_X64_CR_CR0] & ~CR0_STATIC_MASK) |
+		CR0_ET | CR0_NE);
+
 		cpudata->gcr2 = state->crs[NVMM_X64_CR_CR2];
-		vmx_vmwrite(VMCS_GUEST_CR3, state->crs[NVMM_X64_CR_CR3]); // XXX PDPTE?
+
+		/* XXX We are not handling PDPTE here. */
+		vmx_vmwrite(VMCS_GUEST_CR3, state->crs[NVMM_X64_CR_CR3]);
+
+		/* CR4_VMXE is mandatory. */
 		vmx_vmwrite(VMCS_GUEST_CR4,
 		(state->crs[NVMM_X64_CR_CR4] & CR4_VALID) | CR4_VMXE);
+
 		cpudata->gcr8 = state->crs[NVMM_X64_CR_CR8];
 
 		if (vmx_xcr0_mask != 0) {
@@ -2715,8 +2735,8 @@ vmx_vcpu_getstate(struct nvmm_cpu *vcpu)
 
 	if (flags & NVMM_X64_STATE_CRS) {
 		state->crs[NVMM_X64_CR_CR0] =
-		(vmx_vmread(VMCS_CR0_SHADOW) & CR0_STATIC) |
-		(vmx_vmread(VMCS_GUEST_CR0) & ~CR0_STATIC);
+		(vmx_vmread(VMCS_CR0_SHADOW) & CR0_STATIC_MASK) |
+		(vmx_vmread(VMCS_GUEST_CR0) & ~CR0_STATIC_MASK);
 		

CVS commit: src/sys/dev/nvmm/x86

2020-09-08 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Sep  8 17:02:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
nvmm-x86: avoid hogging behavior observed recently

When the FPU code got rewritten in NetBSD, the dependency on IPL_HIGH was
eliminated, and I took _vcpu_guest_fpu_enter() out of the VCPU loop since
there was no need to be in the splhigh window.

Later, the code was switched to use the kernel FPU API, API that works at
IPL_VM, not at IPL_NONE.

These two changes mean that the whole VCPU loop is now executing at IPL_VM,
which is not desired, because it introduces a delay in interrupt processing
on the host in certain cases.

Fix this by putting _vcpu_guest_fpu_enter() back inside the VCPU loop.


To generate a diff of this commit:
cvs rdiff -u -r1.80 -r1.81 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.79 -r1.80 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-09-08 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Sep  8 17:02:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
nvmm-x86: avoid hogging behavior observed recently

When the FPU code got rewritten in NetBSD, the dependency on IPL_HIGH was
eliminated, and I took _vcpu_guest_fpu_enter() out of the VCPU loop since
there was no need to be in the splhigh window.

Later, the code was switched to use the kernel FPU API, API that works at
IPL_VM, not at IPL_NONE.

These two changes mean that the whole VCPU loop is now executing at IPL_VM,
which is not desired, because it introduces a delay in interrupt processing
on the host in certain cases.

Fix this by putting _vcpu_guest_fpu_enter() back inside the VCPU loop.


To generate a diff of this commit:
cvs rdiff -u -r1.80 -r1.81 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.79 -r1.80 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.80 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.81
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.80	Tue Sep  8 16:58:38 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Tue Sep  8 17:02:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.80 2020/09/08 16:58:38 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.81 2020/09/08 17:02:03 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.80 2020/09/08 16:58:38 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.81 2020/09/08 17:02:03 maxv Exp $");
 
 #include 
 #include 
@@ -1328,9 +1328,6 @@ svm_exit_xsetbv(struct nvmm_machine *mac
 	}
 
 	cpudata->gxcr0 = val;
-	if (svm_xcr0_mask != 0) {
-		wrxcr(0, cpudata->gxcr0);
-	}
 
 	svm_inkernel_advance(cpudata->vmcb);
 	return;
@@ -1516,7 +1513,6 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 
 	svm_vcpu_guest_dbregs_enter(vcpu);
 	svm_vcpu_guest_misc_enter(vcpu);
-	svm_vcpu_guest_fpu_enter(vcpu);
 
 	while (1) {
 		if (cpudata->gtlb_want_flush) {
@@ -1530,11 +1526,13 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 			svm_vmcb_cache_flush(vmcb, VMCB_CTRL_VMCB_CLEAN_I);
 		}
 
+		svm_vcpu_guest_fpu_enter(vcpu);
 		svm_clgi();
 		machgen = svm_htlb_flush(machdata, cpudata);
 		svm_vmrun(cpudata->vmcb_pa, cpudata->gprs);
 		svm_htlb_flush_ack(cpudata, machgen);
 		svm_stgi();
+		svm_vcpu_guest_fpu_leave(vcpu);
 
 		svm_vmcb_cache_default(vmcb);
 
@@ -1622,7 +1620,6 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 
 	cpudata->gtsc = rdtsc() + vmcb->ctrl.tsc_offset;
 
-	svm_vcpu_guest_fpu_leave(vcpu);
 	svm_vcpu_guest_misc_leave(vcpu);
 	svm_vcpu_guest_dbregs_leave(vcpu);
 

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.79 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.80
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.79	Tue Sep  8 17:00:07 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Sep  8 17:02:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.79 2020/09/08 17:00:07 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.80 2020/09/08 17:02:03 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.79 2020/09/08 17:00:07 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.80 2020/09/08 17:02:03 maxv Exp $");
 
 #include 
 #include 
@@ -1969,9 +1969,6 @@ vmx_exit_xsetbv(struct nvmm_machine *mac
 	}
 
 	cpudata->gxcr0 = val;
-	if (vmx_xcr0_mask != 0) {
-		wrxcr(0, cpudata->gxcr0);
-	}
 
 	vmx_inkernel_advance();
 	return;
@@ -2228,7 +2225,6 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 
 	vmx_vcpu_guest_dbregs_enter(vcpu);
 	vmx_vcpu_guest_misc_enter(vcpu);
-	vmx_vcpu_guest_fpu_enter(vcpu);
 
 	while (1) {
 		if (cpudata->gtlb_want_flush) {
@@ -2243,6 +2239,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 			cpudata->gtsc_want_update = false;
 		}
 
+		vmx_vcpu_guest_fpu_enter(vcpu);
 		vmx_cli();
 		machgen = vmx_htlb_flush(machdata, cpudata);
 		lcr2(cpudata->gcr2);
@@ -2254,6 +2251,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 		cpudata->gcr2 = rcr2();
 		vmx_htlb_flush_ack(cpudata, machgen);
 		vmx_sti();
+		vmx_vcpu_guest_fpu_leave(vcpu);
 
 		if (__predict_false(ret != 0)) {
 			vmx_exit_invalid(exit, -1);
@@ -2349,7 +2347,6 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 
 	cpudata->gtsc = vmx_vmread(VMCS_TSC_OFFSET) + rdtsc();
 
-	vmx_vcpu_guest_fpu_leave(vcpu);
 	vmx_vcpu_guest_misc_leave(vcpu);
 	vmx_vcpu_guest_dbregs_leave(vcpu);
 



CVS commit: src/sys/dev/nvmm/x86

2020-09-08 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Sep  8 17:00:07 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: improve the handling of CR0

 - CR0_ET is hard-wired to 1 in the cpu, so force CR0_ET to 1 in the
   shadow.
 - Clarify.


To generate a diff of this commit:
cvs rdiff -u -r1.78 -r1.79 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-09-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep  4 17:09:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
nvmm-x86: improve the CPUID emulation

 - Mask DTES64, DS_CPL, CID, SDBG, xTPR, PN.
 - B10, B20 and IA64 do not exist, so just remove them.


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.15 src/sys/dev/nvmm/x86/nvmm_x86.c:1.16
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.15	Sat Aug 22 11:00:00 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Fri Sep  4 17:09:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.15 2020/08/22 11:00:00 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.16 2020/09/04 17:09:03 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.15 2020/08/22 11:00:00 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.16 2020/09/04 17:09:03 maxv Exp $");
 
 #include 
 #include 
@@ -235,19 +235,19 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	.ecx =
 	CPUID2_SSE3 |
 	CPUID2_PCLMUL |
-	CPUID2_DTES64 |
+	/* CPUID2_DTES64 excluded */
 	/* CPUID2_MONITOR excluded */
-	CPUID2_DS_CPL |
+	/* CPUID2_DS_CPL excluded */
 	/* CPUID2_VMX excluded */
 	/* CPUID2_SMX excluded */
 	/* CPUID2_EST excluded */
 	/* CPUID2_TM2 excluded */
 	CPUID2_SSSE3 |
-	CPUID2_CID |
-	CPUID2_SDBG |
+	/* CPUID2_CID excluded */
+	/* CPUID2_SDBG excluded */
 	CPUID2_FMA |
 	CPUID2_CX16 |
-	CPUID2_xTPR |
+	/* CPUID2_xTPR excluded */
 	/* CPUID2_PDCM excluded */
 	/* CPUID2_PCID excluded, but re-included in VMX */
 	/* CPUID2_DCA excluded */
@@ -275,7 +275,6 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	/* CPUID_MCE excluded */
 	CPUID_CX8 |
 	CPUID_APIC |
-	CPUID_B10 |	
 	CPUID_SEP |
 	/* CPUID_MTRR excluded */
 	CPUID_PGE |
@@ -283,9 +282,8 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	CPUID_CMOV |
 	CPUID_PAT |
 	CPUID_PSE36 |
-	CPUID_PN |
+	/* CPUID_PN excluded */
 	CPUID_CFLUSH |
-	CPUID_B20 |
 	/* CPUID_DS excluded */
 	/* CPUID_ACPI excluded */
 	CPUID_MMX |
@@ -295,7 +293,6 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	CPUID_SS |
 	CPUID_HTT |
 	/* CPUID_TM excluded */
-	CPUID_IA64 |
 	CPUID_SBF
 };
 



CVS commit: src/sys/dev/nvmm/x86

2020-09-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep  4 17:09:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
nvmm-x86: improve the CPUID emulation

 - Mask DTES64, DS_CPL, CID, SDBG, xTPR, PN.
 - B10, B20 and IA64 do not exist, so just remove them.


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-09-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep  4 17:07:33 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: improve the handling of CR0

 - Flush the guest TLB when certain CR0 bits change.
 - If the guest updates a static bit in CR0, then reflect the change in
   VMCS_CR0_SHADOW, for the guest to get the illusion that the change was
   applied. The "real" CR0 static bits remain unchanged.
 - In vmx_vcpu_{g,s}et_state(), take VMCS_CR0_SHADOW into account.
 - Slightly modify the CR4 handling code, just for more symmetry with CR0.


To generate a diff of this commit:
cvs rdiff -u -r1.74 -r1.75 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-09-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep  4 17:07:33 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: improve the handling of CR0

 - Flush the guest TLB when certain CR0 bits change.
 - If the guest updates a static bit in CR0, then reflect the change in
   VMCS_CR0_SHADOW, for the guest to get the illusion that the change was
   applied. The "real" CR0 static bits remain unchanged.
 - In vmx_vcpu_{g,s}et_state(), take VMCS_CR0_SHADOW into account.
 - Slightly modify the CR4 handling code, just for more symmetry with CR0.


To generate a diff of this commit:
cvs rdiff -u -r1.74 -r1.75 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.74 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.75
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.74	Wed Aug 26 16:32:02 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Fri Sep  4 17:07:33 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.74 2020/08/26 16:32:02 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.75 2020/09/04 17:07:33 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.74 2020/08/26 16:32:02 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.75 2020/09/04 17:07:33 maxv Exp $");
 
 #include 
 #include 
@@ -729,6 +729,9 @@ static uint64_t vmx_xcr0_mask __read_mos
 #define MSRBM_NPAGES	1
 #define MSRBM_SIZE	(MSRBM_NPAGES * PAGE_SIZE)
 
+#define CR0_STATIC \
+	(CR0_NW|CR0_CD|CR0_ET)
+
 #define CR4_VALID \
 	(CR4_VME |			\
 	 CR4_PVI |			\
@@ -1570,7 +1573,7 @@ vmx_inkernel_handle_cr0(struct nvmm_mach
 uint64_t qual)
 {
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
-	uint64_t type, gpr, cr0;
+	uint64_t type, gpr, oldcr0, cr0;
 	uint64_t efer, ctls1;
 
 	type = __SHIFTOUT(qual, VMX_QUAL_CR_TYPE);
@@ -1613,6 +1616,13 @@ vmx_inkernel_handle_cr0(struct nvmm_mach
 		vmx_vmwrite(VMCS_ENTRY_CTLS, ctls1);
 	}
 
+	oldcr0 = (vmx_vmread(VMCS_CR0_SHADOW) & CR0_STATIC) |
+	(vmx_vmread(VMCS_GUEST_CR0) & ~CR0_STATIC);
+	if ((oldcr0 ^ gpr) & CR0_TLB_FLUSH) {
+		cpudata->gtlb_want_flush = true;
+	}
+
+	vmx_vmwrite(VMCS_CR0_SHADOW, gpr);
 	vmx_vmwrite(VMCS_GUEST_CR0, cr0);
 	vmx_inkernel_advance();
 	return 0;
@@ -1623,7 +1633,7 @@ vmx_inkernel_handle_cr4(struct nvmm_mach
 uint64_t qual)
 {
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
-	uint64_t type, gpr, cr4;
+	uint64_t type, gpr, oldcr4, cr4;
 
 	type = __SHIFTOUT(qual, VMX_QUAL_CR_TYPE);
 	if (type != CR_TYPE_WRITE) {
@@ -1647,7 +1657,8 @@ vmx_inkernel_handle_cr4(struct nvmm_mach
 		return -1;
 	}
 
-	if ((vmx_vmread(VMCS_GUEST_CR4) ^ cr4) & CR4_TLB_FLUSH) {
+	oldcr4 = vmx_vmread(VMCS_GUEST_CR4);
+	if ((oldcr4 ^ gpr) & CR4_TLB_FLUSH) {
 		cpudata->gtlb_want_flush = true;
 	}
 
@@ -2566,6 +2577,7 @@ vmx_vcpu_setstate(struct nvmm_cpu *vcpu)
 		/*
 		 * CR0_NE and CR4_VMXE are mandatory.
 		 */
+		vmx_vmwrite(VMCS_CR0_SHADOW, state->crs[NVMM_X64_CR_CR0]);
 		vmx_vmwrite(VMCS_GUEST_CR0,
 		state->crs[NVMM_X64_CR_CR0] | CR0_NE);
 		cpudata->gcr2 = state->crs[NVMM_X64_CR_CR2];
@@ -2703,7 +2715,9 @@ vmx_vcpu_getstate(struct nvmm_cpu *vcpu)
 	}
 
 	if (flags & NVMM_X64_STATE_CRS) {
-		state->crs[NVMM_X64_CR_CR0] = vmx_vmread(VMCS_GUEST_CR0);
+		state->crs[NVMM_X64_CR_CR0] =
+		(vmx_vmread(VMCS_CR0_SHADOW) & CR0_STATIC) |
+		(vmx_vmread(VMCS_GUEST_CR0) & ~CR0_STATIC);
 		state->crs[NVMM_X64_CR_CR2] = cpudata->gcr2;
 		state->crs[NVMM_X64_CR_CR3] = vmx_vmread(VMCS_GUEST_CR3);
 		state->crs[NVMM_X64_CR_CR4] = vmx_vmread(VMCS_GUEST_CR4);
@@ -2892,9 +2906,8 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	vmx_vmwrite(VMCS_ENTRY_MSR_LOAD_COUNT, vmx_msrlist_entry_nmsr);
 	vmx_vmwrite(VMCS_EXIT_MSR_STORE_COUNT, VMX_MSRLIST_EXIT_NMSR);
 
-	/* Force CR0_NW and CR0_CD to zero, CR0_ET to one. */
-	vmx_vmwrite(VMCS_CR0_MASK, CR0_NW|CR0_CD|CR0_ET);
-	vmx_vmwrite(VMCS_CR0_SHADOW, CR0_ET);
+	/* Set the CR0 mask. Any change of these bits causes a VMEXIT. */
+	vmx_vmwrite(VMCS_CR0_MASK, CR0_STATIC);
 
 	/* Force unsupported CR4 fields to zero. */
 	vmx_vmwrite(VMCS_CR4_MASK, CR4_INVALID);



CVS commit: src/sys/dev/nvmm/x86

2020-09-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep  4 17:06:23 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: check the SVM revision

Only revision 1 exists, but check it, for future-proofness.


To generate a diff of this commit:
cvs rdiff -u -r1.74 -r1.75 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-09-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep  4 17:06:23 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: check the SVM revision

Only revision 1 exists, but check it, for future-proofness.


To generate a diff of this commit:
cvs rdiff -u -r1.74 -r1.75 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.74 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.75
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.74	Wed Aug 26 16:33:03 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Fri Sep  4 17:06:23 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.74 2020/08/26 16:33:03 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.75 2020/09/04 17:06:23 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.74 2020/08/26 16:33:03 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.75 2020/09/04 17:06:23 maxv Exp $");
 
 #include 
 #include 
@@ -2445,6 +2445,12 @@ svm_ident(void)
 	}
 	x86_cpuid(0x800a, descs);
 
+	/* Expect revision 1. */
+	if (__SHIFTOUT(descs[0], CPUID_AMD_SVM_REV) != 1) {
+		printf("NVMM: SVM revision not supported\n");
+		return false;
+	}
+
 	/* Want Nested Paging. */
 	if (!(descs[3] & CPUID_AMD_SVM_NP)) {
 		printf("NVMM: SVM-NP not supported\n");



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:33:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: improve the handling of MSR_EFER

Intercept reads of it as well, just to mask EFER_SVME, which the guest
doesn't need to see.


To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:33:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: improve the handling of MSR_EFER

Intercept reads of it as well, just to mask EFER_SVME, which the guest
doesn't need to see.


To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.73 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.74
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.73	Wed Aug 26 16:32:02 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Wed Aug 26 16:33:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.73 2020/08/26 16:32:02 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.74 2020/08/26 16:33:03 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.73 2020/08/26 16:32:02 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.74 2020/08/26 16:33:03 maxv Exp $");
 
 #include 
 #include 
@@ -1170,6 +1170,12 @@ svm_inkernel_handle_msr(struct nvmm_mach
 	size_t i;
 
 	if (exit->reason == NVMM_VCPU_EXIT_RDMSR) {
+		if (exit->u.rdmsr.msr == MSR_EFER) {
+			val = vmcb->state.efer & ~EFER_SVME;
+			vmcb->state.rax = (val & 0x);
+			cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
+			goto handled;
+		}
 		if (exit->u.rdmsr.msr == MSR_NB_CFG) {
 			val = NB_CFG_INITAPICCPUIDLO;
 			vmcb->state.rax = (val & 0x);
@@ -2195,7 +2201,6 @@ svm_vcpu_init(struct nvmm_machine *mach,
 
 	/* Allow direct access to certain MSRs. */
 	memset(cpudata->msrbm, 0xFF, MSRBM_SIZE);
-	svm_vcpu_msr_allow(cpudata->msrbm, MSR_EFER, true, false);
 	svm_vcpu_msr_allow(cpudata->msrbm, MSR_STAR, true, true);
 	svm_vcpu_msr_allow(cpudata->msrbm, MSR_LSTAR, true, true);
 	svm_vcpu_msr_allow(cpudata->msrbm, MSR_CSTAR, true, true);



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:32:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
nvmm-x86: improve the handling of RFLAGS.RF

 - When injecting certain exceptions, set RF. For us to have an up-to-date
   view of RFLAGS, we commit the state before the event.
 - When advancing RIP, clear RF.


To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.73 -r1.74 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.72 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.73
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.72	Wed Aug 26 16:29:19 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Wed Aug 26 16:32:02 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.72 2020/08/26 16:29:19 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.73 2020/08/26 16:32:02 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.72 2020/08/26 16:29:19 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.73 2020/08/26 16:32:02 maxv Exp $");
 
 #include 
 #include 
@@ -676,8 +676,22 @@ svm_event_waitexit_disable(struct nvmm_c
 	svm_vmcb_cache_flush(vmcb, VMCB_CTRL_VMCB_CLEAN_I);
 }
 
+static inline bool
+svm_excp_has_rf(uint8_t vector)
+{
+	switch (vector) {
+	case 1:		/* #DB */
+	case 4:		/* #OF */
+	case 8:		/* #DF */
+	case 18:	/* #MC */
+		return false;
+	default:
+		return true;
+	}
+}
+
 static inline int
-svm_event_has_error(uint8_t vector)
+svm_excp_has_error(uint8_t vector)
 {
 	switch (vector) {
 	case 8:		/* #DF */
@@ -717,7 +731,10 @@ svm_vcpu_inject(struct nvmm_cpu *vcpu)
 			return EINVAL;
 		if (vector == 3 || vector == 0)
 			return EINVAL;
-		err = svm_event_has_error(vector);
+		if (svm_excp_has_rf(vector)) {
+			vmcb->state.rflags |= PSL_RF;
+		}
+		err = svm_excp_has_error(vector);
 		break;
 	case NVMM_VCPU_EVENT_INTR:
 		type = SVM_EVENT_TYPE_HW_INT;
@@ -790,6 +807,7 @@ svm_inkernel_advance(struct vmcb *vmcb)
 	 * debugger.
 	 */
 	vmcb->state.rip = vmcb->ctrl.nrip;
+	vmcb->state.rflags &= ~PSL_RF;
 	vmcb->ctrl.intr &= ~VMCB_CTRL_INTR_SHADOW;
 }
 
@@ -1473,11 +1491,12 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 	uint64_t machgen;
 	int hcpu;
 
+	svm_vcpu_state_commit(vcpu);
+	comm->state_cached = 0;
+
 	if (__predict_false(svm_vcpu_event_commit(vcpu) != 0)) {
 		return EINVAL;
 	}
-	svm_vcpu_state_commit(vcpu);
-	comm->state_cached = 0;
 
 	kpreempt_disable();
 	hcpu = cpu_number();

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.73 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.74
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.73	Wed Aug 26 16:30:50 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Wed Aug 26 16:32:02 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.73 2020/08/26 16:30:50 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.74 2020/08/26 16:32:02 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.73 2020/08/26 16:30:50 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.74 2020/08/26 16:32:02 maxv Exp $");
 
 #include 
 #include 
@@ -1038,8 +1038,22 @@ vmx_event_waitexit_disable(struct nvmm_c
 	vmx_vmwrite(VMCS_PROCBASED_CTLS, ctls1);
 }
 
+static inline bool
+vmx_excp_has_rf(uint8_t vector)
+{
+	switch (vector) {
+	case 1:		/* #DB */
+	case 4:		/* #OF */
+	case 8:		/* #DF */
+	case 18:	/* #MC */
+		return false;
+	default:
+		return true;
+	}
+}
+
 static inline int
-vmx_event_has_error(uint8_t vector)
+vmx_excp_has_error(uint8_t vector)
 {
 	switch (vector) {
 	case 8:		/* #DF */
@@ -1062,9 +1076,9 @@ vmx_vcpu_inject(struct nvmm_cpu *vcpu)
 	struct nvmm_comm_page *comm = vcpu->comm;
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 	int type = 0, err = 0, ret = EINVAL;
+	uint64_t rflags, info, error;
 	u_int evtype;
 	uint8_t vector;
-	uint64_t info, error;
 
 	evtype = comm->event.type;
 	vector = comm->event.vector;
@@ -1079,8 +1093,12 @@ vmx_vcpu_inject(struct nvmm_cpu *vcpu)
 			goto out;
 		if (vector == 3 || vector == 0)
 			goto out;
+		if (vmx_excp_has_rf(vector)) {
+			rflags = vmx_vmread(VMCS_GUEST_RFLAGS);
+			vmx_vmwrite(VMCS_GUEST_RFLAGS, rflags | PSL_RF);
+		}
 		type = INTR_TYPE_HW_EXC;
-		err = vmx_event_has_error(vector);
+		err = vmx_excp_has_error(vector);
 		break;
 	case NVMM_VCPU_EVENT_INTR:
 		type = INTR_TYPE_EXT_INT;
@@ -1151,16 +1169,21 @@ vmx_vcpu_event_commit(struct nvmm_cpu *v
 static inline void
 vmx_inkernel_advance(void)
 {
-	uint64_t rip, inslen, intstate;
+	uint64_t rip, inslen, intstate, rflags;
 
 	/*
 	 * Maybe we should also apply single-stepping and debug exceptions.
 	 * Matters for 

CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:32:03 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
nvmm-x86: improve the handling of RFLAGS.RF

 - When injecting certain exceptions, set RF. For us to have an up-to-date
   view of RFLAGS, we commit the state before the event.
 - When advancing RIP, clear RF.


To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.73 -r1.74 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:30:50 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: improve the handling of CR4

 - Filter out certain features we don't want the guest to enable. This is
   for general correctness, and future-proofness.
 - Flush the guest TLB when certain flags change.


To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.72 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.73
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.72	Sat Aug 22 11:01:10 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Wed Aug 26 16:30:50 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.72 2020/08/22 11:01:10 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.73 2020/08/26 16:30:50 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.72 2020/08/22 11:01:10 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.73 2020/08/26 16:30:50 maxv Exp $");
 
 #include 
 #include 
@@ -729,6 +729,33 @@ static uint64_t vmx_xcr0_mask __read_mos
 #define MSRBM_NPAGES	1
 #define MSRBM_SIZE	(MSRBM_NPAGES * PAGE_SIZE)
 
+#define CR4_VALID \
+	(CR4_VME |			\
+	 CR4_PVI |			\
+	 CR4_TSD |			\
+	 CR4_DE |			\
+	 CR4_PSE |			\
+	 CR4_PAE |			\
+	 CR4_MCE |			\
+	 CR4_PGE |			\
+	 CR4_PCE |			\
+	 CR4_OSFXSR |			\
+	 CR4_OSXMMEXCPT |		\
+	 CR4_UMIP |			\
+	 /* CR4_LA57 excluded */	\
+	 /* CR4_VMXE excluded */	\
+	 /* CR4_SMXE excluded */	\
+	 CR4_FSGSBASE |			\
+	 CR4_PCIDE |			\
+	 CR4_OSXSAVE |			\
+	 CR4_SMEP |			\
+	 CR4_SMAP			\
+	 /* CR4_PKE excluded */		\
+	 /* CR4_CET excluded */		\
+	 /* CR4_PKS excluded */)
+#define CR4_INVALID \
+	(0xULL & ~CR4_VALID)
+
 #define EFER_TLB_FLUSH \
 	(EFER_NXE|EFER_LMA|EFER_LME)
 #define CR0_TLB_FLUSH \
@@ -1589,12 +1616,18 @@ vmx_inkernel_handle_cr4(struct nvmm_mach
 		gpr = cpudata->gprs[gpr];
 	}
 
+	if (gpr & CR4_INVALID) {
+		return -1;
+	}
 	cr4 = gpr | CR4_VMXE;
-
 	if (vmx_check_cr(cr4, vmx_cr4_fixed0, vmx_cr4_fixed1) == -1) {
 		return -1;
 	}
 
+	if ((vmx_vmread(VMCS_GUEST_CR4) ^ cr4) & CR4_TLB_FLUSH) {
+		cpudata->gtlb_want_flush = true;
+	}
+
 	vmx_vmwrite(VMCS_GUEST_CR4, cr4);
 	vmx_inkernel_advance();
 	return 0;
@@ -2514,7 +2547,7 @@ vmx_vcpu_setstate(struct nvmm_cpu *vcpu)
 		cpudata->gcr2 = state->crs[NVMM_X64_CR_CR2];
 		vmx_vmwrite(VMCS_GUEST_CR3, state->crs[NVMM_X64_CR_CR3]); // XXX PDPTE?
 		vmx_vmwrite(VMCS_GUEST_CR4,
-		state->crs[NVMM_X64_CR_CR4] | CR4_VMXE);
+		(state->crs[NVMM_X64_CR_CR4] & CR4_VALID) | CR4_VMXE);
 		cpudata->gcr8 = state->crs[NVMM_X64_CR_CR8];
 
 		if (vmx_xcr0_mask != 0) {
@@ -2839,8 +2872,9 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	vmx_vmwrite(VMCS_CR0_MASK, CR0_NW|CR0_CD|CR0_ET);
 	vmx_vmwrite(VMCS_CR0_SHADOW, CR0_ET);
 
-	/* Force CR4_VMXE to zero. */
-	vmx_vmwrite(VMCS_CR4_MASK, CR4_VMXE);
+	/* Force unsupported CR4 fields to zero. */
+	vmx_vmwrite(VMCS_CR4_MASK, CR4_INVALID);
+	vmx_vmwrite(VMCS_CR4_SHADOW, 0);
 
 	/* Set the Host state for resuming. */
 	vmx_vmwrite(VMCS_HOST_RIP, (uint64_t)_resume_rip);



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:30:50 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: improve the handling of CR4

 - Filter out certain features we don't want the guest to enable. This is
   for general correctness, and future-proofness.
 - Flush the guest TLB when certain flags change.


To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:29:20 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: don't forget to intercept INVD

INVD executed in the guest can be dangerous for the host, due to CPU
caches being flushed without write-back.


To generate a diff of this commit:
cvs rdiff -u -r1.71 -r1.72 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 26 16:29:20 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: don't forget to intercept INVD

INVD executed in the guest can be dangerous for the host, due to CPU
caches being flushed without write-back.


To generate a diff of this commit:
cvs rdiff -u -r1.71 -r1.72 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.71 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.72
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.71	Sat Aug 22 10:59:05 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Wed Aug 26 16:29:19 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.71 2020/08/22 10:59:05 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.72 2020/08/26 16:29:19 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.71 2020/08/22 10:59:05 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.72 2020/08/26 16:29:19 maxv Exp $");
 
 #include 
 #include 
@@ -2118,7 +2118,6 @@ svm_vcpu_init(struct nvmm_machine *mach,
 	 *  - POPF [popf instruction]
 	 *  - IRET [iret instruction]
 	 *  - INTN [int $n instructions]
-	 *  - INVD [invd instruction]
 	 *  - PAUSE [pause instruction]
 	 *  - INVLPG [invplg instruction]
 	 *  - TASKSW [task switches]
@@ -2132,6 +2131,7 @@ svm_vcpu_init(struct nvmm_machine *mach,
 	VMCB_CTRL_INTERCEPT_RDPMC |
 	VMCB_CTRL_INTERCEPT_CPUID |
 	VMCB_CTRL_INTERCEPT_RSM |
+	VMCB_CTRL_INTERCEPT_INVD |
 	VMCB_CTRL_INTERCEPT_HLT |
 	VMCB_CTRL_INTERCEPT_INVLPGA |
 	VMCB_CTRL_INTERCEPT_IOIO_PROT |



CVS commit: src/sys/dev/nvmm/x86

2020-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 22 11:01:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: fix detection of the BIOS lock

If it's locked, ensure it's locked with VMX enabled. If it's not locked,
then lock it ourselves with VMX enabled.

Should fix NetBSD PR/55596.


To generate a diff of this commit:
cvs rdiff -u -r1.71 -r1.72 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.71 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.72
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.71	Thu Aug 20 11:09:56 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sat Aug 22 11:01:10 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.71 2020/08/20 11:09:56 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.72 2020/08/22 11:01:10 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.71 2020/08/20 11:09:56 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.72 2020/08/22 11:01:10 maxv Exp $");
 
 #include 
 #include 
@@ -3192,11 +3192,8 @@ vmx_ident(void)
 	}
 
 	msr = rdmsr(MSR_IA32_FEATURE_CONTROL);
-	if ((msr & IA32_FEATURE_CONTROL_LOCK) == 0) {
-		printf("NVMM: VMX disabled in BIOS\n");
-		return false;
-	}
-	if ((msr & IA32_FEATURE_CONTROL_OUT_SMX) == 0) {
+	if ((msr & IA32_FEATURE_CONTROL_LOCK) != 0 &&
+	(msr & IA32_FEATURE_CONTROL_OUT_SMX) == 0) {
 		printf("NVMM: VMX disabled in BIOS\n");
 		return false;
 	}
@@ -3322,7 +3319,17 @@ vmx_change_cpu(void *arg1, void *arg2)
 {
 	struct cpu_info *ci = curcpu();
 	bool enable = arg1 != NULL;
-	uint64_t cr4;
+	uint64_t msr, cr4;
+
+	if (enable) {
+		msr = rdmsr(MSR_IA32_FEATURE_CONTROL);
+		if ((msr & IA32_FEATURE_CONTROL_LOCK) == 0) {
+			/* Lock now, with VMX-outside-SMX enabled. */
+			wrmsr(MSR_IA32_FEATURE_CONTROL, msr |
+			IA32_FEATURE_CONTROL_LOCK |
+			IA32_FEATURE_CONTROL_OUT_SMX);
+		}
+	}
 
 	if (!enable) {
 		vmx_vmxoff();



CVS commit: src/sys/dev/nvmm/x86

2020-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 22 11:01:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
nvmm-x86-vmx: fix detection of the BIOS lock

If it's locked, ensure it's locked with VMX enabled. If it's not locked,
then lock it ourselves with VMX enabled.

Should fix NetBSD PR/55596.


To generate a diff of this commit:
cvs rdiff -u -r1.71 -r1.72 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 22 11:00:01 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
nvmm-x86: hide more CPUID flags, mostly related to perf monitors


To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.14 src/sys/dev/nvmm/x86/nvmm_x86.c:1.15
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.14	Thu Aug 20 11:09:56 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Sat Aug 22 11:00:00 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.14 2020/08/20 11:09:56 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.15 2020/08/22 11:00:00 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.14 2020/08/20 11:09:56 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.15 2020/08/22 11:00:00 maxv Exp $");
 
 #include 
 #include 
@@ -389,22 +389,22 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	CPUID_MISALIGNSSE |
 	CPUID_3DNOWPF |
 	/* CPUID_OSVW excluded */
-	CPUID_IBS |
+	/* CPUID_IBS excluded */
 	CPUID_XOP |
 	/* CPUID_SKINIT excluded */
-	CPUID_WDT |
-	CPUID_LWP |
+	/* CPUID_WDT excluded */
+	/* CPUID_LWP excluded */
 	CPUID_FMA4 |
 	CPUID_TCE |
-	CPUID_NODEID |
+	/* CPUID_NODEID excluded */
 	CPUID_TBM |
-	CPUID_TOPOEXT |
-	CPUID_PCEC |
-	CPUID_PCENB |
-	CPUID_SPM |
-	CPUID_DBE |
-	CPUID_PTSC |
-	CPUID_L2IPERFC,
+	CPUID_TOPOEXT,
+	/* CPUID_PCEC excluded */
+	/* CPUID_PCENB excluded */
+	/* CPUID_SPM excluded */
+	/* CPUID_DBE excluded */
+	/* CPUID_PTSC excluded */
+	/* CPUID_L2IPERFC excluded */
 	/* CPUID_MWAITX excluded */
 	.edx =
 	CPUID_SYSCALL |



CVS commit: src/sys/dev/nvmm/x86

2020-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 22 11:00:01 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
nvmm-x86: hide more CPUID flags, mostly related to perf monitors


To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 22 10:59:05 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: dedup code


To generate a diff of this commit:
cvs rdiff -u -r1.70 -r1.71 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.70 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.71
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.70	Thu Aug 20 11:09:56 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Sat Aug 22 10:59:05 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.70 2020/08/20 11:09:56 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.71 2020/08/22 10:59:05 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.70 2020/08/20 11:09:56 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.71 2020/08/22 10:59:05 maxv Exp $");
 
 #include 
 #include 
@@ -1022,18 +1022,11 @@ svm_exit_cpuid(struct nvmm_machine *mach
 	struct svm_cpudata *cpudata = vcpu->cpudata;
 	struct nvmm_vcpu_conf_cpuid *cpuid;
 	uint64_t eax, ecx;
-	u_int descs[4];
 	size_t i;
 
 	eax = cpudata->vmcb->state.rax;
 	ecx = cpudata->gprs[NVMM_X64_GPR_RCX];
-	x86_cpuid2(eax, ecx, descs);
-
-	cpudata->vmcb->state.rax = descs[0];
-	cpudata->gprs[NVMM_X64_GPR_RBX] = descs[1];
-	cpudata->gprs[NVMM_X64_GPR_RCX] = descs[2];
-	cpudata->gprs[NVMM_X64_GPR_RDX] = descs[3];
-
+	svm_inkernel_exec_cpuid(cpudata, eax, ecx);
 	svm_inkernel_handle_cpuid(vcpu, eax, ecx);
 
 	for (i = 0; i < SVM_NCPUIDS; i++) {



CVS commit: src/sys/dev/nvmm/x86

2020-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 22 10:59:05 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: dedup code


To generate a diff of this commit:
cvs rdiff -u -r1.70 -r1.71 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Aug 20 11:09:56 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c nvmm_x86.h nvmm_x86_svm.c
nvmm_x86_vmx.c

Log Message:
nvmm-x86: improve the CPUID emulation

 - x86-svm: explicitly handle 0x8007 and 0x8008. The latter
   contains extended features we must filter out. Apply the same in
   x86-vmx for symmetry.
 - x86-svm: explicitly handle extended leaves until 0x801F, and
   truncate to it.


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/dev/nvmm/x86/nvmm_x86.c
cvs rdiff -u -r1.18 -r1.19 src/sys/dev/nvmm/x86/nvmm_x86.h
cvs rdiff -u -r1.69 -r1.70 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.70 -r1.71 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Aug 20 11:09:56 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c nvmm_x86.h nvmm_x86_svm.c
nvmm_x86_vmx.c

Log Message:
nvmm-x86: improve the CPUID emulation

 - x86-svm: explicitly handle 0x8007 and 0x8008. The latter
   contains extended features we must filter out. Apply the same in
   x86-vmx for symmetry.
 - x86-svm: explicitly handle extended leaves until 0x801F, and
   truncate to it.


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/dev/nvmm/x86/nvmm_x86.c
cvs rdiff -u -r1.18 -r1.19 src/sys/dev/nvmm/x86/nvmm_x86.h
cvs rdiff -u -r1.69 -r1.70 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.70 -r1.71 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.13 src/sys/dev/nvmm/x86/nvmm_x86.c:1.14
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.13	Thu Aug 20 11:07:43 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Thu Aug 20 11:09:56 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.13 2020/08/20 11:07:43 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.14 2020/08/20 11:09:56 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.13 2020/08/20 11:07:43 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.14 2020/08/20 11:09:56 maxv Exp $");
 
 #include 
 #include 
@@ -421,6 +421,26 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	CPUID_3DNOW
 };
 
+const struct nvmm_x86_cpuid_mask nvmm_cpuid_8007 = {
+	.eax = 0,
+	.ebx = 0,
+	.ecx = 0,
+	.edx = CPUID_APM_ITSC
+};
+
+const struct nvmm_x86_cpuid_mask nvmm_cpuid_8008 = {
+	.eax = ~0,
+	.ebx =
+	CPUID_CAPEX_CLZERO |
+	/* CPUID_CAPEX_IRPERF excluded */
+	CPUID_CAPEX_XSAVEERPTR |
+	/* CPUID_CAPEX_RDPRU excluded */
+	/* CPUID_CAPEX_MCOMMIT excluded */
+	CPUID_CAPEX_WBNOINVD,
+	.ecx = ~0, /* TODO? */
+	.edx = 0
+};
+
 bool
 nvmm_x86_pat_validate(uint64_t val)
 {

Index: src/sys/dev/nvmm/x86/nvmm_x86.h
diff -u src/sys/dev/nvmm/x86/nvmm_x86.h:1.18 src/sys/dev/nvmm/x86/nvmm_x86.h:1.19
--- src/sys/dev/nvmm/x86/nvmm_x86.h:1.18	Mon Oct 28 08:30:49 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86.h	Thu Aug 20 11:09:56 2020
@@ -1,7 +1,7 @@
-/*	$NetBSD: nvmm_x86.h,v 1.18 2019/10/28 08:30:49 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.h,v 1.19 2020/08/20 11:09:56 maxv Exp $	*/
 
 /*
- * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
+ * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
@@ -320,6 +320,8 @@ extern const struct nvmm_x64_state nvmm_
 extern const struct nvmm_x86_cpuid_mask nvmm_cpuid_0001;
 extern const struct nvmm_x86_cpuid_mask nvmm_cpuid_0007;
 extern const struct nvmm_x86_cpuid_mask nvmm_cpuid_8001;
+extern const struct nvmm_x86_cpuid_mask nvmm_cpuid_8007;
+extern const struct nvmm_x86_cpuid_mask nvmm_cpuid_8008;
 bool nvmm_x86_pat_validate(uint64_t);
 #endif
 

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.69 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.70
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.69	Tue Aug 18 17:08:05 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Thu Aug 20 11:09:56 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.69 2020/08/18 17:08:05 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.70 2020/08/20 11:09:56 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.69 2020/08/18 17:08:05 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.70 2020/08/20 11:09:56 maxv Exp $");
 
 #include 
 #include 
@@ -795,7 +795,9 @@ svm_inkernel_advance(struct vmcb *vmcb)
 
 #define SVM_CPUID_MAX_BASIC		0xD
 #define SVM_CPUID_MAX_HYPERVISOR	0x4000
+#define SVM_CPUID_MAX_EXTENDED		0x801F
 static uint32_t svm_cpuid_max_basic __read_mostly;
+static uint32_t svm_cpuid_max_extended __read_mostly;
 
 static void
 svm_inkernel_exec_cpuid(struct svm_cpudata *cpudata, uint64_t eax, uint64_t ecx)
@@ -825,6 +827,11 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 			eax = svm_cpuid_max_basic;
 			svm_inkernel_exec_cpuid(cpudata, eax, ecx);
 		}
+	} else {
+		if (__predict_false(eax > svm_cpuid_max_extended)) {
+			eax = svm_cpuid_max_basic;
+			svm_inkernel_exec_cpuid(cpudata, eax, ecx);
+		}
 	}
 
 	switch (eax) {
@@ -928,12 +935,74 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 		memcpy(>gprs[NVMM_X64_GPR_RDX], " ___", 4);
 		break;
 
+	case 0x8000:
+		cpudata->vmcb->state.rax = svm_cpuid_max_extended;
+		break;
 	case 0x8001:
 		cpudata->vmcb->state.rax &= nvmm_cpuid_8001.eax;
 		cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_8001.ebx;
 		

CVS commit: src/sys/dev/nvmm/x86

2020-08-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Aug 20 11:07:43 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
nvmm-x86: advertise the SERIALIZE instruction, available on future CPUs


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.12 src/sys/dev/nvmm/x86/nvmm_x86.c:1.13
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.12	Tue Aug 11 15:23:10 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Thu Aug 20 11:07:43 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.12 2020/08/11 15:23:10 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.13 2020/08/20 11:07:43 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.12 2020/08/11 15:23:10 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.13 2020/08/20 11:07:43 maxv Exp $");
 
 #include 
 #include 
@@ -363,7 +363,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	/* CPUID_SEF_SRBDS_CTRL excluded */
 	CPUID_SEF_MD_CLEAR |
 	/* CPUID_SEF_TSX_FORCE_ABORT excluded */
-	/* CPUID_SEF_SERIALIZE excluded */
+	CPUID_SEF_SERIALIZE |
 	/* CPUID_SEF_HYBRID excluded */
 	/* CPUID_SEF_TSXLDTRK excluded */
 	/* CPUID_SEF_CET_IBT excluded */



CVS commit: src/sys/dev/nvmm/x86

2020-08-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Aug 20 11:07:43 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
nvmm-x86: advertise the SERIALIZE instruction, available on future CPUs


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 18 17:08:05 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: improve the CPUID emulation

Limit the hypervisor range, and properly handle each basic leaf until 0xD.


To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 18 17:08:05 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
nvmm-x86-svm: improve the CPUID emulation

Limit the hypervisor range, and properly handle each basic leaf until 0xD.


To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.68 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.69
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.68	Tue Aug 18 17:03:10 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Tue Aug 18 17:08:05 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.68 2020/08/18 17:03:10 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.69 2020/08/18 17:08:05 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.68 2020/08/18 17:03:10 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.69 2020/08/18 17:08:05 maxv Exp $");
 
 #include 
 #include 
@@ -793,7 +793,21 @@ svm_inkernel_advance(struct vmcb *vmcb)
 	vmcb->ctrl.intr &= ~VMCB_CTRL_INTR_SHADOW;
 }
 
+#define SVM_CPUID_MAX_BASIC		0xD
 #define SVM_CPUID_MAX_HYPERVISOR	0x4000
+static uint32_t svm_cpuid_max_basic __read_mostly;
+
+static void
+svm_inkernel_exec_cpuid(struct svm_cpudata *cpudata, uint64_t eax, uint64_t ecx)
+{
+	u_int descs[4];
+
+	x86_cpuid2(eax, ecx, descs);
+	cpudata->vmcb->state.rax = descs[0];
+	cpudata->gprs[NVMM_X64_GPR_RBX] = descs[1];
+	cpudata->gprs[NVMM_X64_GPR_RCX] = descs[2];
+	cpudata->gprs[NVMM_X64_GPR_RDX] = descs[3];
+}
 
 static void
 svm_inkernel_handle_cpuid(struct nvmm_cpu *vcpu, uint64_t eax, uint64_t ecx)
@@ -801,7 +815,22 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 	struct svm_cpudata *cpudata = vcpu->cpudata;
 	uint64_t cr4;
 
+	if (eax < 0x4000) {
+		if (__predict_false(eax > svm_cpuid_max_basic)) {
+			eax = svm_cpuid_max_basic;
+			svm_inkernel_exec_cpuid(cpudata, eax, ecx);
+		}
+	} else if (eax < 0x8000) {
+		if (__predict_false(eax > SVM_CPUID_MAX_HYPERVISOR)) {
+			eax = svm_cpuid_max_basic;
+			svm_inkernel_exec_cpuid(cpudata, eax, ecx);
+		}
+	}
+
 	switch (eax) {
+	case 0x:
+		cpudata->vmcb->state.rax = svm_cpuid_max_basic;
+		break;
 	case 0x0001:
 		cpudata->vmcb->state.rax &= nvmm_cpuid_0001.eax;
 
@@ -831,10 +860,20 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
 		break;
 	case 0x0007: /* Structured Extended Features */
-		cpudata->vmcb->state.rax &= nvmm_cpuid_0007.eax;
-		cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_0007.ebx;
-		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
-		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
+		switch (ecx) {
+		case 0:
+			cpudata->vmcb->state.rax = 0;
+			cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_0007.ebx;
+			cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
+			cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
+			break;
+		default:
+			cpudata->vmcb->state.rax = 0;
+			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+			break;
+		}
 		break;
 	case 0x0008: /* Empty */
 	case 0x0009: /* Empty */
@@ -2418,6 +2457,9 @@ svm_init(void)
 	/* Init the XCR0 mask. */
 	svm_xcr0_mask = SVM_XCR0_MASK_DEFAULT & x86_xsave_features;
 
+	/* Init the max basic CPUID leaf. */
+	svm_cpuid_max_basic = uimin(cpuid_level, SVM_CPUID_MAX_BASIC);
+
 	memset(hsave, 0, sizeof(hsave));
 	for (CPU_INFO_FOREACH(cii, ci)) {
 		pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO);



CVS commit: src/sys/dev/nvmm/x86

2020-08-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 18 17:03:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changes


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.69 -r1.70 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.67 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.68
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.67	Wed Aug  5 15:22:25 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Tue Aug 18 17:03:10 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.67 2020/08/05 15:22:25 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.68 2020/08/18 17:03:10 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.67 2020/08/05 15:22:25 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.68 2020/08/18 17:03:10 maxv Exp $");
 
 #include 
 #include 
@@ -521,7 +521,7 @@ static uint64_t svm_xcr0_mask __read_mos
 #define CR0_TLB_FLUSH \
 	(CR0_PG|CR0_WP|CR0_CD|CR0_NW)
 #define CR4_TLB_FLUSH \
-	(CR4_PGE|CR4_PAE|CR4_PSE)
+	(CR4_PSE|CR4_PAE|CR4_PGE|CR4_PCIDE|CR4_SMEP)
 
 /* -- */
 

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.69 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.70
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.69	Tue Aug 11 15:31:51 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Aug 18 17:03:10 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.69 2020/08/11 15:31:51 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.70 2020/08/18 17:03:10 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.69 2020/08/11 15:31:51 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.70 2020/08/18 17:03:10 maxv Exp $");
 
 #include 
 #include 
@@ -734,7 +734,7 @@ static uint64_t vmx_xcr0_mask __read_mos
 #define CR0_TLB_FLUSH \
 	(CR0_PG|CR0_WP|CR0_CD|CR0_NW)
 #define CR4_TLB_FLUSH \
-	(CR4_PGE|CR4_PAE|CR4_PSE)
+	(CR4_PSE|CR4_PAE|CR4_PGE|CR4_PCIDE|CR4_SMEP)
 
 /* -- */
 



CVS commit: src/sys/dev/nvmm/x86

2020-08-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 18 17:03:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changes


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.69 -r1.70 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:48:42 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svmfunc.S nvmm_x86_vmxfunc.S

Log Message:
Micro-optimize: use pushq instead of pushw. To avoid LCP stalls and
unaligned stack accesses.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S \
src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S:1.4 src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S:1.5
--- src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S:1.4	Sun Jul 19 06:36:37 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S	Tue Aug 11 15:48:42 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svmfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svmfunc.S,v 1.5 2020/08/11 15:48:42 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -75,10 +75,10 @@
 
 #define HOST_SAVE_TR		\
 	strw	%ax		;\
-	pushw	%ax
+	pushq	%rax
 
 #define HOST_RESTORE_TR\
-	popw	%ax;\
+	popq	%rax;\
 	movzwq	%ax,%rdx			;\
 	movq	CPUVAR(GDT),%rax		;\
 	andq	$~0x0200,4(%rax,%rdx, 1)	;\
@@ -86,10 +86,10 @@
 
 #define HOST_SAVE_LDT		\
 	sldtw	%ax		;\
-	pushw	%ax
+	pushq	%rax
 
 #define HOST_RESTORE_LDT	\
-	popw	%ax		;\
+	popq	%rax		;\
 	lldtw	%ax
 
 /*
Index: src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S:1.4 src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S:1.5
--- src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S:1.4	Sun Jul 19 06:36:37 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S	Tue Aug 11 15:48:42 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmxfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmxfunc.S,v 1.5 2020/08/11 15:48:42 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -100,10 +100,10 @@ END(_vmx_vmxoff)
 
 #define HOST_SAVE_LDT		\
 	sldtw	%ax		;\
-	pushw	%ax
+	pushq	%rax
 
 #define HOST_RESTORE_LDT	\
-	popw	%ax		;\
+	popq	%rax		;\
 	lldtw	%ax
 
 /*



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:48:42 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svmfunc.S nvmm_x86_vmxfunc.S

Log Message:
Micro-optimize: use pushq instead of pushw. To avoid LCP stalls and
unaligned stack accesses.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S \
src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:31:52 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Improve the CPUID emulation on nvmm-intel:

 - Limit the highest extended leaf.
 - Limit 0x0007 to ECX=0, for future-proofness.


To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.68 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.69
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.68	Tue Aug 11 15:27:46 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Aug 11 15:31:51 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.68 2020/08/11 15:27:46 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.69 2020/08/11 15:31:51 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.68 2020/08/11 15:27:46 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.69 2020/08/11 15:31:51 maxv Exp $");
 
 #include 
 #include 
@@ -1172,6 +1172,7 @@ error:
 #define VMX_CPUID_MAX_HYPERVISOR	0x4000
 #define VMX_CPUID_MAX_EXTENDED		0x8008
 static uint32_t vmx_cpuid_max_basic __read_mostly;
+static uint32_t vmx_cpuid_max_extended __read_mostly;
 
 static void
 vmx_inkernel_exec_cpuid(struct vmx_cpudata *cpudata, uint64_t eax, uint64_t ecx)
@@ -1203,6 +1204,11 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
 			eax = vmx_cpuid_max_basic;
 			vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
 		}
+	} else {
+		if (__predict_false(eax > vmx_cpuid_max_extended)) {
+			eax = vmx_cpuid_max_basic;
+			vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
+		}
 	}
 
 	switch (eax) {
@@ -1248,12 +1254,22 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
 		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
 		break;
 	case 0x0007: /* Structured Extended Feature Flags Enumeration */
-		cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_0007.eax;
-		cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_0007.ebx;
-		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
-		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
-		if (vmx_procbased_ctls2 & PROC_CTLS2_INVPCID_ENABLE) {
-			cpudata->gprs[NVMM_X64_GPR_RBX] |= CPUID_SEF_INVPCID;
+		switch (ecx) {
+		case 0:
+			cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_0007.ebx;
+			cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
+			cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
+			if (vmx_procbased_ctls2 & PROC_CTLS2_INVPCID_ENABLE) {
+cpudata->gprs[NVMM_X64_GPR_RBX] |= CPUID_SEF_INVPCID;
+			}
+			break;
+		default:
+			cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+			break;
 		}
 		break;
 	case 0x0008: /* Empty */
@@ -1365,6 +1381,9 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
 		memcpy(>gprs[NVMM_X64_GPR_RDX], " ___", 4);
 		break;
 
+	case 0x8000:
+		cpudata->gprs[NVMM_X64_GPR_RAX] = vmx_cpuid_max_extended;
+		break;
 	case 0x8001:
 		cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_8001.eax;
 		cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_8001.ebx;
@@ -3346,6 +3365,7 @@ vmx_init(void)
 	uint64_t xc, msr;
 	struct vmxon *vmxon;
 	uint32_t revision;
+	u_int descs[4];
 	paddr_t pa;
 	vaddr_t va;
 	int error;
@@ -3356,9 +3376,13 @@ vmx_init(void)
 	/* Init the XCR0 mask. */
 	vmx_xcr0_mask = VMX_XCR0_MASK_DEFAULT & x86_xsave_features;
 
-	/* Init the max CPUID leaves. */
+	/* Init the max basic CPUID leaf. */
 	vmx_cpuid_max_basic = uimin(cpuid_level, VMX_CPUID_MAX_BASIC);
 
+	/* Init the max extended CPUID leaf. */
+	x86_cpuid(0x8000, descs);
+	vmx_cpuid_max_extended = uimin(descs[0], VMX_CPUID_MAX_EXTENDED);
+
 	/* Init the TLB flush op, the EPT flush op and the EPTP type. */
 	msr = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP);
 	if ((msr & IA32_VMX_EPT_VPID_INVVPID_CONTEXT) != 0) {



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:31:52 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Improve the CPUID emulation on nvmm-intel:

 - Limit the highest extended leaf.
 - Limit 0x0007 to ECX=0, for future-proofness.


To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:27:46 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Improve emulation of MSR_IA32_ARCH_CAPABILITIES: publish only the *_NO
bits. Initially they were the only ones there, but Intel then added other
bits we aren't interested in, and they must be filtered out.


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:27:46 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Improve emulation of MSR_IA32_ARCH_CAPABILITIES: publish only the *_NO
bits. Initially they were the only ones there, but Intel then added other
bits we aren't interested in, and they must be filtered out.


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.67 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.68
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.67	Wed Aug  5 15:20:09 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Aug 11 15:27:46 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.67 2020/08/05 15:20:09 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.68 2020/08/11 15:27:46 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.67 2020/08/05 15:20:09 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.68 2020/08/11 15:27:46 maxv Exp $");
 
 #include 
 #include 
@@ -1734,6 +1734,24 @@ vmx_inkernel_handle_msr(struct nvmm_mach
 			cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
 			goto handled;
 		}
+		if (exit->u.rdmsr.msr == MSR_IA32_ARCH_CAPABILITIES) {
+			u_int descs[4];
+			if (cpuid_level < 7) {
+goto error;
+			}
+			x86_cpuid(7, descs);
+			if (!(descs[3] & CPUID_SEF_ARCH_CAP)) {
+goto error;
+			}
+			val = rdmsr(MSR_IA32_ARCH_CAPABILITIES);
+			val &= (IA32_ARCH_RDCL_NO |
+			IA32_ARCH_SSB_NO |
+			IA32_ARCH_MDS_NO |
+			IA32_ARCH_TAA_NO);
+			cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0x);
+			cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
+			goto handled;
+		}
 		for (i = 0; i < __arraycount(msr_ignore_list); i++) {
 			if (msr_ignore_list[i] != exit->u.rdmsr.msr)
 continue;
@@ -2765,8 +2783,6 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	vmx_vcpu_msr_allow(cpudata->msrbm, MSR_FSBASE, true, true);
 	vmx_vcpu_msr_allow(cpudata->msrbm, MSR_GSBASE, true, true);
 	vmx_vcpu_msr_allow(cpudata->msrbm, MSR_TSC, true, false);
-	vmx_vcpu_msr_allow(cpudata->msrbm, MSR_IA32_ARCH_CAPABILITIES,
-	true, false);
 	vmx_vmwrite(VMCS_MSR_BITMAP, (uint64_t)cpudata->msrbm_pa);
 
 	/*



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:23:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Hide OSPKE. NFC since the host never uses PKU, but still.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.11 src/sys/dev/nvmm/x86/nvmm_x86.c:1.12
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.11	Wed Aug  5 15:38:28 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Tue Aug 11 15:23:10 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.11 2020/08/05 15:38:28 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.12 2020/08/11 15:23:10 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.11 2020/08/05 15:38:28 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.12 2020/08/11 15:23:10 maxv Exp $");
 
 #include 
 #include 
@@ -338,7 +338,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	/* CPUID_SEF_AVX512_VBMI excluded */
 	CPUID_SEF_UMIP |
 	/* CPUID_SEF_PKU excluded */
-	CPUID_SEF_OSPKE |
+	/* CPUID_SEF_OSPKE excluded */
 	/* CPUID_SEF_WAITPKG excluded */
 	/* CPUID_SEF_AVX512_VBMI2 excluded */
 	/* CPUID_SEF_CET_SS excluded */



CVS commit: src/sys/dev/nvmm/x86

2020-08-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Aug 11 15:23:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Hide OSPKE. NFC since the host never uses PKU, but still.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:38:28 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Improve the CPUID emulation:

 - Hide SGX*, PKU, WAITPKG, and SKINIT, because they are not supported.
 - Hide HLE and RTM, part of TSX. Because TSX is just too buggy and we
   cannot guarantee that it remains enabled in the guest (if for example
   the host disables TSX while the guest is running). Nobody wants this
   crap anyway, so bye-bye.
 - Advertise FSREP_MOV, because no reason to hide it.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:38:28 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Improve the CPUID emulation:

 - Hide SGX*, PKU, WAITPKG, and SKINIT, because they are not supported.
 - Hide HLE and RTM, part of TSX. Because TSX is just too buggy and we
   cannot guarantee that it remains enabled in the guest (if for example
   the host disables TSX while the guest is running). Nobody wants this
   crap anyway, so bye-bye.
 - Advertise FSREP_MOV, because no reason to hide it.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.10 src/sys/dev/nvmm/x86/nvmm_x86.c:1.11
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.10	Wed Aug  5 15:16:50 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Wed Aug  5 15:38:28 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.10 2020/08/05 15:16:50 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.11 2020/08/05 15:38:28 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.10 2020/08/05 15:16:50 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.11 2020/08/05 15:38:28 maxv Exp $");
 
 #include 
 #include 
@@ -304,16 +304,16 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	.ebx =
 	CPUID_SEF_FSGSBASE |
 	/* CPUID_SEF_TSC_ADJUST excluded */
-	CPUID_SEF_SGX |
+	/* CPUID_SEF_SGX excluded */
 	CPUID_SEF_BMI1 |
-	CPUID_SEF_HLE |
+	/* CPUID_SEF_HLE excluded */
 	/* CPUID_SEF_AVX2 excluded */
 	CPUID_SEF_FDPEXONLY |
 	CPUID_SEF_SMEP |
 	CPUID_SEF_BMI2 |
 	CPUID_SEF_ERMS |
 	/* CPUID_SEF_INVPCID excluded, but re-included in VMX */
-	CPUID_SEF_RTM |
+	/* CPUID_SEF_RTM excluded */
 	/* CPUID_SEF_QM excluded */
 	CPUID_SEF_FPUCSDS |
 	/* CPUID_SEF_MPX excluded */
@@ -337,9 +337,9 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	CPUID_SEF_PREFETCHWT1 |
 	/* CPUID_SEF_AVX512_VBMI excluded */
 	CPUID_SEF_UMIP |
-	CPUID_SEF_PKU |
+	/* CPUID_SEF_PKU excluded */
 	CPUID_SEF_OSPKE |
-	CPUID_SEF_WAITPKG |
+	/* CPUID_SEF_WAITPKG excluded */
 	/* CPUID_SEF_AVX512_VBMI2 excluded */
 	/* CPUID_SEF_CET_SS excluded */
 	CPUID_SEF_GFNI |
@@ -352,13 +352,13 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	/* CPUID_SEF_RDPID excluded */
 	CPUID_SEF_CLDEMOTE |
 	CPUID_SEF_MOVDIRI |
-	CPUID_SEF_MOVDIR64B |
-	CPUID_SEF_SGXLC,
+	CPUID_SEF_MOVDIR64B,
+	/* CPUID_SEF_SGXLC excluded */
 	/* CPUID_SEF_PKS excluded */
 	.edx =
 	/* CPUID_SEF_AVX512_4VNNIW excluded */
 	/* CPUID_SEF_AVX512_4FMAPS excluded */
-	/* CPUID_SEF_FSREP_MOV excluded */
+	CPUID_SEF_FSREP_MOV |
 	/* CPUID_SEF_AVX512_VP2INTERSECT excluded */
 	/* CPUID_SEF_SRBDS_CTRL excluded */
 	CPUID_SEF_MD_CLEAR |
@@ -391,7 +391,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	/* CPUID_OSVW excluded */
 	CPUID_IBS |
 	CPUID_XOP |
-	CPUID_SKINIT |
+	/* CPUID_SKINIT excluded */
 	CPUID_WDT |
 	CPUID_LWP |
 	CPUID_FMA4 |



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:22:25 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Add new field definitions, and intercept everything, for future-proofness.


To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.66 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.67
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.66	Wed Aug  5 10:31:37 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Wed Aug  5 15:22:25 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.66 2020/08/05 10:31:37 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.67 2020/08/05 15:22:25 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.66 2020/08/05 10:31:37 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.67 2020/08/05 15:22:25 maxv Exp $");
 
 #include 
 #include 
@@ -232,11 +232,16 @@ svm_stgi(void)
 #define VMCB_EXITCODE_CR13_WRITE_TRAP	0x009D
 #define VMCB_EXITCODE_CR14_WRITE_TRAP	0x009E
 #define VMCB_EXITCODE_CR15_WRITE_TRAP	0x009F
+#define VMCB_EXITCODE_INVLPGB		0x00A0
+#define VMCB_EXITCODE_INVLPGB_ILLEGAL	0x00A1
+#define VMCB_EXITCODE_INVPCID		0x00A2
 #define VMCB_EXITCODE_MCOMMIT		0x00A3
+#define VMCB_EXITCODE_TLBSYNC		0x00A4
 #define VMCB_EXITCODE_NPF		0x0400
 #define VMCB_EXITCODE_AVIC_INCOMP_IPI	0x0401
 #define VMCB_EXITCODE_AVIC_NOACCEL	0x0402
 #define VMCB_EXITCODE_VMGEXIT		0x0403
+#define VMCB_EXITCODE_BUSY		-2ULL
 #define VMCB_EXITCODE_INVALID		-1ULL
 
 /* -- */
@@ -307,7 +312,11 @@ struct vmcb_ctrl {
 #define VMCB_CTRL_INTERCEPT_WCR_SPEC(x)	__BIT(16 + x)
 
 	uint32_t intercept_misc3;
+#define VMCB_CTRL_INTERCEPT_INVLPGB_ALL	__BIT(0)
+#define VMCB_CTRL_INTERCEPT_INVLPGB_ILL	__BIT(1)
+#define VMCB_CTRL_INTERCEPT_PCID	__BIT(2)
 #define VMCB_CTRL_INTERCEPT_MCOMMIT	__BIT(3)
+#define VMCB_CTRL_INTERCEPT_TLBSYNC	__BIT(4)
 
 	uint8_t  rsvd1[36];
 	uint16_t pause_filt_thresh;
@@ -335,6 +344,7 @@ struct vmcb_ctrl {
 
 	uint64_t intr;
 #define VMCB_CTRL_INTR_SHADOW		__BIT(0)
+#define VMCB_CTRL_INTR_MASK		__BIT(1)
 
 	uint64_t exitcode;
 	uint64_t exitinfo1;
@@ -399,7 +409,7 @@ struct vmcb_ctrl {
 #define VMCB_CTRL_AVIC_PHYS_MAX_INDEX	__BITS(7,0)
 
 	uint64_t rsvd4;
-	uint64_t vmcb_ptr;
+	uint64_t vmsa_ptr;
 
 	uint8_t	pad[752];
 } __packed;
@@ -1449,6 +1459,11 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 		case VMCB_EXITCODE_CLGI:
 		case VMCB_EXITCODE_SKINIT:
 		case VMCB_EXITCODE_RDTSCP:
+		case VMCB_EXITCODE_RDPRU:
+		case VMCB_EXITCODE_INVLPGB:
+		case VMCB_EXITCODE_INVPCID:
+		case VMCB_EXITCODE_MCOMMIT:
+		case VMCB_EXITCODE_TLBSYNC:
 			svm_inject_ud(vcpu);
 			exit->reason = NVMM_VCPU_EXIT_NONE;
 			break;
@@ -2042,7 +2057,17 @@ svm_vcpu_init(struct nvmm_machine *mach,
 	VMCB_CTRL_INTERCEPT_RDTSCP |
 	VMCB_CTRL_INTERCEPT_MONITOR |
 	VMCB_CTRL_INTERCEPT_MWAIT |
-	VMCB_CTRL_INTERCEPT_XSETBV;
+	VMCB_CTRL_INTERCEPT_XSETBV |
+	VMCB_CTRL_INTERCEPT_RDPRU;
+
+	/*
+	 * Intercept everything.
+	 */
+	vmcb->ctrl.intercept_misc3 =
+	VMCB_CTRL_INTERCEPT_INVLPGB_ALL |
+	VMCB_CTRL_INTERCEPT_PCID |
+	VMCB_CTRL_INTERCEPT_MCOMMIT |
+	VMCB_CTRL_INTERCEPT_TLBSYNC;
 
 	/* Intercept all I/O accesses. */
 	memset(cpudata->iobm, 0xFF, IOBM_SIZE);



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:22:25 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Add new field definitions, and intercept everything, for future-proofness.


To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:20:09 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Add new field definitions.


To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:20:09 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Add new field definitions.


To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.66 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.67
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.66	Wed Aug  5 10:20:50 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Wed Aug  5 15:20:09 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.66 2020/08/05 10:20:50 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.67 2020/08/05 15:20:09 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.66 2020/08/05 10:20:50 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.67 2020/08/05 15:20:09 maxv Exp $");
 
 #include 
 #include 
@@ -223,11 +223,16 @@ vmx_sti(void)
 #define MSR_IA32_VMX_CR4_FIXED1			0x0489
 
 #define MSR_IA32_VMX_EPT_VPID_CAP	0x048C
+#define		IA32_VMX_EPT_VPID_XO			__BIT(0)
 #define		IA32_VMX_EPT_VPID_WALKLENGTH_4		__BIT(6)
 #define		IA32_VMX_EPT_VPID_UC			__BIT(8)
 #define		IA32_VMX_EPT_VPID_WB			__BIT(14)
+#define		IA32_VMX_EPT_VPID_2MB			__BIT(16)
+#define		IA32_VMX_EPT_VPID_1GB			__BIT(17)
 #define		IA32_VMX_EPT_VPID_INVEPT		__BIT(20)
 #define		IA32_VMX_EPT_VPID_FLAGS_AD		__BIT(21)
+#define		IA32_VMX_EPT_VPID_ADVANCED_VMEXIT_INFO	__BIT(22)
+#define		IA32_VMX_EPT_VPID_SHSTK			__BIT(23)
 #define		IA32_VMX_EPT_VPID_INVEPT_CONTEXT	__BIT(25)
 #define		IA32_VMX_EPT_VPID_INVEPT_ALL		__BIT(26)
 #define		IA32_VMX_EPT_VPID_INVVPID		__BIT(32)
@@ -281,6 +286,7 @@ vmx_sti(void)
 #define			EPTP_TYPE_WB		6
 #define		EPTP_WALKLEN			__BITS(5,3)
 #define		EPTP_FLAGS_AD			__BIT(6)
+#define		EPTP_SSS			__BIT(7)
 #define		EPTP_PHYSADDR			__BITS(63,12)
 #define VMCS_EOI_EXIT00x201C
 #define VMCS_EOI_EXIT10x201E
@@ -294,6 +300,7 @@ vmx_sti(void)
 #define VMCS_ENCLS_EXIT_BITMAP			0x202E
 #define VMCS_SUBPAGE_PERM_TABLE_PTR		0x2030
 #define VMCS_TSC_MULTIPLIER			0x2032
+#define VMCS_ENCLV_EXIT_BITMAP			0x2036
 /* 64-bit read-only fields */
 #define VMCS_GUEST_PHYSICAL_ADDRESS		0x2400
 /* 64-bit guest-state fields */
@@ -307,10 +314,13 @@ vmx_sti(void)
 #define VMCS_GUEST_PDPTE2			0x280E
 #define VMCS_GUEST_PDPTE3			0x2810
 #define VMCS_GUEST_BNDCFGS			0x2812
+#define VMCS_GUEST_RTIT_CTL			0x2814
+#define VMCS_GUEST_PKRS0x2818
 /* 64-bit host-state fields */
 #define VMCS_HOST_IA32_PAT			0x2C00
 #define VMCS_HOST_IA32_EFER			0x2C02
 #define VMCS_HOST_IA32_PERF_GLOBAL_CTRL		0x2C04
+#define VMCS_HOST_IA32_PKRS			0x2C06
 /* 32-bit control fields */
 #define VMCS_PINBASED_CTLS			0x4000
 #define		PIN_CTLS_INT_EXITING		__BIT(0)
@@ -356,6 +366,9 @@ vmx_sti(void)
 #define		EXIT_CTLS_SAVE_PREEMPT_TIMER	__BIT(22)
 #define		EXIT_CTLS_CLEAR_BNDCFGS		__BIT(23)
 #define		EXIT_CTLS_CONCEAL_PT		__BIT(24)
+#define		EXIT_CTLS_CLEAR_RTIT_CTL	__BIT(25)
+#define		EXIT_CTLS_LOAD_CET		__BIT(28)
+#define		EXIT_CTLS_LOAD_PKRS		__BIT(29)
 #define VMCS_EXIT_MSR_STORE_COUNT		0x400E
 #define VMCS_EXIT_MSR_LOAD_COUNT		0x4010
 #define VMCS_ENTRY_CTLS0x4012
@@ -368,6 +381,9 @@ vmx_sti(void)
 #define		ENTRY_CTLS_LOAD_EFER		__BIT(15)
 #define		ENTRY_CTLS_LOAD_BNDCFGS		__BIT(16)
 #define		ENTRY_CTLS_CONCEAL_PT		__BIT(17)
+#define		ENTRY_CTLS_LOAD_RTIT_CTL	__BIT(18)
+#define		ENTRY_CTLS_LOAD_CET		__BIT(20)
+#define		ENTRY_CTLS_LOAD_PKRS		__BIT(22)
 #define VMCS_ENTRY_MSR_LOAD_COUNT		0x4014
 #define VMCS_ENTRY_INTR_INFO			0x4016
 #define		INTR_INFO_VECTOR		__BITS(7,0)
@@ -408,7 +424,9 @@ vmx_sti(void)
 #define		PROC_CTLS2_XSAVES_ENABLE	__BIT(20)
 #define		PROC_CTLS2_MODE_BASED_EXEC_EPT	__BIT(22)
 #define		PROC_CTLS2_SUBPAGE_PERMISSIONS	__BIT(23)
+#define		PROC_CTLS2_PT_USES_GPA		__BIT(24)
 #define		PROC_CTLS2_USE_TSC_SCALING	__BIT(25)
+#define		PROC_CTLS2_WAIT_PAUSE_ENABLE	__BIT(26)
 #define		PROC_CTLS2_ENCLV_EXITING	__BIT(28)
 #define VMCS_PLE_GAP0x4020
 #define VMCS_PLE_WINDOW0x4022
@@ -489,6 +507,9 @@ vmx_sti(void)
 #define VMCS_GUEST_PENDING_DBG_EXCEPTIONS	0x6822
 #define VMCS_GUEST_IA32_SYSENTER_ESP		0x6824
 #define VMCS_GUEST_IA32_SYSENTER_EIP		0x6826
+#define VMCS_GUEST_IA32_S_CET			0x6828
+#define VMCS_GUEST_SSP0x682A
+#define VMCS_GUEST_IA32_INTR_SSP_TABLE		0x682C
 /* Natural-Width host-state fields */
 #define VMCS_HOST_CR00x6C00
 #define VMCS_HOST_CR30x6C02
@@ -502,6 +523,9 @@ vmx_sti(void)
 #define VMCS_HOST_IA32_SYSENTER_EIP		0x6C12
 #define VMCS_HOST_RSP0x6C14
 #define VMCS_HOST_RIP0x6C16
+#define VMCS_HOST_IA32_S_CET			0x6C18
+#define VMCS_HOST_SSP0x6C1A

CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:16:51 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Make it easier to understand what's going on, no functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.9 src/sys/dev/nvmm/x86/nvmm_x86.c:1.10
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.9	Sat May  9 16:18:57 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Wed Aug  5 15:16:50 2020
@@ -1,7 +1,7 @@
-/*	$NetBSD: nvmm_x86.c,v 1.9 2020/05/09 16:18:57 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.10 2020/08/05 15:16:50 maxv Exp $	*/
 
 /*
- * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
+ * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.9 2020/05/09 16:18:57 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.10 2020/08/05 15:16:50 maxv Exp $");
 
 #include 
 #include 
@@ -233,85 +233,191 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	.eax = ~0,
 	.ebx = ~0,
 	.ecx =
-	/* Excluded: MONITOR, VMX, SMX, EST, TM2, PDCM, PCID, DCA, X2APIC,
-	 * DEADLINE, RAZ. */
-	CPUID2_SSE3 | CPUID2_PCLMUL |
-	CPUID2_DTES64 | CPUID2_DS_CPL |
-	CPUID2_SSSE3 | CPUID2_CID |
-	CPUID2_SDBG | CPUID2_FMA |
-	CPUID2_CX16 | CPUID2_xTPR |
-	CPUID2_SSE41 | CPUID2_SSE42 |
-	CPUID2_MOVBE | CPUID2_POPCNT |
-	CPUID2_AES | CPUID2_XSAVE |
-	CPUID2_OSXSAVE | CPUID2_F16C |
+	CPUID2_SSE3 |
+	CPUID2_PCLMUL |
+	CPUID2_DTES64 |
+	/* CPUID2_MONITOR excluded */
+	CPUID2_DS_CPL |
+	/* CPUID2_VMX excluded */
+	/* CPUID2_SMX excluded */
+	/* CPUID2_EST excluded */
+	/* CPUID2_TM2 excluded */
+	CPUID2_SSSE3 |
+	CPUID2_CID |
+	CPUID2_SDBG |
+	CPUID2_FMA |
+	CPUID2_CX16 |
+	CPUID2_xTPR |
+	/* CPUID2_PDCM excluded */
+	/* CPUID2_PCID excluded, but re-included in VMX */
+	/* CPUID2_DCA excluded */
+	CPUID2_SSE41 |
+	CPUID2_SSE42 |
+	/* CPUID2_X2APIC excluded */
+	CPUID2_MOVBE |
+	CPUID2_POPCNT |
+	/* CPUID2_DEADLINE excluded */
+	CPUID2_AES |
+	CPUID2_XSAVE |
+	CPUID2_OSXSAVE |
+	/* CPUID2_AVX excluded */
+	CPUID2_F16C |
 	CPUID2_RDRAND,
+	/* CPUID2_RAZ excluded */
 	.edx =
-	/* Excluded: MCE, MTRR, MCA, DS, ACPI, TM. */
-	CPUID_FPU | CPUID_VME |
-	CPUID_DE | CPUID_PSE |
-	CPUID_TSC | CPUID_MSR |
-	CPUID_PAE | CPUID_CX8 |
-	CPUID_APIC | CPUID_B10 |	
-	CPUID_SEP | CPUID_PGE |
-	CPUID_CMOV | CPUID_PAT |
-	CPUID_PSE36 | CPUID_PN |
-	CPUID_CFLUSH | CPUID_B20 |
-	CPUID_MMX | CPUID_FXSR |
-	CPUID_SSE | CPUID_SSE2 |
-	CPUID_SS | CPUID_HTT |
-	CPUID_IA64 | CPUID_SBF
+	CPUID_FPU |
+	CPUID_VME |
+	CPUID_DE |
+	CPUID_PSE |
+	CPUID_TSC |
+	CPUID_MSR |
+	CPUID_PAE |
+	/* CPUID_MCE excluded */
+	CPUID_CX8 |
+	CPUID_APIC |
+	CPUID_B10 |	
+	CPUID_SEP |
+	/* CPUID_MTRR excluded */
+	CPUID_PGE |
+	/* CPUID_MCA excluded */
+	CPUID_CMOV |
+	CPUID_PAT |
+	CPUID_PSE36 |
+	CPUID_PN |
+	CPUID_CFLUSH |
+	CPUID_B20 |
+	/* CPUID_DS excluded */
+	/* CPUID_ACPI excluded */
+	CPUID_MMX |
+	CPUID_FXSR |
+	CPUID_SSE |
+	CPUID_SSE2 |
+	CPUID_SS |
+	CPUID_HTT |
+	/* CPUID_TM excluded */
+	CPUID_IA64 |
+	CPUID_SBF
 };
 
 const struct nvmm_x86_cpuid_mask nvmm_cpuid_0007 = {
 	.eax = ~0,
 	.ebx =
-	/* Excluded: TSC_ADJUST, AVX2, INVPCID, QM, AVX512*, PT, SHA. */
 	CPUID_SEF_FSGSBASE |
-	CPUID_SEF_SGX | CPUID_SEF_BMI1 |
-	CPUID_SEF_HLE | CPUID_SEF_FDPEXONLY |
-	CPUID_SEF_SMEP | CPUID_SEF_BMI2 |
-	CPUID_SEF_ERMS | CPUID_SEF_RTM |
-	CPUID_SEF_FPUCSDS | CPUID_SEF_PQE |
-	CPUID_SEF_RDSEED | CPUID_SEF_ADX |
-	CPUID_SEF_SMAP | CPUID_SEF_CLFLUSHOPT |
+	/* CPUID_SEF_TSC_ADJUST excluded */
+	CPUID_SEF_SGX |
+	CPUID_SEF_BMI1 |
+	CPUID_SEF_HLE |
+	/* CPUID_SEF_AVX2 excluded */
+	CPUID_SEF_FDPEXONLY |
+	CPUID_SEF_SMEP |
+	CPUID_SEF_BMI2 |
+	CPUID_SEF_ERMS |
+	/* CPUID_SEF_INVPCID excluded, but re-included in VMX */
+	CPUID_SEF_RTM |
+	/* CPUID_SEF_QM excluded */
+	CPUID_SEF_FPUCSDS |
+	/* CPUID_SEF_MPX excluded */
+	CPUID_SEF_PQE |
+	/* CPUID_SEF_AVX512F excluded */
+	/* CPUID_SEF_AVX512DQ excluded */
+	CPUID_SEF_RDSEED |
+	CPUID_SEF_ADX |
+	CPUID_SEF_SMAP |
+	/* CPUID_SEF_AVX512_IFMA excluded */
+	CPUID_SEF_CLFLUSHOPT |
 	CPUID_SEF_CLWB,
+	/* CPUID_SEF_PT excluded */
+	/* CPUID_SEF_AVX512PF excluded */
+	/* 

CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 15:16:51 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Make it easier to understand what's going on, no functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 10:31:37 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Use ULL, to make it clear we are unsigned.


To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.65 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.66
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.65	Sun Jul 19 06:56:09 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Wed Aug  5 10:31:37 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.65 2020/07/19 06:56:09 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.66 2020/08/05 10:31:37 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.65 2020/07/19 06:56:09 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.66 2020/08/05 10:31:37 maxv Exp $");
 
 #include 
 #include 
@@ -237,7 +237,7 @@ svm_stgi(void)
 #define VMCB_EXITCODE_AVIC_INCOMP_IPI	0x0401
 #define VMCB_EXITCODE_AVIC_NOACCEL	0x0402
 #define VMCB_EXITCODE_VMGEXIT		0x0403
-#define VMCB_EXITCODE_INVALID		-1
+#define VMCB_EXITCODE_INVALID		-1ULL
 
 /* -- */
 



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 10:31:37 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Use ULL, to make it clear we are unsigned.


To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 10:20:50 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Simplify, remove unnecessary #ifdef DIAGNOSTIC around KASSERTs.


To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-08-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug  5 10:20:50 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Simplify, remove unnecessary #ifdef DIAGNOSTIC around KASSERTs.


To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.65 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.66
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.65	Sun Jul 19 06:56:09 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Wed Aug  5 10:20:50 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.65 2020/07/19 06:56:09 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.66 2020/08/05 10:20:50 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.65 2020/07/19 06:56:09 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.66 2020/08/05 10:20:50 maxv Exp $");
 
 #include 
 #include 
@@ -883,15 +883,11 @@ vmx_vmcs_enter(struct nvmm_cpu *vcpu)
 {
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 	struct cpu_info *vmcs_ci;
-	paddr_t oldpa __diagused;
 
 	cpudata->vmcs_refcnt++;
 	if (cpudata->vmcs_refcnt > 1) {
-#ifdef DIAGNOSTIC
 		KASSERT(kpreempt_disabled());
-		oldpa = vmx_vmptrst();
-		KASSERT(oldpa == cpudata->vmcs_pa);
-#endif
+		KASSERT(vmx_vmptrst() == cpudata->vmcs_pa);
 		return;
 	}
 
@@ -921,9 +917,7 @@ vmx_vmcs_leave(struct nvmm_cpu *vcpu)
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 
 	KASSERT(kpreempt_disabled());
-#ifdef DIAGNOSTIC
 	KASSERT(vmx_vmptrst() == cpudata->vmcs_pa);
-#endif
 	KASSERT(cpudata->vmcs_refcnt > 0);
 	cpudata->vmcs_refcnt--;
 
@@ -941,9 +935,7 @@ vmx_vmcs_destroy(struct nvmm_cpu *vcpu)
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 
 	KASSERT(kpreempt_disabled());
-#ifdef DIAGNOSTIC
 	KASSERT(vmx_vmptrst() == cpudata->vmcs_pa);
-#endif
 	KASSERT(cpudata->vmcs_refcnt == 1);
 	cpudata->vmcs_refcnt--;
 



CVS commit: src/sys/dev/nvmm/x86

2020-07-19 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jul 19 06:56:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Switch to fpu_kern_enter/leave, to prevent clobbering, now that the kernel
itself uses the fpu.


To generate a diff of this commit:
cvs rdiff -u -r1.64 -r1.65 src/sys/dev/nvmm/x86/nvmm_x86_svm.c \
src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.64 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.65
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.64	Sun Jul 19 06:36:37 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Sun Jul 19 06:56:09 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.65 2020/07/19 06:56:09 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.65 2020/07/19 06:56:09 maxv Exp $");
 
 #include 
 #include 
@@ -1219,7 +1219,7 @@ svm_vcpu_guest_fpu_enter(struct nvmm_cpu
 {
 	struct svm_cpudata *cpudata = vcpu->cpudata;
 
-	fpu_save();
+	fpu_kern_enter();
 	fpu_area_restore(>gfpu, svm_xcr0_mask);
 
 	if (svm_xcr0_mask != 0) {
@@ -1239,6 +1239,7 @@ svm_vcpu_guest_fpu_leave(struct nvmm_cpu
 	}
 
 	fpu_area_save(>gfpu, svm_xcr0_mask);
+	fpu_kern_leave();
 }
 
 static void
Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.64 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.65
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.64	Sun Jul 19 06:36:37 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sun Jul 19 06:56:09 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.65 2020/07/19 06:56:09 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.65 2020/07/19 06:56:09 maxv Exp $");
 
 #include 
 #include 
@@ -1875,7 +1875,7 @@ vmx_vcpu_guest_fpu_enter(struct nvmm_cpu
 {
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 
-	fpu_save();
+	fpu_kern_enter();
 	fpu_area_restore(>gfpu, vmx_xcr0_mask);
 
 	if (vmx_xcr0_mask != 0) {
@@ -1895,6 +1895,7 @@ vmx_vcpu_guest_fpu_leave(struct nvmm_cpu
 	}
 
 	fpu_area_save(>gfpu, vmx_xcr0_mask);
+	fpu_kern_leave();
 }
 
 static void



CVS commit: src/sys/dev/nvmm/x86

2020-07-19 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jul 19 06:56:10 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Switch to fpu_kern_enter/leave, to prevent clobbering, now that the kernel
itself uses the fpu.


To generate a diff of this commit:
cvs rdiff -u -r1.64 -r1.65 src/sys/dev/nvmm/x86/nvmm_x86_svm.c \
src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-07-19 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jul 19 06:36:38 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_svmfunc.S nvmm_x86_vmx.c
nvmm_x86_vmxfunc.S

Log Message:
The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no
effect. Disable interrupts earlier instead. This prevents a possible race
against such IPIs.


To generate a diff of this commit:
cvs rdiff -u -r1.63 -r1.64 src/sys/dev/nvmm/x86/nvmm_x86_svm.c \
src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S \
src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.63 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.64
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.63	Fri Jul  3 16:09:54 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Sun Jul 19 06:36:37 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
 
 #include 
 #include 
@@ -56,6 +56,18 @@ __KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm
 
 int svm_vmrun(paddr_t, uint64_t *);
 
+static inline void
+svm_clgi(void)
+{
+	asm volatile ("clgi" ::: "memory");
+}
+
+static inline void
+svm_stgi(void)
+{
+	asm volatile ("stgi" ::: "memory");
+}
+
 #define	MSR_VM_HSAVE_PA	0xC0010117
 
 /* -- */
@@ -1347,7 +1359,7 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 	struct svm_cpudata *cpudata = vcpu->cpudata;
 	struct vmcb *vmcb = cpudata->vmcb;
 	uint64_t machgen;
-	int hcpu, s;
+	int hcpu;
 
 	if (__predict_false(svm_vcpu_event_commit(vcpu) != 0)) {
 		return EINVAL;
@@ -1382,11 +1394,11 @@ svm_vcpu_run(struct nvmm_machine *mach, 
 			svm_vmcb_cache_flush(vmcb, VMCB_CTRL_VMCB_CLEAN_I);
 		}
 
-		s = splhigh();
+		svm_clgi();
 		machgen = svm_htlb_flush(machdata, cpudata);
 		svm_vmrun(cpudata->vmcb_pa, cpudata->gprs);
 		svm_htlb_flush_ack(cpudata, machgen);
-		splx(s);
+		svm_stgi();
 
 		svm_vmcb_cache_default(vmcb);
 
Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.63 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.64
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.63	Sat Jul 18 20:56:53 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sun Jul 19 06:36:37 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
 
 #include 
 #include 
@@ -178,6 +178,18 @@ vmx_vmclear(paddr_t *pa)
 	);
 }
 
+static inline void
+vmx_cli(void)
+{
+	asm volatile ("cli" ::: "memory");
+}
+
+static inline void
+vmx_sti(void)
+{
+	asm volatile ("sti" ::: "memory");
+}
+
 #define MSR_IA32_FEATURE_CONTROL	0x003A
 #define		IA32_FEATURE_CONTROL_LOCK	__BIT(0)
 #define		IA32_FEATURE_CONTROL_IN_SMX	__BIT(1)
@@ -2043,7 +2055,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 	uint64_t exitcode;
 	uint64_t intstate;
 	uint64_t machgen;
-	int hcpu, s, ret;
+	int hcpu, ret;
 	bool launched;
 
 	vmx_vmcs_enter(vcpu);
@@ -2088,7 +2100,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 			cpudata->gtsc_want_update = false;
 		}
 
-		s = splhigh();
+		vmx_cli();
 		machgen = vmx_htlb_flush(machdata, cpudata);
 		lcr2(cpudata->gcr2);
 		if (launched) {
@@ -2098,7 +2110,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 		}
 		cpudata->gcr2 = rcr2();
 		vmx_htlb_flush_ack(cpudata, machgen);
-		splx(s);
+		vmx_sti();
 
 		if (__predict_false(ret != 0)) {
 			vmx_exit_invalid(exit, -1);

Index: src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S:1.3 src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S:1.4
--- src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S:1.3	Wed Apr 24 18:45:15 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S	Sun Jul 19 06:36:37 2020
@@ -1,7 +1,7 @@
-/*	$NetBSD: nvmm_x86_svmfunc.S,v 1.3 2019/04/24 18:45:15 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svmfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $	*/
 
 /*
- * Copyright (c) 2018 The NetBSD Foundation, Inc.
+ * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
@@ -136,9 +136,6 @@ ENTRY(svm_vmrun)
 	/* Save the Host GPRs. */
 	HOST_SAVE_GPRS
 
-	/* 

CVS commit: src/sys/dev/nvmm/x86

2020-07-19 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jul 19 06:36:38 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_svmfunc.S nvmm_x86_vmx.c
nvmm_x86_vmxfunc.S

Log Message:
The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no
effect. Disable interrupts earlier instead. This prevents a possible race
against such IPIs.


To generate a diff of this commit:
cvs rdiff -u -r1.63 -r1.64 src/sys/dev/nvmm/x86/nvmm_x86_svm.c \
src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S \
src/sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-07-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jul 18 20:56:53 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Now that the IDT is per-CPU, it must be saved/restored on each CPU
independently.


To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.62 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.63
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.62	Tue Jul 14 00:45:53 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sat Jul 18 20:56:53 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.62 2020/07/14 00:45:53 yamaguchi Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.62 2020/07/14 00:45:53 yamaguchi Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $");
 
 #include 
 #include 
@@ -1921,6 +1921,7 @@ vmx_vcpu_guest_misc_enter(struct nvmm_cp
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 
 	/* This gets restored automatically by the CPU. */
+	vmx_vmwrite(VMCS_HOST_IDTR_BASE, (uint64_t)curcpu()->ci_idtvec.iv_idt);
 	vmx_vmwrite(VMCS_HOST_FS_BASE, rdmsr(MSR_FSBASE));
 	vmx_vmwrite(VMCS_HOST_CR3, rcr3());
 	vmx_vmwrite(VMCS_HOST_CR4, rcr4());
@@ -2698,8 +2699,7 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	struct vmcs *vmcs = cpudata->vmcs;
 	struct msr_entry *gmsr = cpudata->gmsr;
 	extern uint8_t vmx_resume_rip;
-	uint64_t rev, eptp, idt;
-	struct cpu_info *ci;
+	uint64_t rev, eptp;
 
 	rev = vmx_get_revision();
 
@@ -2766,9 +2766,6 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	vmx_vmwrite(VMCS_CR4_MASK, CR4_VMXE);
 
 	/* Set the Host state for resuming. */
-	ci = curcpu();
-	idt = (uint64_t)ci->ci_idtvec.iv_idt;
-
 	vmx_vmwrite(VMCS_HOST_RIP, (uint64_t)_resume_rip);
 	vmx_vmwrite(VMCS_HOST_CS_SELECTOR, GSEL(GCODE_SEL, SEL_KPL));
 	vmx_vmwrite(VMCS_HOST_SS_SELECTOR, GSEL(GDATA_SEL, SEL_KPL));
@@ -2779,7 +2776,6 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	vmx_vmwrite(VMCS_HOST_IA32_SYSENTER_CS, 0);
 	vmx_vmwrite(VMCS_HOST_IA32_SYSENTER_ESP, 0);
 	vmx_vmwrite(VMCS_HOST_IA32_SYSENTER_EIP, 0);
-	vmx_vmwrite(VMCS_HOST_IDTR_BASE, idt);
 	vmx_vmwrite(VMCS_HOST_IA32_PAT, rdmsr(MSR_CR_PAT));
 	vmx_vmwrite(VMCS_HOST_IA32_EFER, rdmsr(MSR_EFER));
 	vmx_vmwrite(VMCS_HOST_CR0, rcr0() & ~CR0_TS);



CVS commit: src/sys/dev/nvmm/x86

2020-07-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jul 18 20:56:53 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Now that the IDT is per-CPU, it must be saved/restored on each CPU
independently.


To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-06-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Jun 18 16:31:15 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
style


To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-06-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Jun 18 16:31:15 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
style


To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.59 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.60
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.59	Sun May 24 08:08:49 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Thu Jun 18 16:31:15 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.59 2020/05/24 08:08:49 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.60 2020/06/18 16:31:15 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.59 2020/05/24 08:08:49 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.60 2020/06/18 16:31:15 maxv Exp $");
 
 #include 
 #include 
@@ -489,7 +489,7 @@ vmx_vmclear(paddr_t *pa)
 #define VMCS_HOST_IA32_SYSENTER_ESP		0x6C10
 #define VMCS_HOST_IA32_SYSENTER_EIP		0x6C12
 #define VMCS_HOST_RSP0x6C14
-#define VMCS_HOST_RIP0x6c16
+#define VMCS_HOST_RIP0x6C16
 
 /* VMX basic exit reasons. */
 #define VMCS_EXITCODE_EXC_NMI			0



CVS commit: src/sys/dev/nvmm/x86

2020-05-21 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu May 21 07:36:16 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Improve the CPUID emulation on nvmm-intel: limit the highest basic and
hypervisor leaves.


To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.57 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.58
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.57	Sun May 10 06:24:16 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Thu May 21 07:36:16 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.57 2020/05/10 06:24:16 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.58 2020/05/21 07:36:16 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.57 2020/05/10 06:24:16 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.58 2020/05/21 07:36:16 maxv Exp $");
 
 #include 
 #include 
@@ -1137,7 +1137,22 @@ error:
 	vmx_exit_invalid(exit, VMCS_EXITCODE_EXC_NMI);
 }
 
+#define VMX_CPUID_MAX_BASIC		0x16
 #define VMX_CPUID_MAX_HYPERVISOR	0x4000
+#define VMX_CPUID_MAX_EXTENDED		0x8008
+static uint32_t vmx_cpuid_max_basic __read_mostly;
+
+static void
+vmx_inkernel_exec_cpuid(struct vmx_cpudata *cpudata, uint64_t eax, uint64_t ecx)
+{
+	u_int descs[4];
+
+	x86_cpuid2(eax, ecx, descs);
+	cpudata->gprs[NVMM_X64_GPR_RAX] = descs[0];
+	cpudata->gprs[NVMM_X64_GPR_RBX] = descs[1];
+	cpudata->gprs[NVMM_X64_GPR_RCX] = descs[2];
+	cpudata->gprs[NVMM_X64_GPR_RDX] = descs[3];
+}
 
 static void
 vmx_inkernel_handle_cpuid(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
@@ -1147,7 +1162,22 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
 	unsigned int ncpus;
 	uint64_t cr4;
 
+	if (eax < 0x4000) {
+		if (__predict_false(eax > vmx_cpuid_max_basic)) {
+			eax = vmx_cpuid_max_basic;
+			vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
+		}
+	} else if (eax < 0x8000) {
+		if (__predict_false(eax > VMX_CPUID_MAX_HYPERVISOR)) {
+			eax = vmx_cpuid_max_basic;
+			vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
+		}
+	}
+
 	switch (eax) {
+	case 0x:
+		cpudata->gprs[NVMM_X64_GPR_RAX] = vmx_cpuid_max_basic;
+		break;
 	case 0x0001:
 		cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_0001.eax;
 
@@ -1310,6 +1340,15 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
 		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_8001.ecx;
 		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_8001.edx;
 		break;
+	case 0x8002: /* Processor Brand String */
+	case 0x8003: /* Processor Brand String */
+	case 0x8004: /* Processor Brand String */
+	case 0x8005: /* Reserved Zero */
+	case 0x8006: /* Cache Information */
+	case 0x8007: /* TSC Information */
+	case 0x8008: /* Address Sizes */
+		break;
+
 	default:
 		break;
 	}
@@ -1333,18 +1372,11 @@ vmx_exit_cpuid(struct nvmm_machine *mach
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
 	struct nvmm_vcpu_conf_cpuid *cpuid;
 	uint64_t eax, ecx;
-	u_int descs[4];
 	size_t i;
 
 	eax = cpudata->gprs[NVMM_X64_GPR_RAX];
 	ecx = cpudata->gprs[NVMM_X64_GPR_RCX];
-	x86_cpuid2(eax, ecx, descs);
-
-	cpudata->gprs[NVMM_X64_GPR_RAX] = descs[0];
-	cpudata->gprs[NVMM_X64_GPR_RBX] = descs[1];
-	cpudata->gprs[NVMM_X64_GPR_RCX] = descs[2];
-	cpudata->gprs[NVMM_X64_GPR_RDX] = descs[3];
-
+	vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
 	vmx_inkernel_handle_cpuid(mach, vcpu, eax, ecx);
 
 	for (i = 0; i < VMX_NCPUIDS; i++) {
@@ -3279,6 +3311,9 @@ vmx_init(void)
 	/* Init the XCR0 mask. */
 	vmx_xcr0_mask = VMX_XCR0_MASK_DEFAULT & x86_xsave_features;
 
+	/* Init the max CPUID leaves. */
+	vmx_cpuid_max_basic = uimin(cpuid_level, VMX_CPUID_MAX_BASIC);
+
 	/* Init the TLB flush op, the EPT flush op and the EPTP type. */
 	msr = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP);
 	if ((msr & IA32_VMX_EPT_VPID_INVVPID_CONTEXT) != 0) {



CVS commit: src/sys/dev/nvmm/x86

2020-05-21 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu May 21 07:36:16 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Improve the CPUID emulation on nvmm-intel: limit the highest basic and
hypervisor leaves.


To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-05-10 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun May 10 06:24:16 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Respect the convention for the hypervisor information: return the highest
hypervisor leaf in 0x4000.EAX.


To generate a diff of this commit:
cvs rdiff -u -r1.60 -r1.61 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.56 -r1.57 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.60 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.61
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.60	Sat May  9 16:18:57 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Sun May 10 06:24:16 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.60 2020/05/09 16:18:57 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.61 2020/05/10 06:24:16 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.60 2020/05/09 16:18:57 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.61 2020/05/10 06:24:16 maxv Exp $");
 
 #include 
 #include 
@@ -771,6 +771,8 @@ svm_inkernel_advance(struct vmcb *vmcb)
 	vmcb->ctrl.intr &= ~VMCB_CTRL_INTR_SHADOW;
 }
 
+#define SVM_CPUID_MAX_HYPERVISOR	0x4000
+
 static void
 svm_inkernel_handle_cpuid(struct nvmm_cpu *vcpu, uint64_t eax, uint64_t ecx)
 {
@@ -856,6 +858,7 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 		break;
 
 	case 0x4000: /* Hypervisor Information */
+		cpudata->vmcb->state.rax = SVM_CPUID_MAX_HYPERVISOR;
 		cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
 		cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
 		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.56 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.57
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.56	Sat May  9 16:18:57 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sun May 10 06:24:16 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.56 2020/05/09 16:18:57 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.57 2020/05/10 06:24:16 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.56 2020/05/09 16:18:57 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.57 2020/05/10 06:24:16 maxv Exp $");
 
 #include 
 #include 
@@ -1137,6 +1137,8 @@ error:
 	vmx_exit_invalid(exit, VMCS_EXITCODE_EXC_NMI);
 }
 
+#define VMX_CPUID_MAX_HYPERVISOR	0x4000
+
 static void
 vmx_inkernel_handle_cpuid(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
 uint64_t eax, uint64_t ecx)
@@ -1293,6 +1295,7 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
 		break;
 
 	case 0x4000: /* Hypervisor Information */
+		cpudata->gprs[NVMM_X64_GPR_RAX] = VMX_CPUID_MAX_HYPERVISOR;
 		cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
 		cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
 		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;



CVS commit: src/sys/dev/nvmm/x86

2020-05-10 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun May 10 06:24:16 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Respect the convention for the hypervisor information: return the highest
hypervisor leaf in 0x4000.EAX.


To generate a diff of this commit:
cvs rdiff -u -r1.60 -r1.61 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.56 -r1.57 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-05-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat May  9 16:18:57 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Improve the CPUID emulation of basic leaves:
 - Hide DCA and PQM, they cannot be used in guests.
 - On Intel, explicitly handle each basic leaf until 0x16.
 - On AMD, explicitly handle each basic leaf until 0x0D.


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/nvmm/x86/nvmm_x86.c
cvs rdiff -u -r1.59 -r1.60 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.55 -r1.56 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.8 src/sys/dev/nvmm/x86/nvmm_x86.c:1.9
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.8	Sat Nov 16 17:53:46 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Sat May  9 16:18:57 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.8 2019/11/16 17:53:46 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.9 2020/05/09 16:18:57 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.8 2019/11/16 17:53:46 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.9 2020/05/09 16:18:57 maxv Exp $");
 
 #include 
 #include 
@@ -233,18 +233,18 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	.eax = ~0,
 	.ebx = ~0,
 	.ecx =
-	/* Excluded: MONITOR, VMX, SMX, EST, TM2, PDCM, PCID, X2APIC,
+	/* Excluded: MONITOR, VMX, SMX, EST, TM2, PDCM, PCID, DCA, X2APIC,
 	 * DEADLINE, RAZ. */
 	CPUID2_SSE3 | CPUID2_PCLMUL |
 	CPUID2_DTES64 | CPUID2_DS_CPL |
 	CPUID2_SSSE3 | CPUID2_CID |
 	CPUID2_SDBG | CPUID2_FMA |
 	CPUID2_CX16 | CPUID2_xTPR |
-	CPUID2_DCA | CPUID2_SSE41 |
-	CPUID2_SSE42 | CPUID2_MOVBE |
-	CPUID2_POPCNT | CPUID2_AES |
-	CPUID2_XSAVE | CPUID2_OSXSAVE |
-	CPUID2_F16C | CPUID2_RDRAND,
+	CPUID2_SSE41 | CPUID2_SSE42 |
+	CPUID2_MOVBE | CPUID2_POPCNT |
+	CPUID2_AES | CPUID2_XSAVE |
+	CPUID2_OSXSAVE | CPUID2_F16C |
+	CPUID2_RDRAND,
 	.edx =
 	/* Excluded: MCE, MTRR, MCA, DS, ACPI, TM. */
 	CPUID_FPU | CPUID_VME |
@@ -265,16 +265,16 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 const struct nvmm_x86_cpuid_mask nvmm_cpuid_0007 = {
 	.eax = ~0,
 	.ebx =
-	/* Excluded: TSC_ADJUST, AVX2, INVPCID, AVX512*, PT, SHA. */
+	/* Excluded: TSC_ADJUST, AVX2, INVPCID, QM, AVX512*, PT, SHA. */
 	CPUID_SEF_FSGSBASE |
 	CPUID_SEF_SGX | CPUID_SEF_BMI1 |
 	CPUID_SEF_HLE | CPUID_SEF_FDPEXONLY |
 	CPUID_SEF_SMEP | CPUID_SEF_BMI2 |
 	CPUID_SEF_ERMS | CPUID_SEF_RTM |
-	CPUID_SEF_QM | CPUID_SEF_FPUCSDS |
-	CPUID_SEF_PQE | CPUID_SEF_RDSEED |
-	CPUID_SEF_ADX | CPUID_SEF_SMAP |
-	CPUID_SEF_CLFLUSHOPT | CPUID_SEF_CLWB,
+	CPUID_SEF_FPUCSDS | CPUID_SEF_PQE |
+	CPUID_SEF_RDSEED | CPUID_SEF_ADX |
+	CPUID_SEF_SMAP | CPUID_SEF_CLFLUSHOPT |
+	CPUID_SEF_CLWB,
 	.ecx =
 	/* Excluded: AVX512*, MAWAU, RDPID. */
 	CPUID_SEF_PREFETCHWT1 | CPUID_SEF_UMIP |

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.59 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.60
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.59	Thu Apr 30 16:50:17 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Sat May  9 16:18:57 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.59 2020/04/30 16:50:17 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.60 2020/05/09 16:18:57 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.59 2020/04/30 16:50:17 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.60 2020/05/09 16:18:57 maxv Exp $");
 
 #include 
 #include 
@@ -796,20 +796,33 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 			cpudata->gprs[NVMM_X64_GPR_RCX] &= ~CPUID2_OSXSAVE;
 		}
 		break;
-	case 0x0005:
-	case 0x0006:
+	case 0x0002: /* Empty */
+	case 0x0003: /* Empty */
+	case 0x0004: /* Empty */
+	case 0x0005: /* Monitor/MWait */
+	case 0x0006: /* Power Management Related Features */
 		cpudata->vmcb->state.rax = 0;
 		cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
 		cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
 		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
 		break;
-	case 0x0007:
+	case 0x0007: /* Structured Extended Features */
 		cpudata->vmcb->state.rax &= nvmm_cpuid_0007.eax;
 		cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_0007.ebx;
 		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
 		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
 		break;
-	case 0x000D:
+	case 0x0008: /* Empty */
+	case 0x0009: /* Empty */
+	case 0x000A: /* Empty */
+	case 0x000B: /* Empty */
+	case 0x000C: /* Empty */
+		cpudata->vmcb->state.rax = 0;
+		cpudata->gprs[NVMM_X64_GPR_RBX] = 

CVS commit: src/sys/dev/nvmm/x86

2020-05-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat May  9 16:18:57 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Improve the CPUID emulation of basic leaves:
 - Hide DCA and PQM, they cannot be used in guests.
 - On Intel, explicitly handle each basic leaf until 0x16.
 - On AMD, explicitly handle each basic leaf until 0x0D.


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/nvmm/x86/nvmm_x86.c
cvs rdiff -u -r1.59 -r1.60 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.55 -r1.56 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-04-30 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Apr 30 16:56:24 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
If we were processing a software int/excp, and got a VMEXIT in the middle,
we must also reflect the instruction length, otherwise the next VMENTER
fails and Qemu shuts the guest down.


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.53 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.54
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.53	Thu Apr 30 16:50:17 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Thu Apr 30 16:56:23 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.53 2020/04/30 16:50:17 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.54 2020/04/30 16:56:23 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.53 2020/04/30 16:50:17 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.54 2020/04/30 16:56:23 maxv Exp $");
 
 #include 
 #include 
@@ -369,7 +369,7 @@ vmx_vmclear(paddr_t *pa)
 #define		INTR_INFO_ERROR			__BIT(11)
 #define		INTR_INFO_VALID			__BIT(31)
 #define VMCS_ENTRY_EXCEPTION_ERROR		0x4018
-#define VMCS_ENTRY_INST_LENGTH			0x401A
+#define VMCS_ENTRY_INSTRUCTION_LENGTH		0x401A
 #define VMCS_TPR_THRESHOLD			0x401C
 #define VMCS_PROCBASED_CTLS2			0x401E
 #define		PROC_CTLS2_VIRT_APIC_ACCESSES	__BIT(0)
@@ -1896,7 +1896,7 @@ vmx_htlb_flush_ack(struct vmx_cpudata *c
 static inline void
 vmx_exit_evt(struct vmx_cpudata *cpudata)
 {
-	uint64_t info, err;
+	uint64_t info, err, inslen;
 
 	cpudata->evt_pending = false;
 
@@ -1909,6 +1909,14 @@ vmx_exit_evt(struct vmx_cpudata *cpudata
 	vmx_vmwrite(VMCS_ENTRY_INTR_INFO, info);
 	vmx_vmwrite(VMCS_ENTRY_EXCEPTION_ERROR, err);
 
+	switch (__SHIFTOUT(info, INTR_INFO_TYPE)) {
+	case INTR_TYPE_SW_INT:
+	case INTR_TYPE_PRIV_SW_EXC:
+	case INTR_TYPE_SW_EXC:
+		inslen = vmx_vmread(VMCS_EXIT_INSTRUCTION_LENGTH);
+		vmx_vmwrite(VMCS_ENTRY_INSTRUCTION_LENGTH, inslen);
+	}
+
 	cpudata->evt_pending = true;
 }
 



CVS commit: src/sys/dev/nvmm/x86

2020-04-30 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Apr 30 16:56:24 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
If we were processing a software int/excp, and got a VMEXIT in the middle,
we must also reflect the instruction length, otherwise the next VMENTER
fails and Qemu shuts the guest down.


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-03-12 Thread Tobias Nygren
Module Name:src
Committed By:   tnn
Date:   Thu Mar 12 13:01:59 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
vmx_vmptrst(): only used when DIAGNOSTIC


To generate a diff of this commit:
cvs rdiff -u -r1.49 -r1.50 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.49 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.50
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.49	Fri Feb 21 00:26:22 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Thu Mar 12 13:01:59 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.49 2020/02/21 00:26:22 joerg Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.50 2020/03/12 13:01:59 tnn Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.49 2020/02/21 00:26:22 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.50 2020/03/12 13:01:59 tnn Exp $");
 
 #include 
 #include 
@@ -134,6 +134,7 @@ vmx_vmwrite(uint64_t field, uint64_t val
 	);
 }
 
+#ifdef DIAGNOSTIC
 static inline paddr_t
 vmx_vmptrst(void)
 {
@@ -148,6 +149,7 @@ vmx_vmptrst(void)
 
 	return pa;
 }
+#endif
 
 static inline void
 vmx_vmptrld(paddr_t *pa)



CVS commit: src/sys/dev/nvmm/x86

2020-03-12 Thread Tobias Nygren
Module Name:src
Committed By:   tnn
Date:   Thu Mar 12 13:01:59 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
vmx_vmptrst(): only used when DIAGNOSTIC


To generate a diff of this commit:
cvs rdiff -u -r1.49 -r1.50 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-01-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Jan  9 16:27:57 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Registering the host's CR0 is done outside of the VCPU loop, so it must be
cleared because it is also cleared inside the loop.

Not clearing it could trigger DNAs on VMEXITs, because STTS/CLTS are still
here as part of debugging since my FPU overhaul.


To generate a diff of this commit:
cvs rdiff -u -r1.47 -r1.48 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.47 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.48
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.47	Thu Jan  9 16:20:12 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Thu Jan  9 16:27:57 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.47 2020/01/09 16:20:12 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.48 2020/01/09 16:27:57 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.47 2020/01/09 16:20:12 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.48 2020/01/09 16:27:57 maxv Exp $");
 
 #include 
 #include 
@@ -2664,7 +2664,7 @@ vmx_vcpu_init(struct nvmm_machine *mach,
 	vmx_vmwrite(VMCS_HOST_IDTR_BASE, (uint64_t)idt);
 	vmx_vmwrite(VMCS_HOST_IA32_PAT, rdmsr(MSR_CR_PAT));
 	vmx_vmwrite(VMCS_HOST_IA32_EFER, rdmsr(MSR_EFER));
-	vmx_vmwrite(VMCS_HOST_CR0, rcr0());
+	vmx_vmwrite(VMCS_HOST_CR0, rcr0() & ~CR0_TS);
 
 	/* Generate ASID. */
 	vmx_asid_alloc(vcpu);



CVS commit: src/sys/dev/nvmm/x86

2020-01-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Jan  9 16:27:57 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Registering the host's CR0 is done outside of the VCPU loop, so it must be
cleared because it is also cleared inside the loop.

Not clearing it could trigger DNAs on VMEXITs, because STTS/CLTS are still
here as part of debugging since my FPU overhaul.


To generate a diff of this commit:
cvs rdiff -u -r1.47 -r1.48 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2020-01-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Jan  9 16:20:12 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Mmh, as noted in PR/54847, this should be uint64_t, not uint16_t. Harmless
because we use only the two lowest bits anyway.

I believe this could be caught by KUBSAN; time to do another round of
NVMM+K_SAN testing.


To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.46 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.47
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.46	Tue Dec 10 18:06:50 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Thu Jan  9 16:20:12 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.46 2019/12/10 18:06:50 ad Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.47 2020/01/09 16:20:12 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.46 2019/12/10 18:06:50 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.47 2020/01/09 16:20:12 maxv Exp $");
 
 #include 
 #include 
@@ -1688,7 +1688,7 @@ vmx_exit_xsetbv(struct nvmm_machine *mac
 struct nvmm_vcpu_exit *exit)
 {
 	struct vmx_cpudata *cpudata = vcpu->cpudata;
-	uint16_t val;
+	uint64_t val;
 
 	exit->reason = NVMM_VCPU_EXIT_NONE;
 



CVS commit: src/sys/dev/nvmm/x86

2020-01-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Jan  9 16:20:12 UTC 2020

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Mmh, as noted in PR/54847, this should be uint64_t, not uint16_t. Harmless
because we use only the two lowest bits anyway.

I believe this could be caught by KUBSAN; time to do another round of
NVMM+K_SAN testing.


To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-12-10 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Tue Dec 10 18:06:50 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
pg->phys_addr > VM_PAGE_TO_PHYS(pg)


To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.45 -r1.46 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-12-10 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Tue Dec 10 18:06:50 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
pg->phys_addr > VM_PAGE_TO_PHYS(pg)


To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.45 -r1.46 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.54 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.55
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.54	Wed Nov 20 10:26:56 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Tue Dec 10 18:06:50 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.54 2019/11/20 10:26:56 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.55 2019/12/10 18:06:50 ad Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.54 2019/11/20 10:26:56 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.55 2019/12/10 18:06:50 ad Exp $");
 
 #include 
 #include 
@@ -1489,7 +1489,7 @@ svm_memalloc(paddr_t *pa, vaddr_t *va, s
 	, 1, 0);
 	if (ret != 0)
 		return ENOMEM;
-	_pa = TAILQ_FIRST()->phys_addr;
+	_pa = VM_PAGE_TO_PHYS(TAILQ_FIRST());
 	_va = uvm_km_alloc(kernel_map, npages * PAGE_SIZE, 0,
 	UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
 	if (_va == 0)

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.45 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.46
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.45	Wed Nov 20 10:26:56 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Dec 10 18:06:50 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.45 2019/11/20 10:26:56 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.46 2019/12/10 18:06:50 ad Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.45 2019/11/20 10:26:56 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.46 2019/12/10 18:06:50 ad Exp $");
 
 #include 
 #include 
@@ -2112,7 +2112,7 @@ vmx_memalloc(paddr_t *pa, vaddr_t *va, s
 	, 1, 0);
 	if (ret != 0)
 		return ENOMEM;
-	_pa = TAILQ_FIRST()->phys_addr;
+	_pa = VM_PAGE_TO_PHYS(TAILQ_FIRST());
 	_va = uvm_km_alloc(kernel_map, npages * PAGE_SIZE, 0,
 	UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
 	if (_va == 0)



CVS commit: src/sys/dev/nvmm/x86

2019-11-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Nov 20 10:26:56 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Hide XSAVES-specific stuff and the masked extended states.


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.44 -r1.45 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.53 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.54
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.53	Mon Oct 28 08:30:49 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Wed Nov 20 10:26:56 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.53 2019/10/28 08:30:49 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.54 2019/11/20 10:26:56 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.53 2019/10/28 08:30:49 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.54 2019/11/20 10:26:56 maxv Exp $");
 
 #include 
 #include 
@@ -826,7 +826,18 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
 			cpudata->gprs[NVMM_X64_GPR_RDX] = svm_xcr0_mask >> 32;
 			break;
 		case 1:
-			cpudata->vmcb->state.rax &= ~CPUID_PES1_XSAVES;
+			cpudata->vmcb->state.rax &=
+			(CPUID_PES1_XSAVEOPT | CPUID_PES1_XSAVEC |
+			 CPUID_PES1_XGETBV);
+			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+			break;
+		default:
+			cpudata->vmcb->state.rax = 0;
+			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
 			break;
 		}
 		break;

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.44 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.45
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.44	Mon Oct 28 08:30:49 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Wed Nov 20 10:26:56 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.44 2019/10/28 08:30:49 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.45 2019/11/20 10:26:56 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.44 2019/10/28 08:30:49 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.45 2019/11/20 10:26:56 maxv Exp $");
 
 #include 
 #include 
@@ -1201,7 +1201,18 @@ vmx_inkernel_handle_cpuid(struct nvmm_cp
 			cpudata->gprs[NVMM_X64_GPR_RDX] = vmx_xcr0_mask >> 32;
 			break;
 		case 1:
-			cpudata->gprs[NVMM_X64_GPR_RAX] &= ~CPUID_PES1_XSAVES;
+			cpudata->gprs[NVMM_X64_GPR_RAX] &=
+			(CPUID_PES1_XSAVEOPT | CPUID_PES1_XSAVEC |
+			 CPUID_PES1_XGETBV);
+			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+			break;
+		default:
+			cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+			cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
 			break;
 		}
 		break;



CVS commit: src/sys/dev/nvmm/x86

2019-11-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Nov 20 10:26:56 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Hide XSAVES-specific stuff and the masked extended states.


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.44 -r1.45 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-11-16 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Nov 16 17:53:46 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Don't report MWAITX by default.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.7 src/sys/dev/nvmm/x86/nvmm_x86.c:1.8
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.7	Wed May 15 04:39:52 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Sat Nov 16 17:53:46 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.7 2019/05/15 04:39:52 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.8 2019/11/16 17:53:46 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.7 2019/05/15 04:39:52 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.8 2019/11/16 17:53:46 maxv Exp $");
 
 #include 
 #include 
@@ -292,7 +292,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	.eax = ~0,
 	.ebx = ~0,
 	.ecx =
-	/* Excluded: SVM, EAPIC, OSVW. */
+	/* Excluded: SVM, EAPIC, OSVW, MWAITX. */
 	CPUID_LAHF | CPUID_CMPLEGACY |
 	CPUID_ALTMOVCR0 | CPUID_LZCNT |
 	CPUID_SSE4A | CPUID_MISALIGNSSE |
@@ -304,7 +304,7 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
 	CPUID_TOPOEXT | CPUID_PCEC |
 	CPUID_PCENB | CPUID_SPM |
 	CPUID_DBE | CPUID_PTSC |
-	CPUID_L2IPERFC | CPUID_MWAITX,
+	CPUID_L2IPERFC,
 	.edx =
 	/* Excluded: RDTSCP. */
 	CPUID_SYSCALL | CPUID_MPC |



CVS commit: src/sys/dev/nvmm/x86

2019-11-16 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Nov 16 17:53:46 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c

Log Message:
Don't report MWAITX by default.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/nvmm/x86/nvmm_x86.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-10-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Oct 27 18:26:54 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Add PCID support in the guests. This speeds up most 64bit guests, because
since Meltdown, everybody uses PCID (including NetBSD).


To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.42 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.43
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.42	Sun Oct 27 11:11:09 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sun Oct 27 18:26:54 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.42 2019/10/27 11:11:09 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.43 2019/10/27 18:26:54 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.42 2019/10/27 11:11:09 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.43 2019/10/27 18:26:54 maxv Exp $");
 
 #include 
 #include 
@@ -1150,6 +1150,9 @@ vmx_inkernel_handle_cpuid(struct nvmm_cp
 
 		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0001.ecx;
 		cpudata->gprs[NVMM_X64_GPR_RCX] |= CPUID2_RAZ;
+		if (vmx_procbased_ctls2 & PROC_CTLS2_INVPCID_ENABLE) {
+			cpudata->gprs[NVMM_X64_GPR_RCX] |= CPUID2_PCID;
+		}
 
 		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0001.edx;
 
@@ -1171,6 +1174,9 @@ vmx_inkernel_handle_cpuid(struct nvmm_cp
 		cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_0007.ebx;
 		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
 		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
+		if (vmx_procbased_ctls2 & PROC_CTLS2_INVPCID_ENABLE) {
+			cpudata->gprs[NVMM_X64_GPR_RBX] |= CPUID_SEF_INVPCID;
+		}
 		break;
 	case 0x000A:
 		cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
@@ -2893,6 +2899,40 @@ vmx_machine_configure(struct nvmm_machin
 
 /* -- */
 
+#define CTLS_ONE_ALLOWED(msrval, bitoff) \
+	((msrval & __BIT(32 + bitoff)) != 0)
+#define CTLS_ZERO_ALLOWED(msrval, bitoff) \
+	((msrval & __BIT(bitoff)) == 0)
+
+static int
+vmx_check_ctls(uint64_t msr_ctls, uint64_t msr_true_ctls, uint64_t set_one)
+{
+	uint64_t basic, val, true_val;
+	bool has_true;
+	size_t i;
+
+	basic = rdmsr(MSR_IA32_VMX_BASIC);
+	has_true = (basic & IA32_VMX_BASIC_TRUE_CTLS) != 0;
+
+	val = rdmsr(msr_ctls);
+	if (has_true) {
+		true_val = rdmsr(msr_true_ctls);
+	} else {
+		true_val = val;
+	}
+
+	for (i = 0; i < 32; i++) {
+		if (!(set_one & __BIT(i))) {
+			continue;
+		}
+		if (!CTLS_ONE_ALLOWED(true_val, i)) {
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
 static int
 vmx_init_ctls(uint64_t msr_ctls, uint64_t msr_true_ctls,
 uint64_t set_one, uint64_t set_zero, uint64_t *res)
@@ -2911,14 +2951,9 @@ vmx_init_ctls(uint64_t msr_ctls, uint64_
 		true_val = val;
 	}
 
-#define ONE_ALLOWED(msrval, bitoff) \
-	((msrval & __BIT(32 + bitoff)) != 0)
-#define ZERO_ALLOWED(msrval, bitoff) \
-	((msrval & __BIT(bitoff)) == 0)
-
 	for (i = 0; i < 32; i++) {
-		one_allowed = ONE_ALLOWED(true_val, i);
-		zero_allowed = ZERO_ALLOWED(true_val, i);
+		one_allowed = CTLS_ONE_ALLOWED(true_val, i);
+		zero_allowed = CTLS_ZERO_ALLOWED(true_val, i);
 
 		if (zero_allowed && !one_allowed) {
 			if (set_one & __BIT(i))
@@ -2935,9 +2970,9 @@ vmx_init_ctls(uint64_t msr_ctls, uint64_
 *res |= __BIT(i);
 			} else if (!has_true) {
 *res &= ~__BIT(i);
-			} else if (ZERO_ALLOWED(val, i)) {
+			} else if (CTLS_ZERO_ALLOWED(val, i)) {
 *res &= ~__BIT(i);
-			} else if (ONE_ALLOWED(val, i)) {
+			} else if (CTLS_ONE_ALLOWED(val, i)) {
 *res |= __BIT(i);
 			} else {
 return -1;
@@ -3011,6 +3046,12 @@ vmx_ident(void)
 	if (ret == -1) {
 		return false;
 	}
+	ret = vmx_check_ctls(
+	MSR_IA32_VMX_PROCBASED_CTLS2, MSR_IA32_VMX_PROCBASED_CTLS2,
+	PROC_CTLS2_INVPCID_ENABLE);
+	if (ret != -1) {
+		vmx_procbased_ctls2 |= PROC_CTLS2_INVPCID_ENABLE;
+	}
 	ret = vmx_init_ctls(
 	MSR_IA32_VMX_ENTRY_CTLS, MSR_IA32_VMX_TRUE_ENTRY_CTLS,
 	VMX_ENTRY_CTLS_ONE, VMX_ENTRY_CTLS_ZERO,



CVS commit: src/sys/dev/nvmm/x86

2019-10-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Oct 27 18:26:54 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Add PCID support in the guests. This speeds up most 64bit guests, because
since Meltdown, everybody uses PCID (including NetBSD).


To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-10-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Oct 27 11:11:09 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Mask CPUID leaf 0x0A on Intel, because we don't want the guest to try (and
fail) to probe the PMC MSRs. This avoids "Unexpected WRMSR" warnings in
qemu-nvmm.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-10-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Oct 27 11:11:09 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Mask CPUID leaf 0x0A on Intel, because we don't want the guest to try (and
fail) to probe the PMC MSRs. This avoids "Unexpected WRMSR" warnings in
qemu-nvmm.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.41 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.42
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.41	Sun Oct 27 10:28:55 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sun Oct 27 11:11:09 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.41 2019/10/27 10:28:55 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.42 2019/10/27 11:11:09 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.41 2019/10/27 10:28:55 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.42 2019/10/27 11:11:09 maxv Exp $");
 
 #include 
 #include 
@@ -1172,6 +1172,12 @@ vmx_inkernel_handle_cpuid(struct nvmm_cp
 		cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_0007.ecx;
 		cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_0007.edx;
 		break;
+	case 0x000A:
+		cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+		cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+		cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+		break;
 	case 0x000D:
 		if (vmx_xcr0_mask == 0) {
 			break;



CVS commit: src/sys/dev/nvmm/x86

2019-10-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Oct  4 12:17:05 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Switch to the new PTE naming.


To generate a diff of this commit:
cvs rdiff -u -r1.48 -r1.49 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.37 -r1.38 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-10-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Oct  4 12:17:05 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c nvmm_x86_vmx.c

Log Message:
Switch to the new PTE naming.


To generate a diff of this commit:
cvs rdiff -u -r1.48 -r1.49 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.37 -r1.38 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.48 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.49
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.48	Fri Oct  4 12:15:21 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Fri Oct  4 12:17:05 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.48 2019/10/04 12:15:21 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.49 2019/10/04 12:17:05 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.48 2019/10/04 12:15:21 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.49 2019/10/04 12:17:05 maxv Exp $");
 
 #include 
 #include 
@@ -2131,7 +2131,7 @@ svm_tlb_flush(struct pmap *pm)
 	atomic_inc_64(>mach_htlb_gen);
 
 	/* Generates IPIs, which cause #VMEXITs. */
-	pmap_tlb_shootdown(pmap_kernel(), -1, PG_G, TLBSHOOT_UPDATE);
+	pmap_tlb_shootdown(pmap_kernel(), -1, PTE_G, TLBSHOOT_UPDATE);
 }
 
 static void

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.37 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.38
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.37	Fri Sep 13 14:19:13 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Fri Oct  4 12:17:05 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.37 2019/09/13 14:19:13 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.38 2019/10/04 12:17:05 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.37 2019/09/13 14:19:13 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.38 2019/10/04 12:17:05 maxv Exp $");
 
 #include 
 #include 
@@ -2749,7 +2749,7 @@ vmx_tlb_flush(struct pmap *pm)
 	atomic_inc_64(>mach_htlb_gen);
 
 	/* Generates IPIs, which cause #VMEXITs. */
-	pmap_tlb_shootdown(pmap_kernel(), -1, PG_G, TLBSHOOT_UPDATE);
+	pmap_tlb_shootdown(pmap_kernel(), -1, PTE_G, TLBSHOOT_UPDATE);
 }
 
 static void



CVS commit: src/sys/dev/nvmm/x86

2019-10-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Oct  4 12:15:21 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Fix definition for MWAIT. It should be bit 11, not 12; 12 is the armed
version.


To generate a diff of this commit:
cvs rdiff -u -r1.47 -r1.48 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-10-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Oct  4 12:11:38 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Add definitions for RDPRU, MCOMMIT, GMET and VTE.


To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.46 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.47
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.46	Sat May 11 07:31:56 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Fri Oct  4 12:11:38 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.46 2019/05/11 07:31:56 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.47 2019/10/04 12:11:38 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.46 2019/05/11 07:31:56 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.47 2019/10/04 12:11:38 maxv Exp $");
 
 #include 
 #include 
@@ -202,6 +202,7 @@ int svm_vmrun(paddr_t, uint64_t *);
 #define VMCB_EXITCODE_MWAIT		0x008B
 #define VMCB_EXITCODE_MWAIT_CONDITIONAL	0x008C
 #define VMCB_EXITCODE_XSETBV		0x008D
+#define VMCB_EXITCODE_RDPRU		0x008E
 #define VMCB_EXITCODE_EFER_WRITE_TRAP	0x008F
 #define VMCB_EXITCODE_CR0_WRITE_TRAP	0x0090
 #define VMCB_EXITCODE_CR1_WRITE_TRAP	0x0091
@@ -219,6 +220,7 @@ int svm_vmrun(paddr_t, uint64_t *);
 #define VMCB_EXITCODE_CR13_WRITE_TRAP	0x009D
 #define VMCB_EXITCODE_CR14_WRITE_TRAP	0x009E
 #define VMCB_EXITCODE_CR15_WRITE_TRAP	0x009F
+#define VMCB_EXITCODE_MCOMMIT		0x00A3
 #define VMCB_EXITCODE_NPF		0x0400
 #define VMCB_EXITCODE_AVIC_INCOMP_IPI	0x0401
 #define VMCB_EXITCODE_AVIC_NOACCEL	0x0402
@@ -287,10 +289,14 @@ struct vmcb_ctrl {
 #define VMCB_CTRL_INTERCEPT_MONITOR	__BIT(10)
 #define VMCB_CTRL_INTERCEPT_MWAIT	__BIT(12)
 #define VMCB_CTRL_INTERCEPT_XSETBV	__BIT(13)
+#define VMCB_CTRL_INTERCEPT_RDPRU	__BIT(14)
 #define VMCB_CTRL_INTERCEPT_EFER_SPEC	__BIT(15)
 #define VMCB_CTRL_INTERCEPT_WCR_SPEC(x)	__BIT(16 + x)
 
-	uint8_t  rsvd1[40];
+	uint32_t intercept_misc3;
+#define VMCB_CTRL_INTERCEPT_MCOMMIT	__BIT(3)
+
+	uint8_t  rsvd1[36];
 	uint16_t pause_filt_thresh;
 	uint16_t pause_filt_cnt;
 	uint64_t iopm_base_pa;
@@ -332,6 +338,8 @@ struct vmcb_ctrl {
 #define VMCB_CTRL_ENABLE_NP		__BIT(0)
 #define VMCB_CTRL_ENABLE_SEV		__BIT(1)
 #define VMCB_CTRL_ENABLE_ES_SEV		__BIT(2)
+#define VMCB_CTRL_ENABLE_GMET		__BIT(3)
+#define VMCB_CTRL_ENABLE_VTE		__BIT(5)
 
 	uint64_t avic;
 #define VMCB_CTRL_AVIC_APIC_BAR		__BITS(51,0)



CVS commit: src/sys/dev/nvmm/x86

2019-10-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Oct  4 12:11:38 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_svm.c

Log Message:
Add definitions for RDPRU, MCOMMIT, GMET and VTE.


To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-09-13 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep 13 14:19:13 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Always set hwcode on error. Useful for debugging.


To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.36 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.37
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.36	Sun Jun 16 18:30:31 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Fri Sep 13 14:19:13 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.36 2019/06/16 18:30:31 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.37 2019/09/13 14:19:13 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.36 2019/06/16 18:30:31 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.37 2019/09/13 14:19:13 maxv Exp $");
 
 #include 
 #include 
@@ -1106,6 +1106,13 @@ vmx_inkernel_advance(void)
 }
 
 static void
+vmx_exit_invalid(struct nvmm_exit *exit, uint64_t code)
+{
+	exit->u.inv.hwcode = code;
+	exit->reason = NVMM_EXIT_INVALID;
+}
+
+static void
 vmx_exit_exc_nmi(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
 struct nvmm_exit *exit)
 {
@@ -1124,7 +1131,7 @@ vmx_exit_exc_nmi(struct nvmm_machine *ma
 	return;
 
 error:
-	exit->reason = NVMM_EXIT_INVALID;
+	vmx_exit_invalid(exit, VMCS_EXITCODE_EXC_NMI);
 }
 
 static void
@@ -1689,13 +1696,6 @@ vmx_exit_epf(struct nvmm_machine *mach, 
 	NVMM_X64_STATE_CRS | NVMM_X64_STATE_MSRS);
 }
 
-static void
-vmx_exit_invalid(struct nvmm_exit *exit, uint64_t code)
-{
-	exit->u.inv.hwcode = code;
-	exit->reason = NVMM_EXIT_INVALID;
-}
-
 /* -- */
 
 static void
@@ -1940,7 +1940,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, 
 		splx(s);
 
 		if (__predict_false(ret != 0)) {
-			exit->reason = NVMM_EXIT_INVALID;
+			vmx_exit_invalid(exit, -1);
 			break;
 		}
 		vmx_exit_evt(cpudata);



CVS commit: src/sys/dev/nvmm/x86

2019-09-13 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Sep 13 14:19:13 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Always set hwcode on error. Useful for debugging.


To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-06-16 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jun 16 18:30:31 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Make sure VMX-outside-SMX is allowed. It may not be if the BIOS decided to
disable VMX. Seen on an HP laptop, where NVMM would panic because of that.


To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/dev/nvmm/x86

2019-06-16 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jun 16 18:30:31 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Make sure VMX-outside-SMX is allowed. It may not be if the BIOS decided to
disable VMX. Seen on an HP laptop, where NVMM would panic because of that.


To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.35 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.36
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.35	Sat May 18 08:55:59 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Sun Jun 16 18:30:31 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.35 2019/05/18 08:55:59 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.36 2019/06/16 18:30:31 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.35 2019/05/18 08:55:59 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.36 2019/06/16 18:30:31 maxv Exp $");
 
 #include 
 #include 
@@ -2894,6 +2894,9 @@ vmx_ident(void)
 	if ((msr & IA32_FEATURE_CONTROL_LOCK) == 0) {
 		return false;
 	}
+	if ((msr & IA32_FEATURE_CONTROL_OUT_SMX) == 0) {
+		return false;
+	}
 
 	msr = rdmsr(MSR_IA32_VMX_BASIC);
 	if ((msr & IA32_VMX_BASIC_IO_REPORT) == 0) {



CVS commit: src/sys/dev/nvmm/x86

2019-05-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat May 18 08:55:59 UTC 2019

Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86_vmx.c

Log Message:
Now that SVS cannot be disabled at run time, MSR_LSTAR is static, so no
need to save it on each VM enter.


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



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