On 07/17/12 02:56, matthew green wrote:
Module Name:src
Committed By: mrg
Date: Sun Jul 15 21:13:31 UTC 2012
Modified Files:
src/sys/dev/usb: usb_subr.c usbdi.c usbdi.h usbdivar.h
Log Message:
commit my workaround for PR 46648 for now, as the more involved
On 07/17/12 11:25, Christoph Egger wrote:
On 07/17/12 02:56, matthew green wrote:
Module Name: src
Committed By: mrg
Date: Sun Jul 15 21:13:31 UTC 2012
Modified Files:
src/sys/dev/usb: usb_subr.c usbdi.c usbdi.h usbdivar.h
Log Message:
commit my workaround
Modified Files:
src/sys/dev/sdmmc: sdhc.c
Log Message:
Handle interrupt acknowledgement in the SDHC_FLAG_32BIT_ACCESS case in
the same way as non-SDHC_FLAG_32BIT_ACCESS case.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/dev/sdmmc/sdhc.c
Two
On Jul 17, 2012, at 5:39 AM, Greg Troxel wrote:
Modified Files:
src/sys/dev/sdmmc: sdhc.c
Log Message:
Handle interrupt acknowledgement in the SDHC_FLAG_32BIT_ACCESS case in
the same way as non-SDHC_FLAG_32BIT_ACCESS case.
To generate a diff of this commit:
cvs rdiff
On Jul 17, 2012, at 0925 , Matt Thomas wrote:
On Jul 17, 2012, at 5:39 AM, Greg Troxel wrote:
0x30 is aligned and that is the address that is read from a 32-bit access.
Not enough coffee - I was reading hex as decimal :-)
In the non-32 case, it seems that the EINTR register is read
On Jul 17, 2012, at 7:08 AM, Greg Troxel wrote:
So the 4-byte read causes the SDHC_ERROR_INTERRUPT not to get set because
the same read reads EINTR_STATUS, or the chip that's in systems that need
4-byte reads is different (ESDHC vs SDHC?)?
The chip does not implement SDHC_ERROR_INTERRUPT.
it seems odd to have bits set in SDHC_EINTR_STATUS without
SDHC_ERROR_INTERRUPT set in SDHC_NINTR_STATUS, and
the two code paths seem different still
This is because the ESDHC doesn't set SDHC_ERROR_INTERRUPT in its
register since you've read SDHC_EINTR_STATUS and can see those
