CVS commit: xsrc/external/mit/xf86-input-ws/dist/src

2021-12-04 Thread Jared D. McNeill
Module Name:xsrc Committed By: jmcneill Date: Sat Dec 4 15:21:55 UTC 2021 Modified Files: xsrc/external/mit/xf86-input-ws/dist/src: ws.c ws.h Log Message: Assume WSMOUSE_TYPE_TPANEL if calibration data is present and the device is in raw mode. The WSMOUSEIO_GTYPE ioctl

CVS commit: xsrc/external/mit/xf86-input-ws/dist/src

2021-12-04 Thread Jared D. McNeill
Module Name:xsrc Committed By: jmcneill Date: Sat Dec 4 15:21:55 UTC 2021 Modified Files: xsrc/external/mit/xf86-input-ws/dist/src: ws.c ws.h Log Message: Assume WSMOUSE_TYPE_TPANEL if calibration data is present and the device is in raw mode. The WSMOUSEIO_GTYPE ioctl

CVS commit: src/sys/arch/arm/acpi

2021-11-24 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Wed Nov 24 10:01:24 UTC 2021 Modified Files: src/sys/arch/arm/acpi: cpu_acpi.c Log Message: arm64: acpi: Set capacity_dmips_mhz for CPUs The GICC structure describes a relative power efficiency for each processor. Use this

CVS commit: src/sys/arch/arm/acpi

2021-11-24 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Wed Nov 24 10:01:24 UTC 2021 Modified Files: src/sys/arch/arm/acpi: cpu_acpi.c Log Message: arm64: acpi: Set capacity_dmips_mhz for CPUs The GICC structure describes a relative power efficiency for each processor. Use this

CVS commit: src/sys/arch/arm/fdt

2021-11-17 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Wed Nov 17 21:46:12 UTC 2021 Modified Files: src/sys/arch/arm/fdt: gicv3_fdt.c Log Message: gicv3: add support for mbi-alias property The mbi-alias property, if present, contains the base address of a GICD alias frame that

CVS commit: src/sys/arch/arm/fdt

2021-11-17 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Wed Nov 17 21:46:12 UTC 2021 Modified Files: src/sys/arch/arm/fdt: gicv3_fdt.c Log Message: gicv3: add support for mbi-alias property The mbi-alias property, if present, contains the base address of a GICD alias frame that

CVS commit: src/sys/arch/arm/amlogic

2021-11-17 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Wed Nov 17 11:31:12 UTC 2021 Modified Files: src/sys/arch/arm/amlogic: mesongxbb_pinctrl.c Log Message: Add missing GPIOZ direction / input / output register defs. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3

CVS commit: src/sys/arch/arm/amlogic

2021-11-17 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Wed Nov 17 11:31:12 UTC 2021 Modified Files: src/sys/arch/arm/amlogic: mesongxbb_pinctrl.c Log Message: Add missing GPIOZ direction / input / output register defs. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3

CVS commit: src/sys/arch/arm/rockchip

2021-11-13 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 15:17:22 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3066_smp.c Log Message: Write back and invalidate cache before starting secondary CPUs. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2

CVS commit: src/sys/arch/arm/rockchip

2021-11-13 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 15:17:22 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3066_smp.c Log Message: Write back and invalidate cache before starting secondary CPUs. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2

CVS commit: src/sys/arch/arm/rockchip

2021-11-13 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 11:46:32 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c rk_tsadc.c Log Message: Add support for RK3288 temperature sensors. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5

CVS commit: src/sys/arch/arm/rockchip

2021-11-13 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 11:46:32 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c rk_tsadc.c Log Message: Add support for RK3288 temperature sensors. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5

CVS commit: src/sys/arch/arm

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:48:12 UTC 2021 Modified Files: src/sys/arch/arm/arm: cpufunc.c src/sys/arch/arm/include: armreg.h Log Message: Set ACTLR.SMP=1 on Cortex-A17 To generate a diff of this commit: cvs rdiff -u -r1.181

CVS commit: src/sys/arch/arm

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:48:12 UTC 2021 Modified Files: src/sys/arch/arm/arm: cpufunc.c src/sys/arch/arm/include: armreg.h Log Message: Set ACTLR.SMP=1 on Cortex-A17 To generate a diff of this commit: cvs rdiff -u -r1.181

CVS commit: src/sys/arch/evbarm/conf

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:29:21 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: GENERIC Log Message: Add rkpwm, rkspi To generate a diff of this commit: cvs rdiff -u -r1.102 -r1.103 src/sys/arch/evbarm/conf/GENERIC Please note that

CVS commit: src/sys/arch/evbarm/conf

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:29:21 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: GENERIC Log Message: Add rkpwm, rkspi To generate a diff of this commit: cvs rdiff -u -r1.102 -r1.103 src/sys/arch/evbarm/conf/GENERIC Please note that

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:29:08 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Add pwm and spi clocks To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk3288_cru.c

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:29:08 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Add pwm and spi clocks To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk3288_cru.c

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:08:15 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_i2c.c Log Message: Match rockchip,rk3288-i2c To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk_i2c.c Please

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:08:15 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_i2c.c Log Message: Match rockchip,rk3288-i2c To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk_i2c.c Please

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:07:09 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Fix width of aclk_cpu_pre divider field To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:07:09 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Fix width of aclk_cpu_pre divider field To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3

CVS commit: src/sys/arch/evbarm/conf

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:34:24 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: GENERIC Log Message: add rkv1crypto To generate a diff of this commit: cvs rdiff -u -r1.101 -r1.102 src/sys/arch/evbarm/conf/GENERIC Please note that

CVS commit: src/sys/arch/evbarm/conf

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:34:24 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: GENERIC Log Message: add rkv1crypto To generate a diff of this commit: cvs rdiff -u -r1.101 -r1.102 src/sys/arch/evbarm/conf/GENERIC Please note that

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:34:07 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: rk3288: add watchdog and rng clocks To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:34:07 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: rk3288: add watchdog and rng clocks To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2

CVS commit: src/sys/arch/arm/arm32

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:13:17 UTC 2021 Modified Files: src/sys/arch/arm/arm32: arm32_machdep.c Log Message: Support 'boot -1' on arm To generate a diff of this commit: cvs rdiff -u -r1.141 -r1.142 src/sys/arch/arm/arm32/arm32_machdep.c

CVS commit: src/sys/arch/arm/arm32

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:13:17 UTC 2021 Modified Files: src/sys/arch/arm/arm32: arm32_machdep.c Log Message: Support 'boot -1' on arm To generate a diff of this commit: cvs rdiff -u -r1.141 -r1.142 src/sys/arch/arm/arm32/arm32_machdep.c

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:53:21 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_iomux.c Log Message: Fix register accesses to PMU registers. Unlike the GRF ones, a RMW cycle is required to update settings here. To generate a

CVS commit: src/sys/arch/arm/rockchip

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:53:21 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_iomux.c Log Message: Fix register accesses to PMU registers. Unlike the GRF ones, a RMW cycle is required to update settings here. To generate a

CVS commit: src/doc

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:02:49 UTC 2021 Modified Files: src/doc: CHANGES Log Message: evbarm: Add support for Rockchip RK3288 SoCs. To generate a diff of this commit: cvs rdiff -u -r1.2849 -r1.2850 src/doc/CHANGES Please note that

CVS commit: src/doc

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:02:49 UTC 2021 Modified Files: src/doc: CHANGES Log Message: evbarm: Add support for Rockchip RK3288 SoCs. To generate a diff of this commit: cvs rdiff -u -r1.2849 -r1.2850 src/doc/CHANGES Please note that

CVS commit: src/sys/arch

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:02:08 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: files.rockchip rk3328_cru.c rk3399_cru.c rk_cru.h rk_cru_composite.c rk_cru_pll.c rk_gmac.c rk_i2c.c rk_platform.c

CVS commit: src/sys/arch

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:02:08 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: files.rockchip rk3328_cru.c rk3399_cru.c rk_cru.h rk_cru_composite.c rk_cru_pll.c rk_gmac.c rk_i2c.c rk_platform.c

CVS commit: src/sys/arch/arm

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:59:05 UTC 2021 Modified Files: src/sys/arch/arm/cortex: gtmr.c gtmr_var.h src/sys/arch/arm/fdt: gtmr_fdt.c Log Message: gtmr: Add support for arm,cpu-registers-not-fw-configured property. On armv7,

CVS commit: src/sys/arch/arm

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:59:05 UTC 2021 Modified Files: src/sys/arch/arm/cortex: gtmr.c gtmr_var.h src/sys/arch/arm/fdt: gtmr_fdt.c Log Message: gtmr: Add support for arm,cpu-registers-not-fw-configured property. On armv7,

CVS commit: src/sys/dev/fdt

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:57:44 UTC 2021 Modified Files: src/sys/dev/fdt: dw_apb_uart.c Log Message: dw_apb_uart: Honour reg-io-width property To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/dev/fdt/dw_apb_uart.c

CVS commit: src/sys/dev/fdt

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:57:44 UTC 2021 Modified Files: src/sys/dev/fdt: dw_apb_uart.c Log Message: dw_apb_uart: Honour reg-io-width property To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/dev/fdt/dw_apb_uart.c

CVS commit: src/sys/dev/ic

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:57:13 UTC 2021 Modified Files: src/sys/dev/ic: com.c comvar.h Log Message: com: Add support for 32-bit IO accesses. To generate a diff of this commit: cvs rdiff -u -r1.372 -r1.373 src/sys/dev/ic/com.c cvs rdiff

CVS commit: src/sys/dev/ic

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:57:13 UTC 2021 Modified Files: src/sys/dev/ic: com.c comvar.h Log Message: com: Add support for 32-bit IO accesses. To generate a diff of this commit: cvs rdiff -u -r1.372 -r1.373 src/sys/dev/ic/com.c cvs rdiff

CVS commit: src/distrib/sets/lists/dtb

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:55:46 UTC 2021 Modified Files: src/distrib/sets/lists/dtb: ad.aarch64 ad.aarch64eb ad.earmv6 ad.earmv6eb ad.earmv6hf ad.earmv6hfeb ad.earmv7 ad.earmv7hf ad.earmv7hfeb Log Message: regen

CVS commit: src/distrib/sets/lists/dtb

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:55:46 UTC 2021 Modified Files: src/distrib/sets/lists/dtb: ad.aarch64 ad.aarch64eb ad.earmv6 ad.earmv6eb ad.earmv6hf ad.earmv6hfeb ad.earmv7 ad.earmv7hf ad.earmv7hfeb Log Message: regen

CVS commit: src/sys/dtb/arm

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:55:17 UTC 2021 Modified Files: src/sys/dtb/arm: Makefile Log Message: Build rockchip dtb files for armv7. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/dtb/arm/Makefile Please note that

CVS commit: src/sys/dtb/arm

2021-11-12 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Fri Nov 12 21:55:17 UTC 2021 Modified Files: src/sys/dtb/arm: Makefile Log Message: Build rockchip dtb files for armv7. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/dtb/arm/Makefile Please note that

CVS commit: src/sys/arch/arm

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 19:21:33 UTC 2021 Modified Files: src/sys/arch/arm/amlogic: meson_dwmac.c src/sys/arch/arm/rockchip: rk_gmac.c src/sys/arch/arm/sunxi: sunxi_emac.c sunxi_gmac.c Log Message: Handle RGMII variants.

CVS commit: src/sys/arch/arm

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 19:21:33 UTC 2021 Modified Files: src/sys/arch/arm/amlogic: meson_dwmac.c src/sys/arch/arm/rockchip: rk_gmac.c src/sys/arch/arm/sunxi: sunxi_emac.c sunxi_gmac.c Log Message: Handle RGMII variants.

CVS commit: src/doc

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:17:24 UTC 2021 Modified Files: src/doc: CHANGES Log Message: dts: Import dts files from Linux 5.15. To generate a diff of this commit: cvs rdiff -u -r1.2848 -r1.2849 src/doc/CHANGES Please note that diffs are

CVS commit: src/doc

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:17:24 UTC 2021 Modified Files: src/doc: CHANGES Log Message: dts: Import dts files from Linux 5.15. To generate a diff of this commit: cvs rdiff -u -r1.2848 -r1.2849 src/doc/CHANGES Please note that diffs are

CVS commit: src/doc

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:16:19 UTC 2021 Modified Files: src/doc: 3RDPARTY Log Message: dts updated to 5.15 To generate a diff of this commit: cvs rdiff -u -r1.1825 -r1.1826 src/doc/3RDPARTY Please note that diffs are not public domain;

CVS commit: src/doc

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:16:19 UTC 2021 Modified Files: src/doc: 3RDPARTY Log Message: dts updated to 5.15 To generate a diff of this commit: cvs rdiff -u -r1.1825 -r1.1826 src/doc/3RDPARTY Please note that diffs are not public domain;

CVS commit: src/sys/dev/i2c

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:14:38 UTC 2021 Modified Files: src/sys/dev/i2c: cwfg.c Log Message: cwfg: update for dts-5.15 binding changes To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/dev/i2c/cwfg.c Please note that

CVS commit: src/sys/dev/i2c

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:14:38 UTC 2021 Modified Files: src/sys/dev/i2c: cwfg.c Log Message: cwfg: update for dts-5.15 binding changes To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/dev/i2c/cwfg.c Please note that

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:14:20 UTC 2021 Modified Files: src/sys/dev/fdt: dwc3_fdt.c Log Message: Look for child node by compat string snps,dwc3 instead of by name. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:14:20 UTC 2021 Modified Files: src/sys/dev/fdt: dwc3_fdt.c Log Message: Look for child node by compat string snps,dwc3 instead of by name. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:14:09 UTC 2021 Modified Files: src/sys/dev/fdt: pwm_backlight.c Log Message: pwm_backlight: pick defaults if none are provided To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:14:09 UTC 2021 Modified Files: src/sys/dev/fdt: pwm_backlight.c Log Message: pwm_backlight: pick defaults if none are provided To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
v 1.73 2021/11/07 17:13:53 jmcneill Exp $ */ /*- * Copyright (c) 2015 Jared D. McNeill @@ -336,6 +336,7 @@ void fdtbus_intr_unmask(int, void *); void fdtbus_intr_disestablish(int, void *); bool fdtbus_intr_str(int, u_int, char *, size_t); bool fdtbus_intr_str_raw(int, const u_int *, c

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:53 UTC 2021 Modified Files: src/sys/dev/fdt: fdt_intr.c fdtvar.h Log Message: fdt: add helper for finding intr parent phandle To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30

CVS commit: src/sys/arch/arm/sunxi

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:38 UTC 2021 Modified Files: src/sys/arch/arm/sunxi: sunxi_nmi.c Log Message: sunxi: nmi: add support for #interrupt-cells 3 bindings To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12

CVS commit: src/sys/arch/arm/sunxi

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:38 UTC 2021 Modified Files: src/sys/arch/arm/sunxi: sunxi_nmi.c Log Message: sunxi: nmi: add support for #interrupt-cells 3 bindings To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12

CVS commit: src/sys/arch/arm/sunxi

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:26 UTC 2021 Modified Files: src/sys/arch/arm/sunxi: sun50i_a64_ccu.c Log Message: sunxi: sun50i-a64: add support for A64_CLK_CPUX clock To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24

CVS commit: src/sys/arch/arm/sunxi

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:26 UTC 2021 Modified Files: src/sys/arch/arm/sunxi: sun50i_a64_ccu.c Log Message: sunxi: sun50i-a64: add support for A64_CLK_CPUX clock To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24

CVS commit: src/sys/arch/arm/sunxi

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:12 UTC 2021 Modified Files: src/sys/arch/arm/sunxi: files.sunxi sunxi_ccu.c sunxi_ccu.h Added Files: src/sys/arch/arm/sunxi: sunxi_ccu_mux.c Log Message: sunxi: ccu: add support for basic "mux" clocks

CVS commit: src/sys/arch/arm/sunxi

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:13:12 UTC 2021 Modified Files: src/sys/arch/arm/sunxi: files.sunxi sunxi_ccu.c sunxi_ccu.h Added Files: src/sys/arch/arm/sunxi: sunxi_ccu_mux.c Log Message: sunxi: ccu: add support for basic "mux" clocks

CVS commit: src/sys/arch/arm/ti

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:55 UTC 2021 Modified Files: src/sys/arch/arm/ti: if_cpsw.c Log Message: ti: cpsw: adapt to dts-5.15 bindings To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/ti/if_cpsw.c Please

CVS commit: src/sys/arch/arm/ti

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:55 UTC 2021 Modified Files: src/sys/arch/arm/ti: if_cpsw.c Log Message: ti: cpsw: adapt to dts-5.15 bindings To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/ti/if_cpsw.c Please

CVS commit: src/sys/arch/arm/ti

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:45 UTC 2021 Modified Files: src/sys/arch/arm/ti: ti_omaptimer.c ti_sdhc.c Log Message: arm: ti: adapt to dts-5.15 bindings To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11

CVS commit: src/sys/arch/arm/ti

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:45 UTC 2021 Modified Files: src/sys/arch/arm/ti: ti_omaptimer.c ti_sdhc.c Log Message: arm: ti: adapt to dts-5.15 bindings To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:26 UTC 2021 Modified Files: src/sys/dev/fdt: pinctrl_single.c Log Message: pinctrl-single: support #pinctrl-cells 2 To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/dev/fdt/pinctrl_single.c

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:26 UTC 2021 Modified Files: src/sys/dev/fdt: pinctrl_single.c Log Message: pinctrl-single: support #pinctrl-cells 2 To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/dev/fdt/pinctrl_single.c

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
7 17:12:15 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: fdtbus.c,v 1.43 2021/09/06 14:03:18 jmcneill Exp $ */ +/* $NetBSD: fdtbus.c,v 1.44 2021/11/07 17:12:15 jmcneill Exp $ */ /*- * Copyright (c) 2015 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: fdtbus.c,v 1.43

CVS commit: src/sys/dev/fdt

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:12:16 UTC 2021 Modified Files: src/sys/dev/fdt: fdtbus.c Log Message: fdtbus: match simple-pm-bus To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/dev/fdt/fdtbus.c Please note that diffs

CVS commit: src/sys

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:11:58 UTC 2021 Modified Files: src/sys/arch/arm/amlogic: meson_sdhc.c src/sys/arch/arm/sunxi: sunxi_thermal.c src/sys/dev/fdt: fdt_panel.c Log Message: dts: adapt to dts-5.15 bindings To generate

CVS commit: src/sys

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:11:58 UTC 2021 Modified Files: src/sys/arch/arm/amlogic: meson_sdhc.c src/sys/arch/arm/sunxi: sunxi_thermal.c src/sys/dev/fdt: fdt_panel.c Log Message: dts: adapt to dts-5.15 bindings To generate

CVS commit: src/sys/arch/arm/dts

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:11:43 UTC 2021 Modified Files: src/sys/arch/arm/dts: meson8b-odroidc1.dts meson8b.dtsi rk3399-pinebook-pro.dts rk3399-rockpro64.dts sun50i-a64-pine64-plus.dts sun50i-a64-pinebook.dts

CVS commit: src/sys/arch/arm/dts

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:11:43 UTC 2021 Modified Files: src/sys/arch/arm/dts: meson8b-odroidc1.dts meson8b.dtsi rk3399-pinebook-pro.dts rk3399-rockpro64.dts sun50i-a64-pine64-plus.dts sun50i-a64-pinebook.dts

CVS commit: src/distrib/sets/lists/dtb

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:11:05 UTC 2021 Modified Files: src/distrib/sets/lists/dtb: ad.aarch64 ad.aarch64eb ad.earmv6 ad.earmv6eb ad.earmv6hf ad.earmv6hfeb ad.earmv7 ad.earmv7hf ad.earmv7hfeb Log Message: dtb:

CVS commit: src/sys/dtb/arm64

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:10:47 UTC 2021 Modified Files: src/sys/dtb/arm64/amlogic: Makefile src/sys/dtb/arm64/rockchip: Makefile Log Message: Extra dts files no longer required. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/distrib/sets/lists/dtb

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:11:05 UTC 2021 Modified Files: src/distrib/sets/lists/dtb: ad.aarch64 ad.aarch64eb ad.earmv6 ad.earmv6eb ad.earmv6hf ad.earmv6hfeb ad.earmv7 ad.earmv7hf ad.earmv7hfeb Log Message: dtb:

CVS commit: src/sys/dtb/arm64

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:10:47 UTC 2021 Modified Files: src/sys/dtb/arm64/amlogic: Makefile src/sys/dtb/arm64/rockchip: Makefile Log Message: Extra dts files no longer required. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/dtb/arm

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:10:23 UTC 2021 Modified Files: src/sys/dtb/arm: Makefile Log Message: CONFIG_ARCH_SOCFPGA has been renamed CONFIG_ARCH_INTEL_SOCFPGA To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4

CVS commit: src/sys/dtb/arm

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 17:10:23 UTC 2021 Modified Files: src/sys/dtb/arm: Makefile Log Message: CONFIG_ARCH_SOCFPGA has been renamed CONFIG_ARCH_INTEL_SOCFPGA To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4

CVS commit: src/sys/external/gpl2/dts/dist

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 16:57:40 UTC 2021 Modified Files: src/sys/external/gpl2/dts/dist/arch/arm/boot/dts: bcm2835-common.dtsi bcm2835-rpi-zero-w.dts bcm2835-rpi.dtsi bcm283x.dtsi

CVS commit: src/sys/external/gpl2/dts/dist

2021-11-07 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Nov 7 16:57:40 UTC 2021 Modified Files: src/sys/external/gpl2/dts/dist/arch/arm/boot/dts: bcm2835-common.dtsi bcm2835-rpi-zero-w.dts bcm2835-rpi.dtsi bcm283x.dtsi

CVS commit: src/sys/stand/efiboot

2021-11-06 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 6 19:44:22 UTC 2021 Modified Files: src/sys/stand/efiboot: efifdt.c Log Message: Revert part of previous commit that broke DT booting. To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33

CVS commit: src/sys/stand/efiboot

2021-11-06 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Nov 6 19:44:22 UTC 2021 Modified Files: src/sys/stand/efiboot: efifdt.c Log Message: Revert part of previous commit that broke DT booting. To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33

CVS commit: src/sys/arch/arm/cortex

2021-10-31 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Oct 31 15:32:14 UTC 2021 Modified Files: src/sys/arch/arm/cortex: gic_splfuncs_armv8.S Log Message: Reload tpidr_el1 into x3 and re-test newipl vs cpl on restart. To generate a diff of this commit: cvs rdiff -u -r1.2

CVS commit: src/sys/arch/arm/cortex

2021-10-31 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Oct 31 15:32:14 UTC 2021 Modified Files: src/sys/arch/arm/cortex: gic_splfuncs_armv8.S Log Message: Reload tpidr_el1 into x3 and re-test newipl vs cpl on restart. To generate a diff of this commit: cvs rdiff -u -r1.2

CVS commit: src/sys/arch/evbarm/conf

2021-10-31 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Oct 31 12:34:48 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: std.generic64 Log Message: Disable GIC_SPLFUNCS (still crashy) To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18

CVS commit: src/sys/arch/evbarm/conf

2021-10-31 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sun Oct 31 12:34:48 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: std.generic64 Log Message: Disable GIC_SPLFUNCS (still crashy) To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18

CVS commit: src/sys/arch

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 20:23:12 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: genassym.cf src/sys/arch/arm/cortex: gic_splfuncs_armv8.S Log Message: Add __HAVE_PREEMPTION support to gic_splfuncs asm funcs. "looks right to

CVS commit: src/sys/arch

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 20:23:12 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: genassym.cf src/sys/arch/arm/cortex: gic_splfuncs_armv8.S Log Message: Add __HAVE_PREEMPTION support to gic_splfuncs asm funcs. "looks right to

CVS commit: src/sys/arch/evbarm/conf

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 19:28:40 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: std.generic64 Log Message: Enable GIC_SPLFUNCS again. Hopefully stable now. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17

CVS commit: src/sys/arch/evbarm/conf

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 19:28:40 UTC 2021 Modified Files: src/sys/arch/evbarm/conf: std.generic64 Log Message: Enable GIC_SPLFUNCS again. Hopefully stable now. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17

CVS commit: src/sys/arch/aarch64/aarch64

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 18:49:47 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: genassym.cf Log Message: Add CI_SPLX_SAVEDIPL and CI_HWPL To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36

CVS commit: src/sys/arch/aarch64/aarch64

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 18:49:47 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: genassym.cf Log Message: Add CI_SPLX_SAVEDIPL and CI_HWPL To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36

CVS commit: src/sys/arch

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 18:44:24 UTC 2021 Modified Files: src/sys/arch/aarch64/conf: files.aarch64 src/sys/arch/arm/cortex: gic_splfuncs.c Added Files: src/sys/arch/arm/cortex: gic_splfuncs_armv8.S Log Message: Implement

CVS commit: src/sys/arch

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 18:44:24 UTC 2021 Modified Files: src/sys/arch/aarch64/conf: files.aarch64 src/sys/arch/arm/cortex: gic_splfuncs.c Added Files: src/sys/arch/arm/cortex: gic_splfuncs_armv8.S Log Message: Implement

CVS commit: src/sys/dev/ic

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 11:43:17 UTC 2021 Modified Files: src/sys/dev/ic: com.c Log Message: For the DW APB busy bit workaround, only attempt to re-apply LCR and DLB settings for non-console devices. In the console case, simply clear the

CVS commit: src/sys/dev/ic

2021-10-30 Thread Jared D. McNeill
Module Name:src Committed By: jmcneill Date: Sat Oct 30 11:43:17 UTC 2021 Modified Files: src/sys/dev/ic: com.c Log Message: For the DW APB busy bit workaround, only attempt to re-apply LCR and DLB settings for non-console devices. In the console case, simply clear the

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