CVS commit: [netbsd-9] src/sys/arch/arm/ti
Module Name:src
Committed By: martin
Date: Fri Mar 3 17:04:17 UTC 2023
Modified Files:
src/sys/arch/arm/ti [netbsd-9]: if_cpsw.c
Log Message:
Pull up following revision(s) (requested by sekiya in ticket #1609):
sys/arch/arm/ti/if_cpsw.c: revision 1.17
Uncomment and protect sanity checks that would drop into the debugger with a
CPSW_DEBUG_DMA define.
This handles a condition where checking for DMA_RXEOQ in the received packet
results in the console being spammed with "rxeoq" messages, which soon results
in a kernel panic. The corresponding Debugger() call for this check was
commented out.
The TI documentation ("AM335x and AMIC110 Sitara(TM) Processors Technical
Reference Manual") documents the EOQ bit thus:
(14.3.2.4.1.2.4) This bit is set by the EMAC when the EMAC identifies
that a descriptor is the last for a given packet received (also sets
the EOP flag), and there are no more descriptors in the receive list
(next descriptor pointer is NULL). The software application can use
this bit to detect when the EMAC receiver for the corresponding channel
has halted. This is useful when the application appends additional free
buffer descriptors to an active receive queue. Note that this flag is
valid on EOP descriptors only.
Moving this check (and the offending printf() ) into a debug #ifdef results in
the BeagleBone Green surviving the nightly checks; it would always drop into
the debugger before this change.
To generate a diff of this commit:
cvs rdiff -u -r1.6.2.3 -r1.6.2.4 src/sys/arch/arm/ti/if_cpsw.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/ti
Module Name:src
Committed By: martin
Date: Fri Mar 3 17:04:17 UTC 2023
Modified Files:
src/sys/arch/arm/ti [netbsd-9]: if_cpsw.c
Log Message:
Pull up following revision(s) (requested by sekiya in ticket #1609):
sys/arch/arm/ti/if_cpsw.c: revision 1.17
Uncomment and protect sanity checks that would drop into the debugger with a
CPSW_DEBUG_DMA define.
This handles a condition where checking for DMA_RXEOQ in the received packet
results in the console being spammed with "rxeoq" messages, which soon results
in a kernel panic. The corresponding Debugger() call for this check was
commented out.
The TI documentation ("AM335x and AMIC110 Sitara(TM) Processors Technical
Reference Manual") documents the EOQ bit thus:
(14.3.2.4.1.2.4) This bit is set by the EMAC when the EMAC identifies
that a descriptor is the last for a given packet received (also sets
the EOP flag), and there are no more descriptors in the receive list
(next descriptor pointer is NULL). The software application can use
this bit to detect when the EMAC receiver for the corresponding channel
has halted. This is useful when the application appends additional free
buffer descriptors to an active receive queue. Note that this flag is
valid on EOP descriptors only.
Moving this check (and the offending printf() ) into a debug #ifdef results in
the BeagleBone Green surviving the nightly checks; it would always drop into
the debugger before this change.
To generate a diff of this commit:
cvs rdiff -u -r1.6.2.3 -r1.6.2.4 src/sys/arch/arm/ti/if_cpsw.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/ti/if_cpsw.c
diff -u src/sys/arch/arm/ti/if_cpsw.c:1.6.2.3 src/sys/arch/arm/ti/if_cpsw.c:1.6.2.4
--- src/sys/arch/arm/ti/if_cpsw.c:1.6.2.3 Thu Feb 20 14:36:38 2020
+++ src/sys/arch/arm/ti/if_cpsw.c Fri Mar 3 17:04:17 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_cpsw.c,v 1.6.2.3 2020/02/20 14:36:38 martin Exp $ */
+/* $NetBSD: if_cpsw.c,v 1.6.2.4 2023/03/03 17:04:17 martin Exp $ */
/*
* Copyright (c) 2013 Jonathan A. Kollasch
@@ -53,7 +53,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v 1.6.2.3 2020/02/20 14:36:38 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v 1.6.2.4 2023/03/03 17:04:17 martin Exp $");
#include
#include
@@ -95,6 +95,8 @@ __KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v
CTASSERT(powerof2(CPSW_NTXDESCS));
CTASSERT(powerof2(CPSW_NRXDESCS));
+#undef CPSW_DEBUG_DMA /* define this for DMA debugging */
+
#define CPSW_PAD_LEN (ETHER_MIN_LEN - ETHER_CRC_LEN)
#define TXDESC_NEXT(x) cpsw_txdesc_adjust((x), 1)
@@ -1159,10 +1161,12 @@ cpsw_rxintr(void *arg)
return 1;
}
+#if defined(CPSW_DEBUG_DMA)
if ((dw[3] & (CPDMA_BD_SOP | CPDMA_BD_EOP)) !=
(CPDMA_BD_SOP | CPDMA_BD_EOP)) {
- //Debugger();
+ Debugger();
}
+#endif
bus_dmamap_sync(sc->sc_bdt, dm, 0, dm->dm_mapsize,
BUS_DMASYNC_POSTREAD);
@@ -1197,10 +1201,12 @@ next:
cpsw_rxdesc_paddr(sc, i));
}
+#if defined(CPSW_DEBUG_DMA)
if (sc->sc_rxeoq) {
device_printf(sc->sc_dev, "rxeoq\n");
- //Debugger();
+ Debugger();
}
+#endif
cpsw_write_4(sc, CPSW_CPDMA_CPDMA_EOI_VECTOR, CPSW_INTROFF_RX);
@@ -1247,9 +1253,11 @@ cpsw_txintr(void *arg)
cpsw_get_txdesc(sc, sc->sc_txhead, &bd);
+#if defined(CPSW_DEBUG_DMA)
if (dw[2] == 0) {
//Debugger();
}
+#endif
if (ISSET(dw[3], CPDMA_BD_SOP) == 0)
goto next;
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src
Committed By: martin
Date: Sat Sep 24 08:10:26 UTC 2022
Modified Files:
src/sys/arch/arm/sunxi [netbsd-9]: sunxi_can.c
Log Message:
Pull up following revision(s) (requested by bouyer in ticket #1533):
sys/arch/arm/sunxi/sunxi_can.c: revision 1.10,1.11 (via patch)
Don't process RX if SUNXI_CAN_INT_DATA_OR is pending. Seems to fix occasional
RX stalls
Just skipping sunxi_can_rx_intr() if the DATA_OR flag is set isn't enough
to properly recover from overrrun in all case. So go the linux way and reset
the hardware.
Don't write SUNXI_CAN_INT_RX_FLAG to SUNXI_CAN_INT_REG, this could race
with hardware and clear the interrupt while there are new packets received.
SUNXI_CAN_INT_RX_FLAG clears automatically when all pending packets have been
read, so when no more packets are pending just read SUNXI_CAN_INT_REG again
and process other interrupts, if any (or RX if there are new packets pending).
With this change it seems I get overruns less often in my use case.
To generate a diff of this commit:
cvs rdiff -u -r1.1.8.1 -r1.1.8.2 src/sys/arch/arm/sunxi/sunxi_can.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_can.c
diff -u src/sys/arch/arm/sunxi/sunxi_can.c:1.1.8.1 src/sys/arch/arm/sunxi/sunxi_can.c:1.1.8.2
--- src/sys/arch/arm/sunxi/sunxi_can.c:1.1.8.1 Wed Oct 23 19:43:25 2019
+++ src/sys/arch/arm/sunxi/sunxi_can.c Sat Sep 24 08:10:26 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_can.c,v 1.1.8.1 2019/10/23 19:43:25 martin Exp $ */
+/* $NetBSD: sunxi_can.c,v 1.1.8.2 2022/09/24 08:10:26 martin Exp $ */
/*-
* Copyright (c) 2017,2018 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.1.8.1 2019/10/23 19:43:25 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.1.8.2 2022/09/24 08:10:26 martin Exp $");
#include
#include
@@ -101,6 +101,8 @@ static void sunxi_can_ifwatchdog(struct
static void sunxi_can_enter_reset(struct sunxi_can_softc *);
static void sunxi_can_exit_reset(struct sunxi_can_softc *);
+static void sunxi_can_ifdown(struct sunxi_can_softc * const);
+static int sunxi_can_ifup(struct sunxi_can_softc * const);
CFATTACH_DECL_NEW(sunxi_can, sizeof(struct sunxi_can_softc),
sunxi_can_match, sunxi_can_attach, NULL, NULL);
@@ -347,7 +349,9 @@ sunxi_can_err_intr(struct sunxi_can_soft
if (irq & SUNXI_CAN_INT_DATA_OR) {
ifp->if_ierrors++;
+ sunxi_can_ifdown(sc);
sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_CLR_OR);
+ sunxi_can_ifup(sc);
}
if (irq & SUNXI_CAN_INT_ERR) {
reg = sunxi_can_read(sc, SUNXI_CAN_REC_REG);
@@ -386,21 +390,31 @@ sunxi_can_intr(void *arg)
while ((irq = sunxi_can_read(sc, SUNXI_CAN_INT_REG)) != 0) {
uint32_t sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG);
rv = 1;
+rnd_add_uint32(&sc->sc_rnd_source, irq);
- if (irq & SUNXI_CAN_INT_TX_FLAG) {
- sunxi_can_tx_intr(sc);
- }
- if (irq & SUNXI_CAN_INT_RX_FLAG) {
+ if ((irq & (SUNXI_CAN_INT_RX_FLAG | SUNXI_CAN_INT_DATA_OR)) ==
+ SUNXI_CAN_INT_RX_FLAG) {
while (sts & SUNXI_CAN_STA_RX_RDY) {
sunxi_can_rx_intr(sc);
sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG);
}
+ /*
+ * Don't write SUNXI_CAN_INT_RX_FLAG to the interrupt
+ * register, this may clear the RX pending flag
+ * while there is indeed a packet pending.
+ * Reading packets should have cleared the RX interrupt,
+ * so just restart the loop and re-read the interrupt
+ * register. In the common case irq will now be 0.
+ */
+ continue;
+ }
+ if (irq & SUNXI_CAN_INT_TX_FLAG) {
+ sunxi_can_tx_intr(sc);
}
if (irq & SUNXI_CAN_INT_ALLERRS) {
sunxi_can_err_intr(sc, irq, sts);
}
sunxi_can_write(sc, SUNXI_CAN_INT_REG, irq);
-rnd_add_uint32(&sc->sc_rnd_source, irq);
}
mutex_exit(&sc->sc_intr_lock);
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src Committed By: martin Date: Sat Sep 24 08:10:26 UTC 2022 Modified Files: src/sys/arch/arm/sunxi [netbsd-9]: sunxi_can.c Log Message: Pull up following revision(s) (requested by bouyer in ticket #1533): sys/arch/arm/sunxi/sunxi_can.c: revision 1.10,1.11 (via patch) Don't process RX if SUNXI_CAN_INT_DATA_OR is pending. Seems to fix occasional RX stalls Just skipping sunxi_can_rx_intr() if the DATA_OR flag is set isn't enough to properly recover from overrrun in all case. So go the linux way and reset the hardware. Don't write SUNXI_CAN_INT_RX_FLAG to SUNXI_CAN_INT_REG, this could race with hardware and clear the interrupt while there are new packets received. SUNXI_CAN_INT_RX_FLAG clears automatically when all pending packets have been read, so when no more packets are pending just read SUNXI_CAN_INT_REG again and process other interrupts, if any (or RX if there are new packets pending). With this change it seems I get overruns less often in my use case. To generate a diff of this commit: cvs rdiff -u -r1.1.8.1 -r1.1.8.2 src/sys/arch/arm/sunxi/sunxi_can.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src Committed By: martin Date: Mon Nov 25 16:20:41 UTC 2019 Modified Files: src/sys/arch/arm/sunxi [netbsd-9]: sunxi_drm.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #472): sys/arch/arm/sunxi/sunxi_drm.c: revision 1.9 Reclaim bootloader FB memory for CMA pool. To generate a diff of this commit: cvs rdiff -u -r1.7.6.1 -r1.7.6.2 src/sys/arch/arm/sunxi/sunxi_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src
Committed By: martin
Date: Mon Nov 25 16:20:41 UTC 2019
Modified Files:
src/sys/arch/arm/sunxi [netbsd-9]: sunxi_drm.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #472):
sys/arch/arm/sunxi/sunxi_drm.c: revision 1.9
Reclaim bootloader FB memory for CMA pool.
To generate a diff of this commit:
cvs rdiff -u -r1.7.6.1 -r1.7.6.2 src/sys/arch/arm/sunxi/sunxi_drm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_drm.c
diff -u src/sys/arch/arm/sunxi/sunxi_drm.c:1.7.6.1 src/sys/arch/arm/sunxi/sunxi_drm.c:1.7.6.2
--- src/sys/arch/arm/sunxi/sunxi_drm.c:1.7.6.1 Wed Nov 6 09:48:31 2019
+++ src/sys/arch/arm/sunxi/sunxi_drm.c Mon Nov 25 16:20:41 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_drm.c,v 1.7.6.1 2019/11/06 09:48:31 martin Exp $ */
+/* $NetBSD: sunxi_drm.c,v 1.7.6.2 2019/11/25 16:20:41 martin Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.7.6.1 2019/11/06 09:48:31 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.7.6.2 2019/11/25 16:20:41 martin Exp $");
#include
#include
@@ -296,6 +296,27 @@ static struct drm_mode_config_funcs sunx
};
static int
+sunxi_drm_simplefb_lookup(bus_addr_t *paddr, bus_size_t *psize)
+{
+ static const char * compat[] = { "simple-framebuffer", NULL };
+ int chosen, child;
+
+ chosen = OF_finddevice("/chosen");
+ if (chosen == -1)
+ return ENOENT;
+
+ for (child = OF_child(chosen); child; child = OF_peer(child)) {
+ if (!fdtbus_status_okay(child))
+ continue;
+ if (!of_match_compatible(child, compat))
+ continue;
+ return fdtbus_get_reg(child, 0, paddr, psize);
+ }
+
+ return ENOENT;
+}
+
+static int
sunxi_drm_fb_probe(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes)
{
struct sunxi_drm_softc * const sc = sunxi_drm_private(helper->dev);
@@ -303,6 +324,8 @@ sunxi_drm_fb_probe(struct drm_fb_helper
struct sunxi_drm_framebuffer *sfb = to_sunxi_drm_framebuffer(helper->fb);
struct drm_framebuffer *fb = helper->fb;
struct sunxi_drmfb_attach_args sfa;
+ bus_addr_t sfb_addr;
+ bus_size_t sfb_size;
size_t cma_size;
int error;
@@ -312,14 +335,31 @@ sunxi_drm_fb_probe(struct drm_fb_helper
const size_t size = roundup(height * pitch, PAGE_SIZE);
- /* Reserve enough memory for the FB console plus a 4K plane, rounded to 1MB */
- cma_size = size;
- cma_size += (SUNXI_DRM_MAX_WIDTH * SUNXI_DRM_MAX_HEIGHT * 4);
+ if (sunxi_drm_simplefb_lookup(&sfb_addr, &sfb_size) != 0)
+ sfb_size = 0;
+
+ /* Reserve enough memory for a 4K plane, rounded to 1MB */
+ cma_size = (SUNXI_DRM_MAX_WIDTH * SUNXI_DRM_MAX_HEIGHT * 4);
+ if (sfb_size == 0) {
+ /* Add memory for FB console if we cannot reclaim bootloader memory */
+ cma_size += size;
+ }
cma_size = roundup(cma_size, 1024 * 1024);
sc->sc_ddev->cma_pool = sunxi_drm_alloc_cma_pool(sc->sc_ddev, cma_size);
- if (sc->sc_ddev->cma_pool != NULL)
- aprint_normal_dev(sc->sc_dev, "reserved %u MB DRAM for CMA\n",
- (u_int)(cma_size / (1024 * 1024)));
+ if (sc->sc_ddev->cma_pool != NULL) {
+ if (sfb_size != 0) {
+ error = vmem_add(sc->sc_ddev->cma_pool, sfb_addr,
+ sfb_size, VM_SLEEP);
+ if (error != 0)
+sfb_size = 0;
+ }
+ aprint_normal_dev(sc->sc_dev, "reserved %u MB DRAM for CMA",
+ (u_int)((cma_size + sfb_size) / (1024 * 1024)));
+ if (sfb_size != 0)
+ aprint_normal(" (%u MB reclaimed from bootloader)",
+ (u_int)(sfb_size / (1024 * 1024)));
+ aprint_normal("\n");
+ }
sfb->obj = drm_gem_cma_create(ddev, size);
if (sfb->obj == NULL) {
CVS commit: [netbsd-9] src/sys/arch/arm
Module Name:src
Committed By: martin
Date: Mon Nov 18 19:31:00 UTC 2019
Modified Files:
src/sys/arch/arm/dts [netbsd-9]: sun50i-a64-pine64-plus.dts
sun50i-a64-pine64.dts sun50i-a64-sopine-baseboard.dts
sun50i-a64.dtsi
src/sys/arch/arm/sunxi [netbsd-9]: sun50i_a64_ccu.c sunxi_ccu_div.c
sunxi_dwhdmi.c sunxi_i2s.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #437):
sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu_div.c: revision 1.6
sys/arch/arm/dts/sun50i-a64.dtsi: revision 1.13
sys/arch/arm/dts/sun50i-a64-pine64.dts: revision 1.2
sys/arch/arm/sunxi/sunxi_dwhdmi.c: revision 1.4
sys/arch/arm/dts/sun50i-a64-pine64-plus.dts: revision 1.3
sys/arch/arm/sunxi/sunxi_i2s.c: revision 1.7
sys/arch/arm/sunxi/sun50i_a64_ccu.c: revision 1.14
Add support for A64 I2S clocks.
Add A64 HDMI audio support.
Enable HDMI audio support on Pine64, Pine64+, and Pine64 LTS boards.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.2.10.1 src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts
cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/dts/sun50i-a64-pine64.dts \
src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
cvs rdiff -u -r1.11.2.1 -r1.11.2.2 src/sys/arch/arm/dts/sun50i-a64.dtsi
cvs rdiff -u -r1.13 -r1.13.2.1 src/sys/arch/arm/sunxi/sun50i_a64_ccu.c
cvs rdiff -u -r1.5 -r1.5.6.1 src/sys/arch/arm/sunxi/sunxi_ccu_div.c
cvs rdiff -u -r1.3 -r1.3.6.1 src/sys/arch/arm/sunxi/sunxi_dwhdmi.c
cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/sunxi/sunxi_i2s.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts
diff -u src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts:1.2 src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts:1.2.10.1
--- src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts:1.2 Sat Sep 9 12:05:28 2017
+++ src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts Mon Nov 18 19:31:00 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64-pine64-plus.dts,v 1.2 2017/09/09 12:05:28 jmcneill Exp $ */
+/* $NetBSD: sun50i-a64-pine64-plus.dts,v 1.2.10.1 2019/11/18 19:31:00 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -49,3 +49,11 @@
&ohci0 {
status = "okay";
};
+
+&i2s2 {
+ status = "okay";
+};
+
+&sound_hdmi {
+ status = "okay";
+};
Index: src/sys/arch/arm/dts/sun50i-a64-pine64.dts
diff -u src/sys/arch/arm/dts/sun50i-a64-pine64.dts:1.1 src/sys/arch/arm/dts/sun50i-a64-pine64.dts:1.1.8.1
--- src/sys/arch/arm/dts/sun50i-a64-pine64.dts:1.1 Sun Feb 18 12:20:25 2018
+++ src/sys/arch/arm/dts/sun50i-a64-pine64.dts Mon Nov 18 19:31:00 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64-pine64.dts,v 1.1 2018/02/18 12:20:25 jmcneill Exp $ */
+/* $NetBSD: sun50i-a64-pine64.dts,v 1.1.8.1 2019/11/18 19:31:00 martin Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,3 +28,11 @@
#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts"
#include "sun50i-a64.dtsi"
+
+&i2s2 {
+ status = "okay";
+};
+
+&sound_hdmi {
+ status = "okay";
+};
Index: src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
diff -u src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.1 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.1.8.1
--- src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.1 Thu Jun 7 00:51:41 2018
+++ src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts Mon Nov 18 19:31:00 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.1 2018/06/07 00:51:41 jmcneill Exp $ */
+/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.1.8.1 2019/11/18 19:31:00 martin Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,3 +28,11 @@
#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts"
#include "sun50i-a64.dtsi"
+
+&i2s2 {
+ status = "okay";
+};
+
+&sound_hdmi {
+ status = "okay";
+};
Index: src/sys/arch/arm/dts/sun50i-a64.dtsi
diff -u src/sys/arch/arm/dts/sun50i-a64.dtsi:1.11.2.1 src/sys/arch/arm/dts/sun50i-a64.dtsi:1.11.2.2
--- src/sys/arch/arm/dts/sun50i-a64.dtsi:1.11.2.1 Sun Nov 10 13:14:41 2019
+++ src/sys/arch/arm/dts/sun50i-a64.dtsi Mon Nov 18 19:31:00 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64.dtsi,v 1.11.2.1 2019/11/10 13:14:41 martin Exp $ */
+/* $NetBSD: sun50i-a64.dtsi,v 1.11.2.2 2019/11/18 19:31:00 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -59,6 +59,36 @@
,
;
};
+
+ i2s2: i2s@1c22800 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-a64-i2s",
+ "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22800 0x400>;
+ interrupts = ;
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+ clock-names = "apb", "mod";
+ resets = <&ccu RST_BUS_I2S2>;
+ dma-names = "tx";
+ dmas = <&dma 27>;
+ status = "disabled";
+ };
+
+ sound_hdmi: sound-hdmi {
+ compatibl
CVS commit: [netbsd-9] src/sys/arch/arm
Module Name:src Committed By: martin Date: Mon Nov 18 19:31:00 UTC 2019 Modified Files: src/sys/arch/arm/dts [netbsd-9]: sun50i-a64-pine64-plus.dts sun50i-a64-pine64.dts sun50i-a64-sopine-baseboard.dts sun50i-a64.dtsi src/sys/arch/arm/sunxi [netbsd-9]: sun50i_a64_ccu.c sunxi_ccu_div.c sunxi_dwhdmi.c sunxi_i2s.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #437): sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts: revision 1.2 sys/arch/arm/sunxi/sunxi_ccu_div.c: revision 1.6 sys/arch/arm/dts/sun50i-a64.dtsi: revision 1.13 sys/arch/arm/dts/sun50i-a64-pine64.dts: revision 1.2 sys/arch/arm/sunxi/sunxi_dwhdmi.c: revision 1.4 sys/arch/arm/dts/sun50i-a64-pine64-plus.dts: revision 1.3 sys/arch/arm/sunxi/sunxi_i2s.c: revision 1.7 sys/arch/arm/sunxi/sun50i_a64_ccu.c: revision 1.14 Add support for A64 I2S clocks. Add A64 HDMI audio support. Enable HDMI audio support on Pine64, Pine64+, and Pine64 LTS boards. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.2.10.1 src/sys/arch/arm/dts/sun50i-a64-pine64-plus.dts cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/dts/sun50i-a64-pine64.dts \ src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts cvs rdiff -u -r1.11.2.1 -r1.11.2.2 src/sys/arch/arm/dts/sun50i-a64.dtsi cvs rdiff -u -r1.13 -r1.13.2.1 src/sys/arch/arm/sunxi/sun50i_a64_ccu.c cvs rdiff -u -r1.5 -r1.5.6.1 src/sys/arch/arm/sunxi/sunxi_ccu_div.c cvs rdiff -u -r1.3 -r1.3.6.1 src/sys/arch/arm/sunxi/sunxi_dwhdmi.c cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/sunxi/sunxi_i2s.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/dts
Module Name:src Committed By: martin Date: Sun Nov 10 13:22:37 UTC 2019 Modified Files: src/sys/arch/arm/dts [netbsd-9]: socfpga_cyclone5_de0_nano_soc.dts Log Message: Pull up following revision(s) (requested by aymeric in ticket #411): sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts: revision 1.3 Disable private timer whose new driver clashes with the global timer's one. Stopgap measure to make the DE0 Nano Soc work again, targeted for netbsd-9 pullup. We'll see later if we switch to using the private timer. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.2.6.1 \ src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/dts
Module Name:src
Committed By: martin
Date: Sun Nov 10 13:22:37 UTC 2019
Modified Files:
src/sys/arch/arm/dts [netbsd-9]: socfpga_cyclone5_de0_nano_soc.dts
Log Message:
Pull up following revision(s) (requested by aymeric in ticket #411):
sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts: revision 1.3
Disable private timer whose new driver clashes with the global timer's one.
Stopgap measure to make the DE0 Nano Soc work again, targeted for netbsd-9
pullup. We'll see later if we switch to using the private timer.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.2.6.1 \
src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
diff -u src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts:1.2 src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts:1.2.6.1
--- src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts:1.2 Tue Jan 22 15:30:57 2019
+++ src/sys/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts Sun Nov 10 13:22:37 2019
@@ -4,6 +4,10 @@
/ {
soc {
+ timer@fffec600 {
+ status = "disabled";
+ };
+
gtimer@fffec200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xfffec200 0x20>;
CVS commit: [netbsd-9] src/sys/arch/arm/dts
Module Name:src
Committed By: martin
Date: Sun Nov 10 13:14:41 UTC 2019
Modified Files:
src/sys/arch/arm/dts [netbsd-9]: sun50i-a64.dtsi
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #409):
sys/arch/arm/dts/sun50i-a64.dtsi: revision 1.12
Fix PMU interrupt numbers on Allwinner A64.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.11.2.1 src/sys/arch/arm/dts/sun50i-a64.dtsi
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-a64.dtsi
diff -u src/sys/arch/arm/dts/sun50i-a64.dtsi:1.11 src/sys/arch/arm/dts/sun50i-a64.dtsi:1.11.2.1
--- src/sys/arch/arm/dts/sun50i-a64.dtsi:1.11 Thu Jun 6 23:19:45 2019
+++ src/sys/arch/arm/dts/sun50i-a64.dtsi Sun Nov 10 13:14:41 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64.dtsi,v 1.11 2019/06/06 23:19:45 jmcneill Exp $ */
+/* $NetBSD: sun50i-a64.dtsi,v 1.11.2.1 2019/11/10 13:14:41 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -51,6 +51,14 @@
#thermal-sensor-cells = <0>;
};
};
+
+ /* PMU interrupt numbers are wrong in mainline dts */
+ pmu {
+ interrupts = ,
+ ,
+ ,
+ ;
+ };
};
&cpu0 {
CVS commit: [netbsd-9] src/sys/arch/arm/dts
Module Name:src Committed By: martin Date: Sun Nov 10 13:14:41 UTC 2019 Modified Files: src/sys/arch/arm/dts [netbsd-9]: sun50i-a64.dtsi Log Message: Pull up following revision(s) (requested by jmcneill in ticket #409): sys/arch/arm/dts/sun50i-a64.dtsi: revision 1.12 Fix PMU interrupt numbers on Allwinner A64. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.11.2.1 src/sys/arch/arm/dts/sun50i-a64.dtsi Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src
Committed By: martin
Date: Fri Nov 1 18:14:45 UTC 2019
Modified Files:
src/sys/arch/arm/sunxi [netbsd-9]: sunxi_gmac.c
Log Message:
Pull up following revision(s) (requested by bad in ticket #389):
sys/arch/arm/sunxi/sunxi_gmac.c: revision 1.7
fetch PHY id from FDT. same as sunxi_emac.c.
prevents PHY 0 of RTL8211E from wrongly attaching on e.g. Bananpi M1.
requested by jmcneill@, patch by martin@.
XXX pullup-9
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/sunxi/sunxi_gmac.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_gmac.c
diff -u src/sys/arch/arm/sunxi/sunxi_gmac.c:1.6 src/sys/arch/arm/sunxi/sunxi_gmac.c:1.6.2.1
--- src/sys/arch/arm/sunxi/sunxi_gmac.c:1.6 Sun Jul 21 08:24:32 2019
+++ src/sys/arch/arm/sunxi/sunxi_gmac.c Fri Nov 1 18:14:45 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_gmac.c,v 1.6 2019/07/21 08:24:32 mrg Exp $ */
+/* $NetBSD: sunxi_gmac.c,v 1.6.2.1 2019/11/01 18:14:45 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: sunxi_gmac.c,v 1.6 2019/07/21 08:24:32 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_gmac.c,v 1.6.2.1 2019/11/01 18:14:45 martin Exp $");
#include
#include
@@ -94,6 +94,24 @@ sunxi_gmac_intr(void *arg)
}
static int
+sunxi_gmac_get_phyid(int phandle)
+{
+ bus_addr_t addr;
+ int phy_phandle;
+
+ phy_phandle = fdtbus_get_phandle(phandle, "phy");
+ if (phy_phandle == -1)
+ phy_phandle = fdtbus_get_phandle(phandle, "phy-handle");
+ if (phy_phandle == -1)
+ return MII_PHY_ANY;
+
+ if (fdtbus_get_reg(phy_phandle, 0, &addr, NULL) != 0)
+ return MII_PHY_ANY;
+
+ return (int)addr;
+}
+
+static int
sunxi_gmac_match(device_t parent, cfdata_t cf, void *aux)
{
struct fdt_attach_args * const faa = aux;
@@ -192,7 +210,8 @@ sunxi_gmac_attach(device_t parent, devic
if (sunxi_gmac_reset(phandle) != 0)
aprint_error_dev(self, "PHY reset failed\n");
- dwc_gmac_attach(sc, MII_PHY_ANY, GMAC_MII_CLK_150_250M_DIV102);
+ dwc_gmac_attach(sc, sunxi_gmac_get_phyid(phandle),
+ GMAC_MII_CLK_150_250M_DIV102);
}
CFATTACH_DECL_NEW(sunxi_gmac, sizeof(struct dwc_gmac_softc),
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src Committed By: martin Date: Fri Nov 1 18:14:45 UTC 2019 Modified Files: src/sys/arch/arm/sunxi [netbsd-9]: sunxi_gmac.c Log Message: Pull up following revision(s) (requested by bad in ticket #389): sys/arch/arm/sunxi/sunxi_gmac.c: revision 1.7 fetch PHY id from FDT. same as sunxi_emac.c. prevents PHY 0 of RTL8211E from wrongly attaching on e.g. Bananpi M1. requested by jmcneill@, patch by martin@. XXX pullup-9 To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/sunxi/sunxi_gmac.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/fdt
Module Name:src Committed By: martin Date: Fri Nov 1 18:12:26 UTC 2019 Modified Files: src/sys/arch/arm/fdt [netbsd-9]: cpu_fdt.c Log Message: Pull up following revision(s) (requested by bad in ticket #342): sys/arch/arm/fdt/cpu_fdt.c: revision 1.29 sys/arch/arm/fdt/cpu_fdt.c: revision 1.30 re-apply r1.26: flush the dcache in cpu_enable_psci() before calling psci_cpu_on(). fixes the kernel hanging with multiple "mpstart" on (at least) NanoPi R1. but only #if !defined(AARCH64). not necessary on armv8 and cache ops are not available that early there. fix typos in comment in previous. To generate a diff of this commit: cvs rdiff -u -r1.25.4.1 -r1.25.4.2 src/sys/arch/arm/fdt/cpu_fdt.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/fdt/cpu_fdt.c diff -u src/sys/arch/arm/fdt/cpu_fdt.c:1.25.4.1 src/sys/arch/arm/fdt/cpu_fdt.c:1.25.4.2 --- src/sys/arch/arm/fdt/cpu_fdt.c:1.25.4.1 Wed Oct 23 19:14:19 2019 +++ src/sys/arch/arm/fdt/cpu_fdt.c Fri Nov 1 18:12:26 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_fdt.c,v 1.25.4.1 2019/10/23 19:14:19 martin Exp $ */ +/* $NetBSD: cpu_fdt.c,v 1.25.4.2 2019/11/01 18:12:26 martin Exp $ */ /*- * Copyright (c) 2017 Jared McNeill @@ -30,7 +30,7 @@ #include "psci_fdt.h" #include -__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.25.4.1 2019/10/23 19:14:19 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.25.4.2 2019/11/01 18:12:26 martin Exp $"); #include #include @@ -347,6 +347,14 @@ cpu_enable_psci(int phandle) fdtbus_get_reg64(phandle, 0, &mpidr, NULL); +#if !defined(AARCH64) + /* + * not necessary on AARCH64. beside there it hangs the system + * because cache ops are only functional after cpu_attach() + * was called. + */ + cpu_dcache_wbinv_all(); +#endif ret = psci_cpu_on(mpidr, cpu_fdt_mpstart_pa(), 0); if (ret != PSCI_SUCCESS) return EIO;
CVS commit: [netbsd-9] src/sys/arch/arm/fdt
Module Name:src Committed By: martin Date: Fri Nov 1 18:12:26 UTC 2019 Modified Files: src/sys/arch/arm/fdt [netbsd-9]: cpu_fdt.c Log Message: Pull up following revision(s) (requested by bad in ticket #342): sys/arch/arm/fdt/cpu_fdt.c: revision 1.29 sys/arch/arm/fdt/cpu_fdt.c: revision 1.30 re-apply r1.26: flush the dcache in cpu_enable_psci() before calling psci_cpu_on(). fixes the kernel hanging with multiple "mpstart" on (at least) NanoPi R1. but only #if !defined(AARCH64). not necessary on armv8 and cache ops are not available that early there. fix typos in comment in previous. To generate a diff of this commit: cvs rdiff -u -r1.25.4.1 -r1.25.4.2 src/sys/arch/arm/fdt/cpu_fdt.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm
Module Name:src
Committed By: martin
Date: Tue Oct 15 19:40:34 UTC 2019
Modified Files:
src/sys/arch/arm/acpi [netbsd-9]: files.acpi gic_acpi.c gicv3_acpi.c
src/sys/arch/arm/cortex [netbsd-9]: files.cortex gic_v2m.c gic_v2m.h
Added Files:
src/sys/arch/arm/acpi [netbsd-9]: gic_v2m_acpi.c gic_v2m_acpi.h
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #334):
sys/arch/arm/cortex/gic_v2m.c: revision 1.7
sys/arch/arm/acpi/gicv3_acpi.c: revision 1.5
sys/arch/arm/acpi/files.acpi: revision 1.8
sys/arch/arm/acpi/gic_acpi.c: revision 1.4
sys/arch/arm/cortex/files.cortex: revision 1.13
sys/arch/arm/acpi/gic_v2m_acpi.c: revision 1.1
sys/arch/arm/acpi/gic_v2m_acpi.h: revision 1.1
sys/arch/arm/cortex/gic_v2m.h: revision 1.2
Add support for Amazon's Graviton MSI controller.
Graviton has a GICv3 with a modified GICv2m (!) for MSIs. Instead of
sending messages to a fixed address with the SPI as data, the Graviton's
GICv2m uses a different address for each vector with "don't care" as data.
To generate a diff of this commit:
cvs rdiff -u -r1.6.6.1 -r1.6.6.2 src/sys/arch/arm/acpi/files.acpi
cvs rdiff -u -r1.3 -r1.3.6.1 src/sys/arch/arm/acpi/gic_acpi.c
cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/arm/acpi/gic_v2m_acpi.c \
src/sys/arch/arm/acpi/gic_v2m_acpi.h
cvs rdiff -u -r1.3.8.1 -r1.3.8.2 src/sys/arch/arm/acpi/gicv3_acpi.c
cvs rdiff -u -r1.11.4.1 -r1.11.4.2 src/sys/arch/arm/cortex/files.cortex
cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/cortex/gic_v2m.c
cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/cortex/gic_v2m.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/files.acpi
diff -u src/sys/arch/arm/acpi/files.acpi:1.6.6.1 src/sys/arch/arm/acpi/files.acpi:1.6.6.2
--- src/sys/arch/arm/acpi/files.acpi:1.6.6.1 Mon Sep 23 07:06:31 2019
+++ src/sys/arch/arm/acpi/files.acpi Tue Oct 15 19:40:34 2019
@@ -1,4 +1,4 @@
-# $NetBSD: files.acpi,v 1.6.6.1 2019/09/23 07:06:31 martin Exp $
+# $NetBSD: files.acpi,v 1.6.6.2 2019/10/15 19:40:34 martin Exp $
#
# Configuration info for ACPI compliant ARM boards.
#
@@ -26,6 +26,8 @@ file arch/arm/acpi/gic_acpi.c gic_acpi
attach gicvthree at acpimadtbus with gicv3_acpi
file arch/arm/acpi/gicv3_acpi.c gicv3_acpi
+file arch/arm/acpi/gic_v2m_acpi.c (gic_acpi | gicv3_acpi) & pci
+
attach gtmr at acpisdtbus with gtmr_acpi
file arch/arm/acpi/gtmr_acpi.c gtmr_acpi
Index: src/sys/arch/arm/acpi/gic_acpi.c
diff -u src/sys/arch/arm/acpi/gic_acpi.c:1.3 src/sys/arch/arm/acpi/gic_acpi.c:1.3.6.1
--- src/sys/arch/arm/acpi/gic_acpi.c:1.3 Mon Nov 12 12:56:05 2018
+++ src/sys/arch/arm/acpi/gic_acpi.c Tue Oct 15 19:40:34 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: gic_acpi.c,v 1.3 2018/11/12 12:56:05 jmcneill Exp $ */
+/* $NetBSD: gic_acpi.c,v 1.3.6.1 2019/10/15 19:40:34 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "pci.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: gic_acpi.c,v 1.3 2018/11/12 12:56:05 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic_acpi.c,v 1.3.6.1 2019/10/15 19:40:34 martin Exp $");
#include
#include
@@ -43,16 +43,17 @@ __KERNEL_RCSID(0, "$NetBSD: gic_acpi.c,v
#include
#include
+#include
+
#include
#include
#include
#include
-#include
+#include
#define GICD_SIZE 0x1000
#define GICC_SIZE 0x1000
-#define GICMSIFRAME_SIZE 0x1000
extern struct bus_space arm_generic_bs_tag;
extern struct pic_softc *pic_list[];
@@ -61,9 +62,6 @@ static int gic_acpi_match(device_t, cfda
static void gic_acpi_attach(device_t, device_t, void *);
static ACPI_STATUS gic_acpi_find_gicc(ACPI_SUBTABLE_HEADER *, void *);
-#if NPCI > 0
-static ACPI_STATUS gic_acpi_find_msi_frame(ACPI_SUBTABLE_HEADER *, void *);
-#endif
CFATTACH_DECL_NEW(gic_acpi, 0, gic_acpi_match, gic_acpi_attach, NULL, NULL);
@@ -130,7 +128,7 @@ gic_acpi_attach(device_t parent, device_
arm_fdt_irq_set_handler(armgic_irq_handler);
#if NPCI > 0
- acpi_madt_walk(gic_acpi_find_msi_frame, armgic);
+ acpi_madt_walk(gic_v2m_acpi_find_msi_frame, armgic);
#endif
}
@@ -146,46 +144,3 @@ gic_acpi_find_gicc(ACPI_SUBTABLE_HEADER
return AE_LIMIT;
}
-
-#if NPCI > 0
-static ACPI_STATUS
-gic_acpi_find_msi_frame(ACPI_SUBTABLE_HEADER *hdrp, void *aux)
-{
- ACPI_MADT_GENERIC_MSI_FRAME *msi_frame = (ACPI_MADT_GENERIC_MSI_FRAME *)hdrp;
- struct gic_v2m_frame *frame;
- struct pic_softc *pic = pic_list[0];
- device_t armgic = aux;
-
- if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_MSI_FRAME)
- return AE_OK;
-
- frame = kmem_zalloc(sizeof(*frame), KM_SLEEP);
- frame->frame_reg = msi_frame->BaseAddress;
- frame->frame_pic = pic;
- if (msi_frame->Flags & ACPI_MADT_OVERRIDE_SPI_VALUES) {
- frame->frame_base = msi_frame->SpiBase;
- frame->frame_count = msi_frame->SpiCount;
- } else {
- bus_space_tag_t bst = &arm_generic_bs_tag;
-
CVS commit: [netbsd-9] src/sys/arch/arm
Module Name:src Committed By: martin Date: Tue Oct 15 19:40:34 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: files.acpi gic_acpi.c gicv3_acpi.c src/sys/arch/arm/cortex [netbsd-9]: files.cortex gic_v2m.c gic_v2m.h Added Files: src/sys/arch/arm/acpi [netbsd-9]: gic_v2m_acpi.c gic_v2m_acpi.h Log Message: Pull up following revision(s) (requested by jmcneill in ticket #334): sys/arch/arm/cortex/gic_v2m.c: revision 1.7 sys/arch/arm/acpi/gicv3_acpi.c: revision 1.5 sys/arch/arm/acpi/files.acpi: revision 1.8 sys/arch/arm/acpi/gic_acpi.c: revision 1.4 sys/arch/arm/cortex/files.cortex: revision 1.13 sys/arch/arm/acpi/gic_v2m_acpi.c: revision 1.1 sys/arch/arm/acpi/gic_v2m_acpi.h: revision 1.1 sys/arch/arm/cortex/gic_v2m.h: revision 1.2 Add support for Amazon's Graviton MSI controller. Graviton has a GICv3 with a modified GICv2m (!) for MSIs. Instead of sending messages to a fixed address with the SPI as data, the Graviton's GICv2m uses a different address for each vector with "don't care" as data. To generate a diff of this commit: cvs rdiff -u -r1.6.6.1 -r1.6.6.2 src/sys/arch/arm/acpi/files.acpi cvs rdiff -u -r1.3 -r1.3.6.1 src/sys/arch/arm/acpi/gic_acpi.c cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/arm/acpi/gic_v2m_acpi.c \ src/sys/arch/arm/acpi/gic_v2m_acpi.h cvs rdiff -u -r1.3.8.1 -r1.3.8.2 src/sys/arch/arm/acpi/gicv3_acpi.c cvs rdiff -u -r1.11.4.1 -r1.11.4.2 src/sys/arch/arm/cortex/files.cortex cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/cortex/gic_v2m.c cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/cortex/gic_v2m.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src
Committed By: martin
Date: Tue Oct 15 19:37:58 UTC 2019
Modified Files:
src/sys/arch/arm/acpi [netbsd-9]: acpi_pci_machdep.c acpi_pci_machdep.h
acpipchb.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #332):
sys/arch/arm/acpi/acpipchb.c: revision 1.10
sys/arch/arm/acpi/acpipchb.c: revision 1.11
sys/arch/arm/acpi/acpipchb.c: revision 1.12
sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.3
sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.4
sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.10
sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.11
Add quirks for Amazon Graviton PCIe root ports. Configuration space for the
root port is found in a child AMZN0001 resource, not the MCFG table.
-
More Amazon Graviton quirks:
- Ignore devno > 0 on the PCIe root port.
- Fixup PCIe bridge bus number register on the root port.
- Move quirk handling to acpipchb so it can be applied before the bus
is configured.
-
Fix detection of root port resources for Graviton and remove no longer required
bridge fixup
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.9.6.1 src/sys/arch/arm/acpi/acpi_pci_machdep.c
cvs rdiff -u -r1.2 -r1.2.8.1 src/sys/arch/arm/acpi/acpi_pci_machdep.h
cvs rdiff -u -r1.9 -r1.9.2.1 src/sys/arch/arm/acpi/acpipchb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_pci_machdep.c
diff -u src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.9 src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.9.6.1
--- src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.9 Sat Dec 8 15:04:40 2018
+++ src/sys/arch/arm/acpi/acpi_pci_machdep.c Tue Oct 15 19:37:58 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_machdep.c,v 1.9 2018/12/08 15:04:40 jmcneill Exp $ */
+/* $NetBSD: acpi_pci_machdep.c,v 1.9.6.1 2019/10/15 19:37:58 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.9 2018/12/08 15:04:40 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.9.6.1 2019/10/15 19:37:58 martin Exp $");
#include
#include
@@ -215,6 +215,11 @@ acpi_pci_md_attach_hook(device_t parent,
static int
acpi_pci_md_bus_maxdevs(void *v, int busno)
{
+ struct acpi_pci_context * const ap = v;
+
+ if (ap->ap_bus_maxdevs != NULL)
+ return ap->ap_bus_maxdevs(ap, busno);
+
return 32;
}
@@ -260,7 +265,10 @@ acpi_pci_md_conf_read(void *v, pcitag_t
if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
return (pcireg_t) -1;
- acpimcfg_conf_read(&ap->ap_pc, tag, offset, &val);
+ if (ap->ap_conf_read != NULL)
+ ap->ap_conf_read(&ap->ap_pc, tag, offset, &val);
+ else
+ acpimcfg_conf_read(&ap->ap_pc, tag, offset, &val);
return val;
}
@@ -273,7 +281,10 @@ acpi_pci_md_conf_write(void *v, pcitag_t
if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
return;
- acpimcfg_conf_write(&ap->ap_pc, tag, offset, val);
+ if (ap->ap_conf_write != NULL)
+ ap->ap_conf_write(&ap->ap_pc, tag, offset, val);
+ else
+ acpimcfg_conf_write(&ap->ap_pc, tag, offset, val);
}
static int
Index: src/sys/arch/arm/acpi/acpi_pci_machdep.h
diff -u src/sys/arch/arm/acpi/acpi_pci_machdep.h:1.2 src/sys/arch/arm/acpi/acpi_pci_machdep.h:1.2.8.1
--- src/sys/arch/arm/acpi/acpi_pci_machdep.h:1.2 Fri Oct 19 11:40:27 2018
+++ src/sys/arch/arm/acpi/acpi_pci_machdep.h Tue Oct 15 19:37:58 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_machdep.h,v 1.2 2018/10/19 11:40:27 jmcneill Exp $ */
+/* $NetBSD: acpi_pci_machdep.h,v 1.2.8.1 2019/10/15 19:37:58 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -36,7 +36,15 @@ extern struct arm32_pci_chipset arm_acpi
struct acpi_pci_context {
struct arm32_pci_chipset ap_pc;
+ device_t ap_dev;
u_int ap_seg;
+ int ap_bus;
+ ACPI_HANDLE ap_handle;
+ bus_space_tag_t ap_bst;
+ bus_space_handle_t ap_conf_bsh;
+ int (*ap_conf_read)(pci_chipset_tag_t, pcitag_t, int, pcireg_t *);
+ int (*ap_conf_write)(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
+ int (*ap_bus_maxdevs)(struct acpi_pci_context *, int);
};
#endif /* !_ARM_ACPI_PCI_MACHDEP_H */
Index: src/sys/arch/arm/acpi/acpipchb.c
diff -u src/sys/arch/arm/acpi/acpipchb.c:1.9 src/sys/arch/arm/acpi/acpipchb.c:1.9.2.1
--- src/sys/arch/arm/acpi/acpipchb.c:1.9 Tue Jun 25 22:23:39 2019
+++ src/sys/arch/arm/acpi/acpipchb.c Tue Oct 15 19:37:58 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.9 2019/06/25 22:23:39 jmcneill Exp $ */
+/* $NetBSD: acpipchb.c,v 1.9.2.1 2019/10/15 19:37:58 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.9 2019/06/25 22:23:39 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.9.2.1 2019/10/15 19:37:58 martin Exp $");
#include
#include
@@ -92,6 +92,132 @@ struct acpipchb
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src Committed By: martin Date: Tue Oct 15 19:37:58 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: acpi_pci_machdep.c acpi_pci_machdep.h acpipchb.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #332): sys/arch/arm/acpi/acpipchb.c: revision 1.10 sys/arch/arm/acpi/acpipchb.c: revision 1.11 sys/arch/arm/acpi/acpipchb.c: revision 1.12 sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.3 sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.4 sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.10 sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.11 Add quirks for Amazon Graviton PCIe root ports. Configuration space for the root port is found in a child AMZN0001 resource, not the MCFG table. - More Amazon Graviton quirks: - Ignore devno > 0 on the PCIe root port. - Fixup PCIe bridge bus number register on the root port. - Move quirk handling to acpipchb so it can be applied before the bus is configured. - Fix detection of root port resources for Graviton and remove no longer required bridge fixup To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.9.6.1 src/sys/arch/arm/acpi/acpi_pci_machdep.c cvs rdiff -u -r1.2 -r1.2.8.1 src/sys/arch/arm/acpi/acpi_pci_machdep.h cvs rdiff -u -r1.9 -r1.9.2.1 src/sys/arch/arm/acpi/acpipchb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/dts
Module Name:src Committed By: martin Date: Fri Oct 4 08:08:53 UTC 2019 Modified Files: src/sys/arch/arm/dts [netbsd-9]: sun50i-h5-nanopi-neo-plus2.dts Log Message: Pull up following revision(s) (requested by jmcneill in ticket #283): sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts: revision 1.4 Increase voltage for frequencies above 1GHz To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.4.1 \ src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts diff -u src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts:1.3 src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts:1.3.4.1 --- src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts:1.3 Mon Jul 2 17:13:15 2018 +++ src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts Fri Oct 4 08:08:53 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: sun50i-h5-nanopi-neo-plus2.dts,v 1.3 2018/07/02 17:13:15 jakllsch Exp $ */ +/* $NetBSD: sun50i-h5-nanopi-neo-plus2.dts,v 1.3.4.1 2019/10/04 08:08:53 martin Exp $ */ #include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts" #include "sun50i-h5.dtsi" @@ -9,9 +9,9 @@ cpu-supply = <&vdd_cpux>; operating-points = < /* kHz uV */ -1152000 110 -1104000 110 -1008000 110 +1152000 130 +1104000 130 +1008000 130 816000 110 624000 110 >;
CVS commit: [netbsd-9] src/sys/arch/arm/dts
Module Name:src Committed By: martin Date: Fri Oct 4 08:08:53 UTC 2019 Modified Files: src/sys/arch/arm/dts [netbsd-9]: sun50i-h5-nanopi-neo-plus2.dts Log Message: Pull up following revision(s) (requested by jmcneill in ticket #283): sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts: revision 1.4 Increase voltage for frequencies above 1GHz To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.4.1 \ src/sys/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/nvidia
Module Name:src
Committed By: martin
Date: Sat Sep 28 12:21:29 UTC 2019
Modified Files:
src/sys/arch/arm/nvidia [netbsd-9]: tegra210_pinmux.c tegra_pinmux.c
tegra_pinmux.h
Log Message:
Pull up following revision(s) (requested by skrll in ticket #263):
sys/arch/arm/nvidia/tegra_pinmux.h: revision 1.2
sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.3
sys/arch/arm/nvidia/tegra210_pinmux.c: revision 1.2
Update tegra_pinmux to support all bindings (pins and pin groups)
Update tegra210_pinmux.c with all defined pins and groups.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.1.10.1 src/sys/arch/arm/nvidia/tegra210_pinmux.c \
src/sys/arch/arm/nvidia/tegra_pinmux.h
cvs rdiff -u -r1.2 -r1.2.4.1 src/sys/arch/arm/nvidia/tegra_pinmux.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra210_pinmux.c
diff -u src/sys/arch/arm/nvidia/tegra210_pinmux.c:1.1 src/sys/arch/arm/nvidia/tegra210_pinmux.c:1.1.10.1
--- src/sys/arch/arm/nvidia/tegra210_pinmux.c:1.1 Fri Sep 22 14:36:22 2017
+++ src/sys/arch/arm/nvidia/tegra210_pinmux.c Sat Sep 28 12:21:29 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra210_pinmux.c,v 1.1 2017/09/22 14:36:22 jmcneill Exp $ */
+/* $NetBSD: tegra210_pinmux.c,v 1.1.10.1 2019/09/28 12:21:29 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: tegra210_pinmux.c,v 1.1 2017/09/22 14:36:22 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra210_pinmux.c,v 1.1.10.1 2019/09/28 12:21:29 martin Exp $");
#include
#include
@@ -36,171 +36,222 @@ __KERNEL_RCSID(0, "$NetBSD: tegra210_pin
#include
+#define TEGRA_PIN(n, r, f1, f2, f3, f4) \
+ {\
+ .tpp_name = n, \
+ .tpp_reg = (r), \
+ .tpp_type = TEGRA_PINMUX,\
+ .tpp_functions = { \
+ f1, f2, f3, f4 \
+ } \
+ }
+
+#define TEGRA_PINGROUP(n, r, drvdn_m, drvup_m, slwrr_m, slwrf_m) \
+ {\
+ .tpp_name = "drive_" n, \
+ .tpp_reg = (r) - 0x8d4, \
+ .tpp_type = TEGRA_PADCTRL,\
+ .tpp_dg = { \
+ .drvdn_mask = drvdn_m,\
+ .drvup_mask = drvup_m,\
+ .slwrr_mask = slwrr_m,\
+ .slwrf_mask = slwrf_m\
+ } \
+ }
+
+// 9.15 Pinmux registers
static const struct tegra_pinmux_pins tegra210_pins[] = {
- { "sdmmc1_clk_pm0", 0x00, { "sdmmc1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc1_cmd_pm1", 0x04, { "sdmmc1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc1_dat3_pm2", 0x08, { "sdmmc1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc1_dat2_pm3", 0x0c, { "sdmmc1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc1_dat1_pm4", 0x10, { "sdmmc1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc1_dat0_pm5", 0x14, { "sdmmc1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc3_clk_pp0", 0x1c, { "sdmmc3", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc3_cmd_pp1", 0x20, { "sdmmc3", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc3_dat0_pp5", 0x24, { "sdmmc3", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc3_dat1_pp4", 0x28, { "sdmmc3", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc3_dat2_pp3", 0x2c, { "sdmmc3", "rsvd1", "rsvd2", "rsvd3" } },
- { "sdmmc3_dat3_pp2", 0x30, { "sdmmc3", "rsvd1", "rsvd2", "rsvd3" } },
- { "pex_l0_rst_n_pa0", 0x38, { "pe0", "rsvd1", "rsvd2", "rsvd3" } },
- { "pex_l0_clkreq_n_pa1", 0x3c, { "pe0", "rsvd1", "rsvd2", "rsvd3" } },
- { "pex_wake_n_pa2", 0x40, { "pe", "rsvd1", "rsvd2", "rsvd3" } },
- { "pex_l1_rst_n_pa3", 0x44, { "pe1", "rsvd1", "rsvd2", "rsvd3" } },
- { "pex_l1_clkreq_n_pa4", 0x48, { "pe1", "rsvd1", "rsvd2", "rsvd3" } },
- { "sata_led_active_pa5", 0x4c, { "sata", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi1_mosi_pc0", 0x50, { "spi1", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi1_miso_pc1", 0x54, { "spi1", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi1_sck_pc2", 0x58, { "spi1", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi1_cs0_pc3", 0x5c, { "spi1", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi1_cs1_pc4", 0x60, { "spi1", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi2_mosi_pb4", 0x64, { "spi2", "dtv", "rsvd2", "rsvd3" } },
- { "spi2_miso_pb5", 0x68, { "spi2", "dtv", "rsvd2", "rsvd3" } },
- { "spi2_sck_pb6", 0x6c, { "spi2", "dtv", "rsvd2", "rsvd3" } },
- { "spi2_cs0_pb7", 0x70, { "spi2", "dtv", "rsvd2", "rsvd3" } },
- { "spi2_cs1_pdd0", 0x74, { "spi2", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi4_mosi_pc7", 0x78, { "spi4", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi4_miso_pd0", 0x7c, { "spi4", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi4_sck_pc5", 0x80, { "spi4", "rsvd1", "rsvd2", "rsvd3" } },
- { "spi4_cs0_pc6", 0x84, { "spi4", "rsvd1", "rsvd2", "rsvd3" } },
- { "qspi_sck_pee0", 0x88, { "qspi", "rsvd1", "rsvd2", "rsvd3" } },
- { "qspi_cs_n_pee1", 0x8c, { "qspi", "rsvd1", "rsvd2", "rsvd3" } },
- { "qspi_io0_pee2", 0x90, { "qspi", "rsvd1", "rsvd2", "rsvd3" } },
- { "qspi_io1_pee3", 0x94, { "qspi", "rsvd1", "rsvd2", "rsvd3" } },
- { "qspi_io2_pee4", 0x98, { "qspi",
CVS commit: [netbsd-9] src/sys/arch/arm/nvidia
Module Name:src Committed By: martin Date: Sat Sep 28 12:21:29 UTC 2019 Modified Files: src/sys/arch/arm/nvidia [netbsd-9]: tegra210_pinmux.c tegra_pinmux.c tegra_pinmux.h Log Message: Pull up following revision(s) (requested by skrll in ticket #263): sys/arch/arm/nvidia/tegra_pinmux.h: revision 1.2 sys/arch/arm/nvidia/tegra_pinmux.c: revision 1.3 sys/arch/arm/nvidia/tegra210_pinmux.c: revision 1.2 Update tegra_pinmux to support all bindings (pins and pin groups) Update tegra210_pinmux.c with all defined pins and groups. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.1.10.1 src/sys/arch/arm/nvidia/tegra210_pinmux.c \ src/sys/arch/arm/nvidia/tegra_pinmux.h cvs rdiff -u -r1.2 -r1.2.4.1 src/sys/arch/arm/nvidia/tegra_pinmux.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/arm32
Module Name:src
Committed By: martin
Date: Tue Sep 24 02:52:09 UTC 2019
Modified Files:
src/sys/arch/arm/arm32 [netbsd-9]: bus_dma.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #236):
sys/arch/arm/arm32/bus_dma.c: revision 1.116
bus_dmamap_load_raw: support coherent mappings
bus_dmamap_sync: support syncing "raw" buffer types
To generate a diff of this commit:
cvs rdiff -u -r1.115 -r1.115.2.1 src/sys/arch/arm/arm32/bus_dma.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.115 src/sys/arch/arm/arm32/bus_dma.c:1.115.2.1
--- src/sys/arch/arm/arm32/bus_dma.c:1.115 Fri Jun 14 09:09:12 2019
+++ src/sys/arch/arm/arm32/bus_dma.c Tue Sep 24 02:52:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.115 2019/06/14 09:09:12 skrll Exp $ */
+/* $NetBSD: bus_dma.c,v 1.115.2.1 2019/09/24 02:52:09 martin Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include "opt_cputypes.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.115 2019/06/14 09:09:12 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.115.2.1 2019/09/24 02:52:09 martin Exp $");
#include
#include
@@ -750,8 +750,10 @@ _bus_dmamap_load_raw(bus_dma_tag_t t, bu
sgsize = MIN(ds->ds_len, size);
if (sgsize == 0)
continue;
+ const bool coherent =
+ (ds->_ds_flags & _BUS_DMAMAP_COHERENT) != 0;
error = _bus_dmamap_load_paddr(t, map, ds->ds_addr,
- sgsize, false);
+ sgsize, coherent);
if (error != 0)
break;
size -= sgsize;
@@ -766,6 +768,9 @@ _bus_dmamap_load_raw(bus_dma_tag_t t, bu
/* XXX TBD bounce */
map->dm_mapsize = size0;
+ map->_dm_origbuf = NULL;
+ map->_dm_buftype = _BUS_DMA_BUFTYPE_RAW;
+ map->_dm_vmspace = NULL;
return 0;
}
@@ -1165,6 +1170,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
switch (buftype) {
case _BUS_DMA_BUFTYPE_LINEAR:
+ case _BUS_DMA_BUFTYPE_RAW:
_bus_dmamap_sync_linear(t, map, offset, len, ops);
break;
@@ -1176,10 +1182,6 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
_bus_dmamap_sync_uio(t, map, offset, len, ops);
break;
- case _BUS_DMA_BUFTYPE_RAW:
- panic("_bus_dmamap_sync: _BUS_DMA_BUFTYPE_RAW");
- break;
-
case _BUS_DMA_BUFTYPE_INVALID:
panic("_bus_dmamap_sync: _BUS_DMA_BUFTYPE_INVALID");
break;
CVS commit: [netbsd-9] src/sys/arch/arm/arm32
Module Name:src Committed By: martin Date: Tue Sep 24 02:52:09 UTC 2019 Modified Files: src/sys/arch/arm/arm32 [netbsd-9]: bus_dma.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #236): sys/arch/arm/arm32/bus_dma.c: revision 1.116 bus_dmamap_load_raw: support coherent mappings bus_dmamap_sync: support syncing "raw" buffer types To generate a diff of this commit: cvs rdiff -u -r1.115 -r1.115.2.1 src/sys/arch/arm/arm32/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/rockchip
Module Name:src Committed By: martin Date: Tue Sep 24 02:50:36 UTC 2019 Modified Files: src/sys/arch/arm/rockchip [netbsd-9]: rk_i2c.c Log Message: Pull up following revision(s) (requested by tnn in ticket #235): sys/arch/arm/rockchip/rk_i2c.c: revision 1.5 rkiic: coalesce smbus-style writes into a single transaction There seems to be a hw controller bug. Split cmd/data writes caused corrupt transfers, with junk bytes witten into the rk808 pmic registers. This may have caused us to operate with out-of-spec core voltage. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.4.6.1 src/sys/arch/arm/rockchip/rk_i2c.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/rockchip
Module Name:src
Committed By: martin
Date: Tue Sep 24 02:50:36 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip [netbsd-9]: rk_i2c.c
Log Message:
Pull up following revision(s) (requested by tnn in ticket #235):
sys/arch/arm/rockchip/rk_i2c.c: revision 1.5
rkiic: coalesce smbus-style writes into a single transaction
There seems to be a hw controller bug. Split cmd/data writes caused corrupt
transfers, with junk bytes witten into the rk808 pmic registers.
This may have caused us to operate with out-of-spec core voltage.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.4.6.1 src/sys/arch/arm/rockchip/rk_i2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_i2c.c
diff -u src/sys/arch/arm/rockchip/rk_i2c.c:1.4 src/sys/arch/arm/rockchip/rk_i2c.c:1.4.6.1
--- src/sys/arch/arm/rockchip/rk_i2c.c:1.4 Sun Sep 2 10:07:17 2018
+++ src/sys/arch/arm/rockchip/rk_i2c.c Tue Sep 24 02:50:36 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_i2c.c,v 1.4 2018/09/02 10:07:17 jmcneill Exp $ */
+/* $NetBSD: rk_i2c.c,v 1.4.6.1 2019/09/24 02:50:36 martin Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.4 2018/09/02 10:07:17 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.4.6.1 2019/09/24 02:50:36 martin Exp $");
#include
#include
@@ -244,8 +244,8 @@ rk_i2c_stop(struct rk_i2c_softc *sc)
}
static int
-rk_i2c_write(struct rk_i2c_softc *sc, i2c_addr_t addr, const uint8_t *buf,
-size_t buflen, int flags, bool send_start)
+rk_i2c_write(struct rk_i2c_softc *sc, i2c_addr_t addr, const uint8_t *cmd,
+size_t cmdlen, const uint8_t *buf, size_t buflen, int flags, bool send_start)
{
union {
uint8_t data8[32];
@@ -254,8 +254,10 @@ rk_i2c_write(struct rk_i2c_softc *sc, i2
uint32_t con;
u_int mode;
int error;
+ size_t len;
- if (buflen > 31)
+ len = cmdlen + buflen;
+ if (len > 31)
return EINVAL;
mode = RKI2C_CON_I2C_MODE_TX;
@@ -267,10 +269,11 @@ rk_i2c_write(struct rk_i2c_softc *sc, i2
/* Transmit data. Slave address goes in the lower 8 bits of TXDATA0 */
txdata.data8[0] = addr << 1;
- memcpy(&txdata.data8[1], buf, buflen);
+ memcpy(&txdata.data8[1], cmd, cmdlen);
+ memcpy(&txdata.data8[1 + cmdlen], buf, buflen);
bus_space_write_region_4(sc->sc_bst, sc->sc_bsh, RKI2C_TXDATA(0),
- txdata.data32, howmany(buflen + 1, 4));
- WR4(sc, RKI2C_MTXCNT, __SHIFTIN(buflen + 1, RKI2C_MTXCNT_MTXCNT));
+ txdata.data32, howmany(len + 1, 4));
+ WR4(sc, RKI2C_MTXCNT, __SHIFTIN(len + 1, RKI2C_MTXCNT_MTXCNT));
if ((error = rk_i2c_wait(sc, RKI2C_IPD_MBTFIPD)) != 0)
return error;
@@ -338,16 +341,9 @@ rk_i2c_exec(void *priv, i2c_op_t op, i2c
if (I2C_OP_READ_P(op)) {
error = rk_i2c_read(sc, addr, cmdbuf, cmdlen, buf, buflen, flags, send_start);
} else {
- if (cmdlen > 0) {
- error = rk_i2c_write(sc, addr, cmdbuf, cmdlen, flags, send_start);
- if (error != 0)
-goto done;
- send_start = false;
- }
- error = rk_i2c_write(sc, addr, buf, buflen, flags, send_start);
+ error = rk_i2c_write(sc, addr, cmdbuf, cmdlen, buf, buflen, flags, send_start);
}
-done:
if (error != 0 || I2C_OP_STOP_P(op))
rk_i2c_stop(sc);
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src Committed By: martin Date: Mon Sep 23 07:06:31 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: acpi_platform.c files.acpi Added Files: src/sys/arch/arm/acpi [netbsd-9]: acpi_simplefb.c acpi_simplefb.h Log Message: Pull up following revision(s) (requested by jmcneill in ticket #231): sys/arch/arm/acpi/acpi_platform.c: revision 1.18 sys/arch/arm/acpi/files.acpi: revision 1.7 sys/arch/arm/acpi/acpi_simplefb.c: revision 1.1 sys/arch/arm/acpi/acpi_simplefb.h: revision 1.1 Use vcons for simplefb preattach to speed up early console messages. To generate a diff of this commit: cvs rdiff -u -r1.15.2.1 -r1.15.2.2 src/sys/arch/arm/acpi/acpi_platform.c cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/arm/acpi/acpi_simplefb.c \ src/sys/arch/arm/acpi/acpi_simplefb.h cvs rdiff -u -r1.6 -r1.6.6.1 src/sys/arch/arm/acpi/files.acpi Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src
Committed By: martin
Date: Mon Sep 23 07:06:31 UTC 2019
Modified Files:
src/sys/arch/arm/acpi [netbsd-9]: acpi_platform.c files.acpi
Added Files:
src/sys/arch/arm/acpi [netbsd-9]: acpi_simplefb.c acpi_simplefb.h
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #231):
sys/arch/arm/acpi/acpi_platform.c: revision 1.18
sys/arch/arm/acpi/files.acpi: revision 1.7
sys/arch/arm/acpi/acpi_simplefb.c: revision 1.1
sys/arch/arm/acpi/acpi_simplefb.h: revision 1.1
Use vcons for simplefb preattach to speed up early console messages.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.1 -r1.15.2.2 src/sys/arch/arm/acpi/acpi_platform.c
cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/arm/acpi/acpi_simplefb.c \
src/sys/arch/arm/acpi/acpi_simplefb.h
cvs rdiff -u -r1.6 -r1.6.6.1 src/sys/arch/arm/acpi/files.acpi
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_platform.c
diff -u src/sys/arch/arm/acpi/acpi_platform.c:1.15.2.1 src/sys/arch/arm/acpi/acpi_platform.c:1.15.2.2
--- src/sys/arch/arm/acpi/acpi_platform.c:1.15.2.1 Sun Aug 4 19:24:18 2019
+++ src/sys/arch/arm/acpi/acpi_platform.c Mon Sep 23 07:06:31 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_platform.c,v 1.15.2.1 2019/08/04 19:24:18 martin Exp $ */
+/* $NetBSD: acpi_platform.c,v 1.15.2.2 2019/09/23 07:06:31 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.15.2.1 2019/08/04 19:24:18 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.15.2.2 2019/09/23 07:06:31 martin Exp $");
#include
#include
@@ -73,12 +73,8 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_platfor
#include
#endif
-#if NWSDISPLAY > 0
-#include
-#include
-#include
-#include
-#include
+#if NWSDISPLAY > 0 && NGENFB > 0
+#include
#endif
#ifdef EFI_RUNTIME
@@ -134,107 +130,6 @@ acpi_platform_bootstrap(void)
acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges);
}
-#if NWSDISPLAY > 0 && NGENFB > 0
-static struct wsscreen_descr acpi_platform_stdscreen = {
- .name = "std",
- .ncols = 0,
- .nrows = 0,
- .textops = NULL,
- .fontwidth = 0,
- .fontheight = 0,
- .capabilities = 0,
- .modecookie = NULL
-};
-
-static struct vcons_screen acpi_platform_screen;
-
-static int
-acpi_platform_find_simplefb(void)
-{
- static const char * simplefb_compatible[] = { "simple-framebuffer", NULL };
- int chosen_phandle, child;
-
- chosen_phandle = OF_finddevice("/chosen");
- if (chosen_phandle == -1)
- return -1;
-
- for (child = OF_child(chosen_phandle); child; child = OF_peer(child)) {
- if (!fdtbus_status_okay(child))
- continue;
- if (!of_match_compatible(child, simplefb_compatible))
- continue;
-
- return child;
- }
-
- return -1;
-}
-
-static void
-acpi_platform_wsdisplay_preattach(void)
-{
- struct rasops_info *ri = &acpi_platform_screen.scr_ri;
- bus_space_tag_t bst = &arm_generic_bs_tag;
- bus_space_handle_t bsh;
- uint32_t width, height, stride;
- const char *format;
- bus_addr_t addr;
- bus_size_t size;
- uint16_t depth;
- long defattr;
-
- memset(&acpi_platform_screen, 0, sizeof(acpi_platform_screen));
-
- const int phandle = acpi_platform_find_simplefb();
- if (phandle == -1)
- return;
-
- if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0 || size == 0)
- return;
-
- if (of_getprop_uint32(phandle, "width", &width) != 0 ||
- of_getprop_uint32(phandle, "height", &height) != 0 ||
- of_getprop_uint32(phandle, "stride", &stride) != 0 ||
- (format = fdtbus_get_string(phandle, "format")) == NULL)
- return;
-
- if (strcmp(format, "a8b8g8r8") == 0 ||
- strcmp(format, "x8r8g8b8") == 0) {
- depth = 32;
- } else if (strcmp(format, "r5g6b5") == 0) {
- depth = 16;
- } else {
- return;
- }
-
- if (bus_space_map(bst, addr, size,
- BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &bsh) != 0)
- return;
-
- wsfont_init();
-
- ri->ri_width = width;
- ri->ri_height = height;
- ri->ri_depth = depth;
- ri->ri_stride = stride;
- ri->ri_bits = bus_space_vaddr(bst, bsh);
- ri->ri_flg = RI_CENTER | RI_FULLCLEAR | RI_CLEAR;
- rasops_init(ri, ri->ri_height / 8, ri->ri_width / 8);
- ri->ri_caps = WSSCREEN_WSCOLORS;
- rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight,
- ri->ri_width / ri->ri_font->fontwidth);
-
- acpi_platform_stdscreen.nrows = ri->ri_rows;
- acpi_platform_stdscreen.ncols = ri->ri_cols;
- acpi_platform_stdscreen.textops = &ri->ri_ops;
- acpi_platform_stdscreen.capabilities = ri->ri_caps;
-
- ri->ri_ops.allocattr(ri, 0, 0, 0, &defattr);
-
- wsdisplay_preattach(&acpi_platform_stdscreen, ri, 0, 0, defattr);
-}
-#endif
-
static void
acpi_platform_startup(void)
{
@@ -309,13 +204,6 @@ acpi_platform_startup(void)
}
/*
- * Setup framebuffer console, if present.
- */
-#if NWSDISPLAY > 0
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src Committed By: martin Date: Sun Sep 22 12:42:12 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: gicv3_acpi.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #227): sys/arch/arm/acpi/gicv3_acpi.c: revision 1.4 Redistributors with virtual LPI support have larger register spaces. Take this into consideration when scanning LPI regions. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.8.1 src/sys/arch/arm/acpi/gicv3_acpi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/acpi/gicv3_acpi.c diff -u src/sys/arch/arm/acpi/gicv3_acpi.c:1.3 src/sys/arch/arm/acpi/gicv3_acpi.c:1.3.8.1 --- src/sys/arch/arm/acpi/gicv3_acpi.c:1.3 Mon Nov 12 12:56:05 2018 +++ src/sys/arch/arm/acpi/gicv3_acpi.c Sun Sep 22 12:42:12 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: gicv3_acpi.c,v 1.3 2018/11/12 12:56:05 jmcneill Exp $ */ +/* $NetBSD: gicv3_acpi.c,v 1.3.8.1 2019/09/22 12:42:12 martin Exp $ */ /*- * Copyright (c) 2018 The NetBSD Foundation, Inc. @@ -34,7 +34,7 @@ #define _INTR_PRIVATE #include -__KERNEL_RCSID(0, "$NetBSD: gicv3_acpi.c,v 1.3 2018/11/12 12:56:05 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: gicv3_acpi.c,v 1.3.8.1 2019/09/22 12:42:12 martin Exp $"); #include #include @@ -200,6 +200,10 @@ gicv3_acpi_map_gicr(ACPI_SUBTABLE_HEADER const uint32_t typer = bus_space_read_4(sc->sc_gic.sc_bst, sc->sc_gic.sc_bsh_r[redist], GICR_TYPER); if (typer & GICR_TYPER_Last) break; + + /* If the redistributor supports virtual LPIs, skip the VLPI register region */ + if (typer & GICR_TYPER_VLPIS) + off += GICR_SIZE; } return AE_OK;
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src Committed By: martin Date: Sun Sep 22 12:42:12 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: gicv3_acpi.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #227): sys/arch/arm/acpi/gicv3_acpi.c: revision 1.4 Redistributors with virtual LPI support have larger register spaces. Take this into consideration when scanning LPI regions. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.8.1 src/sys/arch/arm/acpi/gicv3_acpi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/cortex
Module Name:src Committed By: martin Date: Sun Sep 22 12:30:15 UTC 2019 Modified Files: src/sys/arch/arm/cortex [netbsd-9]: gicv3.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #222): sys/arch/arm/cortex/gicv3.c: revision 1.21 - Use pic_do_pending_ints in intr handler - Sprinkle isb - Fix PMR bits detection on eMAG, from OpenBSD To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.20.2.1 src/sys/arch/arm/cortex/gicv3.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/cortex
Module Name:src
Committed By: martin
Date: Sun Sep 22 12:30:15 UTC 2019
Modified Files:
src/sys/arch/arm/cortex [netbsd-9]: gicv3.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #222):
sys/arch/arm/cortex/gicv3.c: revision 1.21
- Use pic_do_pending_ints in intr handler
- Sprinkle isb
- Fix PMR bits detection on eMAG, from OpenBSD
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.20.2.1 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.20 src/sys/arch/arm/cortex/gicv3.c:1.20.2.1
--- src/sys/arch/arm/cortex/gicv3.c:1.20 Sun Jun 30 11:11:38 2019
+++ src/sys/arch/arm/cortex/gicv3.c Sun Sep 22 12:30:15 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.20 2019/06/30 11:11:38 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.20.2.1 2019/09/22 12:30:15 martin Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.20 2019/06/30 11:11:38 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.20.2.1 2019/09/22 12:30:15 martin Exp $");
#include
#include
@@ -213,6 +213,7 @@ gicv3_set_priority(struct pic_softc *pic
struct gicv3_softc * const sc = PICTOSOFTC(pic);
icc_pmr_write(IPL_TO_PMR(sc, ipl));
+ arm_isb();
}
static void
@@ -437,14 +438,17 @@ gicv3_ipi_send(struct pic_softc *pic, co
if ((ci->ci_gic_sgir & ICC_SGIR_EL1_Aff) != aff) {
if (targets != 0) {
icc_sgi1r_write(intid | aff | targets);
+ arm_isb();
targets = 0;
}
aff = (ci->ci_gic_sgir & ICC_SGIR_EL1_Aff);
}
targets |= (ci->ci_gic_sgir & ICC_SGIR_EL1_TargetList);
}
- if (targets != 0)
+ if (targets != 0) {
icc_sgi1r_write(intid | aff | targets);
+ arm_isb();
+ }
}
}
@@ -715,6 +719,7 @@ gicv3_irq_handler(void *frame)
for (;;) {
const uint32_t iar = icc_iar1_read();
+ arm_dsb();
const uint32_t irq = __SHIFTOUT(iar, ICC_IAR_INTID);
if (irq == ICC_IAR_INTID_SPURIOUS)
break;
@@ -726,26 +731,39 @@ gicv3_irq_handler(void *frame)
struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase];
KASSERT(is != NULL);
+ const bool early_eoi = irq < GIC_LPI_BASE && is->is_type == IST_EDGE;
+
const int ipl = is->is_ipl;
- if (ci->ci_cpl < ipl)
- pic_set_priority(ci, ipl);
+ if (__predict_false(ipl < ci->ci_cpl)) {
+ pic_do_pending_ints(I32_bit, ipl, frame);
+ } else {
+ gicv3_set_priority(pic, ipl);
+ ci->ci_cpl = ipl;
+ }
+
+ if (early_eoi) {
+ icc_eoi1r_write(iar);
+ arm_isb();
+ }
cpsie(I32_bit);
pic_dispatch(is, frame);
cpsid(I32_bit);
- icc_eoi1r_write(iar);
+ if (!early_eoi) {
+ icc_eoi1r_write(iar);
+ arm_isb();
+ }
}
- if (ci->ci_cpl != oldipl)
- pic_set_priority(ci, oldipl);
+ pic_do_pending_ints(I32_bit, oldipl, frame);
}
static int
gicv3_detect_pmr_bits(struct gicv3_softc *sc)
{
const uint32_t opmr = icc_pmr_read();
- icc_pmr_write(0xff);
+ icc_pmr_write(0xbf);
const uint32_t npmr = icc_pmr_read();
icc_pmr_write(opmr);
CVS commit: [netbsd-9] src/sys/arch/arm/amlogic
Module Name:src Committed By: martin Date: Sun Sep 22 12:25:26 UTC 2019 Modified Files: src/sys/arch/arm/amlogic [netbsd-9]: meson8b_clkc.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #220): sys/arch/arm/amlogic/meson8b_clkc.c: revision 1.5 Use correct register for mpll2_div clock To generate a diff of this commit: cvs rdiff -u -r1.3.6.1 -r1.3.6.2 src/sys/arch/arm/amlogic/meson8b_clkc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/amlogic/meson8b_clkc.c diff -u src/sys/arch/arm/amlogic/meson8b_clkc.c:1.3.6.1 src/sys/arch/arm/amlogic/meson8b_clkc.c:1.3.6.2 --- src/sys/arch/arm/amlogic/meson8b_clkc.c:1.3.6.1 Thu Aug 15 09:49:49 2019 +++ src/sys/arch/arm/amlogic/meson8b_clkc.c Sun Sep 22 12:25:25 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: meson8b_clkc.c,v 1.3.6.1 2019/08/15 09:49:49 martin Exp $ */ +/* $NetBSD: meson8b_clkc.c,v 1.3.6.2 2019/09/22 12:25:25 martin Exp $ */ /*- * Copyright (c) 2019 Jared McNeill @@ -28,7 +28,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.3.6.1 2019/08/15 09:49:49 martin Exp $"); +__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.3.6.2 2019/09/22 12:25:25 martin Exp $"); #include #include @@ -268,9 +268,9 @@ static struct meson_clk_clk meson8b_clkc MESON_CLK_PLL_REG_INVALID,/* ssen */ 0), MESON_CLK_MPLL(MESON8B_CLOCK_MPLL2_DIV, "mpll2_div", "mpll_prediv", - MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(13,0)), /* sdm */ - MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BIT(15)), /* sdm_enable */ - MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(24,16)), /* n2 */ + MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BITS(13,0)), /* sdm */ + MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BIT(15)), /* sdm_enable */ + MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BITS(24,16)), /* n2 */ MESON_CLK_PLL_REG_INVALID,/* ssen */ 0),
CVS commit: [netbsd-9] src/sys/arch/arm/amlogic
Module Name:src Committed By: martin Date: Sun Sep 22 12:25:26 UTC 2019 Modified Files: src/sys/arch/arm/amlogic [netbsd-9]: meson8b_clkc.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #220): sys/arch/arm/amlogic/meson8b_clkc.c: revision 1.5 Use correct register for mpll2_div clock To generate a diff of this commit: cvs rdiff -u -r1.3.6.1 -r1.3.6.2 src/sys/arch/arm/amlogic/meson8b_clkc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src Committed By: martin Date: Fri Sep 6 19:54:23 UTC 2019 Modified Files: src/sys/arch/arm/sunxi [netbsd-9]: sunxi_mmc.c Log Message: Pull up following revision(s) (requested by bouyer in ticket #187): sys/arch/arm/sunxi/sunxi_mmc.c: revision 1.37 The mmc module clock needs to be doubled only for 8bits DDR mode on old timing hardware. This makes the lime2-eemc works in 4bits DDR52 mode. To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.33.2.1 src/sys/arch/arm/sunxi/sunxi_mmc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src
Committed By: martin
Date: Fri Sep 6 19:54:23 UTC 2019
Modified Files:
src/sys/arch/arm/sunxi [netbsd-9]: sunxi_mmc.c
Log Message:
Pull up following revision(s) (requested by bouyer in ticket #187):
sys/arch/arm/sunxi/sunxi_mmc.c: revision 1.37
The mmc module clock needs to be doubled only for 8bits DDR mode on old
timing hardware.
This makes the lime2-eemc works in 4bits DDR52 mode.
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.33.2.1 src/sys/arch/arm/sunxi/sunxi_mmc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_mmc.c
diff -u src/sys/arch/arm/sunxi/sunxi_mmc.c:1.33 src/sys/arch/arm/sunxi/sunxi_mmc.c:1.33.2.1
--- src/sys/arch/arm/sunxi/sunxi_mmc.c:1.33 Mon May 27 23:27:01 2019
+++ src/sys/arch/arm/sunxi/sunxi_mmc.c Fri Sep 6 19:54:23 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_mmc.c,v 1.33 2019/05/27 23:27:01 jmcneill Exp $ */
+/* $NetBSD: sunxi_mmc.c,v 1.33.2.1 2019/09/06 19:54:23 martin Exp $ */
/*-
* Copyright (c) 2014-2017 Jared McNeill
@@ -29,7 +29,7 @@
#include "opt_sunximmc.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: sunxi_mmc.c,v 1.33 2019/05/27 23:27:01 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_mmc.c,v 1.33.2.1 2019/09/06 19:54:23 martin Exp $");
#include
#include
@@ -480,7 +480,7 @@ free:
}
static int
-sunxi_mmc_set_clock(struct sunxi_mmc_softc *sc, u_int freq, bool ddr)
+sunxi_mmc_set_clock(struct sunxi_mmc_softc *sc, u_int freq, bool ddr, bool dbl)
{
const struct sunxi_mmc_delay *delays;
int error, timing = SUNXI_MMC_TIMING_400K;
@@ -506,7 +506,7 @@ sunxi_mmc_set_clock(struct sunxi_mmc_sof
return EINVAL;
}
- error = clk_set_rate(sc->sc_clk_mmc, (freq * 1000) << ddr);
+ error = clk_set_rate(sc->sc_clk_mmc, (freq * 1000) << dbl);
if (error != 0)
return error;
@@ -554,7 +554,7 @@ sunxi_mmc_attach_i(device_t self)
sunxi_mmc_host_reset(sc);
sunxi_mmc_bus_width(sc, 1);
- sunxi_mmc_set_clock(sc, 400, false);
+ sunxi_mmc_set_clock(sc, 400, false, false);
if (sc->sc_pwrseq)
fdtbus_mmc_pwrseq_post_power_on(sc->sc_pwrseq);
@@ -815,6 +815,7 @@ sunxi_mmc_bus_clock(sdmmc_chipset_handle
struct sunxi_mmc_softc *sc = sch;
uint32_t clkcr, gctrl, ntsr;
const u_int flags = sc->sc_config->flags;
+ bool dbl = 0;
clkcr = MMC_READ(sc, SUNXI_MMC_CLKCR);
if (clkcr & SUNXI_MMC_CLKCR_CARDCLKON) {
@@ -832,9 +833,15 @@ sunxi_mmc_bus_clock(sdmmc_chipset_handle
}
if (freq) {
+ /* For 8bits ddr in old timing modes, and all ddr in new
+ * timing modes, the module clock has to be 2x the card clock.
+ */
+ if (ddr && ((flags & SUNXI_MMC_FLAG_NEW_TIMINGS) ||
+ sc->sc_mmc_width == 8))
+ dbl = 1;
clkcr &= ~SUNXI_MMC_CLKCR_DIV;
- clkcr |= __SHIFTIN(ddr, SUNXI_MMC_CLKCR_DIV);
+ clkcr |= __SHIFTIN(dbl, SUNXI_MMC_CLKCR_DIV);
MMC_WRITE(sc, SUNXI_MMC_CLKCR, clkcr);
if (flags & SUNXI_MMC_FLAG_NEW_TIMINGS) {
@@ -856,7 +863,7 @@ sunxi_mmc_bus_clock(sdmmc_chipset_handle
gctrl &= ~SUNXI_MMC_GCTRL_DDR_MODE;
MMC_WRITE(sc, SUNXI_MMC_GCTRL, gctrl);
- if (sunxi_mmc_set_clock(sc, freq, ddr) != 0)
+ if (sunxi_mmc_set_clock(sc, freq, ddr, dbl) != 0)
return 1;
clkcr |= SUNXI_MMC_CLKCR_CARDCLKON;
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src Committed By: martin Date: Fri Sep 6 19:48:09 UTC 2019 Modified Files: src/sys/arch/arm/sunxi [netbsd-9]: sunxi_rtc.c Log Message: Pull up following revision(s) (requested by thorpej in ticket #185): sys/arch/arm/sunxi/sunxi_rtc.c: revision 1.5 Catch up with RTC-related DTS changes for the H3, H5, and A64 SoCs. mujo AT SDF.ORG, and verified on Pinebook by Jun Ebihara. XXX pullup-9 To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.4.4.1 src/sys/arch/arm/sunxi/sunxi_rtc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/sunxi
Module Name:src
Committed By: martin
Date: Fri Sep 6 19:48:09 UTC 2019
Modified Files:
src/sys/arch/arm/sunxi [netbsd-9]: sunxi_rtc.c
Log Message:
Pull up following revision(s) (requested by thorpej in ticket #185):
sys/arch/arm/sunxi/sunxi_rtc.c: revision 1.5
Catch up with RTC-related DTS changes for the H3, H5, and A64 SoCs.
mujo AT SDF.ORG, and verified on Pinebook by Jun Ebihara.
XXX pullup-9
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.4.4.1 src/sys/arch/arm/sunxi/sunxi_rtc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_rtc.c
diff -u src/sys/arch/arm/sunxi/sunxi_rtc.c:1.4 src/sys/arch/arm/sunxi/sunxi_rtc.c:1.4.4.1
--- src/sys/arch/arm/sunxi/sunxi_rtc.c:1.4 Mon Jul 16 23:11:47 2018
+++ src/sys/arch/arm/sunxi/sunxi_rtc.c Fri Sep 6 19:48:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_rtc.c,v 1.4 2018/07/16 23:11:47 christos Exp $ */
+/* $NetBSD: sunxi_rtc.c,v 1.4.4.1 2019/09/06 19:48:09 martin Exp $ */
/*-
* Copyright (c) 2014-2017 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,v 1.4 2018/07/16 23:11:47 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,v 1.4.4.1 2019/09/06 19:48:09 martin Exp $");
#include
#include
@@ -130,6 +130,8 @@ static const struct of_compat_data compa
{ "allwinner,sun4i-a10-rtc", (uintptr_t)&sun4i_rtc_config },
{ "allwinner,sun6i-a31-rtc", (uintptr_t)&sun6i_rtc_config },
{ "allwinner,sun7i-a20-rtc", (uintptr_t)&sun7i_rtc_config },
+ { "allwinner,sun8i-h3-rtc", (uintptr_t)&sun6i_rtc_config },
+ { "allwinner,sun50i-h5-rtc", (uintptr_t)&sun6i_rtc_config },
{ NULL }
};
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src Committed By: martin Date: Mon Aug 12 17:32:09 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: acpi_machdep.c Log Message: Pull up following revision(s) (requested by skrll in ticket #48): sys/arch/arm/acpi/acpi_machdep.c: revision 1.9 sys/arch/arm/acpi/acpi_machdep.c: revision 1.10 Correct the test for writeable memory. There aren't any users of this at this point. Use same style test as acpi_md_OsWritable To generate a diff of this commit: cvs rdiff -u -r1.6.6.1 -r1.6.6.2 src/sys/arch/arm/acpi/acpi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src
Committed By: martin
Date: Mon Aug 12 17:32:09 UTC 2019
Modified Files:
src/sys/arch/arm/acpi [netbsd-9]: acpi_machdep.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #48):
sys/arch/arm/acpi/acpi_machdep.c: revision 1.9
sys/arch/arm/acpi/acpi_machdep.c: revision 1.10
Correct the test for writeable memory. There aren't any users of this at
this point.
Use same style test as acpi_md_OsWritable
To generate a diff of this commit:
cvs rdiff -u -r1.6.6.1 -r1.6.6.2 src/sys/arch/arm/acpi/acpi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_machdep.c
diff -u src/sys/arch/arm/acpi/acpi_machdep.c:1.6.6.1 src/sys/arch/arm/acpi/acpi_machdep.c:1.6.6.2
--- src/sys/arch/arm/acpi/acpi_machdep.c:1.6.6.1 Sun Aug 4 11:37:56 2019
+++ src/sys/arch/arm/acpi/acpi_machdep.c Mon Aug 12 17:32:09 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.6.6.1 2019/08/04 11:37:56 martin Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.6.6.2 2019/08/12 17:32:09 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "pci.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.6.6.1 2019/08/04 11:37:56 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.6.6.2 2019/08/12 17:32:09 martin Exp $");
#include
#include
@@ -210,7 +210,7 @@ acpi_md_OsReadable(void *va, UINT32 len)
for (; sva < eva; sva += PAGE_SIZE) {
pte = kvtopte(sva);
- if ((*pte & (LX_BLKPAG_AF|LX_BLKPAG_AP_RO)) != (LX_BLKPAG_AF|LX_BLKPAG_AP_RO))
+ if ((*pte & (LX_BLKPAG_AF|LX_BLKPAG_AP)) != (LX_BLKPAG_AF|LX_BLKPAG_AP_RO))
return FALSE;
}
@@ -231,7 +231,7 @@ acpi_md_OsWritable(void *va, UINT32 len)
for (; sva < eva; sva += PAGE_SIZE) {
pte = kvtopte(sva);
- if ((*pte & (LX_BLKPAG_AF|LX_BLKPAG_AP_RW)) != (LX_BLKPAG_AF|LX_BLKPAG_AP_RW))
+ if ((*pte & (LX_BLKPAG_AF|LX_BLKPAG_AP)) != (LX_BLKPAG_AF|LX_BLKPAG_AP_RW))
return FALSE;
}
CVS commit: [netbsd-9] src/sys/arch/arm/pci
Module Name:src
Committed By: martin
Date: Sun Aug 4 19:25:48 UTC 2019
Modified Files:
src/sys/arch/arm/pci [netbsd-9]: pci_msi_machdep.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #18):
sys/arch/arm/pci/pci_msi_machdep.c: revision 1.7
Properly honour max_type arg to pci_intr_alloc
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/pci/pci_msi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pci/pci_msi_machdep.c
diff -u src/sys/arch/arm/pci/pci_msi_machdep.c:1.6 src/sys/arch/arm/pci/pci_msi_machdep.c:1.6.2.1
--- src/sys/arch/arm/pci/pci_msi_machdep.c:1.6 Thu Jul 25 00:42:43 2019
+++ src/sys/arch/arm/pci/pci_msi_machdep.c Sun Aug 4 19:25:48 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_msi_machdep.c,v 1.6 2019/07/25 00:42:43 jmcneill Exp $ */
+/* $NetBSD: pci_msi_machdep.c,v 1.6.2.1 2019/08/04 19:25:48 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_msi_machdep.c,v 1.6 2019/07/25 00:42:43 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_msi_machdep.c,v 1.6.2.1 2019/08/04 19:25:48 martin Exp $");
#include
#include
@@ -186,11 +186,10 @@ pci_intr_alloc(const struct pci_attach_a
int intx_count, msi_count, msix_count, error;
error = EINVAL;
- intx_count = 1;
- msi_count = 1;
- msix_count = 1;
if (counts != NULL) {
+ intx_count = msi_count = msix_count = 0;
+
switch (max_type) {
case PCI_INTR_TYPE_MSIX:
msix_count = counts[PCI_INTR_TYPE_MSIX];
@@ -207,6 +206,8 @@ pci_intr_alloc(const struct pci_attach_a
return EINVAL;
}
memset(counts, 0, sizeof(*counts) * PCI_INTR_TYPE_SIZE);
+ } else {
+ intx_count = msi_count = msix_count = 1;
}
if (msix_count == -1)
CVS commit: [netbsd-9] src/sys/arch/arm/pci
Module Name:src Committed By: martin Date: Sun Aug 4 19:25:48 UTC 2019 Modified Files: src/sys/arch/arm/pci [netbsd-9]: pci_msi_machdep.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #18): sys/arch/arm/pci/pci_msi_machdep.c: revision 1.7 Properly honour max_type arg to pci_intr_alloc To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.6.2.1 src/sys/arch/arm/pci/pci_msi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src Committed By: martin Date: Sun Aug 4 19:24:18 UTC 2019 Modified Files: src/sys/arch/arm/acpi [netbsd-9]: acpi_platform.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #17): sys/arch/arm/acpi/acpi_platform.c: revision 1.16 Ignore AccessWidth (PL011 and SBSA console always needs 32-bit access) To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.15.2.1 src/sys/arch/arm/acpi/acpi_platform.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-9] src/sys/arch/arm/acpi
Module Name:src
Committed By: martin
Date: Sun Aug 4 19:24:18 UTC 2019
Modified Files:
src/sys/arch/arm/acpi [netbsd-9]: acpi_platform.c
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #17):
sys/arch/arm/acpi/acpi_platform.c: revision 1.16
Ignore AccessWidth (PL011 and SBSA console always needs 32-bit access)
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.15.2.1 src/sys/arch/arm/acpi/acpi_platform.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_platform.c
diff -u src/sys/arch/arm/acpi/acpi_platform.c:1.15 src/sys/arch/arm/acpi/acpi_platform.c:1.15.2.1
--- src/sys/arch/arm/acpi/acpi_platform.c:1.15 Wed Jul 24 19:37:52 2019
+++ src/sys/arch/arm/acpi/acpi_platform.c Sun Aug 4 19:24:18 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_platform.c,v 1.15 2019/07/24 19:37:52 jmcneill Exp $ */
+/* $NetBSD: acpi_platform.c,v 1.15.2.1 2019/08/04 19:24:18 martin Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.15 2019/07/24 19:37:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.15.2.1 2019/08/04 19:24:18 martin Exp $");
#include
#include
@@ -278,12 +278,7 @@ acpi_platform_startup(void)
plcom_console.pi_iot = &arm_generic_bs_tag;
plcom_console.pi_iobase = spcr->SerialPort.Address;
plcom_console.pi_size = PL011COM_UART_SIZE;
-if (spcr->InterfaceType == ACPI_DBG2_ARM_SBSA_32BIT) {
- plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
-} else {
- plcom_console.pi_flags = ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8 ?
- 0 : PLC_FLAG_32BIT_ACCESS;
-}
+plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1);
break;
