CVS commit: src/lib/libc/arch/arm/gen
Module Name:src
Committed By: skrll
Date: Mon May 6 06:57:32 UTC 2024
Modified Files:
src/lib/libc/arch/arm/gen: setjmp.S
Log Message:
arm longjmp: Restore stack first, then signal mask.
Otherwise, a pending signal may be delivered on the wrong stack when
we restore the signal mask.
While here:
- Move the botched sp and lr tests earlier.
PR lib/57946
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/lib/libc/arch/arm/gen/setjmp.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libc/arch/arm/gen/setjmp.S
diff -u src/lib/libc/arch/arm/gen/setjmp.S:1.18 src/lib/libc/arch/arm/gen/setjmp.S:1.19
--- src/lib/libc/arch/arm/gen/setjmp.S:1.18 Tue Dec 13 12:43:32 2022
+++ src/lib/libc/arch/arm/gen/setjmp.S Mon May 6 06:57:32 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: setjmp.S,v 1.18 2022/12/13 12:43:32 skrll Exp $ */
+/* $NetBSD: setjmp.S,v 1.19 2024/05/06 06:57:32 skrll Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe
@@ -142,6 +142,25 @@ ENTRY(__longjmp14)
cmp r3, ip
bne .Lbotch
+ /* Validate sp and lr */
+ ldr r2, [r0, #(_JB_REG_R13 * 4)]
+#if defined(__thumb__) && defined(_ARM_ARCH_T2)
+ cbz r2, .Lbotch
+#else
+ cmp r2, #0
+ beq .Lbotch
+#endif
+
+ ldr r3, [r0, #(_JB_REG_R14 * 4)]
+#if defined(__thumb__) && defined(_ARM_ARCH_T2)
+ cbz r3, .Lbotch
+#else
+ cmp r3, #0
+ beq .Lbotch
+#endif
+ mov sp, r2
+ mov lr, r3
+
/* Restore the signal mask. */
push {r0-r2, lr}
movs r2, #0
@@ -186,25 +205,6 @@ ENTRY(__longjmp14)
adds r0, r0, #4 /* skip ip(r12) */
#endif
- ldmia r0!, {r2-r3}
-
- /* Validate sp and lr */
-#if defined(__thumb__) && defined(_ARM_ARCH_T2)
- cbz r2, .Lbotch
-#else
- cmp r2, #0
- beq .Lbotch
-#endif
- mov sp, r2
-
-#if defined(__thumb__) && defined(_ARM_ARCH_T2)
- cbz r3, .Lbotch
-#else
- cmp r3, #0
- beq .Lbotch
-#endif
- mov lr, r3
-
/* Set return value */
movs r0, r1
#if !defined(__thumb__)
CVS commit: src/lib/libc/arch/arm/gen
Module Name:src Committed By: skrll Date: Mon May 6 06:57:32 UTC 2024 Modified Files: src/lib/libc/arch/arm/gen: setjmp.S Log Message: arm longjmp: Restore stack first, then signal mask. Otherwise, a pending signal may be delivered on the wrong stack when we restore the signal mask. While here: - Move the botched sp and lr tests earlier. PR lib/57946 To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/lib/libc/arch/arm/gen/setjmp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/lib/libc/arch/arm/gen
Module Name:src Committed By: skrll Date: Tue Dec 13 12:43:32 UTC 2022 Modified Files: src/lib/libc/arch/arm/gen: setjmp.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/lib/libc/arch/arm/gen/setjmp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/lib/libc/arch/arm/gen/setjmp.S diff -u src/lib/libc/arch/arm/gen/setjmp.S:1.17 src/lib/libc/arch/arm/gen/setjmp.S:1.18 --- src/lib/libc/arch/arm/gen/setjmp.S:1.17 Sat Nov 30 20:20:42 2013 +++ src/lib/libc/arch/arm/gen/setjmp.S Tue Dec 13 12:43:32 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: setjmp.S,v 1.17 2013/11/30 20:20:42 joerg Exp $ */ +/* $NetBSD: setjmp.S,v 1.18 2022/12/13 12:43:32 skrll Exp $ */ /* * Copyright (c) 1997 Mark Brinicombe @@ -136,7 +136,7 @@ ENTRY(__longjmp14) mov ip, r3 ldr r3, [r0] movs r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP) - bics r3, r2 + bics r3, r2 /* r2 is not the magic but we don't need it since we can't do VFP */ #endif cmp r3, ip
CVS commit: src/lib/libc/arch/arm/gen
Module Name:src Committed By: skrll Date: Tue Dec 13 12:43:32 UTC 2022 Modified Files: src/lib/libc/arch/arm/gen: setjmp.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/lib/libc/arch/arm/gen/setjmp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/lib/libc/arch/arm
Module Name:src Committed By: thorpej Date: Tue Nov 23 18:45:53 UTC 2021 Modified Files: src/lib/libc/arch/arm: genassym.cf src/lib/libc/arch/arm/sys: __sigtramp2.S Log Message: Decorate the ARM signal trampoline with the appropriate .cfi directives to allow exception unwind / backtrace across a signal handler. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/arm/genassym.cf cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/arm/sys/__sigtramp2.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/lib/libc/arch/arm
Module Name:src Committed By: thorpej Date: Tue Nov 23 18:45:53 UTC 2021 Modified Files: src/lib/libc/arch/arm: genassym.cf src/lib/libc/arch/arm/sys: __sigtramp2.S Log Message: Decorate the ARM signal trampoline with the appropriate .cfi directives to allow exception unwind / backtrace across a signal handler. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/arm/genassym.cf cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/arm/sys/__sigtramp2.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/lib/libc/arch/arm/genassym.cf diff -u src/lib/libc/arch/arm/genassym.cf:1.3 src/lib/libc/arch/arm/genassym.cf:1.4 --- src/lib/libc/arch/arm/genassym.cf:1.3 Sat Oct 24 07:03:11 2020 +++ src/lib/libc/arch/arm/genassym.cf Tue Nov 23 18:45:53 2021 @@ -1,4 +1,4 @@ -# $NetBSD: genassym.cf,v 1.3 2020/10/24 07:03:11 skrll Exp $ +# $NetBSD: genassym.cf,v 1.4 2021/11/23 18:45:53 thorpej Exp $ # # Copyright (c) 2012 The NetBSD Foundation, Inc. @@ -30,21 +30,30 @@ # include +include include +define _UC_GREGS offsetof(ucontext_t, uc_mcontext.__gregs[0]) define _UC_REGS_R0 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R0]) -define _UC_REGS_R1 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R1]) -define _UC_REGS_R2 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R2]) -define _UC_REGS_R3 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R3]) -define _UC_REGS_R4 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R4]) -define _UC_REGS_R5 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R5]) -define _UC_REGS_R6 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R6]) -define _UC_REGS_R7 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R7]) -define _UC_REGS_R8 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R8]) -define _UC_REGS_R9 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R9]) -define _UC_REGS_R10 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R10]) -define _UC_REGS_R11 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R11]) -define _UC_REGS_R12 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_R12]) define _UC_REGS_SP offsetof(ucontext_t, uc_mcontext.__gregs[_REG_SP]) -define _UC_REGS_LR offsetof(ucontext_t, uc_mcontext.__gregs[_REG_LR]) define _UC_REGS_PC offsetof(ucontext_t, uc_mcontext.__gregs[_REG_PC]) + +define SIZEOF_SIGINFO sizeof(siginfo_t) + +define _REG_R0 _REG_R0 +define _REG_R1 _REG_R1 +define _REG_R2 _REG_R2 +define _REG_R3 _REG_R3 +define _REG_R4 _REG_R4 +define _REG_R5 _REG_R5 +define _REG_R6 _REG_R6 +define _REG_R7 _REG_R7 +define _REG_R8 _REG_R8 +define _REG_R9 _REG_R9 +define _REG_R10 _REG_R10 +define _REG_R11 _REG_R11 +define _REG_R12 _REG_R12 +define _REG_R13 _REG_R13 +define _REG_R14 _REG_R14 +define _REG_R15 _REG_R15 +define _REG_SP _REG_SP Index: src/lib/libc/arch/arm/sys/__sigtramp2.S diff -u src/lib/libc/arch/arm/sys/__sigtramp2.S:1.3 src/lib/libc/arch/arm/sys/__sigtramp2.S:1.4 --- src/lib/libc/arch/arm/sys/__sigtramp2.S:1.3 Fri Aug 16 23:20:59 2013 +++ src/lib/libc/arch/arm/sys/__sigtramp2.S Tue Nov 23 18:45:53 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: __sigtramp2.S,v 1.3 2013/08/16 23:20:59 matt Exp $ */ +/* $NetBSD: __sigtramp2.S,v 1.4 2021/11/23 18:45:53 thorpej Exp $ */ /*- * Copyright (c) 2002 The NetBSD Foundation, Inc. @@ -30,6 +30,7 @@ */ #include "SYS.h" +#include "assym.h" /* * The ARM signal trampoline is invoked only to return from @@ -39,12 +40,46 @@ * * ucontext structure * sp-> siginfo structure - * and r5 points to the ucontext + * and r5 points to the ucontext */ + +#define CFI_OFFSET(r) .cfi_offset r, r * 4 + + _TEXT_SECTION + .cfi_startproc + .cfi_signal_frame + .cfi_def_cfa _REG_SP, SIZEOF_SIGINFO + _UC_GREGS + CFI_OFFSET(_REG_R0) + CFI_OFFSET(_REG_R1) + CFI_OFFSET(_REG_R2) + CFI_OFFSET(_REG_R3) + CFI_OFFSET(_REG_R4) + CFI_OFFSET(_REG_R5) + CFI_OFFSET(_REG_R6) + CFI_OFFSET(_REG_R7) + CFI_OFFSET(_REG_R8) + CFI_OFFSET(_REG_R9) + CFI_OFFSET(_REG_R10) + CFI_OFFSET(_REG_R11) + CFI_OFFSET(_REG_R12) + CFI_OFFSET(_REG_R13) /* a.k.a. _REG_SP */ + CFI_OFFSET(_REG_R14) /* a.k.a. _REG_LR */ + .cfi_return_column _REG_R15 + CFI_OFFSET(_REG_R15) /* a.k.a. _REG_PC */ + +/* + * The unwind entry includes the one instruction prior to the trampoline + * because the unwinder will look up (return PC - 1) while unwinding. + * Normally this would be the jump / branch, but since there isn't one in + * this case, we place an explicit nop there instead. + */ + nop + ENTRY_NP(__sigtramp_siginfo_2) mov r0, r5/* set the arg */ SYSTRAP(setcontext) /* and call setcontext */ /* If that failed, exit with the error code. */ SYSTRAP(exit) + .cfi_endproc END(__sigtramp_siginfo_2)
Re: CVS commit: src/lib/libc/arch/arm
Oops, this is broken. I will fix shortly... rin On 2021/06/30 8:29, Rin Okuyama wrote: Module Name:src Committed By: rin Date: Tue Jun 29 23:29:12 UTC 2021 Modified Files: src/lib/libc/arch/arm/gen: swapcontext.S src/lib/libc/arch/arm/sys: __clone.S Log Message: Align sp to 8-byte boundary as required by EABI. IIUC, this change only affects libc compiled for ``Thumb-mode userland'', which we've not officially supported yet. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/lib/libc/arch/arm/gen/swapcontext.S cvs rdiff -u -r1.9 -r1.10 src/lib/libc/arch/arm/sys/__clone.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Re: CVS commit: src/lib/libc/arch/arm/softfloat
"Matt Thomas" writes: > Module Name: src > Committed By: matt > Date: Sat Jan 26 07:08:14 UTC 2013 > > Modified Files: > src/lib/libc/arch/arm/softfloat: arm-gcc.h > > Log Message: > Appease clang by making 64-bit literals use ULL > > > To generate a diff of this commit: > cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/arm/softfloat/arm-gcc.h > > Please note that diffs are not public domain; they are subject to the > copyright notices on the relevant files. > > > Modified files: > > > Index: src/lib/libc/arch/arm/softfloat/arm-gcc.h > diff -u src/lib/libc/arch/arm/softfloat/arm-gcc.h:1.3 > src/lib/libc/arch/arm/softfloat/arm-gcc.h:1.4 > --- src/lib/libc/arch/arm/softfloat/arm-gcc.h:1.3 Sat Dec 24 21:11:16 2005 > +++ src/lib/libc/arch/arm/softfloat/arm-gcc.h Sat Jan 26 07:08:14 2013 > @@ -1,4 +1,4 @@ > -/* $NetBSD: arm-gcc.h,v 1.3 2005/12/24 21:11:16 perry Exp $ */ > +/* $NetBSD: arm-gcc.h,v 1.4 2013/01/26 07:08:14 matt Exp $ */ > > /* > > --- > @@ -71,7 +71,7 @@ name for the 64-bit integer type. Some > defined as the identity macro: `#define LIT64( a ) a'. > > --- > */ > -#define LIT64( a ) a##LL > +#define LIT64( a ) a##ULL > #endif That's a bit strange. Don't we have UINT64_C for this? Or is too early for UINT64_C to be defined? -- HE CE3OH...
Re: CVS commit: src/lib/libc/arch/arm/gen
On Thu, Jul 12, 2012 at 22:08:19 +0200, Reinoud Zandijk wrote: > On Wed, Jul 11, 2012 at 11:08:46PM +0400, Valeriy E. Ushakov wrote: > > > Log Message: > > > On the libc/libgcc clashes cleanup that removed divsi3.o from libc, > > > ARM/evbarm > > > was forgotten. This patch fixes it making static binaries possible again! > > > > Please, complete this by moving the .S file out of common into libkern. > > IIRC the file was never there; it was reaching over already to common. Right, but now the file is no longer "common", so it should be under libkern, where it's used. E.g. http://mail-index.netbsd.org/source-changes/2006/04/22/0047.html -uwe
Re: CVS commit: src/lib/libc/arch/arm/gen
Hi Veleriy, On Wed, Jul 11, 2012 at 11:08:46PM +0400, Valeriy E. Ushakov wrote: > > Log Message: > > On the libc/libgcc clashes cleanup that removed divsi3.o from libc, > > ARM/evbarm > > was forgotten. This patch fixes it making static binaries possible again! > > Please, complete this by moving the .S file out of common into libkern. IIRC the file was never there; it was reaching over already to common. With regards, Reinoud
Re: CVS commit: src/lib/libc/arch/arm/gen
On Wed, Jul 11, 2012 at 18:24:27 +, Reinoud Zandijk wrote: > Module Name: src > Committed By: reinoud > Date: Wed Jul 11 18:24:27 UTC 2012 > > Modified Files: > src/lib/libc/arch/arm/gen: Makefile.inc > > Log Message: > On the libc/libgcc clashes cleanup that removed divsi3.o from libc, ARM/evbarm > was forgotten. This patch fixes it making static binaries possible again! Please, complete this by moving the .S file out of common into libkern. -uwe
Re: CVS commit: src/lib/libc/arch/arm/gen
David Young wrote: > On Wed, Mar 21, 2012 at 10:44:35AM +0100, Joerg Sonnenberger wrote: > > On Wed, Mar 21, 2012 at 09:05:36AM +, Hiroyuki Bessho wrote: > > > Module Name: src > > > Committed By: bsh > > > Date: Wed Mar 21 09:05:36 UTC 2012 > > > > > > Modified Files: > > > src/lib/libc/arch/arm/gen: _lwp.c > > > > > > Log Message: > > > shut up lint(1) > > > > So the question is still -- how much do we want to uglify our code? > > Joerg, please make a positive suggestion instead of sniping at > developers in this way. It is much more worth to invest time in: 1) having WARNS=4 for code where this is still (!) unused 2) better integration with different compilers 3) just looking for more advanced static analysers that lint in our tree. For example, Coverity was quite useful (unfortunately inactive these days). I am sure there are other good analysers, but the point being is that our lint(1) causes more churn and damage (due to reduced code readability, as well as build breakages) than benefit (if any, as recent gcc and llvm just seem to be superior in detecting all sorts of problems). In such context, NOLINT is quite positive suggestion. -- Mindaugas
Re: CVS commit: src/lib/libc/arch/arm/gen
On Wed, Mar 21, 2012 at 10:44:35AM +0100, Joerg Sonnenberger wrote: > On Wed, Mar 21, 2012 at 09:05:36AM +, Hiroyuki Bessho wrote: > > Module Name:src > > Committed By: bsh > > Date: Wed Mar 21 09:05:36 UTC 2012 > > > > Modified Files: > > src/lib/libc/arch/arm/gen: _lwp.c > > > > Log Message: > > shut up lint(1) > > So the question is still -- how much do we want to uglify our code? Joerg, please make a positive suggestion instead of sniping at developers in this way. Dave -- David Young dyo...@pobox.comUrbana, IL(217) 721-9981
Re: CVS commit: src/lib/libc/arch/arm/gen
On Wed, Mar 21, 2012 at 09:05:36AM +, Hiroyuki Bessho wrote: > Module Name: src > Committed By: bsh > Date: Wed Mar 21 09:05:36 UTC 2012 > > Modified Files: > src/lib/libc/arch/arm/gen: _lwp.c > > Log Message: > shut up lint(1) So the question is still -- how much do we want to uglify our code? Joerg
