CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sun Apr 14 12:51:17 UTC 2024
Modified Files:
src/sys/arch/aarch64/aarch64: cpu_machdep.c sig_machdep.c
Log Message:
kern/58149: aarch64: Cannot return from a signal handler if SP was misaligned
when the signal arrived
Apply the kernel diff from the PR
1. sendsig_siginfo() previously assumed that user SP was always aligned to
16 bytes and could call signal handlers with SP misaligned. This is a
wrong assumption because aarch64 demands that SP is aligned *only while*
it's being used to access memory. Now it properly aligns it before
pusing anything on the stack.
2. cpu_mcontext_validate() used to check if _REG_SP was aligned and
considered the ucontext invalid otherwise. This meant if a signal was
sent to a process whose SP was misaligned, the signal handler would fail
to return because the ucontext passed from the kernel was an invalid
one. Now setcontext(2) doesn't complain about misaligned SP.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/cpu_machdep.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/sig_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu_machdep.c
diff -u src/sys/arch/aarch64/aarch64/cpu_machdep.c:1.14 src/sys/arch/aarch64/aarch64/cpu_machdep.c:1.15
--- src/sys/arch/aarch64/aarch64/cpu_machdep.c:1.14 Sat Feb 25 00:40:22 2023
+++ src/sys/arch/aarch64/aarch64/cpu_machdep.c Sun Apr 14 12:51:16 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_machdep.c,v 1.14 2023/02/25 00:40:22 riastradh Exp $ */
+/* $NetBSD: cpu_machdep.c,v 1.15 2024/04/14 12:51:16 skrll Exp $ */
/*-
* Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu_machdep.c,v 1.14 2023/02/25 00:40:22 riastradh Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu_machdep.c,v 1.15 2024/04/14 12:51:16 skrll Exp $");
#include "opt_multiprocessor.h"
@@ -158,9 +158,13 @@ dosoftints(void)
int
cpu_mcontext_validate(struct lwp *l, const mcontext_t *mcp)
{
+ /*
+ * We intentionally don't verify that _REG_SP is aligned to
+ * 16-bytes boundaries because it can be legally misaligned as long
+ * as it's not used for accessing memory.
+ */
if ((mcp->__gregs[_REG_SPSR] & ~SPSR_NZCV)
- || (mcp->__gregs[_REG_PC] & 3)
- || (mcp->__gregs[_REG_SP] & 15))
+ || (mcp->__gregs[_REG_PC] & 3))
return EINVAL;
return 0;
Index: src/sys/arch/aarch64/aarch64/sig_machdep.c
diff -u src/sys/arch/aarch64/aarch64/sig_machdep.c:1.8 src/sys/arch/aarch64/aarch64/sig_machdep.c:1.9
--- src/sys/arch/aarch64/aarch64/sig_machdep.c:1.8 Mon Nov 1 05:07:15 2021
+++ src/sys/arch/aarch64/aarch64/sig_machdep.c Sun Apr 14 12:51:16 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: sig_machdep.c,v 1.8 2021/11/01 05:07:15 thorpej Exp $ */
+/* $NetBSD: sig_machdep.c,v 1.9 2024/04/14 12:51:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: sig_machdep.c,v 1.8 2021/11/01 05:07:15 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sig_machdep.c,v 1.9 2024/04/14 12:51:16 skrll Exp $");
#include
#include
@@ -58,8 +58,14 @@ sendsig_siginfo(const ksiginfo_t *ksi, c
vaddr_t sp;
- sp = onstack_p ? ((vaddr_t)ss->ss_sp + ss->ss_size) & -16 : tf->tf_sp;
+ /*
+ * The user stack isn't guaranteed to be aligned to 16 bytes. Align
+ * it before pushing anything onto it.
+ */
+ sp = onstack_p ? ((vaddr_t)ss->ss_sp + ss->ss_size) : tf->tf_sp;
+ sp &= -16;
+ __CTASSERT(sizeof(ucontext_t) % 16 == 0);
sp -= sizeof(ucontext_t);
const vaddr_t ucp = sp;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Apr 14 12:51:17 UTC 2024 Modified Files: src/sys/arch/aarch64/aarch64: cpu_machdep.c sig_machdep.c Log Message: kern/58149: aarch64: Cannot return from a signal handler if SP was misaligned when the signal arrived Apply the kernel diff from the PR 1. sendsig_siginfo() previously assumed that user SP was always aligned to 16 bytes and could call signal handlers with SP misaligned. This is a wrong assumption because aarch64 demands that SP is aligned *only while* it's being used to access memory. Now it properly aligns it before pusing anything on the stack. 2. cpu_mcontext_validate() used to check if _REG_SP was aligned and considered the ucontext invalid otherwise. This meant if a signal was sent to a process whose SP was misaligned, the signal handler would fail to return because the ucontext passed from the kernel was an invalid one. Now setcontext(2) doesn't complain about misaligned SP. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/cpu_machdep.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/sig_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: andvar
Date: Fri Feb 16 21:32:17 UTC 2024
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
Replace obsolete pv_dump() call with pmap_db_mdpg_print().
It was rewritten on rev 1.107, but not replaced with new implementation in
PMAP_PV_DEBUG guarded block.
To generate a diff of this commit:
cvs rdiff -u -r1.150 -r1.151 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.150 src/sys/arch/aarch64/aarch64/pmap.c:1.151
--- src/sys/arch/aarch64/aarch64/pmap.c:1.150 Wed Feb 7 04:20:26 2024
+++ src/sys/arch/aarch64/aarch64/pmap.c Fri Feb 16 21:32:17 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.150 2024/02/07 04:20:26 msaitoh Exp $ */
+/* $NetBSD: pmap.c,v 1.151 2024/02/16 21:32:17 andvar Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.150 2024/02/07 04:20:26 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.151 2024/02/16 21:32:17 andvar Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -1192,7 +1192,7 @@ _pmap_enter_pv(struct pmap_page *pp, str
#ifdef PMAP_PV_DEBUG
printf("pv %p alias added va=%016lx -> pa=%016lx\n", pv, va, pa);
- pv_dump(pp, printf);
+ pmap_db_mdpg_print(PHYS_TO_VM_PAGE(pa), printf);
#endif
return 0;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: andvar Date: Fri Feb 16 21:32:17 UTC 2024 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Replace obsolete pv_dump() call with pmap_db_mdpg_print(). It was rewritten on rev 1.107, but not replaced with new implementation in PMAP_PV_DEBUG guarded block. To generate a diff of this commit: cvs rdiff -u -r1.150 -r1.151 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: andvar Date: Fri Feb 16 17:18:19 UTC 2024 Modified Files: src/sys/arch/aarch64/aarch64: kobj_machdep.c Log Message: Fix closing bracket for strdisasm() function. Fixes KOBJ_MACHDEP_DEBUG enabled build for aarch64. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/kobj_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: andvar Date: Fri Feb 16 17:18:19 UTC 2024 Modified Files: src/sys/arch/aarch64/aarch64: kobj_machdep.c Log Message: Fix closing bracket for strdisasm() function. Fixes KOBJ_MACHDEP_DEBUG enabled build for aarch64. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/kobj_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/kobj_machdep.c diff -u src/sys/arch/aarch64/aarch64/kobj_machdep.c:1.8 src/sys/arch/aarch64/aarch64/kobj_machdep.c:1.9 --- src/sys/arch/aarch64/aarch64/kobj_machdep.c:1.8 Wed Feb 7 04:20:26 2024 +++ src/sys/arch/aarch64/aarch64/kobj_machdep.c Fri Feb 16 17:18:19 2024 @@ -1,4 +1,4 @@ -/* $NetBSD: kobj_machdep.c,v 1.8 2024/02/07 04:20:26 msaitoh Exp $ */ +/* $NetBSD: kobj_machdep.c,v 1.9 2024/02/16 17:18:19 andvar Exp $ */ /* * Copyright (c) 2018 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.8 2024/02/07 04:20:26 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.9 2024/02/16 17:18:19 andvar Exp $"); #define ELFSIZE ARCH_ELFSIZE @@ -190,7 +190,7 @@ kobj_reloc(kobj_t ko, uintptr_t relocbas old = *where; #ifdef DDB snprintf(disasmbuf, sizeof(disasmbuf), "%08x %s", - le32toh(*insn), strdisasm((vaddr_t)insn), 0); + le32toh(*insn), strdisasm((vaddr_t)insn, 0)); #endif #endif /* KOBJ_MACHDEP_DEBUG */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Wed Aug 2 14:45:04 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: Relax the TLB invalidation from full to by va for writing to kernel text in db_write_text. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Wed Aug 2 14:45:04 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: Relax the TLB invalidation from full to by va for writing to kernel text in db_write_text. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/db_interface.c diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.22 src/sys/arch/aarch64/aarch64/db_interface.c:1.23 --- src/sys/arch/aarch64/aarch64/db_interface.c:1.22 Wed Nov 2 08:37:32 2022 +++ src/sys/arch/aarch64/aarch64/db_interface.c Wed Aug 2 14:45:04 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: db_interface.c,v 1.22 2022/11/02 08:37:32 skrll Exp $ */ +/* $NetBSD: db_interface.c,v 1.23 2023/08/02 14:45:04 skrll Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.22 2022/11/02 08:37:32 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.23 2023/08/02 14:45:04 skrll Exp $"); #include #include @@ -171,7 +171,8 @@ db_write_text(vaddr_t addr, size_t size, */ /* old pte is returned by pmap_kvattr */ pte = pmap_kvattr(ptep, VM_PROT_EXECUTE | VM_PROT_READ | VM_PROT_WRITE); - aarch64_tlbi_all(); + /* dsb(ishst) included in aarch64_tlbi_by_va */ + aarch64_tlbi_by_va(addr); s = size; if (size > PAGE_SIZE) @@ -182,7 +183,8 @@ db_write_text(vaddr_t addr, size_t size, /* restore pte */ *ptep = pte; - aarch64_tlbi_all(); + /* dsb(ishst) included in aarch64_tlbi_by_va */ + aarch64_tlbi_by_va(addr); addr += s; size -= s;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: riastradh
Date: Sun Jul 16 21:36:40 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c trap.c
Log Message:
aarch64: Omit needless xcfunc_t casts by using xcfunc_t correctly.
No functional change intended, except for avoiding possible undefined
behaviour that could have made demons come flying out your nose.
To generate a diff of this commit:
cvs rdiff -u -r1.69 -r1.70 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/aarch64/aarch64/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.69 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.70
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.69 Tue Apr 18 07:53:31 2023
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Sun Jul 16 21:36:40 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.69 2023/04/18 07:53:31 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.70 2023/07/16 21:36:40 riastradh Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.69 2023/04/18 07:53:31 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.70 2023/07/16 21:36:40 riastradh Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -454,18 +454,17 @@ initarm_common(vaddr_t kvm_base, vsize_t
/*
* machine dependent system variables.
*/
-static xcfunc_t
+static void
set_user_tagged_address(void *arg1, void *arg2)
{
uint64_t enable = PTRTOUINT64(arg1);
uint64_t tcr = reg_tcr_el1_read();
+
if (enable)
tcr |= TCR_TBI0;
else
tcr &= ~TCR_TBI0;
reg_tcr_el1_write(tcr);
-
- return 0;
}
static int
@@ -487,8 +486,8 @@ sysctl_machdep_tagged_address(SYSCTLFN_A
return EINVAL;
if (cur != val) {
- uint64_t where = xc_broadcast(0,
- (xcfunc_t)set_user_tagged_address, UINT64TOPTR(val), NULL);
+ uint64_t where = xc_broadcast(0, set_user_tagged_address,
+ UINT64TOPTR(val), NULL);
xc_wait(where);
}
Index: src/sys/arch/aarch64/aarch64/trap.c
diff -u src/sys/arch/aarch64/aarch64/trap.c:1.48 src/sys/arch/aarch64/aarch64/trap.c:1.49
--- src/sys/arch/aarch64/aarch64/trap.c:1.48 Sat Feb 25 00:40:22 2023
+++ src/sys/arch/aarch64/aarch64/trap.c Sun Jul 16 21:36:40 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.48 2023/02/25 00:40:22 riastradh Exp $ */
+/* $NetBSD: trap.c,v 1.49 2023/07/16 21:36:40 riastradh Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.48 2023/02/25 00:40:22 riastradh Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.49 2023/07/16 21:36:40 riastradh Exp $");
#include "opt_arm_intr_impl.h"
#include "opt_compat_netbsd32.h"
@@ -274,7 +274,7 @@ trap_el1h_sync(struct trapframe *tf)
(CTR_EL0_DIC | CTR_EL0_IDC | CTR_EL0_DMIN_LINE | CTR_EL0_IMIN_LINE)
uint64_t ctr_el0_usr __read_mostly;
-static xcfunc_t
+static void
configure_cpu_traps0(void *arg1, void *arg2)
{
struct cpu_info * const ci = curcpu();
@@ -307,7 +307,7 @@ configure_cpu_traps0(void *arg1, void *a
goto need_ctr_trap;
#endif
- return 0;
+ return;
need_ctr_trap:
evcnt_attach_dynamic(>ci_uct_trap, EVCNT_TYPE_MISC, NULL,
@@ -317,8 +317,6 @@ configure_cpu_traps0(void *arg1, void *a
sctlr = reg_sctlr_el1_read();
sctlr &= ~SCTLR_UCT;
reg_sctlr_el1_write(sctlr);
-
- return 0;
}
void
@@ -374,8 +372,7 @@ configure_cpu_traps(void)
}
}
- where = xc_broadcast(0,
- (xcfunc_t)configure_cpu_traps0, NULL, NULL);
+ where = xc_broadcast(0, configure_cpu_traps0, NULL, NULL);
xc_wait(where);
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: riastradh Date: Sun Jul 16 21:36:40 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c trap.c Log Message: aarch64: Omit needless xcfunc_t casts by using xcfunc_t correctly. No functional change intended, except for avoiding possible undefined behaviour that could have made demons come flying out your nose. To generate a diff of this commit: cvs rdiff -u -r1.69 -r1.70 src/sys/arch/aarch64/aarch64/aarch64_machdep.c cvs rdiff -u -r1.48 -r1.49 src/sys/arch/aarch64/aarch64/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Jun 10 07:33:32 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: cpufunc.c
Log Message:
KASSERT(kpreempt_disabled()) before accessing curcpu() to reflect why
preemption needs to be disabled more clearly.
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/aarch64/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpufunc.c
diff -u src/sys/arch/aarch64/aarch64/cpufunc.c:1.34 src/sys/arch/aarch64/aarch64/cpufunc.c:1.35
--- src/sys/arch/aarch64/aarch64/cpufunc.c:1.34 Sat Feb 25 00:40:22 2023
+++ src/sys/arch/aarch64/aarch64/cpufunc.c Sat Jun 10 07:33:32 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.34 2023/02/25 00:40:22 riastradh Exp $ */
+/* $NetBSD: cpufunc.c,v 1.35 2023/06/10 07:33:32 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -30,7 +30,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.34 2023/02/25 00:40:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.35 2023/06/10 07:33:32 skrll Exp $");
#include
#include
@@ -365,12 +365,12 @@ ln_dcache_inv_all(int level, struct aarc
void
aarch64_dcache_wbinv_all(void)
{
+ KASSERT(kpreempt_disabled());
+
struct cpu_info * const ci = curcpu();
struct aarch64_cache_info * const cinfo = ci->ci_cacheinfo;
int level;
- KASSERT(kpreempt_disabled());
-
for (level = 0; level < MAX_CACHE_LEVEL; level++) {
if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
break;
@@ -384,12 +384,12 @@ aarch64_dcache_wbinv_all(void)
void
aarch64_dcache_inv_all(void)
{
+ KASSERT(kpreempt_disabled());
+
struct cpu_info * const ci = curcpu();
struct aarch64_cache_info * const cinfo = ci->ci_cacheinfo;
int level;
- KASSERT(kpreempt_disabled());
-
for (level = 0; level < MAX_CACHE_LEVEL; level++) {
if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
break;
@@ -403,12 +403,12 @@ aarch64_dcache_inv_all(void)
void
aarch64_dcache_wb_all(void)
{
+ KASSERT(kpreempt_disabled());
+
struct cpu_info * const ci = curcpu();
struct aarch64_cache_info * const cinfo = ci->ci_cacheinfo;
int level;
- KASSERT(kpreempt_disabled());
-
for (level = 0; level < MAX_CACHE_LEVEL; level++) {
if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
break;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sat Jun 10 07:33:32 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: cpufunc.c Log Message: KASSERT(kpreempt_disabled()) before accessing curcpu() to reflect why preemption needs to be disabled more clearly. To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/aarch64/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Tue Apr 18 07:53:31 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c
Log Message:
G/C an outdated comment.
To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.68 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.69
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.68 Sun Apr 16 14:01:51 2023
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Tue Apr 18 07:53:31 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.68 2023/04/16 14:01:51 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.69 2023/04/18 07:53:31 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.68 2023/04/16 14:01:51 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.69 2023/04/18 07:53:31 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -289,7 +289,6 @@ initarm_common(vaddr_t kvm_base, vsize_t
paddr_t kernstart_phys __unused = KERN_VTOPHYS(kernstart);
paddr_t kernend_phys __unused = KERN_VTOPHYS(kernend);
- /* XXX: arm/arm32/bus_dma.c refers physical_{start,end} */
physical_start = bootconfig.dram[0].address;
physical_end = bootconfig.dram[bootconfig.dramblocks - 1].address +
ptoa(bootconfig.dram[bootconfig.dramblocks - 1].pages);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Tue Apr 18 07:53:31 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c Log Message: G/C an outdated comment. To generate a diff of this commit: cvs rdiff -u -r1.68 -r1.69 src/sys/arch/aarch64/aarch64/aarch64_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Wed Apr 12 06:57:28 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: pmap_machdep.c
Log Message:
Use CACHE_LINE_SIZE instead of magic number 128.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/pmap_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap_machdep.c
diff -u src/sys/arch/aarch64/aarch64/pmap_machdep.c:1.3 src/sys/arch/aarch64/aarch64/pmap_machdep.c:1.4
--- src/sys/arch/aarch64/aarch64/pmap_machdep.c:1.3 Sat Feb 25 00:40:22 2023
+++ src/sys/arch/aarch64/aarch64/pmap_machdep.c Wed Apr 12 06:57:28 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_machdep.c,v 1.3 2023/02/25 00:40:22 riastradh Exp $ */
+/* $NetBSD: pmap_machdep.c,v 1.4 2023/04/12 06:57:28 skrll Exp $ */
/*-
* Copyright (c) 2022 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
#define __PMAP_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.3 2023/02/25 00:40:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.4 2023/04/12 06:57:28 skrll Exp $");
#include
#include
@@ -513,7 +513,8 @@ pmap_bootstrap(vaddr_t vstart, vaddr_t v
#endif
IPL_NONE);
- pmap_pvlist_lock_init(/*arm_dcache_align*/ 128);
+ // arm_dcache_align
+ pmap_pvlist_lock_init(CACHE_LINE_SIZE);
VPRINTF("done\n");
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Wed Apr 12 06:57:28 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: pmap_machdep.c Log Message: Use CACHE_LINE_SIZE instead of magic number 128. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: riastradh
Date: Wed Mar 1 08:17:24 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S
Log Message:
aarch64: Optimization: Omit needless membar when triggering softint.
When we are triggering a softint, it can't already hold any mutexes.
So any path to mutex_exit(mtx) must go via mutex_enter(mtx), which is
always done with atomic r/m/w, and we need not issue any explicit
barrier between ci->ci_curlwp = softlwp and a potential load of
mtx->mtx_owner in mutex_exit.
PR kern/57240
XXX pullup-9
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/aarch64/aarch64/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.40 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.41
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.40 Thu Feb 23 14:54:57 2023
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Wed Mar 1 08:17:24 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.40 2023/02/23 14:54:57 riastradh Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.41 2023/03/01 08:17:24 riastradh Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.40 2023/02/23 14:54:57 riastradh Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.41 2023/03/01 08:17:24 riastradh Exp $")
ARMV8_DEFINE_OPTIONS
@@ -224,7 +224,13 @@ ENTRY_NP(cpu_switchto_softint)
msr tpidr_el1, x0 /* curlwp = softlwp; */
dmb ishst /* for mutex_enter; see cpu_switchto */
str x0, [x20, #CI_CURLWP] /* curcpu()->ci_curlwp = softlwp; */
- dmb ish /* for mutex_enter; see cpu_switchto */
+ /*
+ * No need for barrier after ci->ci_curlwp = softlwp -- when we
+ * enter a softint lwp, it can't be holding any mutexes, so it
+ * can't release any until after it has acquired them, so we
+ * need not participate in the protocol with mutex_vector_enter
+ * barriers here.
+ */
mov x5, #CPACR_FPEN_NONE
msr cpacr_el1, x5 /* cpacr_el1 = CPACR_FPEN_NONE */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: riastradh Date: Wed Mar 1 08:17:24 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S Log Message: aarch64: Optimization: Omit needless membar when triggering softint. When we are triggering a softint, it can't already hold any mutexes. So any path to mutex_exit(mtx) must go via mutex_enter(mtx), which is always done with atomic r/m/w, and we need not issue any explicit barrier between ci->ci_curlwp = softlwp and a potential load of mtx->mtx_owner in mutex_exit. PR kern/57240 XXX pullup-9 XXX pullup-10 To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/aarch64/aarch64/cpuswitch.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sat Feb 25 08:00:35 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: vm_machdep.c Log Message: Add a KASSERT To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/vm_machdep.c diff -u src/sys/arch/aarch64/aarch64/vm_machdep.c:1.13 src/sys/arch/aarch64/aarch64/vm_machdep.c:1.14 --- src/sys/arch/aarch64/aarch64/vm_machdep.c:1.13 Sun May 29 16:13:41 2022 +++ src/sys/arch/aarch64/aarch64/vm_machdep.c Sat Feb 25 08:00:35 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: vm_machdep.c,v 1.13 2022/05/29 16:13:41 ryo Exp $ */ +/* $NetBSD: vm_machdep.c,v 1.14 2023/02/25 08:00:35 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -33,7 +33,7 @@ #include "opt_ddb.h" #include -__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.13 2022/05/29 16:13:41 ryo Exp $"); +__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.14 2023/02/25 08:00:35 skrll Exp $"); #include #include @@ -97,6 +97,7 @@ cpu_lwp_fork(struct lwp *l1, struct lwp * FP state is valid. */ l2->l_md.md_cpacr = CPACR_FPEN_NONE; + KASSERT(l2->l_md.md_astpending == 0); #ifdef ARMV83_PAC /*
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sat Feb 25 08:00:35 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: vm_machdep.c Log Message: Add a KASSERT To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: riastradh
Date: Thu Feb 23 14:54:57 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S locore.S
Log Message:
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
XXX pullup-9
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.90 -r1.91 src/sys/arch/aarch64/aarch64/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.39 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.40
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.39 Mon Sep 19 17:23:14 2022
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Thu Feb 23 14:54:57 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.39 2022/09/19 17:23:14 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.40 2023/02/23 14:54:57 riastradh Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.39 2022/09/19 17:23:14 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.40 2023/02/23 14:54:57 riastradh Exp $")
ARMV8_DEFINE_OPTIONS
@@ -125,8 +125,29 @@ ENTRY_NP(cpu_switchto)
msr tpidr_el1, x1 /* switch curlwp to new lwp */
ldr x3, [x1, #L_CPU]
+
+ /*
+ * Issue barriers to coordinate mutex_exit on this CPU with
+ * mutex_vector_enter on another CPU.
+ *
+ * 1. Any prior mutex_exit by oldlwp must be visible to other
+ *CPUs before we set ci_curlwp := newlwp on this one,
+ *requiring a store-before-store barrier.
+ *
+ * 2. ci_curlwp := newlwp must be visible on all other CPUs
+ *before any subsequent mutex_exit by newlwp can even test
+ *whether there might be waiters, requiring a
+ *store-before-load barrier.
+ *
+ * See kern_mutex.c for details -- this is necessary for
+ * adaptive mutexes to detect whether the lwp is on the CPU in
+ * order to safely block without requiring atomic r/m/w in
+ * mutex_exit.
+ */
+ dmb ishst /* store-before-store */
str x1, [x3, #CI_CURLWP] /* switch curlwp to new lwp */
- dmb ishst /* see comments in kern_mutex.c */
+ dmb ish /* store-before-load */
+
ENABLE_INTERRUPT
/*
@@ -201,8 +222,9 @@ ENTRY_NP(cpu_switchto_softint)
/* onto new stack */
sub sp, x4, #TF_SIZE /* new sp := softlwp->l_md_utf - 1 */
msr tpidr_el1, x0 /* curlwp = softlwp; */
+ dmb ishst /* for mutex_enter; see cpu_switchto */
str x0, [x20, #CI_CURLWP] /* curcpu()->ci_curlwp = softlwp; */
- /* no need for memory barrier here */
+ dmb ish /* for mutex_enter; see cpu_switchto */
mov x5, #CPACR_FPEN_NONE
msr cpacr_el1, x5 /* cpacr_el1 = CPACR_FPEN_NONE */
@@ -244,8 +266,9 @@ ENTRY_NP(cpu_switchto_softint)
DISABLE_INTERRUPT
msr tpidr_el1, x19 /* curlwp = pinned_lwp */
ldr x3, [x19, #L_CPU] /* x3 = curlwp->l_cpu */
+ dmb ishst /* for mutex_enter; see cpu_switchto */
str x19, [x3, #CI_CURLWP] /* curlwp->l_cpu->ci_curlwp := x19 */
- dmb ishst /* see comments in kern_mutex.c */
+ dmb ish /* for mutex_enter; see cpu_switchto */
mov sp, x4 /* restore pinned_lwp sp */
msr cpacr_el1, x5 /* restore pinned_lwp cpacr */
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.90 src/sys/arch/aarch64/aarch64/locore.S:1.91
--- src/sys/arch/aarch64/aarch64/locore.S:1.90 Fri Feb 17 06:24:26 2023
+++ src/sys/arch/aarch64/aarch64/locore.S Thu Feb 23 14:54:57 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.90 2023/02/17 06:24:26 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.91 2023/02/23 14:54:57 riastradh Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.90 2023/02/17 06:24:26 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.91 2023/02/23 14:54:57 riastradh Exp $")
#ifdef AARCH64_DEVICE_MEM_NONPOSTED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -529,6 +529,11 @@ mp_vstart:
*/
ldr x1, [x0, #CI_IDLELWP] /* x0 = curcpu()->ci_idlelwp */
msr tpidr_el1, x1 /* tpidr_el1 = curlwp = x1 */
+ /*
+ * No membar needed because we're not switching from a
+ * previous lwp, and the idle lwp we're switching to can't be
+ * holding locks already; see cpu_switchto.
+ */
str x1, [x0, #CI_CURLWP] /* curlwp is idlelwp */
/* get my stack from lwp */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: riastradh Date: Thu Feb 23 14:54:57 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S locore.S Log Message: aarch64: Add missing barriers in cpu_switchto. Details in comments. Note: This is a conservative change that inserts a barrier where there was a comment saying none is needed, which is probably correct. The goal of this change is to systematically add barriers to be confident in correctness; subsequent changes may remove some bariers, as an optimization, with an explanation of why each barrier is not needed. PR kern/57240 XXX pullup-9 XXX pullup-10 To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/aarch64/aarch64/cpuswitch.S cvs rdiff -u -r1.90 -r1.91 src/sys/arch/aarch64/aarch64/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Fri Feb 17 06:24:26 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S
Log Message:
Improve an error message
To generate a diff of this commit:
cvs rdiff -u -r1.89 -r1.90 src/sys/arch/aarch64/aarch64/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.89 src/sys/arch/aarch64/aarch64/locore.S:1.90
--- src/sys/arch/aarch64/aarch64/locore.S:1.89 Sat Oct 29 07:32:54 2022
+++ src/sys/arch/aarch64/aarch64/locore.S Fri Feb 17 06:24:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.89 2022/10/29 07:32:54 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.90 2023/02/17 06:24:26 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.89 2022/10/29 07:32:54 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.90 2023/02/17 06:24:26 skrll Exp $")
#ifdef AARCH64_DEVICE_MEM_NONPOSTED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -564,7 +564,7 @@ mp_vstart:
END(cpu_mpstart)
toomanycpus:
- CPU_DPRINT("too many cpus, or MPIDR not exists in cpu_mpidr[]\n")
+ CPU_DPRINT("too many cpus, or MPIDR does not exist in cpu_mpidr[]\n")
1: wfi
b 1b
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Fri Feb 17 06:24:26 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: locore.S Log Message: Improve an error message To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/aarch64/aarch64/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Fri Feb 3 08:05:27 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
Log Message:
Remove useless/harmful casts in debug messages. MPIDR AFF3 would not
be printed before.
To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/arch/aarch64/aarch64/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.72 src/sys/arch/aarch64/aarch64/cpu.c:1.73
--- src/sys/arch/aarch64/aarch64/cpu.c:1.72 Thu Dec 22 06:58:47 2022
+++ src/sys/arch/aarch64/aarch64/cpu.c Fri Feb 3 08:05:27 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.72 2022/12/22 06:58:47 ryo Exp $ */
+/* $NetBSD: cpu.c,v 1.73 2023/02/03 08:05:27 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.72 2022/12/22 06:58:47 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.73 2023/02/03 08:05:27 skrll Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -329,8 +329,8 @@ cpu_identify2(device_t self, struct cpu_
{
struct aarch64_sysctl_cpu_id * const id = >ci_id;
- aprint_debug_dev(self, "midr=0x%" PRIx32 " mpidr=0x%" PRIx32 "\n",
- (uint32_t)id->ac_midr, (uint32_t)id->ac_mpidr);
+ aprint_debug_dev(self, "midr=0x%" PRIx64 " mpidr=0x%" PRIx64 "\n",
+ id->ac_midr, id->ac_mpidr);
aprint_verbose_dev(self, "revID=0x%" PRIx64, id->ac_revidr);
/* ID_AA64DFR0_EL1 */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Fri Feb 3 08:05:27 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64: cpu.c Log Message: Remove useless/harmful casts in debug messages. MPIDR AFF3 would not be printed before. To generate a diff of this commit: cvs rdiff -u -r1.72 -r1.73 src/sys/arch/aarch64/aarch64/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Jan 12 10:46:48 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space_asm_generic.S
Log Message:
fixed a bug that bus_space_read_region_{2,4,8}_swap() accesses wrong address.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S
diff -u src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S:1.5 src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S:1.6
--- src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S:1.5 Thu Nov 12 11:28:39 2020
+++ src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S Thu Jan 12 10:46:48 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space_asm_generic.S,v 1.5 2020/11/12 11:28:39 jmcneill Exp $ */
+/* $NetBSD: bus_space_asm_generic.S,v 1.6 2023/01/12 10:46:48 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -29,7 +29,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: bus_space_asm_generic.S,v 1.5 2020/11/12 11:28:39 jmcneill Exp $")
+RCSID("$NetBSD: bus_space_asm_generic.S,v 1.6 2023/01/12 10:46:48 ryo Exp $")
.macro generate_bsfunc funcname, dsbop
/* uint8_t {funcname}_bs_r_1(x0:tag, x1:addr, x2:offset) */
@@ -389,7 +389,7 @@ ENTRY_NP(\funcname\()_bs_rr_2_swap)
0:
lsl x2, x2, x8 /* offset <<= tag->bs_stride */
1:
- ldrh w8, [x1, x9] /* value = *src */
+ ldrh w8, [x1, x2] /* value = *src */
subs x4, x4, #1 /* count-- */
add x2, x2, x9 /* src += delta */
rev16 w8, w8
@@ -419,7 +419,7 @@ ENTRY_NP(\funcname\()_bs_rr_4_swap)
0:
lsl x2, x2, x8 /* offset <<= tag->bs_stride */
1:
- ldr w8, [x1, x9] /* value = *src */
+ ldr w8, [x1, x2] /* value = *src */
subs x4, x4, #1 /* count-- */
add x2, x2, x9 /* src += delta */
rev w8, w8
@@ -449,7 +449,7 @@ ENTRY_NP(\funcname\()_bs_rr_8_swap)
0:
lsl x2, x2, x8 /* offset <<= tag->bs_stride */
1:
- ldr x8, [x1, x9] /* value = *src */
+ ldr x8, [x1, x2] /* value = *src */
subs x4, x4, #1 /* count-- */
add x2, x2, x9 /* src += delta */
rev x8, x8
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Jan 12 10:46:48 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space_asm_generic.S
Log Message:
fixed a bug that bus_space_read_region_{2,4,8}_swap() accesses wrong address.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Thu Dec 22 06:58:47 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpu.c Log Message: PMCR_EL0.LC should be set. ARM deprecates use of PMCR_EL0.LC=0 To generate a diff of this commit: cvs rdiff -u -r1.71 -r1.72 src/sys/arch/aarch64/aarch64/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/cpu.c diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.71 src/sys/arch/aarch64/aarch64/cpu.c:1.72 --- src/sys/arch/aarch64/aarch64/cpu.c:1.71 Thu Dec 22 06:58:07 2022 +++ src/sys/arch/aarch64/aarch64/cpu.c Thu Dec 22 06:58:47 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.c,v 1.71 2022/12/22 06:58:07 ryo Exp $ */ +/* $NetBSD: cpu.c,v 1.72 2022/12/22 06:58:47 ryo Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.71 2022/12/22 06:58:07 ryo Exp $"); +__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.72 2022/12/22 06:58:47 ryo Exp $"); #include "locators.h" #include "opt_arm_debug.h" @@ -498,7 +498,7 @@ cpu_init_counter(struct cpu_info *ci) return; } - reg_pmcr_el0_write(PMCR_E | PMCR_C); + reg_pmcr_el0_write(PMCR_E | PMCR_C | PMCR_LC); reg_pmintenclr_el1_write(PMINTEN_C | PMINTEN_P); reg_pmcntenset_el0_write(PMCNTEN_C);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Thu Dec 22 06:58:47 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpu.c Log Message: PMCR_EL0.LC should be set. ARM deprecates use of PMCR_EL0.LC=0 To generate a diff of this commit: cvs rdiff -u -r1.71 -r1.72 src/sys/arch/aarch64/aarch64/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Wed Nov 2 08:37:32 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c
Log Message:
Restore a '\n' I accidentally removed in 1.16
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/aarch64/db_interface.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.21 src/sys/arch/aarch64/aarch64/db_interface.c:1.22
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.21 Sun Oct 23 07:14:12 2022
+++ src/sys/arch/aarch64/aarch64/db_interface.c Wed Nov 2 08:37:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.21 2022/10/23 07:14:12 skrll Exp $ */
+/* $NetBSD: db_interface.c,v 1.22 2022/11/02 08:37:32 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.21 2022/10/23 07:14:12 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.22 2022/11/02 08:37:32 skrll Exp $");
#include
#include
@@ -566,7 +566,7 @@ dump_ln_table(bool countmode, pd_entry_t
if (pg == NULL) {
pr("%sL%d: pa=%lx pg=NULL\n", spc, level, pa);
} else {
- pr("%sL%d: pa=%lx pg=%p", spc, level, pa, pg);
+ pr("%sL%d: pa=%lx pg=%p\n", spc, level, pa, pg);
}
for (i = n = 0; i < Ln_ENTRIES; i++) {
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Wed Nov 2 08:37:32 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: Restore a '\n' I accidentally removed in 1.16 To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: riastradh Date: Sun Oct 30 14:08:09 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: aarch64/pmap: Fix criterion in previous. Use the pte bit that says whether this is a PMAP_WIRED page, not the bit that says whether this is a non-global page. (Forgot to git commit --amend before exporting to CVS, sorry!) To generate a diff of this commit: cvs rdiff -u -r1.146 -r1.147 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: riastradh
Date: Sun Oct 30 14:08:09 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
aarch64/pmap: Fix criterion in previous.
Use the pte bit that says whether this is a PMAP_WIRED page, not the
bit that says whether this is a non-global page.
(Forgot to git commit --amend before exporting to CVS, sorry!)
To generate a diff of this commit:
cvs rdiff -u -r1.146 -r1.147 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.146 src/sys/arch/aarch64/aarch64/pmap.c:1.147
--- src/sys/arch/aarch64/aarch64/pmap.c:1.146 Sun Oct 30 10:26:48 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Sun Oct 30 14:08:09 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.146 2022/10/30 10:26:48 riastradh Exp $ */
+/* $NetBSD: pmap.c,v 1.147 2022/10/30 14:08:09 riastradh Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.146 2022/10/30 10:26:48 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.147 2022/10/30 14:08:09 riastradh Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -1426,7 +1426,7 @@ pmap_protect(struct pmap *pm, vaddr_t sv
continue;
}
- if (pte & LX_BLKPAG_NG) {
+ if ((pte & LX_BLKPAG_OS_WIRED) == 0) {
const paddr_t pa = lxpde_pa(pte);
struct vm_page *const pg = PHYS_TO_VM_PAGE(pa);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: riastradh
Date: Sun Oct 30 10:26:48 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
aarch64/pmap(9): Teach pmap_protect about pmap_kenter_pa mappings.
Pages mapped with pmap_kenter_pa are necessarily unmanaged, so there
are no P->V records, and pmap_kenter_pa leaves pp->pp_pv.pv_va zero
with no modified/referenced state.
However, pmap_protect erroneously examined pp->pp_pv.pv_va to
ascertain the modified/referenced state -- and if the page was not
marked referenced, pmap_protect would clear the LX_BLKPAG_AF bit
(Access Flag), with the effect that subsequent uses of the page fault
and require a detour through pmap_fault_fixup.
This caused problems for the kernel module loader:
- When loading the text section, kobj_load first allocates kva with
uvm_km_alloc(UVM_KMF_WIRED|UVM_KMF_EXEC), which creates ptes with
pmap_kenter_pa. These ptes are writable, so we can copy the text
section into them, and have LX_BLKPAG_AF set so there will be no
fault when they are used by the kernel.
- But then kobj_affix makes the text section read/execute-only (and
nonwritable) with uvm_km_protect(VM_PROT_READ|VM_PROT_EXECUTE),
which updates the ptes with pmap_protect. This _should_ leave
LX_BLKPAG_AF set, but by inadvertently treating the page as managed
when it should be unmanaged, pmap_protect cleared it instead.
- Most of the time, clearing LX_BLKPAG_AF caused no problem, because
pmap_fault_fixup would silently resolve it. But if a hard
interrupt handler tried to use any page in the module's text (or
rodata, I suspect) that was not yet fixed up, the CPU would fault
and enter pmap_fault_fixup -- which would promptly crash (or hang)
by trying to take the pmap lock in interrupt context, which is
forbidden.
I observed this by loading dtrace.kmod early at boot and trying to
dtrace hard interrupt handlers.
With this change, pmap_protect now recognizes wired mappings (as
created by pmap_kenter_pa) before consulting pp->pp_pv.pv_va, and
preserves then LX_BLKPAG_AF bit in that case.
ok skrll
To generate a diff of this commit:
cvs rdiff -u -r1.145 -r1.146 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.145 src/sys/arch/aarch64/aarch64/pmap.c:1.146
--- src/sys/arch/aarch64/aarch64/pmap.c:1.145 Sat Oct 29 07:21:41 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Sun Oct 30 10:26:48 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.145 2022/10/29 07:21:41 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.146 2022/10/30 10:26:48 riastradh Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.145 2022/10/29 07:21:41 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.146 2022/10/30 10:26:48 riastradh Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -1410,9 +1410,7 @@ pmap_protect(struct pmap *pm, vaddr_t sv
#ifdef UVMHIST
pt_entry_t opte;
#endif
- struct vm_page *pg;
struct pmap_page *pp;
- paddr_t pa;
uint32_t mdattr;
bool executable;
@@ -1428,24 +1426,30 @@ pmap_protect(struct pmap *pm, vaddr_t sv
continue;
}
- pa = lxpde_pa(pte);
- pg = PHYS_TO_VM_PAGE(pa);
- if (pg != NULL) {
- pp = VM_PAGE_TO_PP(pg);
- PMAP_COUNT(protect_managed);
- } else {
+ if (pte & LX_BLKPAG_NG) {
+ const paddr_t pa = lxpde_pa(pte);
+ struct vm_page *const pg = PHYS_TO_VM_PAGE(pa);
+
+ if (pg != NULL) {
+pp = VM_PAGE_TO_PP(pg);
+PMAP_COUNT(protect_managed);
+ } else {
#ifdef __HAVE_PMAP_PV_TRACK
- pp = pmap_pv_tracked(pa);
+pp = pmap_pv_tracked(pa);
#ifdef PMAPCOUNTERS
- if (pp != NULL)
-PMAP_COUNT(protect_pvmanaged);
- else
-PMAP_COUNT(protect_unmanaged);
+if (pp != NULL)
+ PMAP_COUNT(protect_pvmanaged);
+else
+ PMAP_COUNT(protect_unmanaged);
#endif
#else
+pp = NULL;
+PMAP_COUNT(protect_unmanaged);
+#endif /* __HAVE_PMAP_PV_TRACK */
+ }
+ } else { /* kenter */
pp = NULL;
PMAP_COUNT(protect_unmanaged);
-#endif /* __HAVE_PMAP_PV_TRACK */
}
if (pp != NULL) {
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: riastradh Date: Sun Oct 30 10:26:48 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: aarch64/pmap(9): Teach pmap_protect about pmap_kenter_pa mappings. Pages mapped with pmap_kenter_pa are necessarily unmanaged, so there are no P->V records, and pmap_kenter_pa leaves pp->pp_pv.pv_va zero with no modified/referenced state. However, pmap_protect erroneously examined pp->pp_pv.pv_va to ascertain the modified/referenced state -- and if the page was not marked referenced, pmap_protect would clear the LX_BLKPAG_AF bit (Access Flag), with the effect that subsequent uses of the page fault and require a detour through pmap_fault_fixup. This caused problems for the kernel module loader: - When loading the text section, kobj_load first allocates kva with uvm_km_alloc(UVM_KMF_WIRED|UVM_KMF_EXEC), which creates ptes with pmap_kenter_pa. These ptes are writable, so we can copy the text section into them, and have LX_BLKPAG_AF set so there will be no fault when they are used by the kernel. - But then kobj_affix makes the text section read/execute-only (and nonwritable) with uvm_km_protect(VM_PROT_READ|VM_PROT_EXECUTE), which updates the ptes with pmap_protect. This _should_ leave LX_BLKPAG_AF set, but by inadvertently treating the page as managed when it should be unmanaged, pmap_protect cleared it instead. - Most of the time, clearing LX_BLKPAG_AF caused no problem, because pmap_fault_fixup would silently resolve it. But if a hard interrupt handler tried to use any page in the module's text (or rodata, I suspect) that was not yet fixed up, the CPU would fault and enter pmap_fault_fixup -- which would promptly crash (or hang) by trying to take the pmap lock in interrupt context, which is forbidden. I observed this by loading dtrace.kmod early at boot and trying to dtrace hard interrupt handlers. With this change, pmap_protect now recognizes wired mappings (as created by pmap_kenter_pa) before consulting pp->pp_pv.pv_va, and preserves then LX_BLKPAG_AF bit in that case. ok skrll To generate a diff of this commit: cvs rdiff -u -r1.145 -r1.146 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Oct 29 07:32:54 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S
Log Message:
Slightly better English in a comment.
To generate a diff of this commit:
cvs rdiff -u -r1.88 -r1.89 src/sys/arch/aarch64/aarch64/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.88 src/sys/arch/aarch64/aarch64/locore.S:1.89
--- src/sys/arch/aarch64/aarch64/locore.S:1.88 Sat Oct 15 11:07:38 2022
+++ src/sys/arch/aarch64/aarch64/locore.S Sat Oct 29 07:32:54 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.88 2022/10/15 11:07:38 jmcneill Exp $ */
+/* $NetBSD: locore.S,v 1.89 2022/10/29 07:32:54 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.88 2022/10/15 11:07:38 jmcneill Exp $")
+RCSID("$NetBSD: locore.S,v 1.89 2022/10/29 07:32:54 skrll Exp $")
#ifdef AARCH64_DEVICE_MEM_NONPOSTED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -52,7 +52,7 @@ RCSID("$NetBSD: locore.S,v 1.88 2022/10/
#define LOCORE_EL2
-#define BOOT_AP_STACKSIZE 256 /* size of temporally stack for APs */
+#define BOOT_AP_STACKSIZE 256 /* size of temporary stack for APs */
#define PMAPBOOT_PAGEALLOCMAX (1024 * 1024) /* reserved size from _end[] */
#if (defined(VERBOSE_INIT_ARM) || defined(DEBUG_LOCORE)) && defined(EARLYCONS)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sat Oct 29 07:32:54 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: locore.S Log Message: Slightly better English in a comment. To generate a diff of this commit: cvs rdiff -u -r1.88 -r1.89 src/sys/arch/aarch64/aarch64/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Oct 29 07:21:42 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
fix a spello in a comment
To generate a diff of this commit:
cvs rdiff -u -r1.144 -r1.145 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.144 src/sys/arch/aarch64/aarch64/pmap.c:1.145
--- src/sys/arch/aarch64/aarch64/pmap.c:1.144 Fri Oct 28 06:22:26 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Sat Oct 29 07:21:41 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.144 2022/10/28 06:22:26 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.145 2022/10/29 07:21:41 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.144 2022/10/28 06:22:26 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.145 2022/10/29 07:21:41 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -1012,7 +1012,7 @@ pmap_icache_sync_range(pmap_t pm, vaddr_
cpu_icache_sync_range(va, len);
} else {
/*
- * change to accessible temporally
+ * change to accessible temporarily
* to do cpu_icache_sync_range()
*/
struct pmap_asid_info * const pai = PMAP_PAI(pm,
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sat Oct 29 07:21:42 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: fix a spello in a comment To generate a diff of this commit: cvs rdiff -u -r1.144 -r1.145 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Fri Oct 28 06:22:26 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
Remove some empty lines
To generate a diff of this commit:
cvs rdiff -u -r1.143 -r1.144 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.143 src/sys/arch/aarch64/aarch64/pmap.c:1.144
--- src/sys/arch/aarch64/aarch64/pmap.c:1.143 Sun Oct 23 07:04:44 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Fri Oct 28 06:22:26 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.143 2022/10/23 07:04:44 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.144 2022/10/28 06:22:26 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.143 2022/10/23 07:04:44 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.144 2022/10/28 06:22:26 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -199,7 +199,6 @@ static int _pmap_get_pdp(struct pmap *,
struct vm_page **);
static struct pmap kernel_pmap __cacheline_aligned;
-
struct pmap * const kernel_pmap_ptr = _pmap;
#if defined(EFI_RUNTIME)
@@ -2873,7 +2872,6 @@ kvtopte(vaddr_t va)
}
#ifdef DDB
-
void
pmap_db_pmap_print(struct pmap *pm,
void (*pr)(const char *, ...) __printflike(1, 2))
@@ -2886,4 +2884,3 @@ pmap_db_pmap_print(struct pmap *pm,
pr(" pm_activated = %d\n\n", pm->pm_activated);
}
#endif /* DDB */
-
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Fri Oct 28 06:22:26 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Remove some empty lines To generate a diff of this commit: cvs rdiff -u -r1.143 -r1.144 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Oct 23 07:14:12 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/db_interface.c diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.20 src/sys/arch/aarch64/aarch64/db_interface.c:1.21 --- src/sys/arch/aarch64/aarch64/db_interface.c:1.20 Sat Oct 15 11:07:38 2022 +++ src/sys/arch/aarch64/aarch64/db_interface.c Sun Oct 23 07:14:12 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: db_interface.c,v 1.20 2022/10/15 11:07:38 jmcneill Exp $ */ +/* $NetBSD: db_interface.c,v 1.21 2022/10/23 07:14:12 skrll Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.20 2022/10/15 11:07:38 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.21 2022/10/23 07:14:12 skrll Exp $"); #include #include @@ -170,7 +170,7 @@ db_write_text(vaddr_t addr, size_t size, * will stop... */ /* old pte is returned by pmap_kvattr */ - pte = pmap_kvattr(ptep, VM_PROT_EXECUTE|VM_PROT_READ|VM_PROT_WRITE); + pte = pmap_kvattr(ptep, VM_PROT_EXECUTE | VM_PROT_READ | VM_PROT_WRITE); aarch64_tlbi_all(); s = size;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Oct 23 07:14:12 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Oct 23 07:04:44 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Use UVMHIST_CALLARGS in pmap_bootstrap To generate a diff of this commit: cvs rdiff -u -r1.142 -r1.143 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.142 src/sys/arch/aarch64/aarch64/pmap.c:1.143 --- src/sys/arch/aarch64/aarch64/pmap.c:1.142 Sun Oct 23 07:02:26 2022 +++ src/sys/arch/aarch64/aarch64/pmap.c Sun Oct 23 07:04:44 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.142 2022/10/23 07:02:26 skrll Exp $ */ +/* $NetBSD: pmap.c,v 1.143 2022/10/23 07:04:44 skrll Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.142 2022/10/23 07:02:26 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.143 2022/10/23 07:04:44 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -472,7 +472,8 @@ pmap_bootstrap(vaddr_t vstart, vaddr_t v PMAP_HIST_INIT(); /* init once */ UVMHIST_FUNC(__func__); - UVMHIST_CALLED(pmaphist); + UVMHIST_CALLARGS(pmaphist, "vstart=%#jx vend=%#jx", (uintptr_t)vstart, + (uintptr_t)vend, 0, 0); uvmexp.ncolors = aarch64_cache_vindexsize / PAGE_SIZE;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Oct 23 07:04:44 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Use UVMHIST_CALLARGS in pmap_bootstrap To generate a diff of this commit: cvs rdiff -u -r1.142 -r1.143 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sun Oct 23 07:02:27 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
Only define the EFI variable if EFI_RUNTIME
To generate a diff of this commit:
cvs rdiff -u -r1.141 -r1.142 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.141 src/sys/arch/aarch64/aarch64/pmap.c:1.142
--- src/sys/arch/aarch64/aarch64/pmap.c:1.141 Thu Oct 20 06:47:29 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Sun Oct 23 07:02:26 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.141 2022/10/20 06:47:29 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.142 2022/10/23 07:02:26 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.141 2022/10/20 06:47:29 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.142 2022/10/23 07:02:26 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -199,15 +199,18 @@ static int _pmap_get_pdp(struct pmap *,
struct vm_page **);
static struct pmap kernel_pmap __cacheline_aligned;
-static struct pmap efirt_pmap __cacheline_aligned;
struct pmap * const kernel_pmap_ptr = _pmap;
+#if defined(EFI_RUNTIME)
+static struct pmap efirt_pmap __cacheline_aligned;
+
pmap_t
pmap_efirt(void)
{
return _pmap;
}
+#endif
static vaddr_t pmap_maxkvaddr;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Oct 23 07:02:27 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Only define the EFI variable if EFI_RUNTIME To generate a diff of this commit: cvs rdiff -u -r1.141 -r1.142 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Thu Oct 20 06:47:29 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
KNF
To generate a diff of this commit:
cvs rdiff -u -r1.140 -r1.141 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.140 src/sys/arch/aarch64/aarch64/pmap.c:1.141
--- src/sys/arch/aarch64/aarch64/pmap.c:1.140 Sat Oct 15 11:07:38 2022
+++ src/sys/arch/aarch64/aarch64/pmap.c Thu Oct 20 06:47:29 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.140 2022/10/15 11:07:38 jmcneill Exp $ */
+/* $NetBSD: pmap.c,v 1.141 2022/10/20 06:47:29 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.140 2022/10/15 11:07:38 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.141 2022/10/20 06:47:29 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -844,7 +844,7 @@ pmap_extract_coherency(struct pmap *pm,
* have no physical memory haven't been mapped.
* fast lookup by using the S1E1R/PAR_EL1 registers.
*/
- register_t s = daif_disable(DAIF_I|DAIF_F);
+ register_t s = daif_disable(DAIF_I | DAIF_F);
reg_s1e1r_write(va);
isb();
uint64_t par = reg_par_el1_read();
@@ -1064,7 +1064,7 @@ _pmap_pte_adjust_prot(pt_entry_t pte, vm
pt_entry_t xn;
masked = prot & refmod;
- pte &= ~(LX_BLKPAG_OS_RWMASK|LX_BLKPAG_AF|LX_BLKPAG_DBM|LX_BLKPAG_AP);
+ pte &= ~(LX_BLKPAG_OS_RWMASK | LX_BLKPAG_AF | LX_BLKPAG_DBM | LX_BLKPAG_AP);
/*
* keep actual prot in the pte as OS_{READ|WRITE} for ref/mod emulation,
@@ -1072,9 +1072,9 @@ _pmap_pte_adjust_prot(pt_entry_t pte, vm
*/
pte |= LX_BLKPAG_OS_READ; /* a valid pte can always be readable */
if (prot & VM_PROT_WRITE)
- pte |= LX_BLKPAG_OS_WRITE|LX_BLKPAG_DBM;
+ pte |= LX_BLKPAG_OS_WRITE | LX_BLKPAG_DBM;
- switch (masked & (VM_PROT_READ|VM_PROT_WRITE)) {
+ switch (masked & (VM_PROT_READ | VM_PROT_WRITE)) {
case 0:
default:
/*
@@ -1092,7 +1092,7 @@ _pmap_pte_adjust_prot(pt_entry_t pte, vm
pte |= LX_BLKPAG_AP_RO;
break;
case VM_PROT_WRITE:
- case VM_PROT_READ|VM_PROT_WRITE:
+ case VM_PROT_READ | VM_PROT_WRITE:
/* fully readable and writable */
pte |= LX_BLKPAG_AF;
pte |= LX_BLKPAG_AP_RW;
@@ -1100,7 +1100,7 @@ _pmap_pte_adjust_prot(pt_entry_t pte, vm
}
/* executable for kernel or user? first set never exec both */
- pte |= (LX_BLKPAG_UXN|LX_BLKPAG_PXN);
+ pte |= (LX_BLKPAG_UXN | LX_BLKPAG_PXN);
/* and either to executable */
xn = user ? LX_BLKPAG_UXN : LX_BLKPAG_PXN;
if (prot & VM_PROT_EXECUTE)
@@ -1115,7 +1115,7 @@ _pmap_pte_adjust_cacheflags(pt_entry_t p
pte &= ~LX_BLKPAG_ATTR_MASK;
- switch (flags & (PMAP_CACHE_MASK|PMAP_DEV_MASK)) {
+ switch (flags & (PMAP_CACHE_MASK | PMAP_DEV_MASK)) {
case PMAP_DEV_NP ... PMAP_DEV_NP | PMAP_CACHE_MASK:
pte |= LX_BLKPAG_ATTR_DEVICE_MEM_NP; /* Device-nGnRnE */
break;
@@ -1348,7 +1348,7 @@ _pmap_protect_pv(struct pmap_page *pp, s
/* get prot mask from pte */
pteprot = VM_PROT_READ; /* a valid pte can always be readable */
- if ((pte & (LX_BLKPAG_OS_WRITE|LX_BLKPAG_DBM)) != 0)
+ if ((pte & (LX_BLKPAG_OS_WRITE | LX_BLKPAG_DBM)) != 0)
pteprot |= VM_PROT_WRITE;
if (l3pte_executable(pte, user))
pteprot |= VM_PROT_EXECUTE;
@@ -2071,9 +2071,9 @@ _pmap_enter(struct pmap *pm, vaddr_t va,
* read permission is treated as an access permission internally.
* require to add PROT_READ even if only PROT_WRITE or PROT_EXEC
*/
- if (prot & (VM_PROT_WRITE|VM_PROT_EXECUTE))
+ if (prot & (VM_PROT_WRITE | VM_PROT_EXECUTE))
prot |= VM_PROT_READ;
- if (flags & (VM_PROT_WRITE|VM_PROT_EXECUTE))
+ if (flags & (VM_PROT_WRITE | VM_PROT_EXECUTE))
flags |= VM_PROT_READ;
mdattr = VM_PROT_READ | VM_PROT_WRITE;
@@ -2434,7 +2434,7 @@ pmap_page_protect(struct vm_page *pg, vm
return;
}
- if ((prot & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
+ if ((prot & (VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
VM_PROT_NONE) {
pmap_page_remove(pp, prot);
} else {
@@ -2549,7 +2549,7 @@ pmap_fault_fixup(struct pmap *pm, vaddr_
* If DBM is 1, it is considered a writable page.
*/
pmap_prot = VM_PROT_READ;
- if ((pte & (LX_BLKPAG_OS_WRITE|LX_BLKPAG_DBM)) != 0)
+ if ((pte & (LX_BLKPAG_OS_WRITE | LX_BLKPAG_DBM)) != 0)
pmap_prot |= VM_PROT_WRITE;
if (l3pte_executable(pte, pm != pmap_kernel()))
@@ -2559,7 +2559,7 @@ pmap_fault_fixup(struct pmap *pm, vaddr_
va, pmap_prot, accessprot, 0);
/* ignore except read/write */
- accessprot &= (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE);
+ accessprot &= (VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE);
/* PROT_EXEC requires implicit PROT_READ */
if (accessprot & VM_PROT_EXECUTE)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Thu Oct 20 06:47:29 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.140 -r1.141 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Sep 22 21:48:19 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c
Log Message:
oops, my previous commit is bad. revert previous.
is a frame pointer, not a trapframe, and it worked correctly.
(e.g., trace $x29)
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/aarch64/aarch64/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.22 src/sys/arch/aarch64/aarch64/db_trace.c:1.23
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.22 Thu Sep 22 21:00:46 2022
+++ src/sys/arch/aarch64/aarch64/db_trace.c Thu Sep 22 21:48:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.22 2022/09/22 21:00:46 ryo Exp $ */
+/* $NetBSD: db_trace.c,v 1.23 2022/09/22 21:48:18 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.22 2022/09/22 21:00:46 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.23 2022/09/22 21:48:18 ryo Exp $");
#include
#include
@@ -497,6 +497,15 @@ db_sp_trace(struct trapframe *tf, db_add
db_addr_t pc, sp, lr0;
bool allow_leaf_function = false;
+ if (tf == NULL) {
+ /*
+ * In the case of "trace/s ",
+ * the specified frame pointer address is considered
+ * a trapframe (or a switchframe) address.
+ */
+ tf = (struct trapframe *)fp;
+ }
+
pr_frame(tf, pr);
db_read_bytes((db_addr_t)tf, sizeof(tf_buf), (char *)_buf);
@@ -801,15 +810,6 @@ db_stack_trace_print(db_expr_t addr, boo
if (count > MAXBACKTRACE)
count = MAXBACKTRACE;
- if (tf == NULL) {
- /*
- * In the case of "trace ",
- * the specified frame pointer address is considered
- * a trapframe (or a switchframe) address.
- */
- tf = (struct trapframe *)fp;
- }
-
if (trace_sp) {
/* trace $lr pushed to sp */
db_sp_trace(tf, fp, count, flags, pr);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Thu Sep 22 21:48:19 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c Log Message: oops, my previous commit is bad. revert previous. is a frame pointer, not a trapframe, and it worked correctly. (e.g., trace $x29) To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/aarch64/aarch64/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Sep 22 21:00:46 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c
Log Message:
Specifying the frame address "trace " was not working.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/aarch64/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.21 src/sys/arch/aarch64/aarch64/db_trace.c:1.22
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.21 Thu Sep 22 19:33:00 2022
+++ src/sys/arch/aarch64/aarch64/db_trace.c Thu Sep 22 21:00:46 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.21 2022/09/22 19:33:00 ryo Exp $ */
+/* $NetBSD: db_trace.c,v 1.22 2022/09/22 21:00:46 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.21 2022/09/22 19:33:00 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.22 2022/09/22 21:00:46 ryo Exp $");
#include
#include
@@ -497,15 +497,6 @@ db_sp_trace(struct trapframe *tf, db_add
db_addr_t pc, sp, lr0;
bool allow_leaf_function = false;
- if (tf == NULL) {
- /*
- * In the case of "trace/s ",
- * the specified frame pointer address is considered
- * a trapframe (or a switchframe) address.
- */
- tf = (struct trapframe *)fp;
- }
-
pr_frame(tf, pr);
db_read_bytes((db_addr_t)tf, sizeof(tf_buf), (char *)_buf);
@@ -810,6 +801,15 @@ db_stack_trace_print(db_expr_t addr, boo
if (count > MAXBACKTRACE)
count = MAXBACKTRACE;
+ if (tf == NULL) {
+ /*
+ * In the case of "trace ",
+ * the specified frame pointer address is considered
+ * a trapframe (or a switchframe) address.
+ */
+ tf = (struct trapframe *)fp;
+ }
+
if (trace_sp) {
/* trace $lr pushed to sp */
db_sp_trace(tf, fp, count, flags, pr);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Thu Sep 22 21:00:46 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c Log Message: Specifying the frame address "trace " was not working. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/aarch64/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Sep 22 19:33:00 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c
Log Message:
If there was a "bl " instruction at the end of a function block,
the stack analysis backtrace (bt/s) would fail because $lr would point
to the beginning of the next function.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/aarch64/aarch64/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.20 src/sys/arch/aarch64/aarch64/db_trace.c:1.21
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.20 Mon Sep 19 17:24:23 2022
+++ src/sys/arch/aarch64/aarch64/db_trace.c Thu Sep 22 19:33:00 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.20 2022/09/19 17:24:23 ryo Exp $ */
+/* $NetBSD: db_trace.c,v 1.21 2022/09/22 19:33:00 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.20 2022/09/19 17:24:23 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.21 2022/09/22 19:33:00 ryo Exp $");
#include
#include
@@ -512,7 +512,7 @@ db_sp_trace(struct trapframe *tf, db_add
if (tf_buf.tf_sp == 0) {
/* switchframe */
lr0 = 0;
- pc = aarch64_strip_pac(tf_buf.tf_lr);
+ pc = aarch64_strip_pac(tf_buf.tf_lr) - 4;
sp = (uint64_t)(tf + 1);
} else {
/* trapframe */
@@ -527,10 +527,10 @@ db_sp_trace(struct trapframe *tf, db_add
TRACE_DEBUG("lr0=%016lx\n", lr0);
for (; (count > 0) && (sp != 0); count--) {
- if (((pc - 4) == (db_addr_t)el0_trap) ||
- ((pc - 4) == (db_addr_t)el1_trap)) {
+ if ((pc == (db_addr_t)el0_trap) ||
+ (pc == (db_addr_t)el1_trap)) {
- pr_traceaddr("tf", sp, pc - 4, flags, pr);
+ pr_traceaddr("tf", sp, pc, flags, pr);
db_read_bytes((db_addr_t)sp, sizeof(tf_buf),
(char *)_buf);
@@ -541,7 +541,7 @@ db_sp_trace(struct trapframe *tf, db_add
sp = tf_buf.tf_sp;
pc = tf_buf.tf_pc;
if (pc == 0)
-pc = aarch64_strip_pac(tf_buf.tf_lr);
+pc = aarch64_strip_pac(tf_buf.tf_lr) - 4;
if (pc == 0)
break;
lr0 = aarch64_strip_pac(tf_buf.tf_lr);
@@ -593,7 +593,7 @@ db_sp_trace(struct trapframe *tf, db_add
}
sp += stacksize;
- pc = lr;
+ pc = lr - 4;
}
}
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Thu Sep 22 19:33:00 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c Log Message: If there was a "bl " instruction at the end of a function block, the stack analysis backtrace (bt/s) would fail because $lr would point to the beginning of the next function. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/aarch64/aarch64/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Mon Sep 19 17:24:23 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c
Log Message:
Fixed stack analyzing backtrace (bt/s) correctly for nested trapframes.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/aarch64/aarch64/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.19 src/sys/arch/aarch64/aarch64/db_trace.c:1.20
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.19 Tue Jun 7 23:55:25 2022
+++ src/sys/arch/aarch64/aarch64/db_trace.c Mon Sep 19 17:24:23 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.19 2022/06/07 23:55:25 ryo Exp $ */
+/* $NetBSD: db_trace.c,v 1.20 2022/09/19 17:24:23 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.19 2022/06/07 23:55:25 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.20 2022/09/19 17:24:23 ryo Exp $");
#include
#include
@@ -544,8 +544,8 @@ db_sp_trace(struct trapframe *tf, db_add
pc = aarch64_strip_pac(tf_buf.tf_lr);
if (pc == 0)
break;
-
- pr_traceaddr("sp", sp, pc, flags, pr);
+ lr0 = aarch64_strip_pac(tf_buf.tf_lr);
+ allow_leaf_function = true;
} else {
db_sym_t sym;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Mon Sep 19 17:24:23 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c Log Message: Fixed stack analyzing backtrace (bt/s) correctly for nested trapframes. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/aarch64/aarch64/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Mon Sep 19 17:23:14 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S db_interface.c
Log Message:
Move cpu_Debugger() into a more suitable file, from cpuswitch.S to
db_interface.c.
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/aarch64/aarch64/db_interface.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.38 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.39
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.38 Tue Jun 7 08:08:31 2022
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Mon Sep 19 17:23:14 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.38 2022/06/07 08:08:31 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.39 2022/09/19 17:23:14 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.38 2022/06/07 08:08:31 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.39 2022/09/19 17:23:14 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -334,16 +334,6 @@ ENTRY_NP(lwp_trampoline)
END(lwp_trampoline)
-#ifdef DDB
-ENTRY_NP(cpu_Debugger)
- stp fp, lr, [sp, #-16]!
- mov fp, sp
- brk #0x
- ldp fp, lr, [sp], #16
- ret
-END(cpu_Debugger)
-#endif /* DDB */
-
/*
* int cpu_set_onfault(struct faultbuf *fb)
*/
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.18 src/sys/arch/aarch64/aarch64/db_interface.c:1.19
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.18 Sun May 29 16:39:22 2022
+++ src/sys/arch/aarch64/aarch64/db_interface.c Mon Sep 19 17:23:14 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.18 2022/05/29 16:39:22 ryo Exp $ */
+/* $NetBSD: db_interface.c,v 1.19 2022/09/19 17:23:14 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.18 2022/05/29 16:39:22 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.19 2022/09/19 17:23:14 ryo Exp $");
#include
#include
@@ -639,3 +639,9 @@ db_ttbrdump(bool countmode, vaddr_t va,
db_dump_l0table(countmode, pmap_l0table(pm),
(pm == pmap_kernel()) ? 0xUL : 0, pr);
}
+
+void
+cpu_Debugger(void)
+{
+ __asm __volatile ("brk #0x");
+}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Mon Sep 19 17:23:14 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S db_interface.c Log Message: Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c. To generate a diff of this commit: cvs rdiff -u -r1.38 -r1.39 src/sys/arch/aarch64/aarch64/cpuswitch.S cvs rdiff -u -r1.18 -r1.19 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Aug 23 05:31:13 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S start.S
Log Message:
Bss clearing is now done at the beginning of start.S.
Some `__attribute__((__section__(".data")))' hack will no longer be needed.
To generate a diff of this commit:
cvs rdiff -u -r1.86 -r1.87 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.86 src/sys/arch/aarch64/aarch64/locore.S:1.87
--- src/sys/arch/aarch64/aarch64/locore.S:1.86 Fri May 6 06:09:50 2022
+++ src/sys/arch/aarch64/aarch64/locore.S Tue Aug 23 05:31:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -93,8 +93,6 @@ ASENTRY_NP(aarch64_start)
adrl x0, bootstk
mov sp, x0
- bl clear_bss
-
PRINT("boot NetBSD/aarch64\n")
bl 1f
@@ -238,18 +236,6 @@ ASEND(aarch64_start)
.align 2
-ASENTRY_NP(clear_bss)
- /* Zero the BSS. The size must be aligned 16, usually it should be. */
- adrl x14, __bss_start__
- adrl x15, __bss_end__
- b 2f
-1: stp xzr, xzr, [x14], #16
-2: cmp x14, x15
- b.lo 1b
- ret
-ASEND(clear_bss)
-
-
init_sysregs:
stp x0, lr, [sp, #-16]!
Index: src/sys/arch/aarch64/aarch64/start.S
diff -u src/sys/arch/aarch64/aarch64/start.S:1.12 src/sys/arch/aarch64/aarch64/start.S:1.13
--- src/sys/arch/aarch64/aarch64/start.S:1.12 Tue Aug 23 05:29:44 2022
+++ src/sys/arch/aarch64/aarch64/start.S Tue Aug 23 05:31:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: start.S,v 1.12 2022/08/23 05:29:44 ryo Exp $ */
+/* $NetBSD: start.S,v 1.13 2022/08/23 05:31:12 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -33,7 +33,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: start.S,v 1.12 2022/08/23 05:29:44 ryo Exp $")
+RCSID("$NetBSD: start.S,v 1.13 2022/08/23 05:31:12 ryo Exp $")
/*
* Padding at start of kernel image to make room for 64-byte header
@@ -81,6 +81,19 @@ start:
br x9
9:
+
+ /*
+ * Zero the BSS
+ */
+ adrl x8, __bss_start__
+ adrl x9, __bss_end__
+ /* while (x8 < x9) *(uint128_t *)x8++ = 0; */
+ b 2f
+1: stp xzr, xzr, [x8], #16
+2: cmp x8, x9
+ b.lo 1b
+
+
mrs x8, CurrentEL
lsr x8, x8, #2
cmp x8, #0x2
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Aug 23 05:31:13 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S start.S
Log Message:
Bss clearing is now done at the beginning of start.S.
Some `__attribute__((__section__(".data")))' hack will no longer be needed.
To generate a diff of this commit:
cvs rdiff -u -r1.86 -r1.87 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Aug 23 05:29:44 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: start.S
Log Message:
Align the loaded kernel image to 2Mbytes, if necessary.
It appears that there are bootloaders that cannot specify the load address or
ignore it.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/start.S
diff -u src/sys/arch/aarch64/aarch64/start.S:1.11 src/sys/arch/aarch64/aarch64/start.S:1.12
--- src/sys/arch/aarch64/aarch64/start.S:1.11 Tue Sep 15 09:28:20 2020
+++ src/sys/arch/aarch64/aarch64/start.S Tue Aug 23 05:29:44 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: start.S,v 1.11 2020/09/15 09:28:20 ryo Exp $ */
+/* $NetBSD: start.S,v 1.12 2022/08/23 05:29:44 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -33,12 +33,13 @@
#include
#include "assym.h"
-RCSID("$NetBSD: start.S,v 1.11 2020/09/15 09:28:20 ryo Exp $")
+RCSID("$NetBSD: start.S,v 1.12 2022/08/23 05:29:44 ryo Exp $")
/*
* Padding at start of kernel image to make room for 64-byte header
* (non-ELF booting)
*/
+.header:
.space 64, 0x0
/*
@@ -46,6 +47,40 @@ RCSID("$NetBSD: start.S,v 1.11 2020/09/1
*/
.global start
start:
+ /* DON'T CLOBBER X0-X3 REGISTERS. THEY ARE UBOOT ARGUMENTS */
+
+ /*
+ * Relocate to L2_SIZE(2Mbyte) align if necessary
+ *
+ * x8 = currently loaded address
+ * x9 = (x8 + L2_SIZE - 1) & -L2_SIZE = new (aligned) loaded address
+ */
+ adrl x8, .header
+ mov x9, #(L2_SIZE-1)
+ add x9, x9, x8
+ and x9, x9, #-L2_SIZE
+ cmp x8, x9
+ b.eq 9f
+
+ /* x10 = size = (_edata - __kernel_text) */
+ adrl x10, _edata
+ adrl x11, __kernel_text
+ sub x10, x10, x11
+
+ /* do memmove(x9, x8, x10) */
+ add x8, x8, x10
+ add x13, x9, x10
+1:
+ ldp x11, x12, [x8, #-16]!
+ stp x11, x12, [x13, #-16]!
+ cmp x13, x9
+ b.hi 1b
+
+ /* jump to new (aligned) loaded address */
+ add x9, x9, #(start - .header) /* skip header */
+ br x9
+9:
+
mrs x8, CurrentEL
lsr x8, x8, #2
cmp x8, #0x2
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Tue Aug 23 05:29:44 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: start.S Log Message: Align the loaded kernel image to 2Mbytes, if necessary. It appears that there are bootloaders that cannot specify the load address or ignore it. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/start.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Fri Aug 19 07:45:50 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: When accessed in mmap by the device pager, pmap_enter() may be called with prot == PROT_WRITE. To generate a diff of this commit: cvs rdiff -u -r1.137 -r1.138 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.137 src/sys/arch/aarch64/aarch64/pmap.c:1.138 --- src/sys/arch/aarch64/aarch64/pmap.c:1.137 Tue May 3 20:09:54 2022 +++ src/sys/arch/aarch64/aarch64/pmap.c Fri Aug 19 07:45:50 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.137 2022/05/03 20:09:54 skrll Exp $ */ +/* $NetBSD: pmap.c,v 1.138 2022/08/19 07:45:50 ryo Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.137 2022/05/03 20:09:54 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.138 2022/08/19 07:45:50 ryo Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -1914,7 +1914,7 @@ _pmap_enter(struct pmap *pm, vaddr_t va, KASSERT_PM_ADDR(pm, va); KASSERT(!IN_DIRECTMAP_ADDR(va)); - KASSERT(prot & VM_PROT_READ); + KASSERT((prot & VM_PROT_ALL) != VM_PROT_NONE); #ifdef PMAPCOUNTERS PMAP_COUNT(mappings);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Fri Aug 19 07:45:50 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: When accessed in mmap by the device pager, pmap_enter() may be called with prot == PROT_WRITE. To generate a diff of this commit: cvs rdiff -u -r1.137 -r1.138 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Wed Aug 3 17:55:05 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: pmapboot.c
Log Message:
fix build with options PMAPBOOT_DEBUG and options DDB
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/aarch64/pmapboot.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmapboot.c
diff -u src/sys/arch/aarch64/aarch64/pmapboot.c:1.17 src/sys/arch/aarch64/aarch64/pmapboot.c:1.18
--- src/sys/arch/aarch64/aarch64/pmapboot.c:1.17 Fri Apr 30 20:07:22 2021
+++ src/sys/arch/aarch64/aarch64/pmapboot.c Wed Aug 3 17:55:05 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmapboot.c,v 1.17 2021/04/30 20:07:22 skrll Exp $ */
+/* $NetBSD: pmapboot.c,v 1.18 2022/08/03 17:55:05 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.17 2021/04/30 20:07:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.18 2022/08/03 17:55:05 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -43,6 +43,9 @@ __KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v
#include
#include
+#ifdef DDB
+#include
+#endif
#include
#include
#include
@@ -162,7 +165,7 @@ pmapboot_pte_print(pt_entry_t pte, int l
void (*pr)(const char *, ...) __printflike(1, 2))
{
#ifdef DDB
- db_pmap_pte_print(pte, level, pr);
+ db_pte_print(pte, level, pr);
#else
__USE(level);
pr(" %s PA=%016lx\n",
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Wed Aug 3 17:55:05 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmapboot.c Log Message: fix build with options PMAPBOOT_DEBUG and options DDB To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/aarch64/pmapboot.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: riastradh
Date: Thu Jul 28 09:14:12 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: cpu_machdep.c
Log Message:
aarch64: Refactor splhigh and restore in dosoftints.
No functional change intended. splhigh always returns ci->ci_cpl,
which should not be changing at this point. Makes the bracketing by
splhigh/splx clearer.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/cpu_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu_machdep.c
diff -u src/sys/arch/aarch64/aarch64/cpu_machdep.c:1.12 src/sys/arch/aarch64/aarch64/cpu_machdep.c:1.13
--- src/sys/arch/aarch64/aarch64/cpu_machdep.c:1.12 Thu Sep 23 15:19:03 2021
+++ src/sys/arch/aarch64/aarch64/cpu_machdep.c Thu Jul 28 09:14:12 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_machdep.c,v 1.12 2021/09/23 15:19:03 ryo Exp $ */
+/* $NetBSD: cpu_machdep.c,v 1.13 2022/07/28 09:14:12 riastradh Exp $ */
/*-
* Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu_machdep.c,v 1.12 2021/09/23 15:19:03 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu_machdep.c,v 1.13 2022/07/28 09:14:12 riastradh Exp $");
#include "opt_multiprocessor.h"
@@ -114,8 +114,10 @@ dosoftints(void)
struct cpu_info * const ci = curcpu();
const int opl = ci->ci_cpl;
const uint32_t softiplmask = SOFTIPLMASK(opl);
+ int s;
- splhigh();
+ s = splhigh();
+ KASSERT(s == opl);
for (;;) {
u_int softints = ci->ci_softints & softiplmask;
KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0));
@@ -130,8 +132,7 @@ dosoftints(void)
kpreempt(-2);
}
#endif
- splx(opl);
- return;
+ break;
}
#define DOSOFTINT(n) \
if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) {\
@@ -147,6 +148,7 @@ dosoftints(void)
DOSOFTINT(CLOCK);
panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl);
}
+ splx(s);
}
#endif /* !__HAVE_PIC_FAST_SOFTINTS */
#endif /* __HAVE_FAST_SOFTINTS */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: riastradh Date: Thu Jul 28 09:14:12 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpu_machdep.c Log Message: aarch64: Refactor splhigh and restore in dosoftints. No functional change intended. splhigh always returns ci->ci_cpl, which should not be changing at this point. Makes the bracketing by splhigh/splx clearer. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/cpu_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Tue Jun 7 23:55:25 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c Log Message: Functionalize frame pointer backtrace. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/aarch64/aarch64/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Jun 7 23:55:25 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c
Log Message:
Functionalize frame pointer backtrace.
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/aarch64/aarch64/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.18 src/sys/arch/aarch64/aarch64/db_trace.c:1.19
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.18 Tue Jun 7 08:08:31 2022
+++ src/sys/arch/aarch64/aarch64/db_trace.c Tue Jun 7 23:55:25 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.18 2022/06/07 08:08:31 ryo Exp $ */
+/* $NetBSD: db_trace.c,v 1.19 2022/06/07 23:55:25 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.18 2022/06/07 08:08:31 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.19 2022/06/07 23:55:25 ryo Exp $");
#include
#include
@@ -598,11 +598,90 @@ db_sp_trace(struct trapframe *tf, db_add
}
}
+static void
+db_fp_trace(struct trapframe *tf, db_addr_t fp, db_expr_t count, int flags,
+void (*pr)(const char *, ...) __printflike(1, 2))
+{
+ uint64_t lr;
+ uint64_t lastlr, lastfp;
+
+ if (tf != NULL) {
+ pr_frame(tf, pr);
+ lastfp = lastlr = lr = fp = 0;
+
+ db_read_bytes((db_addr_t)>tf_pc, sizeof(lr), (char *));
+ db_read_bytes((db_addr_t)>tf_reg[29], sizeof(fp), (char *));
+ lr = aarch64_strip_pac(lr);
+
+ pr_traceaddr("fp", fp, lr - 4, flags, pr);
+ }
+
+ for (; (count > 0) && (fp != 0); count--) {
+
+ lastfp = fp;
+ fp = lr = 0;
+ /*
+ * normal stack frame
+ * fp[0] saved fp(x29) value
+ * fp[1] saved lr(x30) value
+ */
+ db_read_bytes(lastfp + 0, sizeof(fp), (char *));
+ db_read_bytes(lastfp + 8, sizeof(lr), (char *));
+ lr = aarch64_strip_pac(lr);
+
+ if (lr == 0 || ((flags & TRACEFLAG_USERSPACE) == 0 &&
+ IN_USER_VM_ADDRESS(lr)))
+ break;
+
+ if (((char *)(lr - 4) == (char *)el0_trap) ||
+ ((char *)(lr - 4) == (char *)el1_trap)) {
+
+ tf = (struct trapframe *)fp;
+
+ lastfp = (uint64_t)tf;
+ lastlr = lr;
+ lr = fp = 0;
+ db_read_bytes((db_addr_t)>tf_pc, sizeof(lr),
+ (char *));
+ if (lr == 0) {
+/*
+ * The exception may have been from a
+ * jump to null, so the null pc we
+ * would return to is useless. Try
+ * x[30] instead -- that will be the
+ * return address for the jump.
+ */
+db_read_bytes((db_addr_t)>tf_reg[30],
+sizeof(lr), (char *));
+ }
+ db_read_bytes((db_addr_t)>tf_reg[29], sizeof(fp),
+ (char *));
+ lr = aarch64_strip_pac(lr);
+
+ pr_traceaddr("tf", (db_addr_t)tf, lastlr - 4, flags, pr);
+
+ if (lr == 0)
+break;
+
+ pr_frame(tf, pr);
+ tf = NULL;
+
+ if ((flags & TRACEFLAG_USERSPACE) == 0 &&
+ IN_USER_VM_ADDRESS(lr))
+break;
+
+ pr_traceaddr("fp", fp, lr, flags, pr);
+ } else {
+ pr_traceaddr("fp", fp, lr - 4, flags, pr);
+ }
+ }
+}
+
void
db_stack_trace_print(db_expr_t addr, bool have_addr, db_expr_t count,
const char *modif, void (*pr)(const char *, ...) __printflike(1, 2))
{
- uint64_t lr, fp, lastlr, lastfp;
+ uint64_t fp;
struct trapframe *tf = NULL;
int flags = 0;
bool trace_thread = false;
@@ -734,78 +813,8 @@ db_stack_trace_print(db_expr_t addr, boo
if (trace_sp) {
/* trace $lr pushed to sp */
db_sp_trace(tf, fp, count, flags, pr);
- return;
- }
-
- /* trace $fp linked list */
- if (tf != NULL) {
- pr_frame(tf, pr);
- lastfp = lastlr = lr = fp = 0;
-
- db_read_bytes((db_addr_t)>tf_pc, sizeof(lr), (char *));
- db_read_bytes((db_addr_t)>tf_reg[29], sizeof(fp), (char *));
- lr = aarch64_strip_pac(lr);
-
- pr_traceaddr("fp", fp, lr - 4, flags, pr);
- }
-
- for (; (count > 0) && (fp != 0); count--) {
-
- lastfp = fp;
- fp = lr = 0;
- /*
- * normal stack frame
- * fp[0] saved fp(x29) value
- * fp[1] saved lr(x30) value
- */
- db_read_bytes(lastfp + 0, sizeof(fp), (char *));
- db_read_bytes(lastfp + 8, sizeof(lr), (char *));
- lr = aarch64_strip_pac(lr);
-
- if (lr == 0 || ((flags & TRACEFLAG_USERSPACE) == 0 &&
- IN_USER_VM_ADDRESS(lr)))
- break;
-
- if (((char *)(lr - 4) == (char *)el0_trap) ||
- ((char *)(lr - 4) == (char *)el1_trap)) {
-
- tf = (struct trapframe *)fp;
-
- lastfp = (uint64_t)tf;
- lastlr = lr;
- lr = fp = 0;
- db_read_bytes((db_addr_t)>tf_pc, sizeof(lr),
- (char *));
- if (lr == 0) {
-/*
- * The exception may have been from a
- * jump to null, so the null pc we
- * would return to is useless. Try
- * x[30] instead -- that will be the
- * return address for the jump.
- */
-db_read_bytes((db_addr_t)>tf_reg[30],
-sizeof(lr), (char *));
- }
- db_read_bytes((db_addr_t)>tf_reg[29], sizeof(fp),
- (char *));
- lr =
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Tue Jun 7 04:12:10 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S Log Message: use stp if possible. To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/arch/aarch64/aarch64/cpuswitch.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Jun 7 04:12:10 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S
Log Message:
use stp if possible.
To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/aarch64/aarch64/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.36 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.37
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.36 Fri Jun 3 19:59:59 2022
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Tue Jun 7 04:12:10 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.36 2022/06/03 19:59:59 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.37 2022/06/07 04:12:10 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.36 2022/06/03 19:59:59 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.37 2022/06/07 04:12:10 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -61,8 +61,13 @@ ENTRY_NP(cpu_switchto)
stp x27, x28, [sp, #TF_X27]
stp x29, x30, [sp, #TF_X29]
#ifdef DDB
- str lr, [sp, #TF_PC] /* for backtrace */
- str xzr, [sp, #TF_SP] /* mark as switchframe */
+ /* mark as switchframe for backtrace */
+ .if TF_SP + 8 == TF_PC
+ stp xzr, lr, [sp, #TF_SP]
+ .else
+ str xzr, [sp, #TF_SP]
+ str lr, [sp, #TF_PC]
+ .endif
#endif
/*
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Fri Jun 3 19:59:59 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S Log Message: optimize. reduce 2 instructions. To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36 src/sys/arch/aarch64/aarch64/cpuswitch.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Fri Jun 3 19:59:59 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S
Log Message:
optimize. reduce 2 instructions.
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/aarch64/aarch64/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.35 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.36
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.35 Tue May 31 07:40:25 2022
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Fri Jun 3 19:59:59 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.35 2022/05/31 07:40:25 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.36 2022/06/03 19:59:59 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.35 2022/05/31 07:40:25 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.36 2022/06/03 19:59:59 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -156,9 +156,8 @@ ENTRY_NP(cpu_switchto_softint)
stp x19, x20, [sp, #-16]! /* save */
sub sp, sp, #TF_SIZE /* make switchframe */
adr x2, softint_cleanup /* return address for cpu_switchto() */
- mov x20, lr /* x20 := original lr */
mrs x19, daif /* x19 := original interrupt mask */
- stp x19, x20, [sp, #TF_X19]
+ stp x19, lr, [sp, #TF_X19] /* x20 := original lr */
stp x21, x22, [sp, #TF_X21]
stp x23, x24, [sp, #TF_X23]
stp x25, x26, [sp, #TF_X25]
@@ -241,9 +240,8 @@ ENTRY_NP(cpu_switchto_softint)
1:
#endif
- ldp x19, x20, [sp, #TF_X19]
+ ldp x19, lr, [sp, #TF_X19] /* restore pinned_lwp lr */
msr daif, x19 /* restore interrupt mask */
- mov lr, x20 /* restore pinned_lwp lr */
add sp, sp, #TF_SIZE /* unwind switchframe */
ldp x19, x20, [sp], #16 /* restore */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue May 31 07:40:25 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S
Log Message:
make a frame pointer to show a backtrace correctly.
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/aarch64/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.34 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.35
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.34 Fri May 6 06:09:50 2022
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Tue May 31 07:40:25 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.34 2022/05/06 06:09:50 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.35 2022/05/31 07:40:25 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.34 2022/05/06 06:09:50 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.35 2022/05/31 07:40:25 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -315,7 +315,10 @@ END(lwp_trampoline)
#ifdef DDB
ENTRY_NP(cpu_Debugger)
+ stp fp, lr, [sp, #-16]!
+ mov fp, sp
brk #0x
+ ldp fp, lr, [sp], #16
ret
END(cpu_Debugger)
#endif /* DDB */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Tue May 31 07:40:25 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S Log Message: make a frame pointer to show a backtrace correctly. To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/aarch64/cpuswitch.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Sun May 29 23:43:50 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c
Log Message:
Display the trap type of trapframe when backtracing.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.15 src/sys/arch/aarch64/aarch64/db_trace.c:1.16
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.15 Sun May 29 16:13:41 2022
+++ src/sys/arch/aarch64/aarch64/db_trace.c Sun May 29 23:43:49 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.15 2022/05/29 16:13:41 ryo Exp $ */
+/* $NetBSD: db_trace.c,v 1.16 2022/05/29 23:43:49 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.15 2022/05/29 16:13:41 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.16 2022/05/29 23:43:49 ryo Exp $");
#include
#include
@@ -254,14 +254,17 @@ db_stack_trace_print(db_expr_t addr, boo
if (tf != NULL) {
#if defined(_KERNEL)
- bool is_switchframe = (tf->tf_sp == 0);
- (*pr)(" %s %p (%zu bytes) \n",
- is_switchframe ? "switchframe" : "trapframe",
- tf, sizeof(*tf));
- if (is_switchframe)
+ if (tf->tf_sp == 0) {
+ (*pr)(" switchframe %p (%zu bytes) \n",
+ tf, sizeof(*tf));
dump_switchframe(tf, pr);
- else
+ } else {
+ (*pr)(" %s: trapframe %p (%zu bytes) \n",
+ (tf->tf_esr == -1) ? "Interrupt" :
+ eclass_trapname(__SHIFTOUT(tf->tf_esr, ESR_EC)),
+ tf, sizeof(*tf));
dump_trapframe(tf, pr);
+ }
(*pr)(""
"\n");
@@ -324,7 +327,9 @@ db_stack_trace_print(db_expr_t addr, boo
if (lr == 0)
break;
- (*pr)(" trapframe %p (%zu bytes) \n",
+ (*pr)(" %s: trapframe %p (%zu bytes) \n",
+ (tf->tf_esr == -1) ? "Interrupt" :
+ eclass_trapname(__SHIFTOUT(tf->tf_esr, ESR_EC)),
tf, sizeof(*tf));
dump_trapframe(tf, pr);
(*pr)(""
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 23:43:50 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c Log Message: Display the trap type of trapframe when backtracing. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 23:39:59 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: idle_machdep.S vectors.S Log Message: ESR_EL1 and FAR_EL1 are not required in interrupt trapframe and their values are meaningless. To identify it as an interrupt trap frame, store -1 and 0. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/idle_machdep.S cvs rdiff -u -r1.26 -r1.27 src/sys/arch/aarch64/aarch64/vectors.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Sun May 29 23:39:59 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: idle_machdep.S vectors.S
Log Message:
ESR_EL1 and FAR_EL1 are not required in interrupt trapframe and their values
are meaningless.
To identify it as an interrupt trap frame, store -1 and 0.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/idle_machdep.S
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/aarch64/aarch64/vectors.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.11 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.12
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.11 Sun Oct 10 08:59:45 2021
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Sun May 29 23:39:59 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.11 2021/10/10 08:59:45 skrll Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.12 2022/05/29 23:39:59 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.11 2021/10/10 08:59:45 skrll Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.12 2022/05/29 23:39:59 ryo Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
@@ -68,6 +68,9 @@ ENTRY(cpu_idle)
stp x29, x30, [sp, #TF_X29] /* save x29,x30 */
#ifdef DDB
add x29, sp, #TF_X29 /* link frame for backtrace */
+ mov x0, #-1
+ str x0, [sp, #TF_ESR]
+ str xzr, [sp, #TF_FAR]
#endif
/* fill the minimum required trapframe */
Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.26 src/sys/arch/aarch64/aarch64/vectors.S:1.27
--- src/sys/arch/aarch64/aarch64/vectors.S:1.26 Fri May 6 06:09:50 2022
+++ src/sys/arch/aarch64/aarch64/vectors.S Sun May 29 23:39:59 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.S,v 1.26 2022/05/06 06:09:50 ryo Exp $ */
+/* $NetBSD: vectors.S,v 1.27 2022/05/29 23:39:59 ryo Exp $ */
#include
#include
@@ -11,7 +11,7 @@
#include "opt_dtrace.h"
#include "opt_gic.h"
-RCSID("$NetBSD: vectors.S,v 1.26 2022/05/06 06:09:50 ryo Exp $")
+RCSID("$NetBSD: vectors.S,v 1.27 2022/05/29 23:39:59 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -29,7 +29,7 @@ RCSID("$NetBSD: vectors.S,v 1.26 2022/05
/*
* Template for the handler functions.
*/
-.macro vector_func, func, el, label, tpidr
+.macro vector_func, func, el, intr_p, label, tpidr
.align 7 /* cacheline-aligned */
ENTRY_NBTI(\func)
@@ -76,8 +76,13 @@ ENTRY_NBTI(\func)
mrs x22, spsr_el1
str x22, [sp, #TF_SPSR]
+ .if \intr_p == 1
+ mov x23, #-1
+ mov x24, xzr
+ .else
mrs x23, esr_el1
mrs x24, far_el1
+ .endif
.if TF_ESR + 8 == TF_FAR
stp x23, x24, [sp, #TF_ESR]
@@ -126,25 +131,25 @@ END(\func)
/*
* The functions.
*/
-vector_func el1t_sync_handler, 1, trap_el1t_sync
-vector_func el1t_irq_handler, 1, trap_el1t_irq
-vector_func el1t_fiq_handler, 1, trap_el1t_fiq
-vector_func el1t_error_handler, 1, trap_el1t_error
-
-vector_func el1h_sync_handler, 1, trap_el1h_sync
-vector_func el1h_intr_handler, 1, cpu_irq
-vector_func el1h_fiq_handler, 1, cpu_fiq
-vector_func el1h_error_handler, 1, trap_el1h_error
-
-vector_func el0_sync_handler, 0, trap_el0_sync
-vector_func el0_intr_handler, 0, cpu_irq
-vector_func el0_fiq_handler, 0, cpu_fiq
-vector_func el0_error_handler, 0, trap_el0_error
-
-vector_func el0_32sync_handler, 0, trap_el0_32sync, ro
-vector_func el0_32intr_handler, 0, cpu_irq, ro
-vector_func el0_32fiq_handler, 0, cpu_fiq, ro
-vector_func el0_32error_handler, 0, trap_el0_32error, ro
+vector_func el1t_sync_handler, 1, 0, trap_el1t_sync
+vector_func el1t_irq_handler, 1, 1, trap_el1t_irq
+vector_func el1t_fiq_handler, 1, 1, trap_el1t_fiq
+vector_func el1t_error_handler, 1, 0, trap_el1t_error
+
+vector_func el1h_sync_handler, 1, 0, trap_el1h_sync
+vector_func el1h_intr_handler, 1, 1, cpu_irq
+vector_func el1h_fiq_handler, 1, 1, cpu_fiq
+vector_func el1h_error_handler, 1, 0, trap_el1h_error
+
+vector_func el0_sync_handler, 0, 0, trap_el0_sync
+vector_func el0_intr_handler, 0, 1, cpu_irq
+vector_func el0_fiq_handler, 0, 1, cpu_fiq
+vector_func el0_error_handler, 0, 0, trap_el0_error
+
+vector_func el0_32sync_handler, 0, 0, trap_el0_32sync, ro
+vector_func el0_32intr_handler, 0, 1, cpu_irq, ro
+vector_func el0_32fiq_handler, 0, 1, cpu_fiq, ro
+vector_func el0_32error_handler, 0, 0, trap_el0_32error, ro
/*
* The vector table. Must be aligned to 2048.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Sun May 29 16:45:00 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
Log Message:
- Display "cpu[]" instead of "cpu[]".
- Also add cpu_info->ci_onproc to display.
To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/aarch64/aarch64/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.43 src/sys/arch/aarch64/aarch64/db_machdep.c:1.44
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.43 Mon May 2 10:13:15 2022
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Sun May 29 16:45:00 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.43 2022/05/02 10:13:15 skrll Exp $ */
+/* $NetBSD: db_machdep.c,v 1.44 2022/05/29 16:45:00 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.43 2022/05/02 10:13:15 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.44 2022/05/29 16:45:00 ryo Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -337,33 +337,35 @@ static void
show_cpuinfo(struct cpu_info *ci)
{
struct cpu_info cpuinfobuf;
- cpuid_t cpuid;
+ u_int cpuidx;
int i;
db_read_bytes((db_addr_t)ci, sizeof(cpuinfobuf), (char *));
- cpuid = cpuinfobuf.ci_cpuid;
+ cpuidx = cpu_index();
db_printf("cpu_info=%p, cpu_name=%s\n", ci, cpuinfobuf.ci_cpuname);
- db_printf("%p cpu[%lu].ci_cpuid= %lu\n",
- >ci_cpuid, cpuid, cpuinfobuf.ci_cpuid);
- db_printf("%p cpu[%lu].ci_curlwp = %p\n",
- >ci_curlwp, cpuid, cpuinfobuf.ci_curlwp);
+ db_printf("%p cpu[%u].ci_cpuid = 0x%lx\n",
+ >ci_cpuid, cpuidx, cpuinfobuf.ci_cpuid);
+ db_printf("%p cpu[%u].ci_curlwp= %p\n",
+ >ci_curlwp, cpuidx, cpuinfobuf.ci_curlwp);
+ db_printf("%p cpu[%u].ci_onproc= %p\n",
+ >ci_onproc, cpuidx, cpuinfobuf.ci_onproc);
for (i = 0; i < SOFTINT_COUNT; i++) {
- db_printf("%p cpu[%lu].ci_softlwps[%d] = %p\n",
- >ci_softlwps[i], cpuid, i, cpuinfobuf.ci_softlwps[i]);
+ db_printf("%p cpu[%u].ci_softlwps[%d] = %p\n",
+ >ci_softlwps[i], cpuidx, i, cpuinfobuf.ci_softlwps[i]);
}
- db_printf("%p cpu[%lu].ci_lastintr = %" PRIu64 "\n",
- >ci_lastintr, cpuid, cpuinfobuf.ci_lastintr);
- db_printf("%p cpu[%lu].ci_want_resched = %d\n",
- >ci_want_resched, cpuid, cpuinfobuf.ci_want_resched);
- db_printf("%p cpu[%lu].ci_cpl = %d\n",
- >ci_cpl, cpuid, cpuinfobuf.ci_cpl);
- db_printf("%p cpu[%lu].ci_softints = 0x%08x\n",
- >ci_softints, cpuid, cpuinfobuf.ci_softints);
- db_printf("%p cpu[%lu].ci_intr_depth = %u\n",
- >ci_intr_depth, cpuid, cpuinfobuf.ci_intr_depth);
- db_printf("%p cpu[%lu].ci_biglock_count = %u\n",
- >ci_biglock_count, cpuid, cpuinfobuf.ci_biglock_count);
+ db_printf("%p cpu[%u].ci_lastintr = %" PRIu64 "\n",
+ >ci_lastintr, cpuidx, cpuinfobuf.ci_lastintr);
+ db_printf("%p cpu[%u].ci_want_resched = %d\n",
+ >ci_want_resched, cpuidx, cpuinfobuf.ci_want_resched);
+ db_printf("%p cpu[%u].ci_cpl = %d\n",
+ >ci_cpl, cpuidx, cpuinfobuf.ci_cpl);
+ db_printf("%p cpu[%u].ci_softints = 0x%08x\n",
+ >ci_softints, cpuidx, cpuinfobuf.ci_softints);
+ db_printf("%p cpu[%u].ci_intr_depth= %u\n",
+ >ci_intr_depth, cpuidx, cpuinfobuf.ci_intr_depth);
+ db_printf("%p cpu[%u].ci_biglock_count = %u\n",
+ >ci_biglock_count, cpuidx, cpuinfobuf.ci_biglock_count);
}
void
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 16:45:00 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_machdep.c Log Message: - Display "cpu[]" instead of "cpu[]". - Also add cpu_info->ci_onproc to display. To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/arch/aarch64/aarch64/db_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Sun May 29 16:39:22 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c
Log Message:
Use the PAR register to check for accessibility in db_(read|write)_bytes().
db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.
- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/aarch64/db_interface.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.17 src/sys/arch/aarch64/aarch64/db_interface.c:1.18
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.17 Thu May 26 17:11:05 2022
+++ src/sys/arch/aarch64/aarch64/db_interface.c Sun May 29 16:39:22 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.17 2022/05/26 17:11:05 ryo Exp $ */
+/* $NetBSD: db_interface.c,v 1.18 2022/05/29 16:39:22 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.17 2022/05/26 17:11:05 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.18 2022/05/29 16:39:22 ryo Exp $");
#include
#include
@@ -39,7 +39,9 @@ __KERNEL_RCSID(0, "$NetBSD: db_interface
#include
#endif
+#include
#include
+#include
#include
#include
@@ -57,19 +59,40 @@ __KERNEL_RCSID(0, "$NetBSD: db_interface
db_regs_t ddb_regs;
-static int
-db_validate_address(vaddr_t addr)
+static bool
+db_accessible_address(vaddr_t addr, bool readonly)
{
- struct proc *p = curcpu()->ci_onproc->l_proc;
- struct pmap *pmap;
+ register_t s;
+ uint64_t par;
+ int space;
- if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
- addr >= VM_MAXUSER_ADDRESS)
- pmap = pmap_kernel();
- else
- pmap = p->p_vmspace->vm_map.pmap;
+ space = aarch64_addressspace(addr);
+ if (space != AARCH64_ADDRSPACE_LOWER &&
+ space != AARCH64_ADDRSPACE_UPPER)
+ return false;
+
+ s = daif_disable(DAIF_I|DAIF_F);
- return (pmap_extract(pmap, addr, NULL) == false);
+ switch (aarch64_addressspace(addr)) {
+ case AARCH64_ADDRSPACE_LOWER:
+ if (readonly)
+ reg_s1e0r_write(addr);
+ else
+ reg_s1e0w_write(addr);
+ break;
+ case AARCH64_ADDRSPACE_UPPER:
+ if (readonly)
+ reg_s1e1r_write(addr);
+ else
+ reg_s1e1w_write(addr);
+ break;
+ }
+ isb();
+ par = reg_par_el1_read();
+
+ reg_daif_write(s);
+
+ return ((par & PAR_F) == 0);
}
void
@@ -82,7 +105,7 @@ db_read_bytes(vaddr_t addr, size_t size,
const vaddr_t va = (vaddr_t)src;
uintptr_t tmp;
- if (lastpage != atop(va) && db_validate_address(va)) {
+ if (lastpage != atop(va) && !db_accessible_address(va, true)) {
db_printf("address %p is invalid\n", src);
memset(data, 0, size); /* stubs are filled by zero */
return;
@@ -190,17 +213,19 @@ db_write_bytes(vaddr_t addr, size_t size
data += s;
}
- /* XXX: need to check read only block/page */
for (dst = (char *)addr; size > 0;) {
const vaddr_t va = (vaddr_t)dst;
uintptr_t tmp;
- if (lastpage != atop(va) && db_validate_address(va)) {
+ if (lastpage != atop(va) && !db_accessible_address(va, false)) {
db_printf("address %p is invalid\n", dst);
return;
}
lastpage = atop(va);
+ if (aarch64_pan_enabled)
+ reg_pan_write(0); /* disable PAN */
+
tmp = (uintptr_t)dst | (uintptr_t)data;
if (size >= 8 && (tmp & 7) == 0) {
*(uint64_t *)dst = *(const uint64_t *)data;
@@ -221,6 +246,9 @@ db_write_bytes(vaddr_t addr, size_t size
*dst++ = *data++;
size--;
}
+
+ if (aarch64_pan_enabled)
+ reg_pan_write(1); /* enable PAN */
}
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 16:39:22 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: Use the PAR register to check for accessibility in db_(read|write)_bytes(). db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check if it is accessible in context at that time, not pmap_extract() which uses the struct pmap of the process. - It also checks if the address is writable. - db_write_bytes() also requires ARMV81_PAN control. To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 16:14:42 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpu.c Log Message: fix build without options DDB To generate a diff of this commit: cvs rdiff -u -r1.69 -r1.70 src/sys/arch/aarch64/aarch64/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 16:14:42 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpu.c Log Message: fix build without options DDB To generate a diff of this commit: cvs rdiff -u -r1.69 -r1.70 src/sys/arch/aarch64/aarch64/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/cpu.c diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.69 src/sys/arch/aarch64/aarch64/cpu.c:1.70 --- src/sys/arch/aarch64/aarch64/cpu.c:1.69 Thu Mar 3 06:26:05 2022 +++ src/sys/arch/aarch64/aarch64/cpu.c Sun May 29 16:14:41 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.c,v 1.69 2022/03/03 06:26:05 riastradh Exp $ */ +/* $NetBSD: cpu.c,v 1.70 2022/05/29 16:14:41 ryo Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.69 2022/03/03 06:26:05 riastradh Exp $"); +__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.70 2022/05/29 16:14:41 ryo Exp $"); #include "locators.h" #include "opt_arm_debug.h" @@ -170,7 +170,9 @@ cpu_attach(device_t dv, cpuid_t id) return; } +#ifdef DDB db_machdep_init(ci); +#endif cpu_init_counter(ci);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Sun May 29 16:13:41 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_trace.c vm_machdep.c
Log Message:
Simplified termination conditions for ddb backtrace.
Exit backtrace when the user trapframe is invalid. (Mainly in kernel threads).
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/db_trace.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_trace.c
diff -u src/sys/arch/aarch64/aarch64/db_trace.c:1.14 src/sys/arch/aarch64/aarch64/db_trace.c:1.15
--- src/sys/arch/aarch64/aarch64/db_trace.c:1.14 Sat Nov 27 14:11:04 2021
+++ src/sys/arch/aarch64/aarch64/db_trace.c Sun May 29 16:13:41 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.14 2021/11/27 14:11:04 riastradh Exp $ */
+/* $NetBSD: db_trace.c,v 1.15 2022/05/29 16:13:41 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.14 2021/11/27 14:11:04 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.15 2022/05/29 16:13:41 ryo Exp $");
#include
#include
@@ -288,7 +288,7 @@ db_stack_trace_print(db_expr_t addr, boo
db_read_bytes(lastfp + 8, sizeof(lr), (char *));
lr = aarch64_strip_pac(lr);
- if (!trace_user && IN_USER_VM_ADDRESS(lr))
+ if (lr == 0 || (!trace_user && IN_USER_VM_ADDRESS(lr)))
break;
#if defined(_KERNEL)
@@ -319,14 +319,6 @@ db_stack_trace_print(db_expr_t addr, boo
(char *));
lr = aarch64_strip_pac(lr);
- /*
- * no need to display the frame of el0_trap
- * of kernel thread
- */
- if (((char *)(lastlr - 4) == (char *)el0_trap) &&
- (lr == 0))
-break;
-
pr_traceaddr("tf", (db_addr_t)tf, lastlr - 4, flags, pr);
if (lr == 0)
Index: src/sys/arch/aarch64/aarch64/vm_machdep.c
diff -u src/sys/arch/aarch64/aarch64/vm_machdep.c:1.12 src/sys/arch/aarch64/aarch64/vm_machdep.c:1.13
--- src/sys/arch/aarch64/aarch64/vm_machdep.c:1.12 Mon Aug 30 22:54:40 2021
+++ src/sys/arch/aarch64/aarch64/vm_machdep.c Sun May 29 16:13:41 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: vm_machdep.c,v 1.12 2021/08/30 22:54:40 jmcneill Exp $ */
+/* $NetBSD: vm_machdep.c,v 1.13 2022/05/29 16:13:41 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
#include "opt_ddb.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.12 2021/08/30 22:54:40 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.13 2022/05/29 16:13:41 ryo Exp $");
#include
#include
@@ -162,9 +162,9 @@ cpu_lwp_fork(struct lwp *l1, struct lwp
struct trapframe * const ktf = utf - 1;
ktf->tf_reg[27] = (uint64_t)func;
ktf->tf_reg[28] = (uint64_t)arg;
- ktf->tf_reg[29] = 0;
ktf->tf_lr = (uintptr_t)lwp_trampoline;
#ifdef DDB
+ ktf->tf_reg[29] = (uint64_t)utf;
ktf->tf_pc = (uint64_t)&_here;
ktf->tf_sp = 0; /* mark as switchframe */
backtrace_here:
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Sun May 29 16:13:41 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_trace.c vm_machdep.c Log Message: Simplified termination conditions for ddb backtrace. Exit backtrace when the user trapframe is invalid. (Mainly in kernel threads). To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/db_trace.c cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu May 26 17:11:05 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c
Log Message:
In ddb, fixed "trace/u" and user process memory read/write to work correctly.
In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/aarch64/db_interface.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.16 src/sys/arch/aarch64/aarch64/db_interface.c:1.17
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.16 Wed May 19 12:16:01 2021
+++ src/sys/arch/aarch64/aarch64/db_interface.c Thu May 26 17:11:05 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.16 2021/05/19 12:16:01 skrll Exp $ */
+/* $NetBSD: db_interface.c,v 1.17 2022/05/26 17:11:05 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.16 2021/05/19 12:16:01 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.17 2022/05/26 17:11:05 ryo Exp $");
#include
#include
@@ -60,7 +60,7 @@ db_regs_t ddb_regs;
static int
db_validate_address(vaddr_t addr)
{
- struct proc *p = curproc;
+ struct proc *p = curcpu()->ci_onproc->l_proc;
struct pmap *pmap;
if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Thu May 26 17:11:05 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: db_interface.c Log Message: In ddb, fixed "trace/u" and user process memory read/write to work correctly. In the softint context, curlwp points the kernel lwp, so to get the pmap of a user process, we had to use curcpu()->ci_onproc->l_proc instead of curproc (curlwp->l_proc). Adviced by ad@. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/aarch64/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Fri May 6 06:09:51 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S locore.S vectors.S
Log Message:
Sprinkle isb after modifying system regs of pointer auth.
With options ARMV83_PAC, it now works on native Mac M1.
TODO: Multiple ISBs should be combined in one place.
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.85 -r1.86 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/aarch64/aarch64/vectors.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.33 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.34
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.33 Tue Mar 9 16:44:27 2021
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Fri May 6 06:09:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.33 2021/03/09 16:44:27 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.34 2022/05/06 06:09:50 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.33 2021/03/09 16:44:27 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.34 2022/05/06 06:09:50 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -115,6 +115,7 @@ ENTRY_NP(cpu_switchto)
msr APGAKeyLo_EL1, x5
msr APGAKeyHi_EL1, x6
1:
+ isb
#endif
msr tpidr_el1, x1 /* switch curlwp to new lwp */
@@ -202,6 +203,7 @@ ENTRY_NP(cpu_switchto_softint)
ldp x5, x6, [x0, #L_MD_IA_KERN]
msr APIAKeyLo_EL1, x5
msr APIAKeyHi_EL1, x6
+ isb
1:
#endif
ENABLE_INTERRUPT
@@ -235,6 +237,7 @@ ENTRY_NP(cpu_switchto_softint)
ldp x5, x6, [x19, #L_MD_IA_KERN]
msr APIAKeyLo_EL1, x5
msr APIAKeyHi_EL1, x6
+ isb
1:
#endif
@@ -289,12 +292,14 @@ ENTRY_NP(lwp_trampoline)
ldr w4, [x4]
cbz w4, 1f
mov x26, x1
+
bl _C_LABEL(cprng_strong64)
- str x0, [x26, #L_MD_IA_KERN]
- msr APIAKeyLo_EL1, x0
+ mov x25, x0
bl _C_LABEL(cprng_strong64)
- str x0, [x26, #(L_MD_IA_KERN + 8)]
+ stp x25, x0, [x26, #L_MD_IA_KERN]
+ msr APIAKeyLo_EL1, x25
msr APIAKeyHi_EL1, x0
+ isb
1:
#endif
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.85 src/sys/arch/aarch64/aarch64/locore.S:1.86
--- src/sys/arch/aarch64/aarch64/locore.S:1.85 Mon Jan 31 09:16:09 2022
+++ src/sys/arch/aarch64/aarch64/locore.S Fri May 6 06:09:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.85 2022/01/31 09:16:09 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.85 2022/01/31 09:16:09 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -196,6 +196,7 @@ vstart:
ldr x1, sctlr_pac
orr x0, x0, x1 /* enable PAC */
msr sctlr_el1, x0
+ isb
1:
adrl x19, cpu_info_store /* curcpu (_info_store[0] */
@@ -565,6 +566,7 @@ mp_vstart:
ldr x1, sctlr_pac
orr x0, x0, x1 /* enable PAC */
msr sctlr_el1, x0
+ isb
1:
mov fp, xzr /* trace back starts here */
Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.25 src/sys/arch/aarch64/aarch64/vectors.S:1.26
--- src/sys/arch/aarch64/aarch64/vectors.S:1.25 Fri May 6 05:14:38 2022
+++ src/sys/arch/aarch64/aarch64/vectors.S Fri May 6 06:09:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.S,v 1.25 2022/05/06 05:14:38 ryo Exp $ */
+/* $NetBSD: vectors.S,v 1.26 2022/05/06 06:09:50 ryo Exp $ */
#include
#include
@@ -11,7 +11,7 @@
#include "opt_dtrace.h"
#include "opt_gic.h"
-RCSID("$NetBSD: vectors.S,v 1.25 2022/05/06 05:14:38 ryo Exp $")
+RCSID("$NetBSD: vectors.S,v 1.26 2022/05/06 06:09:50 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -100,6 +100,7 @@ ENTRY_NBTI(\func)
ldp x5, x6, [x1, #L_MD_IA_KERN]
msr APIAKeyLo_EL1, x5
msr APIAKeyHi_EL1, x6
+ isb
1:
#endif
.endif
@@ -310,6 +311,7 @@ ENTRY_NP(el0_trap_exit)
ldp x5, x6, [x9, #L_MD_IA_USER]
msr APIAKeyLo_EL1, x5
msr APIAKeyHi_EL1, x6
+ isb
1:
#endif
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Fri May 6 06:09:51 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: cpuswitch.S locore.S vectors.S Log Message: Sprinkle isb after modifying system regs of pointer auth. With options ARMV83_PAC, it now works on native Mac M1. TODO: Multiple ISBs should be combined in one place. To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/aarch64/aarch64/cpuswitch.S cvs rdiff -u -r1.85 -r1.86 src/sys/arch/aarch64/aarch64/locore.S cvs rdiff -u -r1.25 -r1.26 src/sys/arch/aarch64/aarch64/vectors.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Fri May 6 05:14:38 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: vectors.S
Log Message:
md_astpending is uint32_t
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/aarch64/aarch64/vectors.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.24 src/sys/arch/aarch64/aarch64/vectors.S:1.25
--- src/sys/arch/aarch64/aarch64/vectors.S:1.24 Sat Sep 18 12:25:06 2021
+++ src/sys/arch/aarch64/aarch64/vectors.S Fri May 6 05:14:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.S,v 1.24 2021/09/18 12:25:06 jmcneill Exp $ */
+/* $NetBSD: vectors.S,v 1.25 2022/05/06 05:14:38 ryo Exp $ */
#include
#include
@@ -11,7 +11,7 @@
#include "opt_dtrace.h"
#include "opt_gic.h"
-RCSID("$NetBSD: vectors.S,v 1.24 2021/09/18 12:25:06 jmcneill Exp $")
+RCSID("$NetBSD: vectors.S,v 1.25 2022/05/06 05:14:38 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -282,7 +282,7 @@ ENTRY_NP(el0_trap_exit)
cbz w8, 9f
/* curlwp->l_md.md_astpending = 0; */
- str xzr, [x9, #L_MD_ASTPENDING]
+ str wzr, [x9, #L_MD_ASTPENDING]
/* trap_doast(tf); */
ENABLE_INTERRUPT
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Fri May 6 05:14:38 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: vectors.S Log Message: md_astpending is uint32_t To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/aarch64/aarch64/vectors.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Tue May 3 20:10:20 UTC 2022
Modified Files:
src/sys/arch/aarch64/aarch64: efi_machdep.c
Log Message:
Style. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/efi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/efi_machdep.c
diff -u src/sys/arch/aarch64/aarch64/efi_machdep.c:1.12 src/sys/arch/aarch64/aarch64/efi_machdep.c:1.13
--- src/sys/arch/aarch64/aarch64/efi_machdep.c:1.12 Wed Apr 27 23:38:31 2022
+++ src/sys/arch/aarch64/aarch64/efi_machdep.c Tue May 3 20:10:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_machdep.c,v 1.12 2022/04/27 23:38:31 ryo Exp $ */
+/* $NetBSD: efi_machdep.c,v 1.13 2022/05/03 20:10:20 skrll Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.12 2022/04/27 23:38:31 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.13 2022/05/03 20:10:20 skrll Exp $");
#include
#include
@@ -106,11 +106,9 @@ arm_efirt_md_map_range(vaddr_t va, paddr
int
arm_efirt_md_enter(void)
{
- struct lwp *l;
- int err;
-
kpreempt_disable();
- l = curlwp;
+
+ struct lwp * const l = curlwp;
/* Save FPU state */
arm_efirt_state.fpu_used = fpu_used_p(l) != 0;
@@ -125,7 +123,7 @@ arm_efirt_md_enter(void)
* Install custom fault handler. EFI lock is held across calls so
* shared faultbuf is safe here.
*/
- err = cpu_set_onfault(_efirt_state.faultbuf);
+ int err = cpu_set_onfault(_efirt_state.faultbuf);
if (err)
return err;
@@ -142,7 +140,7 @@ arm_efirt_md_enter(void)
void
arm_efirt_md_exit(void)
{
- struct lwp *l = curlwp;
+ struct lwp * const l = curlwp;
if (efi_userva) {
pmap_deactivate_efirt();
@@ -151,7 +149,6 @@ arm_efirt_md_exit(void)
}
}
-
/* Disable FP access */
reg_cpacr_el1_write(CPACR_FPEN_NONE);
isb();
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Tue May 3 20:10:20 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: efi_machdep.c Log Message: Style. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/efi_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Tue May 3 20:09:54 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Sprinkle some KASSERT(kpreempt_disabled()); To generate a diff of this commit: cvs rdiff -u -r1.136 -r1.137 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Tue May 3 20:09:54 UTC 2022 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: Sprinkle some KASSERT(kpreempt_disabled()); To generate a diff of this commit: cvs rdiff -u -r1.136 -r1.137 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.136 src/sys/arch/aarch64/aarch64/pmap.c:1.137 --- src/sys/arch/aarch64/aarch64/pmap.c:1.136 Wed Apr 27 23:38:31 2022 +++ src/sys/arch/aarch64/aarch64/pmap.c Tue May 3 20:09:54 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.136 2022/04/27 23:38:31 ryo Exp $ */ +/* $NetBSD: pmap.c,v 1.137 2022/05/03 20:09:54 skrll Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.136 2022/04/27 23:38:31 ryo Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.137 2022/05/03 20:09:54 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -1502,6 +1502,8 @@ pmap_activate_efirt(void) UVMHIST_FUNC(__func__); UVMHIST_CALLARGS(pmaphist, " (pm=%#jx)", (uintptr_t)pm, 0, 0, 0); + KASSERT(kpreempt_disabled()); + ci->ci_pmap_asid_cur = pai->pai_asid; UVMHIST_LOG(pmaphist, "setting asid to %#jx", pai->pai_asid, 0, 0, 0); @@ -1527,6 +1529,7 @@ pmap_activate(struct lwp *l) UVMHIST_CALLARGS(pmaphist, "lwp=%p (pid=%d, kernel=%u)", l, l->l_proc->p_pid, pm == pmap_kernel() ? 1 : 0, 0); + KASSERT(kpreempt_disabled()); KASSERT((reg_tcr_el1_read() & TCR_EPD0) != 0); if (pm == pmap_kernel()) @@ -1561,6 +1564,8 @@ pmap_deactivate_efirt(void) UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmaphist); + KASSERT(kpreempt_disabled()); + /* Disable translation table walks using TTBR0 */ uint64_t tcr = reg_tcr_el1_read(); reg_tcr_el1_write(tcr | TCR_EPD0); @@ -1588,6 +1593,8 @@ pmap_deactivate(struct lwp *l) UVMHIST_CALLARGS(pmaphist, "lwp=%p (pid=%d, (kernel=%u))", l, l->l_proc->p_pid, pm == pmap_kernel() ? 1 : 0, 0); + KASSERT(kpreempt_disabled()); + /* Disable translation table walks using TTBR0 */ tcr = reg_tcr_el1_read(); reg_tcr_el1_write(tcr | TCR_EPD0);
