Re: CVS commit: src/sys/arch/arm/arm32

2020-11-21 Thread Rin Okuyama

Excellent! Thank you so much for finding out and fixing this!

Full ATF successfully completed for Raspberry Pi 2b, which formerly
crashed due to "anon != NULL && anon->an_ref != 0" panic.

Now, ATF is running on Cubietruck and Raspberry Pi Zero W.

Thanks,
rin

On 2020/11/22 4:44, Nick Hudson wrote:

Module Name:src
Committed By:   skrll
Date:   Sat Nov 21 19:44:52 UTC 2020

Modified Files:
src/sys/arch/arm/arm32: cpuswitch.S

Log Message:
Ensure that r5 contains curlwp before DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
in lwp_trampoline as required by the move to make ASTs operate per-LWP
rather than per-CPU.

Thanks to martin@ for bisecting the amap corruption he was seeing and
testing this fix.


To generate a diff of this commit:
cvs rdiff -u -r1.103 -r1.104 src/sys/arch/arm/arm32/cpuswitch.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Re: CVS commit: src/sys/arch/arm/arm32

2020-02-22 Thread Nick Hudson

On 21/02/2020 23:27, Maya Rashish wrote:
[...]


Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.118 
src/sys/arch/arm/arm32/bus_dma.c:1.119
--- src/sys/arch/arm/arm32/bus_dma.c:1.118  Tue Nov  5 10:21:31 2019
+++ src/sys/arch/arm/arm32/bus_dma.cFri Feb 21 23:27:06 2020

[...]


@@ -404,7 +404,7 @@ _bus_dmamap_create(bus_dma_tag_t t, bus_
  #ifdef DEBUG_DMA
printf("dmamap_create:map=%p\n", map);
  #endif/* DEBUG_DMA */
-   return 0;
+   return error;
  }

  /*



This isn't correct for the case where _ARM32_NEED_BUS_DMA_BOUNCE isn't
defined.

I'll fix it.

Nick


CVS commit: src/sys/arch/arm/arm32

2019-11-29 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Fri Nov 29 17:33:43 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: fault.c

Log Message:
if Thumb-32 bit instruction located on a page boundariy, also need to consider 
the pc + 2 address.

Fix PR/54720. more detail and PoC are descrived in the PR.


To generate a diff of this commit:
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/arm/arm32/fault.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/fault.c
diff -u src/sys/arch/arm/arm32/fault.c:1.108 src/sys/arch/arm/arm32/fault.c:1.109
--- src/sys/arch/arm/arm32/fault.c:1.108	Sat Apr  6 03:06:25 2019
+++ src/sys/arch/arm/arm32/fault.c	Fri Nov 29 17:33:43 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: fault.c,v 1.108 2019/04/06 03:06:25 thorpej Exp $	*/
+/*	$NetBSD: fault.c,v 1.109 2019/11/29 17:33:43 ryo Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -81,7 +81,7 @@
 #include "opt_kgdb.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.108 2019/04/06 03:06:25 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.109 2019/11/29 17:33:43 ryo Exp $");
 
 #include 
 #include 
@@ -838,6 +838,9 @@ prefetch_abort_handler(trapframe_t *tf)
 	UVMHIST_LOG(maphist, " (pc=0x%jx, l=0x%#jx, tf=0x%#jx)",
 	fault_pc, (uintptr_t)l, (uintptr_t)tf, 0);
 
+#ifdef THUMB_CODE
+ recheck:
+#endif
 	/* Ok validate the address, can only execute in USER space */
 	if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
 	(fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
@@ -897,6 +900,18 @@ do_trapsignal:
 	call_trapsignal(l, tf, );
 
 out:
+
+#ifdef THUMB_CODE
+#define THUMB_32BIT(hi) (((hi) & 0xe000) == 0xe000 && ((hi) & 0x1800))
+	/* thumb-32 instruction was located on page boundary? */
+	if ((tf->tf_spsr & PSR_T_bit) &&
+	((fault_pc & PAGE_MASK) == (PAGE_SIZE - THUMB_INSN_SIZE)) &&
+	THUMB_32BIT(*(uint16_t *)tf->tf_pc)) {
+		fault_pc = tf->tf_pc + THUMB_INSN_SIZE;
+		goto recheck;
+	}
+#endif /* THUMB_CODE */
+
 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
 	userret(l);
 }



CVS commit: src/sys/arch/arm/arm32

2019-11-29 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Fri Nov 29 17:33:43 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: fault.c

Log Message:
if Thumb-32 bit instruction located on a page boundariy, also need to consider 
the pc + 2 address.

Fix PR/54720. more detail and PoC are descrived in the PR.


To generate a diff of this commit:
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/arm/arm32/fault.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Nov  5 10:21:31 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
Do not try to use direct map for prefetchable mappings


To generate a diff of this commit:
cvs rdiff -u -r1.117 -r1.118 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.117 src/sys/arch/arm/arm32/bus_dma.c:1.118
--- src/sys/arch/arm/arm32/bus_dma.c:1.117	Tue Nov  5 09:57:47 2019
+++ src/sys/arch/arm/arm32/bus_dma.c	Tue Nov  5 10:21:31 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.117 2019/11/05 09:57:47 jmcneill Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.118 2019/11/05 10:21:31 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 #include "opt_cputypes.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.117 2019/11/05 09:57:47 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.118 2019/11/05 10:21:31 jmcneill Exp $");
 
 #include 
 #include 
@@ -1339,7 +1339,7 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma
 	 * contiguous area then this area is already mapped.  Let's see if we
 	 * avoid having a separate mapping for it.
 	 */
-	if (nsegs == 1) {
+	if (nsegs == 1 && (flags & BUS_DMA_PREFETCHABLE) == 0) {
 		/*
 		 * If this is a non-COHERENT mapping, then the existing kernel
 		 * mapping is already compatible with it.



CVS commit: src/sys/arch/arm/arm32

2019-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Nov  5 10:21:31 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
Do not try to use direct map for prefetchable mappings


To generate a diff of this commit:
cvs rdiff -u -r1.117 -r1.118 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Nov  5 09:57:47 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
bus_dmamem_map: honour BUS_DMA_PREFETCHABLE hint


To generate a diff of this commit:
cvs rdiff -u -r1.116 -r1.117 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Nov  5 09:57:47 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
bus_dmamem_map: honour BUS_DMA_PREFETCHABLE hint


To generate a diff of this commit:
cvs rdiff -u -r1.116 -r1.117 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.116 src/sys/arch/arm/arm32/bus_dma.c:1.117
--- src/sys/arch/arm/arm32/bus_dma.c:1.116	Sat Aug 24 11:51:26 2019
+++ src/sys/arch/arm/arm32/bus_dma.c	Tue Nov  5 09:57:47 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.116 2019/08/24 11:51:26 jmcneill Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.117 2019/11/05 09:57:47 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 #include "opt_cputypes.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.116 2019/08/24 11:51:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.117 2019/11/05 09:57:47 jmcneill Exp $");
 
 #include 
 #include 
@@ -1426,6 +1426,7 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma
 		pa < (segs[curseg].ds_addr + segs[curseg].ds_len);
 		pa += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
 			bool uncached = (flags & BUS_DMA_COHERENT);
+			bool prefetchable = (flags & BUS_DMA_PREFETCHABLE);
 #ifdef DEBUG_DMA
 			printf("wiring p%lx to v%lx", pa, va);
 #endif	/* DEBUG_DMA */
@@ -1443,8 +1444,14 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma
 uncached = false;
 			}
 
+			u_int pmap_flags = PMAP_WIRED;
+			if (prefetchable)
+pmap_flags |= PMAP_WRITE_COMBINE;
+			else if (uncached)
+pmap_flags |= PMAP_NOCACHE;
+
 			pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE,
-			PMAP_WIRED | (uncached ? PMAP_NOCACHE : 0));
+			pmap_flags);
 		}
 	}
 	pmap_update(pmap_kernel());



CVS commit: src/sys/arch/arm/arm32

2019-10-20 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sun Oct 20 14:25:14 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
cpu_hatched_p only for MULTIPROCESSOR


To generate a diff of this commit:
cvs rdiff -u -r1.133 -r1.134 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/cpu.c
diff -u src/sys/arch/arm/arm32/cpu.c:1.133 src/sys/arch/arm/arm32/cpu.c:1.134
--- src/sys/arch/arm/arm32/cpu.c:1.133	Sat Oct 19 18:04:26 2019
+++ src/sys/arch/arm/arm32/cpu.c	Sun Oct 20 14:25:14 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.133 2019/10/19 18:04:26 jmcneill Exp $	*/
+/*	$NetBSD: cpu.c,v 1.134 2019/10/20 14:25:14 jmcneill Exp $	*/
 
 /*
  * Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
 #include "opt_multiprocessor.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.133 2019/10/19 18:04:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.134 2019/10/20 14:25:14 jmcneill Exp $");
 
 #include 
 #include 
@@ -239,12 +239,14 @@ cpu_attach(device_t dv, cpuid_t id)
 	vfp_attach(ci);		/* XXX SMP */
 }
 
+#ifdef MULTIPROCESSOR
 bool
 cpu_hatched_p(u_int cpuindex)
 {
 	membar_consumer();
 	return (arm_cpu_hatched & __BIT(cpuindex)) != 0;
 }
+#endif
 
 enum cpu_class {
 	CPU_CLASS_NONE,



CVS commit: src/sys/arch/arm/arm32

2019-10-20 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sun Oct 20 14:25:14 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
cpu_hatched_p only for MULTIPROCESSOR


To generate a diff of this commit:
cvs rdiff -u -r1.133 -r1.134 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-09-29 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun Sep 29 06:51:45 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
aprint_debug_dev output alignment


To generate a diff of this commit:
cvs rdiff -u -r1.131 -r1.132 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/cpu.c
diff -u src/sys/arch/arm/arm32/cpu.c:1.131 src/sys/arch/arm/arm32/cpu.c:1.132
--- src/sys/arch/arm/arm32/cpu.c:1.131	Sun Sep  8 07:59:43 2019
+++ src/sys/arch/arm/arm32/cpu.c	Sun Sep 29 06:51:45 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.131 2019/09/08 07:59:43 tnn Exp $	*/
+/*	$NetBSD: cpu.c,v 1.132 2019/09/29 06:51:45 skrll Exp $	*/
 
 /*
  * Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
 #include "opt_multiprocessor.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.131 2019/09/08 07:59:43 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.132 2019/09/29 06:51:45 skrll Exp $");
 
 #include 
 #include 
@@ -689,6 +689,8 @@ identify_arm_cpu(device_t dv, struct cpu
 		aprint_normal(": %s\n", model);
 	}
 
+	aprint_debug_dev(dv, "midr:   %#x\n", arm_cpuid);
+
 	aprint_normal("%s:", xname);
 
 	switch (cpu_class) {
@@ -856,11 +858,11 @@ identify_features(device_t dv)
 	cpu_processor_features[0] = armreg_pfr0_read();
 	cpu_processor_features[1] = armreg_pfr1_read();
 
-	aprint_debug_dev(dv, "sctlr: %#x\n", armreg_sctlr_read());
-	aprint_debug_dev(dv, "actlr: %#x\n", armreg_auxctl_read());
+	aprint_debug_dev(dv, "sctlr:  %#x\n", armreg_sctlr_read());
+	aprint_debug_dev(dv, "actlr:  %#x\n", armreg_auxctl_read());
 	aprint_debug_dev(dv, "revidr: %#x\n", armreg_revidr_read());
 #ifdef MULTIPROCESSOR
-	aprint_debug_dev(dv, "mpidr: %#x\n", armreg_mpidr_read());
+	aprint_debug_dev(dv, "mpidr:  %#x\n", armreg_mpidr_read());
 #endif
 	aprint_debug_dev(dv,
 	"isar: [0]=%#x [1]=%#x [2]=%#x [3]=%#x, [4]=%#x, [5]=%#x\n",



CVS commit: src/sys/arch/arm/arm32

2019-09-29 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun Sep 29 06:51:45 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
aprint_debug_dev output alignment


To generate a diff of this commit:
cvs rdiff -u -r1.131 -r1.132 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-09-25 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Sep 25 16:37:54 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: pmap.c

Log Message:
Convert a __CTASSERT into a KASSERT as L1_S_CACHE_MASK may not be a
compile time constant if ARM_NMMUS > 1


To generate a diff of this commit:
cvs rdiff -u -r1.373 -r1.374 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.373 src/sys/arch/arm/arm32/pmap.c:1.374
--- src/sys/arch/arm/arm32/pmap.c:1.373	Tue Apr 23 11:21:21 2019
+++ src/sys/arch/arm/arm32/pmap.c	Wed Sep 25 16:37:54 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.373 2019/04/23 11:21:21 bouyer Exp $	*/
+/*	$NetBSD: pmap.c,v 1.374 2019/09/25 16:37:54 skrll Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -221,7 +221,7 @@
 #include 
 #endif
 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.373 2019/04/23 11:21:21 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.374 2019/09/25 16:37:54 skrll Exp $");
 
 //#define PMAP_DEBUG
 #ifdef PMAP_DEBUG
@@ -6406,7 +6406,7 @@ pmap_set_pt_cache_mode(pd_entry_t *kl1, 
 		pd_entry_t pde = *pdep;
 
 		if (l1pte_section_p(pde)) {
-			__CTASSERT((L1_S_CACHE_MASK & L1_S_V6_SUPER) == 0);
+			KASSERT((L1_S_CACHE_MASK & L1_S_V6_SUPER) == 0);
 			if ((pde & L1_S_CACHE_MASK) != pte_l1_s_cache_mode_pt) {
 *pdep = (pde & ~L1_S_CACHE_MASK) |
 pte_l1_s_cache_mode_pt;



CVS commit: src/sys/arch/arm/arm32

2019-09-25 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Sep 25 16:37:54 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: pmap.c

Log Message:
Convert a __CTASSERT into a KASSERT as L1_S_CACHE_MASK may not be a
compile time constant if ARM_NMMUS > 1


To generate a diff of this commit:
cvs rdiff -u -r1.373 -r1.374 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-09-13 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Sep 13 06:30:10 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpuswitch.S

Log Message:
Typo in comment


To generate a diff of this commit:
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/arm/arm32/cpuswitch.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-09-13 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Sep 13 06:30:10 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpuswitch.S

Log Message:
Typo in comment


To generate a diff of this commit:
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/arm/arm32/cpuswitch.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/cpuswitch.S
diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.93 src/sys/arch/arm/arm32/cpuswitch.S:1.94
--- src/sys/arch/arm/arm32/cpuswitch.S:1.93	Thu Nov 22 21:28:21 2018
+++ src/sys/arch/arm/arm32/cpuswitch.S	Fri Sep 13 06:30:10 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpuswitch.S,v 1.93 2018/11/22 21:28:21 skrll Exp $	*/
+/*	$NetBSD: cpuswitch.S,v 1.94 2019/09/13 06:30:10 skrll Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
 #include 
 #include 
 
-	RCSID("$NetBSD: cpuswitch.S,v 1.93 2018/11/22 21:28:21 skrll Exp $")
+	RCSID("$NetBSD: cpuswitch.S,v 1.94 2019/09/13 06:30:10 skrll Exp $")
 
 /* LINTSTUB: include  */
 
@@ -452,7 +452,7 @@ END(softint_switch)
  * r7 = curcpu()
  */
 ENTRY_NP(softint_tramp)
-	ldr	r3, [r7, #(CI_MTX_COUNT)]	/* readust after mi_switch */
+	ldr	r3, [r7, #(CI_MTX_COUNT)]	/* readjust after mi_switch */
 	add	r3, r3, #1
 	str	r3, [r7, #(CI_MTX_COUNT)]
 



CVS commit: src/sys/arch/arm/arm32

2019-09-08 Thread Tobias Nygren
Module Name:src
Committed By:   tnn
Date:   Sun Sep  8 07:59:44 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
report A12 as A17 to the user. A12 is retcon'ed by ARM.


To generate a diff of this commit:
cvs rdiff -u -r1.130 -r1.131 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/cpu.c
diff -u src/sys/arch/arm/arm32/cpu.c:1.130 src/sys/arch/arm/arm32/cpu.c:1.131
--- src/sys/arch/arm/arm32/cpu.c:1.130	Sat Sep  7 19:42:42 2019
+++ src/sys/arch/arm/arm32/cpu.c	Sun Sep  8 07:59:43 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.130 2019/09/07 19:42:42 tnn Exp $	*/
+/*	$NetBSD: cpu.c,v 1.131 2019/09/08 07:59:43 tnn Exp $	*/
 
 /*
  * Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
 #include "opt_multiprocessor.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130 2019/09/07 19:42:42 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.131 2019/09/08 07:59:43 tnn Exp $");
 
 #include 
 #include 
@@ -518,7 +518,7 @@ const struct cpuidtab cpuids[] = {
 	  pN_steppings, "7A" },
 	{ CPU_ID_CORTEXA9R4,	CPU_CLASS_CORTEX,	"Cortex-A9 r4",
 	  pN_steppings, "7A" },
-	{ CPU_ID_CORTEXA12R0,	CPU_CLASS_CORTEX,	"Cortex-A12 r0",
+	{ CPU_ID_CORTEXA12R0,	CPU_CLASS_CORTEX,	"Cortex-A17(A12) r0",	/* A12 was rebranded A17 */
 	  pN_steppings, "7A" },
 	{ CPU_ID_CORTEXA15R2,	CPU_CLASS_CORTEX,	"Cortex-A15 r2",
 	  pN_steppings, "7A" },



CVS commit: src/sys/arch/arm/arm32

2019-09-08 Thread Tobias Nygren
Module Name:src
Committed By:   tnn
Date:   Sun Sep  8 07:59:44 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
report A12 as A17 to the user. A12 is retcon'ed by ARM.


To generate a diff of this commit:
cvs rdiff -u -r1.130 -r1.131 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-08-24 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Aug 24 11:51:26 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
bus_dmamap_load_raw: support coherent mappings
bus_dmamap_sync: support syncing "raw" buffer types


To generate a diff of this commit:
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-08-24 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Aug 24 11:51:26 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
bus_dmamap_load_raw: support coherent mappings
bus_dmamap_sync: support syncing "raw" buffer types


To generate a diff of this commit:
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.115 src/sys/arch/arm/arm32/bus_dma.c:1.116
--- src/sys/arch/arm/arm32/bus_dma.c:1.115	Fri Jun 14 09:09:12 2019
+++ src/sys/arch/arm/arm32/bus_dma.c	Sat Aug 24 11:51:26 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.115 2019/06/14 09:09:12 skrll Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.116 2019/08/24 11:51:26 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 #include "opt_cputypes.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.115 2019/06/14 09:09:12 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.116 2019/08/24 11:51:26 jmcneill Exp $");
 
 #include 
 #include 
@@ -750,8 +750,10 @@ _bus_dmamap_load_raw(bus_dma_tag_t t, bu
 		sgsize = MIN(ds->ds_len, size);
 		if (sgsize == 0)
 			continue;
+		const bool coherent =
+		(ds->_ds_flags & _BUS_DMAMAP_COHERENT) != 0;
 		error = _bus_dmamap_load_paddr(t, map, ds->ds_addr,
-		sgsize, false);
+		sgsize, coherent);
 		if (error != 0)
 			break;
 		size -= sgsize;
@@ -766,6 +768,9 @@ _bus_dmamap_load_raw(bus_dma_tag_t t, bu
 	/* XXX TBD bounce */
 
 	map->dm_mapsize = size0;
+	map->_dm_origbuf = NULL;
+	map->_dm_buftype = _BUS_DMA_BUFTYPE_RAW;
+	map->_dm_vmspace = NULL;
 	return 0;
 }
 
@@ -1165,6 +1170,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 
 	switch (buftype) {
 	case _BUS_DMA_BUFTYPE_LINEAR:
+	case _BUS_DMA_BUFTYPE_RAW:
 		_bus_dmamap_sync_linear(t, map, offset, len, ops);
 		break;
 
@@ -1176,10 +1182,6 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 		_bus_dmamap_sync_uio(t, map, offset, len, ops);
 		break;
 
-	case _BUS_DMA_BUFTYPE_RAW:
-		panic("_bus_dmamap_sync: _BUS_DMA_BUFTYPE_RAW");
-		break;
-
 	case _BUS_DMA_BUFTYPE_INVALID:
 		panic("_bus_dmamap_sync: _BUS_DMA_BUFTYPE_INVALID");
 		break;



CVS commit: src/sys/arch/arm/arm32

2019-08-11 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun Aug 11 06:49:31 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: exception.S

Log Message:
Trailing whitespace


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm32/exception.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/exception.S
diff -u src/sys/arch/arm/arm32/exception.S:1.24 src/sys/arch/arm/arm32/exception.S:1.25
--- src/sys/arch/arm/arm32/exception.S:1.24	Fri Jul  7 00:34:09 2017
+++ src/sys/arch/arm/arm32/exception.S	Sun Aug 11 06:49:31 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: exception.S,v 1.24 2017/07/07 00:34:09 chs Exp $	*/
+/*	$NetBSD: exception.S,v 1.25 2019/08/11 06:49:31 skrll Exp $	*/
 
 /*
  * Copyright (c) 1994-1997 Mark Brinicombe.
@@ -51,9 +51,9 @@
 
 #include 
 
-	RCSID("$NetBSD: exception.S,v 1.24 2017/07/07 00:34:09 chs Exp $")
+	RCSID("$NetBSD: exception.S,v 1.25 2019/08/11 06:49:31 skrll Exp $")
 
-	.text	
+	.text
 	.align	0
 
 AST_ALIGNMENT_FAULT_LOCALS



CVS commit: src/sys/arch/arm/arm32

2019-08-11 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun Aug 11 06:49:31 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: exception.S

Log Message:
Trailing whitespace


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm32/exception.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-07-21 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Sun Jul 21 16:12:59 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: db_interface.c

Log Message:
Fix hand-crafted trap instruction in cpu_Debugger() for big endian.


To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/arm/arm32/db_interface.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/db_interface.c
diff -u src/sys/arch/arm/arm32/db_interface.c:1.58 src/sys/arch/arm/arm32/db_interface.c:1.59
--- src/sys/arch/arm/arm32/db_interface.c:1.58	Mon May 28 21:05:00 2018
+++ src/sys/arch/arm/arm32/db_interface.c	Sun Jul 21 16:12:59 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_interface.c,v 1.58 2018/05/28 21:05:00 chs Exp $	*/
+/*	$NetBSD: db_interface.c,v 1.59 2019/07/21 16:12:59 rin Exp $	*/
 
 /*
  * Copyright (c) 1996 Scott K. Stevens
@@ -35,7 +35,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.58 2018/05/28 21:05:00 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.59 2019/07/21 16:12:59 rin Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -302,7 +302,11 @@ db_write_bytes(vaddr_t addr, size_t size
 void
 cpu_Debugger(void)
 {
+#if _BYTE_ORDER == _LITTLE_ENDIAN
 	__asm(".word	0xe7ff");
+#else
+	__asm(".word	0xffe7");
+#endif
 }
 
 int



CVS commit: src/sys/arch/arm/arm32

2019-07-21 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Sun Jul 21 16:12:59 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: db_interface.c

Log Message:
Fix hand-crafted trap instruction in cpu_Debugger() for big endian.


To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/arm/arm32/db_interface.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-06-14 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Jun 14 09:09:12 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
Simplify the _ARM32_NEED_BUS_DMA_BOUNCE #ifdefs and rely on compiler
optimisation of the bouncing = false case.

Drain the write buf (aka DSB) in more cases

Catch all CPUs that support speculation. (thunderx isn't CPU_CORTEX)


To generate a diff of this commit:
cvs rdiff -u -r1.114 -r1.115 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2019-06-14 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Jun 14 09:09:12 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
Simplify the _ARM32_NEED_BUS_DMA_BOUNCE #ifdefs and rely on compiler
optimisation of the bouncing = false case.

Drain the write buf (aka DSB) in more cases

Catch all CPUs that support speculation. (thunderx isn't CPU_CORTEX)


To generate a diff of this commit:
cvs rdiff -u -r1.114 -r1.115 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.114 src/sys/arch/arm/arm32/bus_dma.c:1.115
--- src/sys/arch/arm/arm32/bus_dma.c:1.114	Sat Jun  8 11:57:27 2019
+++ src/sys/arch/arm/arm32/bus_dma.c	Fri Jun 14 09:09:12 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.114 2019/06/08 11:57:27 skrll Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.115 2019/06/14 09:09:12 skrll Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 #include "opt_cputypes.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.114 2019/06/08 11:57:27 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.115 2019/06/14 09:09:12 skrll Exp $");
 
 #include 
 #include 
@@ -254,12 +254,13 @@ _bus_dmamap_load_paddr(bus_dma_tag_t t, 
 	return 0;
 }
 
+static int _bus_dma_uiomove(void *buf, struct uio *uio, size_t n,
+	int direction);
+
 #ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 static int _bus_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map,
 	bus_size_t size, int flags);
 static void _bus_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map);
-static int _bus_dma_uiomove(void *buf, struct uio *uio, size_t n,
-	int direction);
 
 static int
 _bus_dma_load_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
@@ -796,7 +797,7 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 bool readonly_p)
 {
 
-#if defined(ARM_MMU_EXTENDED) || defined(CPU_CORTEX)
+#if defined(ARM_MMU_EXTENDED)
 	/*
 	 * No optimisations are available for readonly mbufs on armv6+, so
 	 * assume it's not readonly from here on.
@@ -863,7 +864,8 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 		cpu_sdcache_wb_range(va, pa, len);
 		break;
 
-#ifdef CPU_CORTEX
+#if defined(CPU_CORTEX) || defined(CPU_ARMV8)
+
 	/*
 	 * Cortex CPUs can do speculative loads so we need to clean the cache
 	 * after a DMA read to deal with any speculatively loaded cache lines.
@@ -1074,22 +1076,23 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 #endif
 
 	const int pre_ops = ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-#ifdef CPU_CORTEX
+#if defined(CPU_CORTEX) || defined(CPU_ARMV8)
 	const int post_ops = ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 #else
 	const int post_ops = 0;
 #endif
-	if (!bouncing) {
-		if (pre_ops == 0 && post_ops == BUS_DMASYNC_POSTWRITE) {
-			STAT_INCR(sync_postwrite);
-			return;
-		} else if (pre_ops == 0 && post_ops == 0) {
-			return;
-		}
+	if (pre_ops == 0 && post_ops == 0)
+		return;
+
+	if (post_ops == BUS_DMASYNC_POSTWRITE) {
+		KASSERT(pre_ops == 0);
+		STAT_INCR(sync_postwrite);
+		return;
 	}
+
 	KASSERTMSG(bouncing || pre_ops != 0 || (post_ops & BUS_DMASYNC_POSTREAD),
 	"pre_ops %#x post_ops %#x", pre_ops, post_ops);
-#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
+
 	if (bouncing && (ops & BUS_DMASYNC_PREWRITE)) {
 		struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
 		STAT_INCR(write_bounces);
@@ -1123,23 +1126,28 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 #endif /* DIAGNOSTIC */
 		}
 	}
-#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 
-	/* Skip cache frobbing if mapping was COHERENT. */
-	if (!bouncing && (map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
-		/* Drain the write buffer. */
-		if (pre_ops & BUS_DMASYNC_PREWRITE)
+	/* Skip cache frobbing if mapping was COHERENT */
+	if ((map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
+		/*
+		 * Drain the write buffer of DMA operators.
+		 * 1) when cpu->device (prewrite)
+		 * 2) when device->cpu (postread)
+		 */
+		if ((pre_ops & BUS_DMASYNC_PREWRITE) || (post_ops & BUS_DMASYNC_POSTREAD))
 			cpu_drain_writebuf();
-		return;
-	}
 
-#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
-	if (bouncing && ((map->_dm_flags & _BUS_DMAMAP_COHERENT) || pre_ops == 0)) {
-		goto bounce_it;
+		/*
+		 * Only thing left to do for COHERENT mapping is copy from bounce
+		 * in the POSTREAD case.
+		 */
+		if (bouncing && (post_ops & BUS_DMASYNC_POSTREAD))
+			goto bounce_it;
+
+		return;
 	}
-#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 
-#ifndef ARM_MMU_EXTENDED
+#if !defined( ARM_MMU_EXTENDED)
 	/*
 	 * If the mapping belongs to a non-kernel vmspace, and the
 	 * vmspace has not been active since the last time a full
@@ -1151,11 +1159,9 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 #endif
 
 	int buftype = map->_dm_buftype;
-#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 	if (bouncing) {
 		buftype = _BUS_DMA_BUFTYPE_LINEAR;
 	}
-#endif
 
 	switch (buftype) {
 	case 

CVS commit: src/sys/arch/arm/arm32

2019-06-08 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sat Jun  8 11:57:27 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
Fix comment


To generate a diff of this commit:
cvs rdiff -u -r1.113 -r1.114 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.113 src/sys/arch/arm/arm32/bus_dma.c:1.114
--- src/sys/arch/arm/arm32/bus_dma.c:1.113	Fri Sep 14 10:13:02 2018
+++ src/sys/arch/arm/arm32/bus_dma.c	Sat Jun  8 11:57:27 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.113 2018/09/14 10:13:02 skrll Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.114 2019/06/08 11:57:27 skrll Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 #include "opt_cputypes.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.113 2018/09/14 10:13:02 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.114 2019/06/08 11:57:27 skrll Exp $");
 
 #include 
 #include 
@@ -1022,9 +1022,6 @@ _bus_dmamap_sync_uio(bus_dma_tag_t t, bu
  * Common function for DMA map synchronization.  May be called
  * by bus-specific DMA map synchronization functions.
  *
- * This version works for the Virtually Indexed Virtually Tagged
- * cache found on 32-bit ARM processors.
- *
  * XXX Should have separate versions for write-through vs.
  * XXX write-back caches.  We currently assume write-back
  * XXX here, which is not as efficient as it could be for



CVS commit: src/sys/arch/arm/arm32

2019-06-08 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sat Jun  8 11:57:27 UTC 2019

Modified Files:
src/sys/arch/arm/arm32: bus_dma.c

Log Message:
Fix comment


To generate a diff of this commit:
cvs rdiff -u -r1.113 -r1.114 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



Re: CVS commit: src/sys/arch/arm/arm32

2018-07-17 Thread Joerg Sonnenberger
On Tue, Jul 17, 2018 at 05:29:07AM +, Martin Husemann wrote:
> Module Name:  src
> Committed By: martin
> Date: Tue Jul 17 05:29:07 UTC 2018
> 
> Modified Files:
>   src/sys/arch/arm/arm32: bus_dma.c
> 
> Log Message:
> Revert previous and cast to u_quad_t instead (t is for ptrdiff_t and off_t
> does not match that on all arm)

Please do not use *quad_t.

Joerg


Re: CVS commit: src/sys/arch/arm/arm32

2016-07-15 Thread coypu
On Fri, Jul 15, 2016 at 05:59:46AM +, Nick Hudson wrote:
> +
> +bool
> +mm_md_page_color(paddr_t pa, int *colorp)
> +{
> + *colorp = atop(pa & arm_cache_prefer_mask);
> +
> + return arm_cache_prefer_mask ? false : true;
> +}
> 

arm_cache_prefer_mask only exists for armv6/armv7 now


Re: CVS commit: src/sys/arch/arm/arm32

2016-07-15 Thread coypu
On Fri, Jul 15, 2016 at 05:59:46AM +, Nick Hudson wrote:
> Module Name:  src
> Committed By: skrll
> Date: Fri Jul 15 05:59:46 UTC 2016
> 
> Modified Files:
>   src/sys/arch/arm/arm32: arm32_machdep.c
> 
> Log Message:
> Provide a mm_md_page_color and fix some kernel builds
> 
> 

Seems it broke the rest of them.
I can build with this diff, but I don't know if it is correct.
Index: arm32_machdep.c
===
RCS file: /cvsroot/src/sys/arch/arm/arm32/arm32_machdep.c,v
retrieving revision 1.111
diff -u -r1.111 arm32_machdep.c
--- arm32_machdep.c 15 Jul 2016 05:59:46 -  1.111
+++ arm32_machdep.c 15 Jul 2016 19:31:34 -
@@ -746,11 +746,3 @@
return rv;
 }
 #endif
-
-bool
-mm_md_page_color(paddr_t pa, int *colorp)
-{
-   *colorp = atop(pa & arm_cache_prefer_mask);
-
-   return arm_cache_prefer_mask ? false : true;
-}
Index: pmap.c
===
RCS file: /cvsroot/src/sys/arch/arm/arm32/pmap.c,v
retrieving revision 1.335
diff -u -r1.335 pmap.c
--- pmap.c  14 Jul 2016 15:51:41 -  1.335
+++ pmap.c  15 Jul 2016 19:31:37 -
@@ -519,6 +519,13 @@
 vaddr_t pmap_directlimit;
 #endif
 
+static inline bool
+mm_md_page_color(paddr_t pa, int *colorp)
+{
+   *colorp = atop(pa & arm_cache_prefer_mask);
+
+   return arm_cache_prefer_mask ? false : true;
+}
 /*
  * Misc. locking data structures
  */
@@ -7945,3 +7952,4 @@
 #endif
 }
 #endif /* __HAVE_MM_MD_DIRECT_MAPPED_PHYS */
+


Re: CVS commit: src/sys/arch/arm/arm32

2014-04-02 Thread Hisashi T Fujinaka

On Wed, 2 Apr 2014, Matt Thomas wrote:


Module Name:src
Committed By:   matt
Date:   Wed Apr  2 14:05:54 UTC 2014

Modified Files:
src/sys/arch/arm/arm32: pmap.c

Log Message:
Init the page_lock to IPL_VM iff VIPT  arm_cache_prefer_mask != 0 otherwise
use IPL_NONE.  Don't bother with page_lock for KMPAGEs.


To generate a diff of this commit:
cvs rdiff -u -r1.277 -r1.278 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


This won't build without DIAGNOSITC defined. In map_kremove_pg() you use
omd without defining it otherwise.

--
Hisashi T Fujinaka - ht...@twofifty.com
BSEE(6/86) + BSChem(3/95) + BAEnglish(8/95) + MSCS(8/03) + $2.50 = latte


CVS commit: src/sys/arch/arm/arm32

2010-01-23 Thread matthew green
Module Name:src
Committed By:   mrg
Date:   Sat Jan 23 15:58:13 UTC 2010

Modified Files:
src/sys/arch/arm/arm32: cpu.c

Log Message:
rename a local cpu_name structure member to avoid potential conflict
with sys/cpu.h's.


To generate a diff of this commit:
cvs rdiff -u -r1.71 -r1.72 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2010-01-18 Thread Julio M. Merino Vidal
Module Name:src
Committed By:   jmmv
Date:   Mon Jan 18 23:04:30 UTC 2010

Modified Files:
src/sys/arch/arm/arm32: arm32_machdep.c

Log Message:
Define an empty module_init_md function so that kernels with 'options
MODULAR' can be built (at least in shark).  Still not working due to
some relocations resolving to too far away symbols though.


To generate a diff of this commit:
cvs rdiff -u -r1.71 -r1.72 src/sys/arch/arm/arm32/arm32_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2010-01-01 Thread Havard Eidnes
Module Name:src
Committed By:   he
Date:   Sat Jan  2 07:53:29 UTC 2010

Modified Files:
src/sys/arch/arm/arm32: pmap.c

Log Message:
Remove a shadowed and unused local declaration so that this builds again.


To generate a diff of this commit:
cvs rdiff -u -r1.210 -r1.211 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2009-12-31 Thread Masao Uebayashi
Module Name:src
Committed By:   uebayasi
Date:   Thu Dec 31 16:00:53 UTC 2009

Modified Files:
src/sys/arch/arm/arm32: pmap.c

Log Message:
pmap_page_remove(): remove an unused local variable; no functional changes.


To generate a diff of this commit:
cvs rdiff -u -r1.207 -r1.208 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm32

2009-12-31 Thread Masao Uebayashi
Module Name:src
Committed By:   uebayasi
Date:   Fri Jan  1 02:32:29 UTC 2010

Modified Files:
src/sys/arch/arm/arm32: pmap.c

Log Message:
Sprinkle assertions after calling pmap_get_l2_bucket().


To generate a diff of this commit:
cvs rdiff -u -r1.209 -r1.210 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



Re: CVS commit: src/sys/arch/arm/arm32

2009-12-03 Thread Masao Uebayashi
I spoke too early.  I still see problems.  I'll post this to port-arm@ after
sorting out things.

Masao

-- 
Masao Uebayashi / Tombi Inc. / Tel: +81-90-9141-4635


Re: CVS commit: src/sys/arch/arm/arm32

2009-11-30 Thread Rafal Boni
On Sat, Nov 28, 2009 at 11:44:45AM +, Steve Woodford wrote:
 Module Name:  src
 Committed By: scw
 Date: Sat Nov 28 11:44:45 UTC 2009
 
 Modified Files:
   src/sys/arch/arm/arm32: pmap.c
 
 Log Message:
 Apply some band-aid to pmap_activate() for PR kern/41058:
 
 There's a corner case here which can leave turds in the cache as
 reported in kern/41058. They're probably left over during tear-down and
 switching away from an exiting process. Until the root cause is identified
 and fixed, zap the cache when switching pmaps. This will result in a few
 unnecessary cache flushes, but that's better than silently corrupting data.
 
 Also remove an extraneous return statement in pmap_page_protect() which
 crept in during the matt-armv6 merge.

Hmm, this reminds me of port-arm/38950, where we were seeing hangs on exit
due to some don't-need-to-do-full-context-switch optimizations.  Could the
two issues be related?  I haven't looked at this issue, but I did do a bunch
of analysis for port-arm/38950, there's a fair bit of background there.

--rafal

-- 
  Time is an illusion; lunchtime, doubly so. |/\/\|   Rafal Boni
   -- Ford Prefect   |\/\/|  ra...@pobox.com