CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Thu Jun 15 07:21:45 UTC 2023
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
if_scx.c
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.42 src/sys/arch/arm/sociox/if_scx.c:1.43
--- src/sys/arch/arm/sociox/if_scx.c:1.42 Wed Jun 14 00:07:22 2023
+++ src/sys/arch/arm/sociox/if_scx.c Thu Jun 15 07:21:45 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.43 2023/06/15 07:21:45 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.43 2023/06/15 07:21:45 nisimura Exp $");
#include
#include
@@ -120,13 +120,6 @@ struct rdes {
#define COMINIT 0x120
#define INIT_DB (1U<<2) /* ???; self clear when done */
#define INIT_CLS (1U<<1) /* ???; self clear when done */
-#define PKTCTRL 0x140 /* pkt engine control */
-#define MODENRM (1U<<28) /* set operational mode to 'normal' */
-#define ENJUMBO (1U<<27) /* allow jumbo frame */
-#define RPTCSUMERR (1U<<3) /* log Rx checksum error */
-#define RPTHDCOMP (1U<<2) /* log header incomplete condition */
-#define RPTHDERR (1U<<1) /* log header error */
-#define DROPNOMATCH (1U<<0) /* drop no match frames */
#define xINTSR 0x200 /* aggregated interrupt status */
#define IRQ_UCODE (1U<<20) /* ucode load completed; W1C */
#define IRQ_MAC (1U<<19) /* ??? */
@@ -146,14 +139,14 @@ struct rdes {
#define TXIE_SET 0x428 /* bit to set */
#define TXIE_CLR 0x42c /* bit to clr */
#define TXI_NTOWNR (1U<<17) /* ??? desc array got empty */
-#define TXI_TR_ERR (1U<<16) /* xmit error */
+#define TXI_TR_ERR (1U<<16) /* xmit error detected */
#define TXI_TXDONE (1U<<15) /* xmit completed */
#define TXI_TMREXP (1U<<14) /* coalesce guard timer expired */
#define RXISR 0x440 /* receive status; W1C */
#define RXIEN 0x444 /* rx interrupt enable */
#define RXIE_SET 0x468 /* bit to set */
#define RXIE_CLR 0x46c /* bit to clr */
-#define RXI_RC_ERR (1U<<16) /* recv error */
+#define RXI_RC_ERR (1U<<16) /* recv error detected */
#define RXI_PKTCNT (1U<<15) /* recv counter has new value */
#define RXI_TMREXP (1U<<14) /* coalesce guard timer expired */
#define TDBA_LO 0x408 /* tdes array base addr 31:0 */
@@ -164,16 +157,24 @@ struct rdes {
#define RXCONF 0x470 /* rdes config */
#define DESCNF_UP (1U<<31) /* 'up-and-running' */
#define DESCNF_CHRST (1U<<30) /* channel reset */
-#define DESCNF_TMR (1U<<4) /* coalesce timer mode select */
+#define DESCNF_TMR (1U<<4) /* coalesce timer unit select */
#define DESCNF_LE (1) /* little endian desc format */
#define TXSUBMIT 0x410 /* submit frame(s) to transmit */
#define TXCOALESC 0x418 /* tx intr coalesce upper bound */
#define RXCOALESC 0x458 /* rx intr coalesce upper bound */
-#define TCLSCTIME 0x420 /* tintr guard time usec, MSB to on */
-#define RCLSCTIME 0x460 /* rintr guard time usec, MSB to on */
+#define TCLSCTIME 0x420 /* tintr guard time usec */
+#define RCLSCTIME 0x460 /* rintr guard time usec */
#define TXDONECNT 0x414 /* tx completed count, auto-zero */
#define RXAVAILCNT 0x454 /* rx available count, auto-zero */
-#define DMACTL_TMR 0x20c /* engine DMA timer value */
+#define DMACTL_TMR 0x20c /* DMA cycle tick value */
+#define PKTCTRL 0x140 /* pkt engine control */
+#define MODENRM (1U<<28) /* set operational mode to 'normal' */
+#define ENJUMBO (1U<<27) /* allow jumbo frame */
+#define RPTCSUMERR (1U<<3) /* log Rx checksum error */
+#define RPTHDCOMP (1U<<2) /* log header incomplete condition */
+#define RPTHDERR (1U<<1) /* log header error */
+#define DROPNOMATCH (1U<<0) /* drop no match frames */
+#define UCODE_PKT 0x0d0 /* packet engine ucode port */
#define UCODE_H2M 0x210 /* host2media engine ucode port */
#define UCODE_M2H 0x21c /* media2host engine ucode port */
#define CORESTAT 0x218 /* engine run state */
@@ -184,11 +185,15 @@ struct rdes {
#define DMACTL_M2H 0x220 /* media2host engine control */
#define DMACTL_STOP (1U<<0) /* instruct stop; self-clear */
#define M2H_MODE_TRANS (1U<<20) /* initiate M2H mode change */
-#define UCODE_PKT 0x0d0 /* packet engine ucode port */
+#define MODE_TRANS 0x500 /* mode change completion status */
+#define N2T_DONE (1U<<20) /* normal->taiki change completed */
+#define T2N_DONE (1U<<19) /* taiki->normal change completed */
#define CLKEN 0x100 /* clock distribution enable */
#define CLK_G (1U<<5) /* feed clk domain G */
#define CLK_C (1U<<1) /* feed clk domain C */
#define CLK_D (1U<<0) /*
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Thu Jun 15 07:21:45 UTC 2023 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: if_scx.c To generate a diff of this commit: cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Wed Jun 14 00:07:22 UTC 2023
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
force PHY loopback while uengine reloading process as tianocore/EDK2 UEFI
mentions. A piece of comment updates.
To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.41 src/sys/arch/arm/sociox/if_scx.c:1.42
--- src/sys/arch/arm/sociox/if_scx.c:1.41 Tue Jun 13 00:15:52 2023
+++ src/sys/arch/arm/sociox/if_scx.c Wed Jun 14 00:07:22 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.42 2023/06/14 00:07:22 nisimura Exp $");
#include
#include
@@ -156,14 +156,12 @@ struct rdes {
#define RXI_RC_ERR (1U<<16) /* recv error */
#define RXI_PKTCNT (1U<<15) /* recv counter has new value */
#define RXI_TMREXP (1U<<14) /* coalesce guard timer expired */
-/* 13 sets of special purpose desc interrupt handling register exist */
#define TDBA_LO 0x408 /* tdes array base addr 31:0 */
#define TDBA_HI 0x434 /* tdes array base addr 63:32 */
#define RDBA_LO 0x448 /* rdes array base addr 31:0 */
#define RDBA_HI 0x474 /* rdes array base addr 63:32 */
-/* 13 pairs of special purpose desc array base address register exist */
-#define TXCONF 0x430
-#define RXCONF 0x470
+#define TXCONF 0x430 /* tdes config */
+#define RXCONF 0x470 /* rdes config */
#define DESCNF_UP (1U<<31) /* 'up-and-running' */
#define DESCNF_CHRST (1U<<30) /* channel reset */
#define DESCNF_TMR (1U<<4) /* coalesce timer mode select */
@@ -197,8 +195,8 @@ struct rdes {
#define MACCMD 0x11c4 /* gmac register operation */
#define CMD_IOWR (1U<<28) /* write op */
#define CMD_BUSY (1U<<31) /* busy bit */
-#define MACSTAT 0x1024 /* gmac status; ??? */
-#define MACINTE 0x1028 /* interrupt enable; ??? */
+#define MACSTAT 0x1024 /* mac interrupt status (unused) */
+#define MACINTE 0x1028 /* mac interrupt enable (unused) */
#define FLOWTHR 0x11cc /* flow control threshold */
/* 31:16 pause threshold, 15:0 resume threshold */
@@ -212,8 +210,6 @@ struct rdes {
#define MODE_TRANS 0x500 /* mode change completion status */
#define N2T_DONE (1U<<20) /* normal->taiki change completed */
#define T2N_DONE (1U<<19) /* taiki->normal change completed */
-#define MACADRH 0x10c /* ??? */
-#define MACADRL 0x110 /* ??? */
#define MCVER 0x22c /* micro controller version */
#define HWVER 0x230 /* hardware version */
@@ -247,7 +243,7 @@ struct rdes {
#define AFR_HPF (1U<<10) /* hash+perfect filter, or hash only */
#define AFR_SAF (1U<<9) /* source address filter */
#define AFR_SAIF (1U<<8) /* SA inverse filtering */
-#define AFR_PCF (2U<<6) /* ??? */
+#define AFR_PCF (2U<<6) /* 7:6 accept pause frame 0~3 */
#define AFR_DBF (1U<<5) /* reject broadcast frame */
#define AFR_PM (1U<<4) /* accept all multicast frame */
#define AFR_DAIF (1U<<3) /* DA inverse filtering */
@@ -585,6 +581,8 @@ static void dump_hwfeature(struct scx_so
static void resetuengine(struct scx_softc *);
static void loaducode(struct scx_softc *);
static void injectucode(struct scx_softc *, int, bus_addr_t, bus_size_t);
+static void forcephyloopback(struct scx_softc *);
+static void resetphytonormal(struct scx_softc *);
static int get_mdioclk(uint32_t);
@@ -997,7 +995,7 @@ aprint_normal_dev(sc->sc_dev, "descripto
/* 802.1Q VLAN-sized frames, and 9000 jumbo frame are supported */
sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
- sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU;
+ /* sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU; not yet */
sc->sc_flowflags = 0; /* track PAUSE flow caps */
@@ -1025,12 +1023,24 @@ aprint_normal_dev(sc->sc_dev, "descripto
CSR_WRITE(sc, RXCONF, DESCNF_LE); /* little endian */
CSR_WRITE(sc, DMACTL_TMR, sc->sc_freq / 100 - 1);
+ forcephyloopback(sc);/* make PHY loopback mode for uengine init */
+
+ CSR_WRITE(sc, xINTSR, IRQ_UCODE); /* pre-cautional W1C */
+ CSR_WRITE(sc, CORESTAT, 0); /* start uengine to reprogram */
+ error = WAIT_FOR_SET(sc, xINTSR, IRQ_UCODE);
+ if (error) {
+ aprint_error_dev(sc->sc_dev, "uengine start failed\n");
+ }
+ CSR_WRITE(sc, xINTSR, IRQ_UCODE); /* W1C load complete report */
+
+ resetphytonormal(sc); /* take back PHY to normal mode */
+
CSR_WRITE(sc, DMACTL_M2H, M2H_MODE_TRANS);
- CSR_WRITE(sc, PKTCTRL, MODENRM); /* change to use normal mode */
- WAIT_FOR_SET(sc, MODE_TRANS, T2N_DONE);
- /* do {
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Wed Jun 14 00:07:22 UTC 2023 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: force PHY loopback while uengine reloading process as tianocore/EDK2 UEFI mentions. A piece of comment updates. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Jun 13 00:15:52 UTC 2023
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
major code quality improvements, descriptive comments, code density.
To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.40 src/sys/arch/arm/sociox/if_scx.c:1.41
--- src/sys/arch/arm/sociox/if_scx.c:1.40 Sun May 21 00:35:38 2023
+++ src/sys/arch/arm/sociox/if_scx.c Tue Jun 13 00:15:52 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.41 2023/06/13 00:15:52 nisimura Exp $");
#include
#include
@@ -75,7 +75,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
#include
#include
-/* SC2A11 GbE 64-bit paddr descriptor */
+/* SC2A11 GbE has 64-bit paddr descriptor */
struct tdes {
uint32_t t0, t1, t2, t3;
};
@@ -105,8 +105,9 @@ struct rdes {
#define R0_TDRID (12) /* 15:12 target desc ring id */
#define R0_FS (1U<<9) /* first segment of frame */
#define R0_LS (1U<<8) /* last segment of frame */
-#define R0_CSUM (3U<<6) /* 7:6 checksum status */
-#define R0_CERR (2U<<6) /* 0: undone, 1: found ok, 2: bad */
+#define R0_CSUM (3U<<6) /* 7:6 checksum status, 0: undone */
+#define R0_CERR (2U<<6) /* 2: found bad */
+#define R0_COK (1U<<6) /* 1: found ok */
/* R1 frame address 63:32 */
/* R2 frame address 31:0 */
/* R3 31:16 received frame length, 15:0 buffer length to receive */
@@ -120,11 +121,11 @@ struct rdes {
#define INIT_DB (1U<<2) /* ???; self clear when done */
#define INIT_CLS (1U<<1) /* ???; self clear when done */
#define PKTCTRL 0x140 /* pkt engine control */
-#define MODENRM (1U<<28) /* change mode to normal */
+#define MODENRM (1U<<28) /* set operational mode to 'normal' */
#define ENJUMBO (1U<<27) /* allow jumbo frame */
#define RPTCSUMERR (1U<<3) /* log Rx checksum error */
-#define RPTHDCOMP (1U<<2) /* log HD incomplete condition */
-#define RPTHDERR (1U<<1) /* log HD error */
+#define RPTHDCOMP (1U<<2) /* log header incomplete condition */
+#define RPTHDERR (1U<<1) /* log header error */
#define DROPNOMATCH (1U<<0) /* drop no match frames */
#define xINTSR 0x200 /* aggregated interrupt status */
#define IRQ_UCODE (1U<<20) /* ucode load completed; W1C */
@@ -145,16 +146,16 @@ struct rdes {
#define TXIE_SET 0x428 /* bit to set */
#define TXIE_CLR 0x42c /* bit to clr */
#define TXI_NTOWNR (1U<<17) /* ??? desc array got empty */
-#define TXI_TR_ERR (1U<<16) /* tx error */
-#define TXI_TXDONE (1U<<15) /* tx completed */
-#define TXI_TMREXP (1U<<14) /* coalesce timer expired */
+#define TXI_TR_ERR (1U<<16) /* xmit error */
+#define TXI_TXDONE (1U<<15) /* xmit completed */
+#define TXI_TMREXP (1U<<14) /* coalesce guard timer expired */
#define RXISR 0x440 /* receive status; W1C */
#define RXIEN 0x444 /* rx interrupt enable */
#define RXIE_SET 0x468 /* bit to set */
#define RXIE_CLR 0x46c /* bit to clr */
-#define RXI_RC_ERR (1U<<16) /* rx error */
-#define RXI_PKTCNT (1U<<15) /* rx counter has new value */
-#define RXI_TMREXP (1U<<14) /* coalesce timer expired */
+#define RXI_RC_ERR (1U<<16) /* recv error */
+#define RXI_PKTCNT (1U<<15) /* recv counter has new value */
+#define RXI_TMREXP (1U<<14) /* coalesce guard timer expired */
/* 13 sets of special purpose desc interrupt handling register exist */
#define TDBA_LO 0x408 /* tdes array base addr 31:0 */
#define TDBA_HI 0x434 /* tdes array base addr 63:32 */
@@ -163,33 +164,33 @@ struct rdes {
/* 13 pairs of special purpose desc array base address register exist */
#define TXCONF 0x430
#define RXCONF 0x470
-#define DESCNF_UP (1U<<31) /* up-and-running */
+#define DESCNF_UP (1U<<31) /* 'up-and-running' */
#define DESCNF_CHRST (1U<<30) /* channel reset */
#define DESCNF_TMR (1U<<4) /* coalesce timer mode select */
#define DESCNF_LE (1) /* little endian desc format */
#define TXSUBMIT 0x410 /* submit frame(s) to transmit */
-#define TXCLSCMAX 0x418 /* tx intr coalesce upper bound */
-#define RXCLSCMAX 0x458 /* rx intr coalesce upper bound */
-#define TXITIMER 0x420 /* coalesce timer usec, MSB to use */
-#define RXITIMER 0x460 /* coalesce timer usec, MSB to use */
+#define TXCOALESC 0x418 /* tx intr coalesce upper bound */
+#define RXCOALESC 0x458 /* rx intr coalesce upper bound */
+#define TCLSCTIME 0x420 /* tintr guard time usec, MSB to on */
+#define RCLSCTIME 0x460 /* rintr guard time usec, MSB to on */
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Jun 13 00:15:52 UTC 2023 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: major code quality improvements, descriptive comments, code density. To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Sun May 21 00:35:38 UTC 2023
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
small fixes, code shuffle for ease of understanding.
To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.39 src/sys/arch/arm/sociox/if_scx.c:1.40
--- src/sys/arch/arm/sociox/if_scx.c:1.39 Tue Sep 27 06:36:43 2022
+++ src/sys/arch/arm/sociox/if_scx.c Sun May 21 00:35:38 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.39 2022/09/27 06:36:43 skrll Exp $ */
+/* $NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -29,6 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#define NOT_MP_SAFE 0
/*
* Socionext SC2A11 SynQuacer NetSec GbE driver
@@ -41,17 +42,14 @@
* NetSec uses Synopsys DesignWare Core EMAC. DWC implementation
* register (0x20) is known to have 0x10.36 and feature register (0x1058)
* reports 0x11056f37.
- * <24> exdesc
+ * <24> alternative/enhanced desc format
* <18> receive IP type 2 checksum offload
- * <17> (no) receive IP type 1 checksum offload
* <16> transmit checksum offload
* <11> event counter (mac management counter, MMC)
*/
-#define NOT_MP_SAFE 0
-
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.39 2022/09/27 06:36:43 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.40 2023/05/21 00:35:38 nisimura Exp $");
#include
#include
@@ -81,27 +79,25 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
struct tdes {
uint32_t t0, t1, t2, t3;
};
-
struct rdes {
uint32_t r0, r1, r2, r3;
};
-
#define T0_OWN (1U<<31) /* desc is ready to Tx */
-#define T0_EOD (1U<<30) /* end of descriptor array */
+#define T0_LD (1U<<30) /* last descriptor in array */
#define T0_DRID (24) /* 29:24 desc ring id */
#define T0_PT (1U<<21) /* 23:21 "pass-through" */
#define T0_TDRID (16) /* 20:16 target desc ring id: GMAC=15 */
+#define T0_CC (1U<<15) /* ??? */
#define T0_FS (1U<<9) /* first segment of frame */
#define T0_LS (1U<<8) /* last segment of frame */
#define T0_CSUM (1U<<7) /* enable check sum offload */
#define T0_TSO (1U<<6) /* enable TCP segment offload */
-#define T0_TRS (1U<<4) /* 5:4 "TRS" */
+#define T0_TRS (1U<<4) /* 5:4 "TRS" ??? */
/* T1 frame segment address 63:32 */
/* T2 frame segment address 31:0 */
/* T3 31:16 TCP segment length, 15:0 frame segment length to transmit */
-
#define R0_OWN (1U<<31) /* desc is empty */
-#define R0_EOD (1U<<30) /* end of descriptor array */
+#define R0_LD (1U<<30) /* last descriptor in array */
#define R0_SDRID (24) /* 29:24 source desc ring id */
#define R0_FR (1U<<23) /* found fragmented */
#define R0_ER (1U<<21) /* Rx error indication */
@@ -131,9 +127,13 @@ struct rdes {
#define RPTHDERR (1U<<1) /* log HD error */
#define DROPNOMATCH (1U<<0) /* drop no match frames */
#define xINTSR 0x200 /* aggregated interrupt status */
-#define IRQ_RX (1U<<1) /* top level Rx interrupt */
-#define IRQ_TX (1U<<0) /* top level Rx interrupt */
#define IRQ_UCODE (1U<<20) /* ucode load completed; W1C */
+#define IRQ_MAC (1U<<19) /* ??? */
+#define IRQ_PKT (1U<<18) /* ??? */
+#define IRQ_BOOTCODE (1U<<5) /* ??? */
+#define IRQ_XDONE (1U<<4) /* ??? mode change completed */
+#define IRQ_RX (1U<<1) /* top level Rx interrupt */
+#define IRQ_TX (1U<<0) /* top level Tx interrupt */
#define xINTAEN 0x204 /* INT_A enable */
#define xINTAE_SET 0x234 /* bit to set */
#define xINTAE_CLR 0x238 /* bit to clr */
@@ -174,6 +174,7 @@ struct rdes {
#define RXITIMER 0x460 /* coalesce timer usec, MSB to use */
#define TXDONECNT 0x414 /* tx completed count, auto-zero */
#define RXDONECNT 0x454 /* rx available count, auto-zero */
+#define DMACTL_TMR 0x20c /* engine DMA timer value */
#define UCODE_H2M 0x210 /* host2media engine ucode port */
#define UCODE_M2H 0x21c /* media2host engine ucode port */
#define CORESTAT 0x218 /* engine run state */
@@ -223,9 +224,9 @@ struct rdes {
#define MCR_WD (1U<<23) /* allow long >2048 tx frame */
#define MCR_JE (1U<<20) /* allow ~9018 tx jumbo frame */
#define MCR_IFG (7U<<17) /* 19:17 IFG value 0~7 */
-#define MCR_DRCS (1U<<16) /* ignore (G)MII HDX Tx error */
-#define MCR_USEMII (1U<<15) /* 1: RMII/MII, 0: RGMII (_PS) */
-#define MCR_SPD100 (1U<<14) /* force speed 100 (_FES) */
+#define MCR_DCRS (1U<<16) /* ignore (G)MII HDX Tx error */
+#define MCR_PS (1U<<15) /* 1: MII 10/100, 0: GMII 1000 */
+#define MCR_FES (1U<<14) /* force speed 100 */
#define MCR_DO (1U<<13) /* don't receive my own HDX Tx frames */
#define MCR_LOOP (1U<<12) /* run loop back */
#define MCR_USEFDX (1U<<11) /* force full duplex */
@@ -233,11 +234,10 @@ struct
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Sun May 21 00:35:38 UTC 2023 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: small fixes, code shuffle for ease of understanding. To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: thorpej
Date: Sun Sep 18 15:22:43 UTC 2022
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
Eliminate use of IFF_OACTIVE.
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.37 src/sys/arch/arm/sociox/if_scx.c:1.38
--- src/sys/arch/arm/sociox/if_scx.c:1.37 Sun Jun 12 16:22:37 2022
+++ src/sys/arch/arm/sociox/if_scx.c Sun Sep 18 15:22:43 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.37 2022/06/12 16:22:37 andvar Exp $ */
+/* $NetBSD: if_scx.c,v 1.38 2022/09/18 15:22:43 thorpej Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -51,7 +51,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.37 2022/06/12 16:22:37 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.38 2022/09/18 15:22:43 thorpej Exp $");
#include
#include
@@ -1133,7 +1133,6 @@ scx_init(struct ifnet *ifp)
mac_write(sc, GMACOMR, csr | OMR_SR | OMR_ST);
ifp->if_flags |= IFF_RUNNING;
- ifp->if_flags &= ~IFF_OACTIVE;
/* start one second timer */
callout_schedule(>sc_callout, hz);
@@ -1153,7 +1152,7 @@ scx_stop(struct ifnet *ifp, int disable)
mii_down(>sc_mii);
/* Mark the interface down and cancel the watchdog timer. */
- ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
+ ifp->if_flags &= ~IFF_RUNNING;
ifp->if_timer = 0;
CSR_WRITE(sc, xINTAE_CLR, ~0);
@@ -1318,7 +1317,7 @@ scx_start(struct ifnet *ifp)
int error, nexttx, lasttx, ofree, seg;
uint32_t tdes0;
- if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
+ if ((ifp->if_flags & IFF_RUNNING) == 0)
return;
/* Remember the previous number of free descriptors. */
@@ -1362,10 +1361,8 @@ scx_start(struct ifnet *ifp)
* Not enough free descriptors to transmit this
* packet. We haven't committed anything yet,
* so just unload the DMA map, put the packet
- * back on the queue, and punt. Notify the upper
- * layer that there are not more slots left.
+ * back on the queue, and punt.
*/
- ifp->if_flags |= IFF_OACTIVE;
bus_dmamap_unload(sc->sc_dmat, dmamap);
break;
}
@@ -1427,10 +1424,6 @@ scx_start(struct ifnet *ifp)
bpf_mtap(ifp, m0, BPF_D_OUT);
}
- if (sc->sc_txsfree == 0 || sc->sc_txfree == 0) {
- /* No more slots left; notify upper layer. */
- ifp->if_flags |= IFF_OACTIVE;
- }
if (sc->sc_txfree != ofree) {
/* Set a watchdog timer in case the chip flakes out. */
ifp->if_timer = 5;
@@ -1505,8 +1498,6 @@ txreap(struct scx_softc *sc)
uint32_t txstat;
int i;
- ifp->if_flags &= ~IFF_OACTIVE;
-
for (i = sc->sc_txsdirty; sc->sc_txsfree != MD_TXQUEUELEN;
i = MD_NEXTTXS(i), sc->sc_txsfree++) {
txs = >sc_txsoft[i];
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: thorpej Date: Sun Sep 18 15:22:43 UTC 2022 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: Eliminate use of IFF_OACTIVE. To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Feb 1 09:08:33 UTC 2022 Modified Files: src/sys/arch/arm/sociox: files.sociox Log Message: retire SocioNext AVE 32/64 GbE driver To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sociox/files.sociox Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/sociox/files.sociox diff -u src/sys/arch/arm/sociox/files.sociox:1.10 src/sys/arch/arm/sociox/files.sociox:1.11 --- src/sys/arch/arm/sociox/files.sociox:1.10 Fri Dec 3 05:21:52 2021 +++ src/sys/arch/arm/sociox/files.sociox Tue Feb 1 09:08:33 2022 @@ -1,4 +1,4 @@ -# $NetBSD: files.sociox,v 1.10 2021/12/03 05:21:52 nisimura Exp $ +# $NetBSD: files.sociox,v 1.11 2022/02/01 09:08:33 nisimura Exp $ # # Configuration info for Socionext SC2A11 # @@ -10,11 +10,6 @@ attach scx at acpinodebus with scx_acpi attach scx at fdt with scx_fdt file arch/arm/sociox/if_scx.c scx -# Unifier AVE GbE -device ave: ether, ifnet, arp, mii, bus_dma_generic -attach ave at fdt with ave_fdt -file arch/arm/sociox/if_ave.c ave - # Socionext eMMC device sniemmc: sdmmcbus attach sniemmc at acpinodebus with sniemmc_acpi
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Feb 1 09:08:33 UTC 2022 Modified Files: src/sys/arch/arm/sociox: files.sociox Log Message: retire SocioNext AVE 32/64 GbE driver To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sociox/files.sociox Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Feb 1 08:58:25 UTC 2022 Removed Files: src/sys/arch/arm/sociox: if_ave.c Log Message: retire SocioNext AVE 32/64 GbE driver To generate a diff of this commit: cvs rdiff -u -r1.22 -r0 src/sys/arch/arm/sociox/if_ave.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Feb 1 08:58:25 UTC 2022 Removed Files: src/sys/arch/arm/sociox: if_ave.c Log Message: retire SocioNext AVE 32/64 GbE driver To generate a diff of this commit: cvs rdiff -u -r1.22 -r0 src/sys/arch/arm/sociox/if_ave.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Thu Jan 27 02:34:23 UTC 2022
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
always use mac_write/read to handle DWC registers
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.35 src/sys/arch/arm/sociox/if_scx.c:1.36
--- src/sys/arch/arm/sociox/if_scx.c:1.35 Tue Jan 25 10:51:36 2022
+++ src/sys/arch/arm/sociox/if_scx.c Thu Jan 27 02:34:23 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.36 2022/01/27 02:34:23 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -40,13 +40,18 @@
* have to be loaded by device driver.
* NetSec uses Synopsys DesignWare Core EMAC. DWC implementation
* register (0x20) is known to have 0x10.36 and feature register (0x1058)
- * to report XX.XX.
+ * reports 0x11056f37.
+ * <24> exdesc
+ * <18> receive IP type 2 checksum offload
+ * <17> (no) receive IP type 1 checksum offload
+ * <16> transmit checksum offload
+ * <11> event counter (mac management counter, MMC)
*/
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.36 2022/01/27 02:34:23 nisimura Exp $");
#include
#include
@@ -380,12 +385,12 @@ struct rdes {
#define FEA_2COE (1U<<18) /* Rx type 2 IP checksum offload */
#define FEA_1COE (1U<<17) /* Rx type 1 IP checksum offload */
#define FEA_TXOE (1U<<16) /* Tx checksum offload */
-#define FEA_MMC (1U<<11) /* RMON management block */
+#define FEA_MMC (1U<<11) /* RMON event counter */
#define GMACEVCTL 0x0100 /* event counter control */
#define EVC_FHP (1U<<5) /* full-half preset */
-#define EVC_CP (1U<<4) /* counters preset */
-#define EVC_MCF (1U<<3) /* MMC counter freeze */
+#define EVC_CP (1U<<4) /* counter preset */
+#define EVC_MCF (1U<<3) /* counter freeze */
#define EVC_ROR (1U<<2) /* auto-zero on counter read */
#define EVC_CSR (1U<<1) /* counter stop rollover */
#define EVC_CR (1U<<0) /* reset counters */
@@ -1025,7 +1030,8 @@ scx_reset(struct scx_softc *sc)
CSR_WRITE(sc, TXISR, ~0);
CSR_WRITE(sc, xINTAE_CLR, ~0);
- mac_write(sc, GMACEVCTL, 1);
+ /* clear event counters, auto-zero after every read */
+ mac_write(sc, GMACEVCTL, EVC_CR | EVC_ROR);
}
static int
@@ -1045,7 +1051,7 @@ scx_init(struct ifnet *ifp)
/* build sane Tx */
memset(sc->sc_txdescs, 0, sizeof(struct tdes) * MD_NTXDESC);
- sc->sc_txdescs[MD_NTXDESC - 1].t0 |= T0_EOD; /* tie off the ring */
+ sc->sc_txdescs[MD_NTXDESC - 1].t0 = T0_EOD; /* tie off the ring */
SCX_CDTXSYNC(sc, 0, MD_NTXDESC,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
sc->sc_txfree = MD_NTXDESC;
@@ -1071,8 +1077,7 @@ scx_init(struct ifnet *ifp)
else
SCX_INIT_RXDESC(sc, i);
}
- sc->sc_rxdescs[MD_NRXDESC - 1].r0 = R0_EOD;
- sc->sc_rxptr = 0;
+ sc->sc_rxdescs[MD_NRXDESC - 1].r0 = R0_EOD; /* tie off the ring */
sc->sc_rxptr = 0;
paddr = SCX_CDTXADDR(sc, 0); /* tdes array (ring#0) */
@@ -1104,8 +1109,8 @@ scx_init(struct ifnet *ifp)
CSR_WRITE(sc, DESC_INIT, 01);
WAIT_FOR_CLR(sc, DESC_INIT, 01, 0);
- CSR_WRITE(sc, GMACRDLA, _RDLA); /* GMAC rdes store */
- CSR_WRITE(sc, GMACTDLA, _TDLA); /* GMAC tdes store */
+ mac_write(sc, GMACRDLA, _RDLA); /* GMAC rdes store */
+ mac_write(sc, GMACTDLA, _TDLA); /* GMAC tdes store */
CSR_WRITE(sc, FLOWTHR, (48<<16) | 36); /* pause|resume threshold */
mac_write(sc, GMACFCR, 256 << 16); /* 31:16 pause value */
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Thu Jan 27 02:34:23 UTC 2022 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: always use mac_write/read to handle DWC registers To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Jan 25 10:51:36 UTC 2022
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
- don't put const for CFATTACH_DECL_NEW()
- MDIO now senses PHY correctly.
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.34 src/sys/arch/arm/sociox/if_scx.c:1.35
--- src/sys/arch/arm/sociox/if_scx.c:1.34 Fri Dec 31 14:25:22 2021
+++ src/sys/arch/arm/sociox/if_scx.c Tue Jan 25 10:51:36 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.34 2021/12/31 14:25:22 riastradh Exp $ */
+/* $NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.34 2021/12/31 14:25:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.35 2022/01/25 10:51:36 nisimura Exp $");
#include
#include
@@ -546,10 +546,10 @@ static void scx_fdt_attach(device_t, dev
static int scx_acpi_match(device_t, cfdata_t, void *);
static void scx_acpi_attach(device_t, device_t, void *);
-const CFATTACH_DECL_NEW(scx_fdt, sizeof(struct scx_softc),
+CFATTACH_DECL_NEW(scx_fdt, sizeof(struct scx_softc),
scx_fdt_match, scx_fdt_attach, NULL, NULL);
-const CFATTACH_DECL_NEW(scx_acpi, sizeof(struct scx_softc),
+CFATTACH_DECL_NEW(scx_acpi, sizeof(struct scx_softc),
scx_acpi_match, scx_acpi_attach, NULL, NULL);
static void scx_attach_i(struct scx_softc *);
@@ -683,9 +683,6 @@ scx_fdt_attach(device_t parent, device_t
const char *phy_type;
long ref_clk;
- aprint_naive("\n");
- aprint_normal(": Socionext Gigabit Ethernet controller\n");
-
if (fdtbus_get_reg(phandle, 0, addr+0, size+0) != 0
|| bus_space_map(faa->faa_bst, addr[0], size[0], 0, ) != 0) {
aprint_error_dev(self, "unable to map device csr\n");
@@ -731,6 +728,7 @@ scx_fdt_attach(device_t parent, device_t
sc->sc_phy_id = phy_id;
sc->sc_freq = ref_clk;
+ aprint_normal("%s", device_xname(self));
scx_attach_i(sc);
return;
fail:
@@ -762,15 +760,11 @@ scx_acpi_attach(device_t parent, device_
ACPI_INTEGER phy_type, phy_id, ref_freq;
ACPI_STATUS rv;
- aprint_naive("\n");
- aprint_normal(": Socionext Gigabit Ethernet controller\n");
-
rv = acpi_resource_parse(self, handle, "_CRS",
, _resource_parse_ops_default);
- if (ACPI_FAILURE(rv)) {
- aprint_error_dev(self, "missing crs resources\n");
+ if (ACPI_FAILURE(rv))
return;
- }
+
mem = acpi_res_mem(, 0);
irq = acpi_res_irq(, 0);
if (mem == NULL || irq == NULL || mem->ar_length == 0) {
@@ -783,8 +777,8 @@ scx_acpi_attach(device_t parent, device_
return;
}
sc->sc_sz = mem->ar_length;
- sc->sc_ih = acpi_intr_establish(self, (uint64_t)handle, IPL_NET,
- NOT_MP_SAFE, scx_intr, sc, device_xname(self));
+ sc->sc_ih = acpi_intr_establish(self, (uint64_t)(uintptr_t)handle,
+ IPL_NET, NOT_MP_SAFE, scx_intr, sc, device_xname(self));
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt\n");
goto fail;
@@ -808,7 +802,7 @@ scx_acpi_attach(device_t parent, device_
}
rv = acpi_dsd_integer(handle, "phy-channel", _id);
if (ACPI_FAILURE(rv))
- phy_id = 7;
+ phy_id = MII_PHY_ANY;
rv = acpi_dsd_integer(handle, "socionext,phy-clock-frequency",
_freq);
if (ACPI_FAILURE(rv))
@@ -819,15 +813,14 @@ scx_acpi_attach(device_t parent, device_
sc->sc_sh = bsh;
sc->sc_eesh = eebsh;
sc->sc_dmat = aa->aa_dmat64;
-
-aprint_normal_dev(self,
-"phy type %d, phy id %d, freq %ld\n", (int)phy_type, (int)phy_id, ref_freq);
sc->sc_100mii = (phy_type != 1000);
sc->sc_phy_id = (int)phy_id;
sc->sc_freq = ref_freq;
+
aprint_normal_dev(self,
-"GMACGAR %08x\n", mac_read(sc, GMACGAR));
+"phy type %d, phy id %d, freq %ld\n", (int)phy_type, (int)phy_id, ref_freq);
+ aprint_normal("%s", device_xname(self));
scx_attach_i(sc);
acpi_resource_cleanup();
@@ -847,22 +840,23 @@ scx_attach_i(struct scx_softc *sc)
struct ifnet * const ifp = >sc_ethercom.ec_if;
struct mii_data * const mii = >sc_mii;
struct ifmedia * const ifm = >mii_media;
- uint32_t which, dwimp, dwfea;
+ uint32_t which, dwfea, dwimp;
uint8_t enaddr[ETHER_ADDR_LEN];
bus_dma_segment_t seg;
uint32_t csr;
int i, nseg, error = 0;
+ aprint_naive("\n");
+ aprint_normal(": Socionext Gigabit Ethernet controller\n");
+
which = CSR_READ(sc, HWVER); /* Socionext version 5.00xx */
- dwimp = mac_read(sc, GMACIMPL); /* DWC EMAC XX.YY */
- dwfea = mac_read(sc, HWFEA); /* DWC feature */
+ dwfea = mac_read(sc, HWFEA); /* DWC feature bits */
+ dwimp = mac_read(sc, GMACIMPL); /* DWC implementation XX.YY */
aprint_normal_dev(sc->sc_dev,
- "Socionext NetSec GbE %x.%x"
- " (impl 0x%x, feature 0x%x)\n",
- which >>
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Jan 25 10:51:36 UTC 2022 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: - don't put const for CFATTACH_DECL_NEW() - MDIO now senses PHY correctly. To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Jan 25 10:38:56 UTC 2022
Modified Files:
src/sys/arch/arm/sociox: sni_gpio.c
Log Message:
- rectify attach messages.
- abandon irq to use for now.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_gpio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/sni_gpio.c
diff -u src/sys/arch/arm/sociox/sni_gpio.c:1.12 src/sys/arch/arm/sociox/sni_gpio.c:1.13
--- src/sys/arch/arm/sociox/sni_gpio.c:1.12 Tue Dec 21 06:00:45 2021
+++ src/sys/arch/arm/sociox/sni_gpio.c Tue Jan 25 10:38:56 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sni_gpio.c,v 1.12 2021/12/21 06:00:45 nisimura Exp $ */
+/* $NetBSD: sni_gpio.c,v 1.13 2022/01/25 10:38:56 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.12 2021/12/21 06:00:45 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.13 2022/01/25 10:38:56 nisimura Exp $");
#include
#include
@@ -94,14 +94,13 @@ CFATTACH_DECL_NEW(snigpio_acpi, sizeof(s
*PowerButton (PWROFF#) can be detectable.
*
* DevelopmentBox has 96board mezzanine 2x 20 receptacle
- *gpio "/gpio@5100" pinA-L (10-25) down edge sensitive
+ *gpio "/gpio@5100" pinA-L (23-34) down edge sensitive
*i2c "/i2c1@51221000"
*spi "/spi1@5481"
- *uart0 "/uart@2a40" pin1-4 for real S2C11 console
- *uart1 SCP secure co-prorcessor uart console in pin5-6
+ *uart0 "/uart@2a40" pin3,5,7,9 for real S2CA11 console
+ *uart1 SCP secure co-prorcessor uart console in pin11,13
*/
static void snigpio_attach_i(struct snigpio_softc *);
-static int snigpio_intr(void *);
static const struct device_compatible_entry compat_data[] = {
{ .compat = "socionext,synquacer-gpio" },
@@ -130,32 +129,12 @@ snigpio_fdt_attach(device_t parent, devi
bus_space_handle_t ioh;
bus_addr_t addr;
bus_size_t size;
- char intrstr[128];
- const char *list;
-
- aprint_naive("\n");
- aprint_normal(": Socionext GPIO controller\n");
if (fdtbus_get_reg(phandle, 0, , ) != 0
|| bus_space_map(faa->faa_bst, addr, size, 0, ) != 0) {
aprint_error_dev(self, "unable to map device\n");
return;
}
- if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
- aprint_error_dev(self, "failed to decode interrupt\n");
- goto fail;
- }
- sc->sc_ih = fdtbus_intr_establish(phandle,
- 0, IPL_VM, 0, snigpio_intr, sc);
- if (sc->sc_ih == NULL) {
- aprint_error_dev(self, "couldn't establish interrupt\n");
- goto fail;
- }
- aprint_normal_dev(self, "interrupting on %s\n", intrstr);
-
- list = fdtbus_get_string(phandle, "gpio-line-names");
- if (list)
- aprint_normal_dev(self, "%s\n", list);
sc->sc_dev = self;
sc->sc_iot = faa->faa_bst;
@@ -163,13 +142,11 @@ snigpio_fdt_attach(device_t parent, devi
sc->sc_iob = addr;
sc->sc_ios = size;
sc->sc_phandle = phandle;
+ /* could use FDI "gpio-line-names" array via device_set_handle() */
snigpio_attach_i(sc);
return;
- fail:
- bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
- return;
}
static int
@@ -189,22 +166,16 @@ snigpio_acpi_attach(device_t parent, dev
bus_space_handle_t ioh;
struct acpi_resources res;
struct acpi_mem *mem;
- struct acpi_irq *irq;
ACPI_STATUS rv;
char *list;
- aprint_naive("\n");
- aprint_normal(": Socionext GPIO controller\n");
-
rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
, _resource_parse_ops_default);
- if (ACPI_FAILURE(rv)) {
- aprint_error_dev(self, "missing crs resources\n");
+ if (ACPI_FAILURE(rv))
return;
- }
+
mem = acpi_res_mem(, 0);
- irq = acpi_res_irq(, 0);
- if (mem == NULL || irq == NULL || mem->ar_length == 0) {
+ if (mem == NULL || mem->ar_length == 0) {
aprint_error_dev(self, "incomplete resources\n");
return;
}
@@ -213,30 +184,19 @@ snigpio_acpi_attach(device_t parent, dev
aprint_error_dev(self, "couldn't map registers\n");
return;
}
- sc->sc_ih = acpi_intr_establish(self, (uint64_t)handle,
- IPL_VM, false, snigpio_intr, sc, device_xname(self));
- if (sc->sc_ih == NULL) {
- aprint_error_dev(self, "couldn't establish interrupt\n");
- goto fail;
- }
- rv = acpi_dsd_string(handle, "gpio-line-names", );
- if (ACPI_SUCCESS(rv))
- aprint_normal_dev(self, "%s\n", list);
sc->sc_dev = self;
sc->sc_iot = aa->aa_memt;
sc->sc_ioh = ioh;
sc->sc_ios = mem->ar_length;
sc->sc_phandle = 0;
+ /* UEFI provides "gpio-line-names" for us */
+ aprint_normal("%s", device_xname(self));
snigpio_attach_i(sc);
acpi_resource_cleanup();
return;
- fail:
- acpi_resource_cleanup();
- bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
- return;
}
static void
@@ -245,6 +205,9 @@ snigpio_attach_i(struct snigpio_softc *s
struct gpio_chipset_tag *gc;
struct gpiobus_attach_args gba;
+
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Jan 25 10:38:56 UTC 2022 Modified Files: src/sys/arch/arm/sociox: sni_gpio.c Log Message: - rectify attach messages. - abandon irq to use for now. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_gpio.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Wed Dec 22 02:32:53 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: sni_i2c.c
Log Message:
add register definitions. the design is BCM2835 I2C look-a-like.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sociox/sni_i2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/sni_i2c.c
diff -u src/sys/arch/arm/sociox/sni_i2c.c:1.13 src/sys/arch/arm/sociox/sni_i2c.c:1.14
--- src/sys/arch/arm/sociox/sni_i2c.c:1.13 Tue Dec 21 06:00:45 2021
+++ src/sys/arch/arm/sociox/sni_i2c.c Wed Dec 22 02:32:53 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sni_i2c.c,v 1.13 2021/12/21 06:00:45 nisimura Exp $ */
+/* $NetBSD: sni_i2c.c,v 1.14 2021/12/22 02:32:53 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sni_i2c.c,v 1.13 2021/12/21 06:00:45 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_i2c.c,v 1.14 2021/12/22 02:32:53 nisimura Exp $");
#include
#include
@@ -53,23 +53,67 @@ __KERNEL_RCSID(0, "$NetBSD: sni_i2c.c,v
#include
#include
+#define BSR 0x00 /* status */
+#define BSR_BB (1U<<7) /* busy */
+#define BSR_RSC (1U<<6) /* repeated cycle condition */
+#define BSR_AL (1U<<5) /* arbitration lost */
+#define BSR_LRB (1U<<4) /* last bit received */
+#define BSR_XFR (1U<<3) /* start transfer */
+#define BSR_AAS (1U<<2) /* ??? address as slave */
+#define BSR_GCA (1U<<1) /* ??? general call address */
+#define BSR_FBT (1U<<0) /* first byte transfer detected */
+#define BCR 0x04 /* control */
+#define BCR_BERR (1U<<7) /* bus error report; W0C */
+#define BCR_BEIEN (1U<<6) /* enable bus error interrupt */
+#define BCR_SCC (1U<<5) /* make start condition */
+#define BCR_MSS (1U<<4) /* 1: xmit, 0: recv */
+#define BCR_ACK (1U<<3) /* make acknowledge at last byte */
+#define BCR_GCAA (1U<<2) /* ??? general call access ack */
+#define BCR_IEN (1U<<1) /* enable interupt */
+#define BCR_INT (1U<<0) /* interrupt report; W0C */
+#define CCR 0x08
+#define CCR_FM (1U<<6) /* speed; 1: fast, 0: standard */
+#define CCR_EN (1U<<5) /* enable clock feed */
+/* 4:0 clock rate select */
+#define ADR 0x0c /* 6:0 my own address */
+#define DAR 0x10 /* 7:0 data port */
+#define CSR 0x14 /* 5:0 clock divisor */
+#define FSR 0x18 /* bus clock frequency */
+#define BC2R 0x1c /* control 2 */
+#define BC2R_SDA (1U<<5) /* detected SDA signal */
+#define BC2R_SCL (1U<<5) /* detected SCL signal */
+#define BC2R_SDA_L (1U<<1) /* make SDA signal low */
+#define BC2R_SCL_L (1U<<1) /* make SCL signal low */
+
static int sniiic_fdt_match(device_t, struct cfdata *, void *);
static void sniiic_fdt_attach(device_t, device_t, void *);
static int sniiic_acpi_match(device_t, struct cfdata *, void *);
static void sniiic_acpi_attach(device_t, device_t, void *);
+typedef enum {
+ EXEC_IDLE = 0, /* sane and idle */
+ EXEC_ADDR = 1, /* send address bits */
+ EXEC_CMD = 2, /* send command bits */
+ EXEC_SEND = 3, /* data xmit */
+ EXEC_RECV = 4, /* data recv */
+ EXEC_DONE = 5, /* xter done */
+ EXEC_ERR = 6, /* recover error */
+} state_t;
+
struct sniiic_softc {
device_t sc_dev;
struct i2c_controller sc_ic;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
- bus_addr_t sc_iob;
bus_size_t sc_ios;
void *sc_ih;
kmutex_t sc_lock;
kmutex_t sc_mtx;
kcondvar_t sc_cv;
volatile bool sc_busy;
+ state_t sc_state;
+ u_int sc_frequency;
+ u_int sc_clkrate;
int sc_phandle;
};
@@ -90,9 +134,9 @@ static int sni_i2c_intr(void *);
static void sni_i2c_reset(struct sniiic_softc *);
static void sni_i2c_flush(struct sniiic_softc *);
-#define I2C_READ(sc, reg) \
+#define CSR_READ(sc, reg) \
bus_space_read_4((sc)->sc_ioh,(sc)->sc_ioh,(reg))
-#define I2C_WRITE(sc, reg, val) \
+#define CSR_WRITE(sc, reg, val) \
bus_space_write_4((sc)->sc_ioh,(sc)->sc_ioh,(reg),(val))
static const struct device_compatible_entry compat_data[] = {
@@ -146,7 +190,6 @@ sniiic_fdt_attach(device_t parent, devic
sc->sc_dev = self;
sc->sc_iot = faa->faa_bst;
sc->sc_ioh = ioh;
- sc->sc_iob = addr;
sc->sc_ios = size;
sc->sc_phandle = phandle;
@@ -213,7 +256,6 @@ sniiic_acpi_attach(device_t parent, devi
sc->sc_dev = self;
sc->sc_iot = aa->aa_memt;
sc->sc_ioh = ioh;
- sc->sc_iob = mem->ar_base;
sc->sc_ios = mem->ar_length;
sc->sc_phandle = 0;
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Wed Dec 22 02:32:53 UTC 2021 Modified Files: src/sys/arch/arm/sociox: sni_i2c.c Log Message: add register definitions. the design is BCM2835 I2C look-a-like. To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sociox/sni_i2c.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Dec 21 21:30:49 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: pursue better register description To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Dec 21 21:30:49 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
pursue better register description
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.32 src/sys/arch/arm/sociox/if_scx.c:1.33
--- src/sys/arch/arm/sociox/if_scx.c:1.32 Tue Dec 21 12:12:52 2021
+++ src/sys/arch/arm/sociox/if_scx.c Tue Dec 21 21:30:49 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.33 2021/12/21 21:30:49 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.33 2021/12/21 21:30:49 nisimura Exp $");
#include
#include
@@ -163,7 +163,7 @@ struct rdes {
#define DESCNF_CHRST (1U<<30) /* channel reset */
#define DESCNF_TMR (1U<<4) /* coalesce timer mode select */
#define DESCNF_LE (1) /* little endian desc format */
-#define TXSUBMIT 0x410 /* submit loaded tx frame */
+#define TXSUBMIT 0x410 /* submit frame(s) to transmit */
#define TXCLSCMAX 0x418 /* tx intr coalesce upper bound */
#define RXCLSCMAX 0x458 /* rx intr coalesce upper bound */
#define TXITIMER 0x420 /* coalesce timer usec, MSB to use */
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Dec 21 12:12:52 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
correct register definition error and improve naming
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.31 src/sys/arch/arm/sociox/if_scx.c:1.32
--- src/sys/arch/arm/sociox/if_scx.c:1.31 Tue Dec 21 11:07:51 2021
+++ src/sys/arch/arm/sociox/if_scx.c Tue Dec 21 12:12:52 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.32 2021/12/21 12:12:52 nisimura Exp $");
#include
#include
@@ -163,12 +163,13 @@ struct rdes {
#define DESCNF_CHRST (1U<<30) /* channel reset */
#define DESCNF_TMR (1U<<4) /* coalesce timer mode select */
#define DESCNF_LE (1) /* little endian desc format */
-#define TXCOLMAX 0x410 /* tx intr coalesce upper bound */
-#define RXCOLMAX 0x454 /* rx intr coalesce upper bound */
+#define TXSUBMIT 0x410 /* submit loaded tx frame */
+#define TXCLSCMAX 0x418 /* tx intr coalesce upper bound */
+#define RXCLSCMAX 0x458 /* rx intr coalesce upper bound */
#define TXITIMER 0x420 /* coalesce timer usec, MSB to use */
#define RXITIMER 0x460 /* coalesce timer usec, MSB to use */
-#define TXDONECNT 0x424 /* tx completed count, auto-zero */
-#define RXDONECNT 0x458 /* rx available count, auto-zero */
+#define TXDONECNT 0x414 /* tx completed count, auto-zero */
+#define RXDONECNT 0x454 /* rx available count, auto-zero */
#define UCODE_H2M 0x210 /* host2media engine ucode port */
#define UCODE_M2H 0x21c /* media2host engine ucode port */
#define CORESTAT 0x218 /* engine run state */
@@ -1117,8 +1118,8 @@ scx_init(struct ifnet *ifp)
CSR_WRITE(sc, RXIE_CLR, ~0); /* clear Rx interrupt enable */
CSR_WRITE(sc, TXIE_CLR, ~0); /* clear Tx interrupt enable */
- CSR_WRITE(sc, RXCOLMAX, 8); /* Rx coalesce upper bound */
- CSR_WRITE(sc, TXCOLMAX, 8); /* Tx coalesce upper bound */
+ CSR_WRITE(sc, RXCLSCMAX, 8); /* Rx coalesce upper bound */
+ CSR_WRITE(sc, TXCLSCMAX, 8); /* Tx coalesce upper bound */
CSR_WRITE(sc, RXITIMER, 500); /* Rx co. timer usec */
CSR_WRITE(sc, TXITIMER, 500); /* Tx co. timer usec */
@@ -1408,8 +1409,8 @@ scx_start(struct ifnet *ifp)
SCX_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
- /* Tell DMA start transmit */
- mac_write(sc, GMACTPD, 1);
+ /* submit one frame to xmit */
+ CSR_WRITE(sc, TXSUBMIT, 1);
txs->txs_mbuf = m0;
txs->txs_firstdesc = sc->sc_txnext;
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Dec 21 12:12:52 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: correct register definition error and improve naming To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Dec 21 11:07:51 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
add interrupt logic stuff
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.30 src/sys/arch/arm/sociox/if_scx.c:1.31
--- src/sys/arch/arm/sociox/if_scx.c:1.30 Mon Dec 20 06:47:24 2021
+++ src/sys/arch/arm/sociox/if_scx.c Tue Dec 21 11:07:51 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.31 2021/12/21 11:07:51 nisimura Exp $");
#include
#include
@@ -129,28 +129,29 @@ struct rdes {
#define xINTSR 0x200 /* aggregated interrupt status */
#define IRQ_RX (1U<<1) /* top level Rx interrupt */
#define IRQ_TX (1U<<0) /* top level Rx interrupt */
-#define IRQ_UCODE (1U<<20) /* ucode load completed */
+#define IRQ_UCODE (1U<<20) /* ucode load completed; W1C */
#define xINTAEN 0x204 /* INT_A enable */
#define xINTAE_SET 0x234 /* bit to set */
#define xINTAE_CLR 0x238 /* bit to clr */
#define xINTBEN 0x23c /* INT_B enable */
#define xINTBE_SET 0x240 /* bit to set */
#define xINTBE_CLR 0x244 /* bit to clr */
-#define TXISR 0x400 /* transmit status */
+#define TXISR 0x400 /* transmit status; W1C */
#define TXIEN 0x404 /* tx interrupt enable */
#define TXIE_SET 0x428 /* bit to set */
#define TXIE_CLR 0x42c /* bit to clr */
-#define TXI_NTOWNR (1U<<17) /* ready desc got empty */
+#define TXI_NTOWNR (1U<<17) /* ??? desc array got empty */
#define TXI_TR_ERR (1U<<16) /* tx error */
#define TXI_TXDONE (1U<<15) /* tx completed */
#define TXI_TMREXP (1U<<14) /* coalesce timer expired */
-#define RXISR 0x440 /* receive status */
+#define RXISR 0x440 /* receive status; W1C */
#define RXIEN 0x444 /* rx interrupt enable */
#define RXIE_SET 0x468 /* bit to set */
#define RXIE_CLR 0x46c /* bit to clr */
#define RXI_RC_ERR (1U<<16) /* rx error */
#define RXI_PKTCNT (1U<<15) /* rx counter has new value */
#define RXI_TMREXP (1U<<14) /* coalesce timer expired */
+/* 13 sets of special purpose desc interrupt handling register exist */
#define TDBA_LO 0x408 /* tdes array base addr 31:0 */
#define TDBA_HI 0x434 /* tdes array base addr 63:32 */
#define RDBA_LO 0x448 /* rdes array base addr 31:0 */
@@ -459,7 +460,6 @@ struct scx_softc {
int sc_flowflags; /* 802.3x PAUSE flow control */
uint32_t sc_mdclk; /* GAR 5:2 clock selection */
uint32_t sc_t0cotso; /* T0_CSUM | T0_TSO to run */
- int sc_ucodeloaded; /* ucode for H2M/M2H/PKT */
int sc_100mii; /* 1 for RMII/MII, 0 for RGMII */
int sc_phandle; /* fdt phandle */
uint64_t sc_freq;
@@ -603,7 +603,7 @@ static int
mac_read(struct scx_softc *sc, int reg)
{
- CSR_WRITE(sc, MACCMD, reg);
+ CSR_WRITE(sc, MACCMD, reg | CMD_BUSY);
(void)WAIT_FOR_CLR(sc, MACCMD, CMD_BUSY, 0);
return CSR_READ(sc, MACDATA);
}
@@ -613,10 +613,11 @@ mac_write(struct scx_softc *sc, int reg,
{
CSR_WRITE(sc, MACDATA, val);
- CSR_WRITE(sc, MACCMD, reg | CMD_IOWR);
+ CSR_WRITE(sc, MACCMD, reg | CMD_IOWR | CMD_BUSY);
(void)WAIT_FOR_CLR(sc, MACCMD, CMD_BUSY, 0);
}
+/* dig and decode "clock-frequency" value for a given clkname */
static int
get_clk_freq(int phandle, const char *clkname)
{
@@ -671,7 +672,6 @@ scx_fdt_attach(device_t parent, device_t
struct scx_softc * const sc = device_private(self);
struct fdt_attach_args * const faa = aux;
const int phandle = faa->faa_phandle;
- bus_space_tag_t bst = faa->faa_bst;
bus_space_handle_t bsh;
bus_space_handle_t eebsh;
bus_addr_t addr[2];
@@ -683,7 +683,7 @@ scx_fdt_attach(device_t parent, device_t
long ref_clk;
aprint_naive("\n");
- aprint_normal(": Gigabit Ethernet Controller\n");
+ aprint_normal(": Socionext Gigabit Ethernet controller\n");
if (fdtbus_get_reg(phandle, 0, addr+0, size+0) != 0
|| bus_space_map(faa->faa_bst, addr[0], size[0], 0, ) != 0) {
@@ -707,7 +707,7 @@ scx_fdt_attach(device_t parent, device_t
}
sc->sc_dev = self;
- sc->sc_st = bst;
+ sc->sc_st = faa->faa_bst;
sc->sc_sh = bsh;
sc->sc_sz = size[0];
sc->sc_eesh = eebsh;
@@ -754,7 +754,6 @@ scx_acpi_attach(device_t parent, device_
struct scx_softc * const sc = device_private(self);
struct acpi_attach_args * const aa = aux;
ACPI_HANDLE handle = aa->aa_node->ad_handle;
- bus_space_tag_t bst = aa->aa_memt;
bus_space_handle_t bsh, eebsh;
struct acpi_resources res;
struct acpi_mem *mem;
@@ -763,7
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Dec 21 11:07:51 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: add interrupt logic stuff To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Tue Dec 21 06:00:45 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: sni_emmc.c sni_gpio.c sni_i2c.c
Log Message:
improve consistency when attach error cases.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/sni_emmc.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/sociox/sni_gpio.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_i2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/sni_emmc.c
diff -u src/sys/arch/arm/sociox/sni_emmc.c:1.9 src/sys/arch/arm/sociox/sni_emmc.c:1.10
--- src/sys/arch/arm/sociox/sni_emmc.c:1.9 Wed Nov 10 17:23:46 2021
+++ src/sys/arch/arm/sociox/sni_emmc.c Tue Dec 21 06:00:45 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sni_emmc.c,v 1.9 2021/11/10 17:23:46 msaitoh Exp $ */
+/* $NetBSD: sni_emmc.c,v 1.10 2021/12/21 06:00:45 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sni_emmc.c,v 1.9 2021/11/10 17:23:46 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_emmc.c,v 1.10 2021/12/21 06:00:45 nisimura Exp $");
#include
#include
@@ -87,6 +87,10 @@ static const struct device_compatible_en
{ .compat = "fujitsu,mb86s70-sdhci-3.0" },
DEVICE_COMPAT_EOL
};
+static const struct device_compatible_entry compatible[] = {
+ { .compat = "SCX0002" },
+ DEVICE_COMPAT_EOL
+};
static int
sniemmc_fdt_match(device_t parent, struct cfdata *match, void *aux)
@@ -107,13 +111,16 @@ sniemmc_fdt_attach(device_t parent, devi
bus_size_t size;
char intrstr[128];
+ aprint_naive("\n");
+ aprint_normal_dev(self, "Socionext eMMC controller\n");
+
if (fdtbus_get_reg(phandle, 0, , ) != 0
|| bus_space_map(faa->faa_bst, addr, size, 0, ) != 0) {
- aprint_error(": unable to map device\n");
+ aprint_error_dev(self, "unable to map device\n");
return;
}
if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
- aprint_error(": failed to decode interrupt\n");
+ aprint_error_dev(self, "failed to decode interrupt\n");
goto fail;
}
sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_SDMMC, 0,
@@ -123,19 +130,16 @@ sniemmc_fdt_attach(device_t parent, devi
intrstr);
goto fail;
}
-
- aprint_naive("\n");
- aprint_normal_dev(self, "Socionext eMMC controller\n");
aprint_normal_dev(self, "interrupting on %s\n", intrstr);
sc->sc.sc_dev = self;
sc->sc.sc_dmat = faa->faa_dmat;
sc->sc.sc_host = sc->sc_hosts;
- sc->sc_phandle = phandle;
sc->sc_iot = faa->faa_bst;
sc->sc_ioh = ioh;
sc->sc_iob = addr;
sc->sc_ios = size;
+ sc->sc_phandle = phandle;
config_defer(self, sniemmc_attach_i);
return;
@@ -147,15 +151,9 @@ sniemmc_fdt_attach(device_t parent, devi
static int
sniemmc_acpi_match(device_t parent, struct cfdata *match, void *aux)
{
- static const char * compatible[] = {
- "SCX0002",
- NULL
- };
struct acpi_attach_args *aa = aux;
- if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
- return 0;
- return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
+ return acpi_compatible_match(aa, compatible);
}
static void
@@ -163,12 +161,16 @@ sniemmc_acpi_attach(device_t parent, dev
{
struct sniemmc_softc * const sc = device_private(self);
struct acpi_attach_args *aa = aux;
+ ACPI_HANDLE handle = aa->aa_node->ad_handle;
bus_space_handle_t ioh;
struct acpi_resources res;
struct acpi_mem *mem;
struct acpi_irq *irq;
ACPI_STATUS rv;
+ aprint_naive("\n");
+ aprint_normal(": Socionext eMMC controller\n");
+
rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
, _resource_parse_ops_default);
if (ACPI_FAILURE(rv))
@@ -176,31 +178,28 @@ sniemmc_acpi_attach(device_t parent, dev
mem = acpi_res_mem(, 0);
irq = acpi_res_irq(, 0);
if (mem == NULL || irq == NULL || mem->ar_length == 0) {
- aprint_error(": incomplete resources\n");
+ aprint_error_dev(self, "incomplete resources\n");
return;
}
if (bus_space_map(aa->aa_memt, mem->ar_base, mem->ar_length, 0,
)) {
- aprint_error(": couldn't map registers\n");
+ aprint_error_dev(self, "couldn't map registers\n");
return;
}
- sc->sc_ih = acpi_intr_establish(self,
- (uint64_t)(uintptr_t)aa->aa_node->ad_handle,
+ sc->sc_ih = acpi_intr_establish(self, (uint64_t)handle,
IPL_BIO, false, sdhc_intr, >sc, device_xname(self));
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt\n");
goto fail;
}
- aprint_naive("\n");
- aprint_normal_dev(self, "Socionext eMMC controller\n");
-
sc->sc.sc_dev = self;
sc->sc.sc_dmat = aa->aa_dmat;
sc->sc.sc_host = sc->sc_hosts;
sc->sc_iot = aa->aa_memt;
sc->sc_ioh = ioh;
sc->sc_ios = mem->ar_length;
+ sc->sc_phandle = 0;
config_defer(self, sniemmc_attach_i);
@@ -228,7 +227,8 @@ sniemmc_attach_i(device_t self)
#endif
error = 0;
if (error) {
- aprint_error_dev(self,
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Tue Dec 21 06:00:45 UTC 2021 Modified Files: src/sys/arch/arm/sociox: sni_emmc.c sni_gpio.c sni_i2c.c Log Message: improve consistency when attach error cases. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/sni_emmc.c cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/sociox/sni_gpio.c cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sociox/sni_i2c.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Mon Dec 20 06:47:25 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
- iron out attach error case messages
- use 64-bit paddr bus_dma_tag
- dig and decode FDT "clock-frequency" value
To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.29 src/sys/arch/arm/sociox/if_scx.c:1.30
--- src/sys/arch/arm/sociox/if_scx.c:1.29 Mon Dec 20 02:24:33 2021
+++ src/sys/arch/arm/sociox/if_scx.c Mon Dec 20 06:47:24 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.30 2021/12/20 06:47:24 nisimura Exp $");
#include
#include
@@ -449,7 +449,6 @@ struct scx_softc {
bus_space_handle_t sc_eesh; /* eeprom section handle */
bus_size_t sc_eesz; /* eeprom map size */
bus_dma_tag_t sc_dmat; /* bus DMA tag */
- bus_dma_tag_t sc_dmat32;
struct ethercom sc_ethercom; /* Ethernet common data */
struct mii_data sc_mii; /* MII */
callout_t sc_callout; /* PHY monitor callout */
@@ -618,6 +617,37 @@ mac_write(struct scx_softc *sc, int reg,
(void)WAIT_FOR_CLR(sc, MACCMD, CMD_BUSY, 0);
}
+static int
+get_clk_freq(int phandle, const char *clkname)
+{
+ u_int index, n, cells;
+ const u_int *p;
+ int err, len, resid;
+ unsigned int freq = 0;
+
+ err = fdtbus_get_index(phandle, "clock-names", clkname, );
+ if (err == -1)
+ return -1;
+ p = fdtbus_get_prop(phandle, "clocks", );
+ if (p == NULL)
+ return -1;
+ for (n = 0, resid = len; resid > 0; n++) {
+ const int cc_phandle =
+ fdtbus_get_phandle_from_native(be32toh(p[0]));
+ if (of_getprop_uint32(cc_phandle, "#clock-cells", ))
+ return -1;
+ if (n == index) {
+ if (of_getprop_uint32(cc_phandle,
+ "clock-frequency", ))
+return -1;
+ return freq;
+ }
+ resid -= (cells + 1) * 4;
+ p += (cells + 1) * 4;
+ }
+ return -1;
+}
+
static const struct device_compatible_entry compat_data[] = {
{ .compat = "socionext,synquacer-netsec" },
DEVICE_COMPAT_EOL
@@ -647,15 +677,21 @@ scx_fdt_attach(device_t parent, device_t
bus_addr_t addr[2];
bus_size_t size[2];
char intrstr[128];
- const char *phy_mode;
+ int phy_phandle;
+ bus_addr_t phy_id;
+ const char *phy_type;
+ long ref_clk;
+
+ aprint_naive("\n");
+ aprint_normal(": Gigabit Ethernet Controller\n");
if (fdtbus_get_reg(phandle, 0, addr+0, size+0) != 0
|| bus_space_map(faa->faa_bst, addr[0], size[0], 0, ) != 0) {
- aprint_error(": unable to map device csr\n");
+ aprint_error_dev(self, "unable to map device csr\n");
return;
}
if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
- aprint_error(": failed to decode interrupt\n");
+ aprint_error_dev(self, "failed to decode interrupt\n");
goto fail;
}
sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_NET,
@@ -666,14 +702,10 @@ scx_fdt_attach(device_t parent, device_t
}
if (fdtbus_get_reg(phandle, 1, addr+1, size+1) != 0
|| bus_space_map(faa->faa_bst, addr[1], size[1], 0, ) != 0) {
- aprint_error(": unable to map device eeprom\n");
+ aprint_error_dev(self, "unable to map device eeprom\n");
goto fail;
}
- aprint_naive("\n");
- /* aprint_normal(": Gigabit Ethernet Controller\n"); */
- aprint_normal_dev(self, "interrupt on %s\n", intrstr);
-
sc->sc_dev = self;
sc->sc_st = bst;
sc->sc_sh = bsh;
@@ -681,13 +713,22 @@ scx_fdt_attach(device_t parent, device_t
sc->sc_eesh = eebsh;
sc->sc_eesz = size[1];
sc->sc_dmat = faa->faa_dmat;
- sc->sc_dmat32 = faa->faa_dmat; /* XXX */
sc->sc_phandle = phandle;
- phy_mode = fdtbus_get_string(phandle, "phy-mode");
- if (phy_mode == NULL)
- aprint_error(": missing 'phy-mode' property\n");
- sc->sc_100mii = (phy_mode && strcmp(phy_mode, "rgmii") != 0);
+ phy_type = fdtbus_get_string(phandle, "phy-mode");
+ if (phy_type == NULL)
+ aprint_error_dev(self, "missing 'phy-mode' property\n");
+ phy_phandle = fdtbus_get_phandle(phandle, "phy-handle");
+ if (phy_phandle == -1
+ || fdtbus_get_reg(phy_phandle, 0, _id, NULL) != 0)
+ phy_id = MII_PHY_ANY;
+ ref_clk = get_clk_freq(phandle, "phy_ref_clk");
+ if (ref_clk == -1)
+ ref_clk = 250 * 1000 * 1000;
+
+ sc->sc_100mii = (phy_type && strncmp(phy_type, "rgmii", 5) != 0);
+ sc->sc_phy_id = phy_id;
+ sc->sc_freq = ref_clk;
scx_attach_i(sc);
return;
@@ -718,23 +759,26 @@ scx_acpi_attach(device_t parent, device_
struct acpi_resources res;
struct acpi_mem *mem;
struct acpi_irq *irq;
- char *phy_mode;
- ACPI_INTEGER
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Mon Dec 20 06:47:25 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: - iron out attach error case messages - use 64-bit paddr bus_dma_tag - dig and decode FDT "clock-frequency" value To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Mon Dec 20 02:24:33 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
development snapshot; endianness and others.
To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.28 src/sys/arch/arm/sociox/if_scx.c:1.29
--- src/sys/arch/arm/sociox/if_scx.c:1.28 Mon Dec 20 02:23:04 2021
+++ src/sys/arch/arm/sociox/if_scx.c Mon Dec 20 02:24:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.29 2021/12/20 02:24:33 nisimura Exp $");
#include
#include
@@ -482,8 +482,8 @@ struct scx_softc {
int sc_rxptr; /* next ready Rx descriptor/descsoft */
krndsource_t rnd_source; /* random source */
-#ifdef GMAC_EVENT_COUNTER
- /* 80 event counter exist */
+#ifdef GMAC_EVENT_COUNTERS
+ /* 80 event counters exist */
#endif
};
@@ -524,11 +524,11 @@ do { \
struct mbuf *__m = __rxs->rxs_mbuf;\
bus_addr_t __paddr =__rxs->rxs_dmamap->dm_segs[0].ds_addr; \
__m->m_data = __m->m_ext.ext_buf;\
- __rxd->r3 = __rxs->rxs_dmamap->dm_segs[0].ds_len; \
+ __rxd->r3 = htole32(__rxs->rxs_dmamap->dm_segs[0].ds_len); \
__rxd->r2 = htole32(BUS_ADDR_LO32(__paddr)); \
__rxd->r1 = htole32(BUS_ADDR_HI32(__paddr)); \
- __rxd->r0 = R0_OWN | R0_FS | R0_LS;\
- if ((x) == MD_NRXDESC - 1) __rxd->r0 |= R0_EOD; \
+ __rxd->r0 = htole32(R0_OWN | R0_FS | R0_LS); \
+ if ((x) == MD_NRXDESC - 1) __rxd->r0 |= htole32(R0_EOD); \
} while (/*CONSTCOND*/0)
/* memory mapped CSR register access */
@@ -1334,20 +1334,20 @@ scx_start(struct ifnet *ifp)
* yet. That could cause a race condition.
* We'll do it below.
*/
- tdes->t3 = dmamap->dm_segs[seg].ds_len;
+ tdes->t3 = htole32(dmamap->dm_segs[seg].ds_len);
tdes->t2 = htole32(BUS_ADDR_LO32(paddr));
tdes->t1 = htole32(BUS_ADDR_HI32(paddr));
- tdes->t0 = tdes0 | (tdes->t0 & T0_EOD) |
+ tdes->t0 = htole32(tdes0 | (tdes->t0 & T0_EOD) |
(15 << T0_TDRID) | T0_PT |
- sc->sc_t0cotso | T0_TRS;
+ sc->sc_t0cotso | T0_TRS);
tdes0 = T0_OWN; /* 2nd and other segments */
/* NB; t0 DRID field contains zero */
lasttx = nexttx;
}
/* Write deferred 1st segment T0_OWN at the final stage */
- sc->sc_txdescs[lasttx].t0 |= T0_LS;
- sc->sc_txdescs[sc->sc_txnext].t0 |= (T0_FS | T0_OWN);
+ sc->sc_txdescs[lasttx].t0 |= htole32(T0_LS);
+ sc->sc_txdescs[sc->sc_txnext].t0 |= htole32(T0_FS | T0_OWN);
SCX_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
@@ -1468,7 +1468,7 @@ rxintr(struct scx_softc *sc)
SCX_CDRXSYNC(sc, i,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
- rxstat = sc->sc_rxdescs[i].r0;
+ rxstat = le32toh(sc->sc_rxdescs[i].r0);
if (rxstat & R0_OWN) /* desc is left empty */
break;
@@ -1569,16 +1569,19 @@ mii_statchg(struct ifnet *ifp)
/* decode MIISR register value */
miisr = mac_read(sc, GMACMIISR);
- spd = Mbps[(miisr >> 1) & 03];
+ spd = Mbps[(miisr & MIISR_SPD) >> 1];
#if 1
- printf("MII link status (0x%x) %s",
- miisr, (miisr & 8) ? "up" : "down");
- if (miisr & 8) {
- printf(" spd%d", spd);
- if (miisr & 01)
- printf(",full-duplex");
+ static uint32_t oldmiisr = 0;
+ if (miisr != oldmiisr) {
+ printf("MII link status (0x%x) %s",
+ miisr, (miisr & MIISR_LUP) ? "up" : "down");
+ if (miisr & MIISR_LUP) {
+ printf(" spd%d", spd);
+ if (miisr & MIISR_FDX)
+printf(",full-duplex");
+ }
+ printf("\n");
}
- printf("\n");
#endif
/* Get flow control negotiation result. */
if (IFM_SUBTYPE(mii->mii_media.ifm_cur->ifm_media) == IFM_AUTO &&
@@ -1601,7 +1604,7 @@ mii_statchg(struct ifnet *ifp)
/* Adjust duplexity and PAUSE flow control. */
mcr &= ~MCR_USEFDX;
fcr = mac_read(sc, GMACFCR) & ~(FCR_TFE | FCR_RFE);
- if (miisr & 01) {
+ if (miisr & MIISR_FDX) {
if (sc->sc_flowflags & IFM_ETH_TXPAUSE)
fcr |= FCR_TFE;
if (sc->sc_flowflags & IFM_ETH_RXPAUSE)
@@ -1611,8 +1614,14 @@ mii_statchg(struct ifnet *ifp)
mac_write(sc, GMACMCR, mcr);
mac_write(sc, GMACFCR, fcr);
-printf("%ctxfe, %crxfe\n",
- (fcr & FCR_TFE) ? '+' : '-', (fcr & FCR_RFE) ? '+' : '-');
+#if 1
+ if (miisr != oldmiisr) {
+ printf("%ctxfe, %crxfe\n",
+ (fcr & FCR_TFE) ? '+' : '-',
+ (fcr & FCR_RFE) ? '+' : '-');
+ }
+ oldmiisr = miisr;
+#endif
}
static void
@@ -1680,6 +1689,7 @@ phy_tick(void *arg)
mii_tick(mii);
splx(s);
#ifdef
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Mon Dec 20 02:24:33 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: development snapshot; endianness and others. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Mon Dec 20 02:23:04 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
fix and improve register definitions
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.27 src/sys/arch/arm/sociox/if_scx.c:1.28
--- src/sys/arch/arm/sociox/if_scx.c:1.27 Thu Dec 16 11:36:25 2021
+++ src/sys/arch/arm/sociox/if_scx.c Mon Dec 20 02:23:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.28 2021/12/20 02:23:04 nisimura Exp $");
#include
#include
@@ -126,7 +126,7 @@ struct rdes {
#define RPTHDCOMP (1U<<2) /* log HD imcomplete condition */
#define RPTHDERR (1U<<1) /* log HD error */
#define DROPNOMATCH (1U<<0) /* drop no match frames */
-#define xINTSR 0x200 /* aggregated interrupt status report */
+#define xINTSR 0x200 /* aggregated interrupt status */
#define IRQ_RX (1U<<1) /* top level Rx interrupt */
#define IRQ_TX (1U<<0) /* top level Rx interrupt */
#define IRQ_UCODE (1U<<20) /* ucode load completed */
@@ -144,18 +144,18 @@ struct rdes {
#define TXI_TR_ERR (1U<<16) /* tx error */
#define TXI_TXDONE (1U<<15) /* tx completed */
#define TXI_TMREXP (1U<<14) /* coalesce timer expired */
-#define RXISR 0x440 /* receipt status */
+#define RXISR 0x440 /* receive status */
#define RXIEN 0x444 /* rx interrupt enable */
#define RXIE_SET 0x468 /* bit to set */
#define RXIE_CLR 0x46c /* bit to clr */
#define RXI_RC_ERR (1U<<16) /* rx error */
-#define RXI_PKTCNT (1U<<15) /* rx counter has new value report */
+#define RXI_PKTCNT (1U<<15) /* rx counter has new value */
#define RXI_TMREXP (1U<<14) /* coalesce timer expired */
#define TDBA_LO 0x408 /* tdes array base addr 31:0 */
#define TDBA_HI 0x434 /* tdes array base addr 63:32 */
#define RDBA_LO 0x448 /* rdes array base addr 31:0 */
#define RDBA_HI 0x474 /* rdes array base addr 63:32 */
-/* 13 pairs of special purpose desc array address registers exit */
+/* 13 pairs of special purpose desc array base address register exist */
#define TXCONF 0x430
#define RXCONF 0x470
#define DESCNF_UP (1U<<31) /* up-and-running */
@@ -166,8 +166,8 @@ struct rdes {
#define RXCOLMAX 0x454 /* rx intr coalesce upper bound */
#define TXITIMER 0x420 /* coalesce timer usec, MSB to use */
#define RXITIMER 0x460 /* coalesce timer usec, MSB to use */
-#define TXDONECNT 0x424 /* tx completion report, auto-clear */
-#define RXDONECNT 0x458 /* rx completion report, auto-clear */
+#define TXDONECNT 0x424 /* tx completed count, auto-zero */
+#define RXDONECNT 0x458 /* rx available count, auto-zero */
#define UCODE_H2M 0x210 /* host2media engine ucode port */
#define UCODE_M2H 0x21c /* media2host engine ucode port */
#define CORESTAT 0x218 /* engine run state */
@@ -214,15 +214,18 @@ struct rdes {
#define MCR_IBN (1U<<30) /* ??? */
#define MCR_CST (1U<<25) /* strip CRC */
#define MCR_TC (1U<<24) /* keep RGMII PHY notified */
-#define MCR_JE (1U<<20) /* ignore oversized >9018 condition */
+#define MCR_WD (1U<<23) /* allow long >2048 tx frame */
+#define MCR_JE (1U<<20) /* allow ~9018 tx jumbo frame */
#define MCR_IFG (7U<<17) /* 19:17 IFG value 0~7 */
#define MCR_DRCS (1U<<16) /* ignore (G)MII HDX Tx error */
#define MCR_USEMII (1U<<15) /* 1: RMII/MII, 0: RGMII (_PS) */
#define MCR_SPD100 (1U<<14) /* force speed 100 (_FES) */
-#define MCR_DO (1U<<13) /* ??? don't receive my own Tx frames */
+#define MCR_DO (1U<<13) /* don't receive my own HDX Tx frames */
#define MCR_LOOP (1U<<12) /* run loop back */
#define MCR_USEFDX (1U<<11) /* force full duplex */
#define MCR_IPCEN (1U<<10) /* handle checksum */
+#define MCR_DR (1U<<9) /* attempt no tx retry, send once */
+#define MCR_LUD (1U<<8) /* link condition report when RGMII */
#define MCR_ACS (1U<<7) /* auto pad strip CRC */
#define MCR_TE (1U<<3) /* run Tx MAC engine, 0 to stop */
#define MCR_RE (1U<<2) /* run Rx MAC engine, 0 to stop */
@@ -258,12 +261,9 @@ struct rdes {
/* 31:16 pause timer value, 5:4 pause timer threshold */
#define FCR_RFE (1U<<2) /* accept PAUSE to throttle Tx */
#define FCR_TFE (1U<<1) /* generate PAUSE to moderate Rx lvl */
-#define GMACVTAG 0x001c /* VLAN tag control */
-#define GMACIMPL 0x0020 /* implementation number XX.YY */
-#define GMACLPIS 0x0030 /* ??? AXI LPI control */
-#define GMACLPIC 0x0034 /* ??? AXI LPI
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Mon Dec 20 02:23:04 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: fix and improve register definitions To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Thu Dec 16 11:36:26 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
interlim commit to snapshot SC2A11 GbE progress.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.26 src/sys/arch/arm/sociox/if_scx.c:1.27
--- src/sys/arch/arm/sociox/if_scx.c:1.26 Thu Dec 16 11:32:22 2021
+++ src/sys/arch/arm/sociox/if_scx.c Thu Dec 16 11:36:25 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $ */
+/* $NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.27 2021/12/16 11:36:25 nisimura Exp $");
#include
#include
@@ -408,7 +408,7 @@ struct scx_softc {
int sc_phy_id; /* PHY address */
int sc_flowflags; /* 802.3x PAUSE flow control */
uint32_t sc_mdclk; /* GAR 5:2 clock selection */
- uint32_t sc_t0coso; /* T0_CSUM | T0_SGOL to run */
+ uint32_t sc_t0cotso; /* T0_CSUM | T0_TSO to run */
int sc_ucodeloaded; /* ucode for H2M/M2H/PKT */
int sc_100mii; /* 1 for RMII/MII, 0 for RGMII */
int sc_phandle; /* fdt phandle */
@@ -431,6 +431,9 @@ struct scx_softc {
int sc_rxptr; /* next ready Rx descriptor/descsoft */
krndsource_t rnd_source; /* random source */
+#ifdef GMAC_EVENT_COUNTER
+ /* 80 event counter exist */
+#endif
};
#define SCX_CDTXADDR(sc, x) ((sc)->sc_cddma + SCX_CDTXOFF((x)))
@@ -477,6 +480,16 @@ do { \
if ((x) == MD_NRXDESC - 1) __rxd->r0 |= R0_EOD; \
} while (/*CONSTCOND*/0)
+/* memory mapped CSR register access */
+#define CSR_READ(sc,off) \
+ bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (off))
+#define CSR_WRITE(sc,off,val) \
+ bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (off), (val))
+
+/* flash memory access */
+#define EE_READ(sc,off) \
+ bus_space_read_4((sc)->sc_st, (sc)->sc_eesh, (off))
+
static int scx_fdt_match(device_t, cfdata_t, void *);
static void scx_fdt_attach(device_t, device_t, void *);
static int scx_acpi_match(device_t, cfdata_t, void *);
@@ -558,6 +571,10 @@ static const struct device_compatible_en
{ .compat = "socionext,synquacer-netsec" },
DEVICE_COMPAT_EOL
};
+static const struct device_compatible_entry compatible[] = {
+ { .compat = "SCX0001" },
+ DEVICE_COMPAT_EOL
+};
static int
scx_fdt_match(device_t parent, cfdata_t cf, void *aux)
@@ -634,15 +651,9 @@ scx_fdt_attach(device_t parent, device_t
static int
scx_acpi_match(device_t parent, cfdata_t cf, void *aux)
{
- static const char * compatible[] = {
- "SCX0001",
- NULL
- };
struct acpi_attach_args *aa = aux;
- if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
- return 0;
- return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
+ return acpi_compatible_match(aa, compatible);
}
static void
@@ -660,6 +671,7 @@ scx_acpi_attach(device_t parent, device_
ACPI_INTEGER acpi_phy, acpi_freq;
ACPI_STATUS rv;
+aprint_normal(": Gigabit Ethernet Controller\n");
rv = acpi_resource_parse(self, handle, "_CRS",
, _resource_parse_ops_default);
if (ACPI_FAILURE(rv))
@@ -713,7 +725,7 @@ scx_acpi_attach(device_t parent, device_
sc->sc_sh = bsh;
sc->sc_eesh = eebsh;
sc->sc_dmat = aa->aa_dmat64;
- sc->sc_dmat32 = aa->aa_dmat; /* descriptor needs dma32 */
+ sc->sc_dmat32 = aa->aa_dmat;
aprint_normal_dev(self,
"phy mode %s, phy id %d, freq %ld\n", phy_mode, (int)acpi_phy, acpi_freq);
@@ -742,18 +754,19 @@ scx_attach_i(struct scx_softc *sc)
struct ifnet * const ifp = >sc_ethercom.ec_if;
struct mii_data * const mii = >sc_mii;
struct ifmedia * const ifm = >mii_media;
- uint32_t hwver, dwimp, dwfea;
+ uint32_t which, dwimp, dwfea;
uint8_t enaddr[ETHER_ADDR_LEN];
bus_dma_segment_t seg;
uint32_t csr;
int i, nseg, error = 0;
- hwver = CSR_READ(sc, HWVER); /* Socionext version */
- dwimp = mac_read(sc, GMACIMPL); /* DW EMAC XX.YY */
- dwfea = mac_read(sc, HWFEA); /* DW feature */
+ which = CSR_READ(sc, HWVER); /* Socionext version 5.00xx */
+ dwimp = mac_read(sc, GMACIMPL); /* DWC EMAC XX.YY */
+ dwfea = mac_read(sc, HWFEA); /* DWC feature */
aprint_normal_dev(sc->sc_dev,
- "Socionext NetSec GbE %d.%d (impl 0x%x, feature 0x%x)\n",
- hwver >> 16, hwver & 0x,
+ "Socionext NetSec GbE %x.%x"
+ " (impl 0x%x, feature 0x%x)\n",
+ which >> 16, which & 0x,
dwimp, dwfea);
/* fetch MAC address in flash. stored in big endian order */
@@ -762,14 +775,13 @@ scx_attach_i(struct scx_softc *sc)
enaddr[1] = csr >> 16;
enaddr[2] = csr >> 8;
enaddr[3] = csr;
- csr = bus_space_read_4(sc->sc_st,
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Thu Dec 16 11:36:26 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: interlim commit to snapshot SC2A11 GbE progress. To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: nisimura
Date: Thu Dec 16 11:32:23 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: if_scx.c
Log Message:
improve SC2A11 hardware register description.
To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sociox/if_scx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/if_scx.c
diff -u src/sys/arch/arm/sociox/if_scx.c:1.25 src/sys/arch/arm/sociox/if_scx.c:1.26
--- src/sys/arch/arm/sociox/if_scx.c:1.25 Mon Aug 2 12:56:22 2021
+++ src/sys/arch/arm/sociox/if_scx.c Thu Dec 16 11:32:22 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: if_scx.c,v 1.25 2021/08/02 12:56:22 andvar Exp $ */
+/* $NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
#define NOT_MP_SAFE 0
#include
-__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.25 2021/08/02 12:56:22 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1.26 2021/12/16 11:32:22 nisimura Exp $");
#include
#include
@@ -73,7 +73,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_scx.c,v 1
#include
#include
-/* Socionext SC2A11 descriptor format */
+/* SC2A11 GbE 64-bit paddr descriptor */
struct tdes {
uint32_t t0, t1, t2, t3;
};
@@ -84,103 +84,131 @@ struct rdes {
#define T0_OWN (1U<<31) /* desc is ready to Tx */
#define T0_EOD (1U<<30) /* end of descriptor array */
-#define T0_DRID (24) /* 29:24 D-RID */
-#define T0_PT (1U<<21) /* 23:21 PT */
-#define T0_TRID (16) /* 20:16 T-RID */
+#define T0_DRID (24) /* 29:24 desc ring id */
+#define T0_PT (1U<<21) /* 23:21 "pass-through" */
+#define T0_TDRID (16) /* 20:16 target desc ring id: GMAC=15 */
#define T0_FS (1U<<9) /* first segment of frame */
#define T0_LS (1U<<8) /* last segment of frame */
#define T0_CSUM (1U<<7) /* enable check sum offload */
-#define T0_SGOL (1U<<6) /* enable TCP segment offload */
-#define T0_TRS (1U<<4) /* 5:4 TRS */
-#define T0_IOC (0) /* XXX TBD interrupt when completed */
-/* T1 segment address 63:32 */
-/* T2 segment address 31:0 */
-/* T3 31:16 TCP segment length, 15:0 segment length to transmit */
+#define T0_TSO (1U<<6) /* enable TCP segment offload */
+#define T0_TRS (1U<<4) /* 5:4 "TRS" */
+/* T1 frame segment address 63:32 */
+/* T2 frame segment address 31:0 */
+/* T3 31:16 TCP segment length, 15:0 frame segment length to transmit */
#define R0_OWN (1U<<31) /* desc is empty */
#define R0_EOD (1U<<30) /* end of descriptor array */
-#define R0_SRID (24) /* 29:24 S-RID */
-#define R0_FR (1U<<23) /* FR */
+#define R0_SDRID (24) /* 29:24 source desc ring id */
+#define R0_FR (1U<<23) /* found fragmented */
#define R0_ER (1U<<21) /* Rx error indication */
#define R0_ERR (3U<<16) /* 18:16 receive error code */
-#define R0_TDRID (14) /* 15:14 TD-RID */
+#define R0_TDRID (12) /* 15:12 target desc ring id */
#define R0_FS (1U<<9) /* first segment of frame */
#define R0_LS (1U<<8) /* last segment of frame */
#define R0_CSUM (3U<<6) /* 7:6 checksum status */
-#define R0_CERR (2U<<6) /* 0 (undone), 1 (found ok), 2 (bad) */
+#define R0_CERR (2U<<6) /* 0: undone, 1: found ok, 2: bad */
/* R1 frame address 63:32 */
/* R2 frame address 31:0 */
/* R3 31:16 received frame length, 15:0 buffer length to receive */
/*
- * SC2A11 NetSec registers. 0x100 - 1204
+ * SC2A11 registers. 0x100 - 1204
*/
#define SWRESET 0x104
+#define SRST_RUN (1U<<31) /* instruct start, 0 to stop */
#define COMINIT 0x120
+#define INIT_DB (1U<<2) /* ???; self clear when done */
+#define INIT_CLS (1U<<1) /* ???; self clear when done */
+#define PKTCTRL 0x140 /* pkt engine control */
+#define MODENRM (1U<<28) /* change mode to normal */
+#define ENJUMBO (1U<<27) /* allow jumbo frame */
+#define RPTCSUMERR (1U<<3) /* log Rx checksum error */
+#define RPTHDCOMP (1U<<2) /* log HD imcomplete condition */
+#define RPTHDERR (1U<<1) /* log HD error */
+#define DROPNOMATCH (1U<<0) /* drop no match frames */
#define xINTSR 0x200 /* aggregated interrupt status report */
#define IRQ_RX (1U<<1) /* top level Rx interrupt */
#define IRQ_TX (1U<<0) /* top level Rx interrupt */
+#define IRQ_UCODE (1U<<20) /* ucode load completed */
#define xINTAEN 0x204 /* INT_A enable */
-#define xINTA_SET 0x234 /* bit to set */
-#define xINTA_CLR 0x238 /* bit to clr */
+#define xINTAE_SET 0x234 /* bit to set */
+#define xINTAE_CLR 0x238 /* bit to clr */
#define xINTBEN 0x23c /* INT_B enable */
-#define xINTB_SET 0x240 /* bit to set */
-#define xINTB_CLR 0x244 /* bit to clr */
-/* 0x00c - 048 */ /* pkt,tls,s0,s1 SR/IE/SET/CLR */
-#define TXISR 0x400
-#define TXIEN 0x404
-#define TXI_SET 0x428
-#define TXI_CLR 0x42c
-#define TXI_NTOWNR (1U<<17)
-#define TXI_TR_ERR (1U<<16)
-#define TXI_TXDONE (1U<<15)
-#define TXI_TMREXP (1U<<14)
-#define RXISR 0x440
-#define RXIEN 0x444
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Thu Dec 16 11:32:23 UTC 2021 Modified Files: src/sys/arch/arm/sociox: if_scx.c Log Message: improve SC2A11 hardware register description. To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sociox/if_scx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Fri Dec 3 05:28:33 UTC 2021 Removed Files: src/sys/arch/arm/sociox: sni_exiu.c Log Message: retire sni_exiu.c in favour of ACPI0013 generic event divice to respond power button press. To generate a diff of this commit: cvs rdiff -u -r1.5 -r0 src/sys/arch/arm/sociox/sni_exiu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Fri Dec 3 05:28:33 UTC 2021 Removed Files: src/sys/arch/arm/sociox: sni_exiu.c Log Message: retire sni_exiu.c in favour of ACPI0013 generic event divice to respond power button press. To generate a diff of this commit: cvs rdiff -u -r1.5 -r0 src/sys/arch/arm/sociox/sni_exiu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Fri Dec 3 05:21:52 UTC 2021 Modified Files: src/sys/arch/arm/sociox: files.sociox Log Message: retire sni_exiu.c in favour of ACPI0013 generic event device implemented by dev/acpi/acpi_ged.c To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/files.sociox Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/sociox/files.sociox diff -u src/sys/arch/arm/sociox/files.sociox:1.9 src/sys/arch/arm/sociox/files.sociox:1.10 --- src/sys/arch/arm/sociox/files.sociox:1.9 Thu Mar 19 22:17:45 2020 +++ src/sys/arch/arm/sociox/files.sociox Fri Dec 3 05:21:52 2021 @@ -1,6 +1,6 @@ -# $NetBSD: files.sociox,v 1.9 2020/03/19 22:17:45 nisimura Exp $ +# $NetBSD: files.sociox,v 1.10 2021/12/03 05:21:52 nisimura Exp $ # -# Configuration info for Socionext Unifier/SC2A11 +# Configuration info for Socionext SC2A11 # # @@ -32,9 +32,3 @@ device snigpio: gpiobus attach snigpio at acpinodebus with snigpio_acpi attach snigpio at fdt with snigpio_fdt file arch/arm/sociox/sni_gpio.c snigpio - -# Socionext EXIU external interrupt controller unit -device sniexiu -attach sniexiu at acpinodebus with sniexitu_acpi -attach sniexiu at fdt with sniexiu_fdt -file arch/arm/sociox/sni_exiu.c sniexiu
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: nisimura Date: Fri Dec 3 05:21:52 UTC 2021 Modified Files: src/sys/arch/arm/sociox: files.sociox Log Message: retire sni_exiu.c in favour of ACPI0013 generic event device implemented by dev/acpi/acpi_ged.c To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sociox/files.sociox Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/sociox
Module Name:src
Committed By: msaitoh
Date: Wed Nov 10 17:23:46 UTC 2021
Modified Files:
src/sys/arch/arm/sociox: sni_emmc.c
Log Message:
s/intialize/initialize/
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/sociox/sni_emmc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sociox/sni_emmc.c
diff -u src/sys/arch/arm/sociox/sni_emmc.c:1.8 src/sys/arch/arm/sociox/sni_emmc.c:1.9
--- src/sys/arch/arm/sociox/sni_emmc.c:1.8 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/sociox/sni_emmc.c Wed Nov 10 17:23:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sni_emmc.c,v 1.8 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: sni_emmc.c,v 1.9 2021/11/10 17:23:46 msaitoh Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sni_emmc.c,v 1.8 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sni_emmc.c,v 1.9 2021/11/10 17:23:46 msaitoh Exp $");
#include
#include
@@ -228,7 +228,7 @@ sniemmc_attach_i(device_t self)
#endif
error = 0;
if (error) {
- aprint_error_dev(self, "couldn't intialize host, error=%d\n",error);
+ aprint_error_dev(self, "couldn't initialize host, error=%d\n",error);
goto fail;
}
return;
CVS commit: src/sys/arch/arm/sociox
Module Name:src Committed By: msaitoh Date: Wed Nov 10 17:23:46 UTC 2021 Modified Files: src/sys/arch/arm/sociox: sni_emmc.c Log Message: s/intialize/initialize/ To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/sociox/sni_emmc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Re: CVS commit: src/sys/arch/arm/sociox
Great work! One small remark:
+static int
+ave_fdt_match(device_t parent, cfdata_t cf, void *aux)
+{
+ static const char * compatible[] = {
+#ifdef _LP64
+ "socionext,unifier-ld20-ave4",
+#else
+ "socionext,unifier-pro4-ave4",
+ "socionext,unifier-pxs2-ave4",
+ "socionext,unifier-ld11-ave4",
+ "socionext,unifier-pxs3-ave4",
+#endif
+ NULL
+ };
Please do not use #ifdef here. Compatible strings are meant to describe
which hardware device the driver is compatible with, and can be shared
across multiple SoCs. In the case of IP licensing, possibly not even in
the same SoC family! Consider a hypothetical where Socionext could release
a new 32-bit SoC with an ave(4) that is functionally identical to the one
found in their previous 64-bit chip.
Re: CVS commit: src/sys/arch/arm/sociox
Hi -- Is there really a need for all of this fdt stuff for SCA2A11? I would expect that the board can be fully supported in ACPI mode. Thanks, Jared On Wed, 18 Mar 2020, Tohru Nishimura wrote: Module Name:src Committed By: nisimura Date: Wed Mar 18 08:49:51 UTC 2020 Modified Files: src/sys/arch/arm/sociox: files.sociox Log Message: add SynQuacer EXIU external IRQ unit driver desciption To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/sociox/files.sociox Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
