CVS commit: src/sys/arch/x86/x86

2024-03-11 Thread David H. Gutteridge
Module Name:src Committed By: gutteridge Date: Tue Mar 12 02:26:16 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: don't accept impossibly low TjMax values r. 1.39 introduced a regression where instead of applying a reasonable default

CVS commit: src/sys/arch/x86/x86

2024-03-11 Thread David H. Gutteridge
Module Name:src Committed By: gutteridge Date: Tue Mar 12 02:26:16 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: don't accept impossibly low TjMax values r. 1.39 introduced a regression where instead of applying a reasonable default

CVS commit: src/sys/arch/x86/x86

2024-02-28 Thread David H. Gutteridge
Module Name:src Committed By: gutteridge Date: Thu Feb 29 01:59:12 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: fix grammar in a warning message (I get several of these warnings on boot on a particular machine. Now, it also seems

CVS commit: src/sys/arch/x86/x86

2024-02-28 Thread David H. Gutteridge
Module Name:src Committed By: gutteridge Date: Thu Feb 29 01:59:12 UTC 2024 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp.c: fix grammar in a warning message (I get several of these warnings on boot on a particular machine. Now, it also seems

CVS commit: src/sys/arch/x86/x86

2024-02-25 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Sun Feb 25 18:27:54 UTC 2024 Modified Files: src/sys/arch/x86/x86: lapic.c Log Message: s/asynchronious/asynchronous/ in comment. To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/x86/x86/lapic.c

CVS commit: src/sys/arch/x86/x86

2024-02-25 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Sun Feb 25 18:27:54 UTC 2024 Modified Files: src/sys/arch/x86/x86: lapic.c Log Message: s/asynchronious/asynchronous/ in comment. To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/x86/x86/lapic.c

CVS commit: src/sys/arch/x86/x86

2024-02-19 Thread matthew green
Module Name:src Committed By: mrg Date: Mon Feb 19 20:10:09 UTC 2024 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: remove unintended printf() in previous. (thx dh) To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/x86/x86/tsc.c

CVS commit: src/sys/arch/x86/x86

2024-02-19 Thread matthew green
Module Name:src Committed By: mrg Date: Mon Feb 19 20:10:09 UTC 2024 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: remove unintended printf() in previous. (thx dh) To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/x86/x86/tsc.c

CVS commit: src/sys/arch/x86/x86

2024-02-19 Thread matthew green
Module Name:src Committed By: mrg Date: Mon Feb 19 09:22:31 UTC 2024 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: make TSC get a quality of -100 on AMD Family 15h and 16h this should "fix" PR#56322 and is known as AMD errata "778: Processor Core Time Stamp

CVS commit: src/sys/arch/x86/x86

2024-02-19 Thread matthew green
Module Name:src Committed By: mrg Date: Mon Feb 19 09:22:31 UTC 2024 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: make TSC get a quality of -100 on AMD Family 15h and 16h this should "fix" PR#56322 and is known as AMD errata "778: Processor Core Time Stamp

CVS commit: src/sys/arch/x86/x86

2023-11-29 Thread Michael van Elst
Module Name:src Committed By: mlelstv Date: Wed Nov 29 11:40:37 UTC 2023 Modified Files: src/sys/arch/x86/x86: intr.c Log Message: Fix use-after-free (source->is_type) when detecting unsharable interrupts. Doesn't solve the interrupt conflict itself, but avoids a panic.

CVS commit: src/sys/arch/x86/x86

2023-10-26 Thread matthew green
Module Name:src Committed By: mrg Date: Fri Oct 27 05:45:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: handle AMD errata 1474: A CPU core may hang after about 1044 days from the new comment: * This requires disabling CC6 power level,

CVS commit: src/sys/arch/x86/x86

2023-10-26 Thread matthew green
Module Name:src Committed By: mrg Date: Fri Oct 27 05:45:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: handle AMD errata 1474: A CPU core may hang after about 1044 days from the new comment: * This requires disabling CC6 power level,

CVS commit: src/sys/arch/x86/x86

2023-10-26 Thread matthew green
Module Name:src Committed By: mrg Date: Fri Oct 27 03:06:04 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: add names for errata that don't have actual numbers zenbleed is reported as "erratum 65535" currently, this adds a name for it, and

CVS commit: src/sys/arch/x86/x86

2023-10-26 Thread matthew green
Module Name:src Committed By: mrg Date: Fri Oct 27 03:06:04 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: add names for errata that don't have actual numbers zenbleed is reported as "erratum 65535" currently, this adds a name for it, and

CVS commit: src/sys/arch/x86/x86

2023-10-17 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Oct 17 14:17:42 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: Revert "x86: Panic early if fpu save size is too large, take 2." Apparently this is too early to print anything useful, so it just

CVS commit: src/sys/arch/x86/x86

2023-10-17 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Oct 17 14:17:42 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: Revert "x86: Panic early if fpu save size is too large, take 2." Apparently this is too early to print anything useful, so it just

CVS commit: src/sys/arch/x86/x86

2023-10-17 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Oct 17 11:12:33 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Panic early if fpu save size is too large, take 2. This shouldn't break any existing systems (for real this time), but it should

CVS commit: src/sys/arch/x86/x86

2023-10-17 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Oct 17 11:12:33 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Panic early if fpu save size is too large, take 2. This shouldn't break any existing systems (for real this time), but it should

CVS commit: src/sys/arch/x86/x86

2023-10-17 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Oct 17 11:11:49 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Remove incomplete fpu save size check. Will fix it later, but this makes pullups easier. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/x86/x86

2023-10-17 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Oct 17 11:11:49 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Remove incomplete fpu save size check. Will fix it later, but this makes pullups easier. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/x86/x86

2023-10-15 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Oct 15 16:11:22 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Disable savefpu size check for now. This is apparently so broken that the error check for what should have been a safe size

CVS commit: src/sys/arch/x86/x86

2023-10-15 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Oct 15 16:11:22 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Disable savefpu size check for now. This is apparently so broken that the error check for what should have been a safe size

CVS commit: src/sys/arch/x86/x86

2023-10-15 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Oct 15 13:13:22 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Panic if cpuid's fpu save size is larger than we support. Ideally this wouldn't panic, but the alternative right now is to crash

CVS commit: src/sys/arch/x86/x86

2023-10-15 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Oct 15 13:13:22 UTC 2023 Modified Files: src/sys/arch/x86/x86: identcpu.c Log Message: x86: Panic if cpuid's fpu save size is larger than we support. Ideally this wouldn't panic, but the alternative right now is to crash

CVS commit: src/sys/arch/x86/x86

2023-09-09 Thread Andrew Doran
Module Name:src Committed By: ad Date: Sat Sep 9 18:37:03 UTC 2023 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: tsc_get_timecount(): cover the backwards check by DIAGNOSTIC since it has proven the point by now. To generate a diff of this commit: cvs rdiff

CVS commit: src/sys/arch/x86/x86

2023-09-09 Thread Andrew Doran
Module Name:src Committed By: ad Date: Sat Sep 9 18:37:03 UTC 2023 Modified Files: src/sys/arch/x86/x86: tsc.c Log Message: tsc_get_timecount(): cover the backwards check by DIAGNOSTIC since it has proven the point by now. To generate a diff of this commit: cvs rdiff

CVS commit: src/sys/arch/x86/x86

2023-08-07 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Mon Aug 7 09:27:14 UTC 2023 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Update /proc/cpuinfo. - Move "ssbd" to an unused Linux mapping. - Update unused Linux mappings. To generate a diff of this

CVS commit: src/sys/arch/x86/x86

2023-08-07 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Mon Aug 7 09:27:14 UTC 2023 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Update /proc/cpuinfo. - Move "ssbd" to an unused Linux mapping. - Update unused Linux mappings. To generate a diff of this

CVS commit: src/sys/arch/x86/x86

2023-07-27 Thread matthew green
Module Name:src Committed By: mrg Date: Fri Jul 28 05:02:13 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: make the CPUID list for errata be far less confusing the 0x8001 CPUID result needs some parsing to match against actual

CVS commit: src/sys/arch/x86/x86

2023-07-27 Thread matthew green
Module Name:src Committed By: mrg Date: Fri Jul 28 05:02:13 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86: make the CPUID list for errata be far less confusing the 0x8001 CPUID result needs some parsing to match against actual

CVS commit: src/sys/arch/x86/x86

2023-07-26 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Jul 26 21:45:29 UTC 2023 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: x86/pmap: Print quantities in failed assertions in pmap_load. To generate a diff of this commit: cvs rdiff -u -r1.424 -r1.425

CVS commit: src/sys/arch/x86/x86

2023-07-26 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Jul 26 21:45:29 UTC 2023 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: x86/pmap: Print quantities in failed assertions in pmap_load. To generate a diff of this commit: cvs rdiff -u -r1.424 -r1.425

CVS commit: src/sys/arch/x86/x86

2023-07-25 Thread matthew green
Module Name:src Committed By: mrg Date: Wed Jul 26 00:19:04 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: fix the cpuids for the zen2 client CPUs. i'm not exactly how i came up with the values i had, though one of them was still valid and matched

CVS commit: src/sys/arch/x86/x86

2023-07-25 Thread matthew green
Module Name:src Committed By: mrg Date: Wed Jul 26 00:19:04 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: fix the cpuids for the zen2 client CPUs. i'm not exactly how i came up with the values i had, though one of them was still valid and matched

CVS commit: src/sys/arch/x86/x86

2023-07-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 24 23:42:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Only say the errata revision search for cpu0. To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30

CVS commit: src/sys/arch/x86/x86

2023-07-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 24 23:42:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Only say the errata revision search for cpu0. To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30

CVS commit: src/sys/arch/x86/x86

2023-07-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:21:09 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Say what revision we're searching for. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29

CVS commit: src/sys/arch/x86/x86

2023-07-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:21:09 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Say what revision we're searching for. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29

CVS commit: src/sys/arch/x86/x86

2023-07-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:20:53 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Link to original AMD errata guide. This one is no longer updated; need to link to newer ones for individual families too.

CVS commit: src/sys/arch/x86/x86

2023-07-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 24 22:20:53 UTC 2023 Modified Files: src/sys/arch/x86/x86: errata.c Log Message: x86/errata.c: Link to original AMD errata guide. This one is no longer updated; need to link to newer ones for individual families too.

CVS commit: src/sys/arch/x86/x86

2023-07-18 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Jul 18 12:34:25 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu: In kernel mode fpu traps, print the instruction pointer. To generate a diff of this commit: cvs rdiff -u -r1.86 -r1.87

CVS commit: src/sys/arch/x86/x86

2023-07-18 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Jul 18 12:34:25 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu: In kernel mode fpu traps, print the instruction pointer. To generate a diff of this commit: cvs rdiff -u -r1.86 -r1.87

CVS commit: src/sys/arch/x86/x86

2023-07-13 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Jul 13 09:12:24 UTC 2023 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp(4): Change limits of Tjmax. - Change the lower limit from 70 to 60. At least, some BIOSes can change the value down to 62.

CVS commit: src/sys/arch/x86/x86

2023-07-13 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Jul 13 09:12:24 UTC 2023 Modified Files: src/sys/arch/x86/x86: coretemp.c Log Message: coretemp(4): Change limits of Tjmax. - Change the lower limit from 70 to 60. At least, some BIOSes can change the value down to 62.

CVS commit: src/sys/arch/x86/x86

2023-05-22 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon May 22 16:28:08 UTC 2023 Modified Files: src/sys/arch/x86/x86: efi_machdep.c Log Message: efi(4): Implement EFIIOC_GET_TABLE on x86. PR kern/57076 XXX pullup-10 To generate a diff of this commit: cvs rdiff -u -r1.5

CVS commit: src/sys/arch/x86/x86

2023-05-22 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon May 22 16:28:08 UTC 2023 Modified Files: src/sys/arch/x86/x86: efi_machdep.c Log Message: efi(4): Implement EFIIOC_GET_TABLE on x86. PR kern/57076 XXX pullup-10 To generate a diff of this commit: cvs rdiff -u -r1.5

CVS commit: src/sys/arch/x86/x86

2023-04-11 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Apr 11 13:11:01 UTC 2023 Modified Files: src/sys/arch/x86/x86: intr.c Log Message: x86: Omit needless membar_sync in intr_disestablish_xcall. Details in comments. To generate a diff of this commit: cvs rdiff -u -r1.164

CVS commit: src/sys/arch/x86/x86

2023-04-10 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Tue Apr 11 02:42:15 UTC 2023 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Add Intel lam and AMD vnmi. To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/x86/x86/procfs_machdep.c

CVS commit: src/sys/arch/x86/x86

2023-04-10 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Tue Apr 11 02:42:15 UTC 2023 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Add Intel lam and AMD vnmi. To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/x86/x86/procfs_machdep.c

CVS commit: src/sys/arch/x86/x86

2023-03-28 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Mar 28 19:55:42 UTC 2023 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86/bus_dma.c: Sprinkle KASSERTMSG. To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/x86/x86/bus_dma.c

CVS commit: src/sys/arch/x86/x86

2023-03-28 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Mar 28 19:55:42 UTC 2023 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86/bus_dma.c: Sprinkle KASSERTMSG. To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90 src/sys/arch/x86/x86/bus_dma.c

CVS commit: src/sys/arch/x86/x86

2023-03-24 Thread Manuel Bouyer
Module Name:src Committed By: bouyer Date: Fri Mar 24 12:25:28 UTC 2023 Modified Files: src/sys/arch/x86/x86: mpacpi.c Log Message: mpacpi_config_cpu(): Xen with a PVH dom0 reports x2apic->LocalApicId below 0xff, which causes a panic later because no CPUs are attached.

CVS commit: src/sys/arch/x86/x86

2023-03-24 Thread Manuel Bouyer
Module Name:src Committed By: bouyer Date: Fri Mar 24 12:25:28 UTC 2023 Modified Files: src/sys/arch/x86/x86: mpacpi.c Log Message: mpacpi_config_cpu(): Xen with a PVH dom0 reports x2apic->LocalApicId below 0xff, which causes a panic later because no CPUs are attached.

CVS commit: src/sys/arch/x86/x86

2023-03-03 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Mar 3 14:40:16 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu: Align savefpu to 64 bytes in fpuinit_mxcsr_mask. 16 bytes is not enough. (Is this why it never worked on Xen some years back?

CVS commit: src/sys/arch/x86/x86

2023-03-03 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Mar 3 14:40:16 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu: Align savefpu to 64 bytes in fpuinit_mxcsr_mask. 16 bytes is not enough. (Is this why it never worked on Xen some years back?

CVS commit: src/sys/arch/x86/x86

2023-03-03 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Mar 3 14:40:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: cpu.c Log Message: x86: Call fpuinit_mxcsr_mask only once. No need to call it again and again on the secondary CPUs to compute what should be the same mxcsr

CVS commit: src/sys/arch/x86/x86

2023-03-03 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Mar 3 14:40:00 UTC 2023 Modified Files: src/sys/arch/x86/x86: cpu.c Log Message: x86: Call fpuinit_mxcsr_mask only once. No need to call it again and again on the secondary CPUs to compute what should be the same mxcsr

CVS commit: src/sys/arch/x86/x86

2023-03-03 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Mar 3 14:32:38 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: Revert "x86/fpu.c: Sprinkle KNF." kthread_fpu_enter/exit changes broke some hardware, unclear why, to investigate before fixing and

CVS commit: src/sys/arch/x86/x86

2023-03-03 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Mar 3 14:32:38 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: Revert "x86/fpu.c: Sprinkle KNF." kthread_fpu_enter/exit changes broke some hardware, unclear why, to investigate before fixing and

CVS commit: src/sys/arch/x86/x86

2023-02-25 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Feb 25 18:28:57 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu.c: Sprinkle KNF. No functional change intended. To generate a diff of this commit: cvs rdiff -u -r1.82 -r1.83

CVS commit: src/sys/arch/x86/x86

2023-02-25 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Feb 25 18:28:57 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86/fpu.c: Sprinkle KNF. No functional change intended. To generate a diff of this commit: cvs rdiff -u -r1.82 -r1.83

CVS commit: src/sys/arch/x86/x86

2023-02-25 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Feb 25 18:04:25 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86: Label boolean is_64bit argument to fpu_area_restore. No functional change intended. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/x86/x86

2023-02-25 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Feb 25 18:04:25 UTC 2023 Modified Files: src/sys/arch/x86/x86: fpu.c Log Message: x86: Label boolean is_64bit argument to fpu_area_restore. No functional change intended. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/x86/x86

2022-12-30 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Fri Dec 30 13:48:40 UTC 2022 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Add x2avic. Modify comment. To generate a diff of this commit: cvs rdiff -u -r1.45 -r1.46 src/sys/arch/x86/x86/procfs_machdep.c

CVS commit: src/sys/arch/x86/x86

2022-12-30 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Fri Dec 30 13:48:40 UTC 2022 Modified Files: src/sys/arch/x86/x86: procfs_machdep.c Log Message: Add x2avic. Modify comment. To generate a diff of this commit: cvs rdiff -u -r1.45 -r1.46 src/sys/arch/x86/x86/procfs_machdep.c

CVS commit: src/sys/arch/x86/x86

2022-12-24 Thread Valeriy E. Ushakov
Module Name:src Committed By: uwe Date: Sat Dec 24 14:14:52 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_trace.c Log Message: db_trace.c: Use DB_SYM_NULL instead of respelling it To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6

CVS commit: src/sys/arch/x86/x86

2022-12-24 Thread Valeriy E. Ushakov
Module Name:src Committed By: uwe Date: Sat Dec 24 14:14:52 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_trace.c Log Message: db_trace.c: Use DB_SYM_NULL instead of respelling it To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6

CVS commit: src/sys/arch/x86/x86

2022-12-23 Thread Valeriy E. Ushakov
Module Name:src Committed By: uwe Date: Sat Dec 24 02:31:43 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_trace.c Log Message: db_trace.c: Make parens balanced across #ifdef Same object code is generated on both i386 and amd64. To generate a diff of this commit:

CVS commit: src/sys/arch/x86/x86

2022-12-23 Thread Valeriy E. Ushakov
Module Name:src Committed By: uwe Date: Sat Dec 24 02:31:43 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_trace.c Log Message: db_trace.c: Make parens balanced across #ifdef Same object code is generated on both i386 and amd64. To generate a diff of this commit:

CVS commit: src/sys/arch/x86/x86

2022-12-23 Thread Manuel Bouyer
Module Name:src Committed By: bouyer Date: Fri Dec 23 16:05:44 UTC 2022 Modified Files: src/sys/arch/x86/x86: x86_machdep.c Log Message: x86_add_cluster() takes the end of the segment, not the size. Should fix PR port-xen/57121 To generate a diff of this commit: cvs

CVS commit: src/sys/arch/x86/x86

2022-12-23 Thread Manuel Bouyer
Module Name:src Committed By: bouyer Date: Fri Dec 23 16:05:44 UTC 2022 Modified Files: src/sys/arch/x86/x86: x86_machdep.c Log Message: x86_add_cluster() takes the end of the segment, not the size. Should fix PR port-xen/57121 To generate a diff of this commit: cvs

CVS commit: src/sys/arch/x86/x86

2022-10-29 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Oct 29 13:59:04 UTC 2022 Modified Files: src/sys/arch/x86/x86: intr.c Log Message: x86: Add dtrace probes for interrupt handler entry and return. Arguments: 0: interrupt handler function 1: interrupt handler's private

CVS commit: src/sys/arch/x86/x86

2022-10-29 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Oct 29 13:59:04 UTC 2022 Modified Files: src/sys/arch/x86/x86: intr.c Log Message: x86: Add dtrace probes for interrupt handler entry and return. Arguments: 0: interrupt handler function 1: interrupt handler's private

CVS commit: src/sys/arch/x86/x86

2022-10-12 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Wed Oct 12 10:26:09 UTC 2022 Modified Files: src/sys/arch/x86/x86: cpu_topology.c Log Message: Use macros. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/x86/x86/cpu_topology.c

CVS commit: src/sys/arch/x86/x86

2022-10-12 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Wed Oct 12 10:26:09 UTC 2022 Modified Files: src/sys/arch/x86/x86: cpu_topology.c Log Message: Use macros. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/x86/x86/cpu_topology.c

CVS commit: src/sys/arch/x86/x86

2022-10-06 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Oct 6 06:42:46 UTC 2022 Modified Files: src/sys/arch/x86/x86: ioapic.c Log Message: Print detail about misconfigured APIC ID. To generate a diff of this commit: cvs rdiff -u -r1.65 -r1.66 src/sys/arch/x86/x86/ioapic.c

CVS commit: src/sys/arch/x86/x86

2022-10-06 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Oct 6 06:42:46 UTC 2022 Modified Files: src/sys/arch/x86/x86: ioapic.c Log Message: Print detail about misconfigured APIC ID. To generate a diff of this commit: cvs rdiff -u -r1.65 -r1.66 src/sys/arch/x86/x86/ioapic.c

CVS commit: src/sys/arch/x86/x86

2022-09-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Sep 24 15:01:55 UTC 2022 Modified Files: src/sys/arch/x86/x86: efi_machdep.c Log Message: x86/efi: Print uuids in slightly more standard notation. Anyone need a spare hyphen? We had a few extras, apparently. XXX

CVS commit: src/sys/arch/x86/x86

2022-09-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Sep 24 15:01:55 UTC 2022 Modified Files: src/sys/arch/x86/x86: efi_machdep.c Log Message: x86/efi: Print uuids in slightly more standard notation. Anyone need a spare hyphen? We had a few extras, apparently. XXX

CVS commit: src/sys/arch/x86/x86

2022-09-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Sep 24 11:05:47 UTC 2022 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: x86/pmap: Convert conditional to assertion. pmap_kernel should never have va < VM_MAXUSER_ADDRESS entered. To generate a diff of this

CVS commit: src/sys/arch/x86/x86

2022-09-24 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Sep 24 11:05:47 UTC 2022 Modified Files: src/sys/arch/x86/x86: pmap.c Log Message: x86/pmap: Convert conditional to assertion. pmap_kernel should never have va < VM_MAXUSER_ADDRESS entered. To generate a diff of this

CVS commit: src/sys/arch/x86/x86

2022-09-14 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Sep 15 01:30:56 UTC 2022 Modified Files: src/sys/arch/x86/x86: cpu_ucode_intel.c Log Message: Add missing newline in a message. KNF. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19

CVS commit: src/sys/arch/x86/x86

2022-09-14 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Sep 15 01:30:56 UTC 2022 Modified Files: src/sys/arch/x86/x86: cpu_ucode_intel.c Log Message: Add missing newline in a message. KNF. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19

CVS commit: src/sys/arch/x86/x86

2022-09-13 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Sep 13 09:45:37 UTC 2022 Modified Files: src/sys/arch/x86/x86: genfb_machdep.c Log Message: x86/genfb: Re-enable shadowfb by defualt for now. Something makes radeondrmkmsfb, at at least, extremely slow, and it's not yet

CVS commit: src/sys/arch/x86/x86

2022-09-13 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Sep 13 09:45:37 UTC 2022 Modified Files: src/sys/arch/x86/x86: genfb_machdep.c Log Message: x86/genfb: Re-enable shadowfb by defualt for now. Something makes radeondrmkmsfb, at at least, extremely slow, and it's not yet

CVS commit: src/sys/arch/x86/x86

2022-08-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Aug 27 20:40:03 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_memrw.c Log Message: x86/db_memrw.c: Mark db_read_bytes, db_write_bytes __noubsan. These intentionally do loads and stores that may be misaligned, which

CVS commit: src/sys/arch/x86/x86

2022-08-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Aug 27 20:40:03 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_memrw.c Log Message: x86/db_memrw.c: Mark db_read_bytes, db_write_bytes __noubsan. These intentionally do loads and stores that may be misaligned, which

CVS commit: src/sys/arch/x86/x86

2022-08-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Aug 27 20:39:54 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_memrw.c Log Message: x86/db_memrw.c: Use uint64_t, not long, for 8-byte r/w. This is shared with amd64 and i386, and while long works on amd64, not so much

CVS commit: src/sys/arch/x86/x86

2022-08-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sat Aug 27 20:39:54 UTC 2022 Modified Files: src/sys/arch/x86/x86: db_memrw.c Log Message: x86/db_memrw.c: Use uint64_t, not long, for 8-byte r/w. This is shared with amd64 and i386, and while long works on amd64, not so much

CVS commit: src/sys/arch/x86/x86

2022-08-14 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Aug 14 23:09:30 UTC 2022 Modified Files: src/sys/arch/x86/x86: genfb_machdep.c Log Message: x86/genfb: Disable shadowfb by default. The motivation for this was obviated by mapping the framebuffer write-combining instead

CVS commit: src/sys/arch/x86/x86

2022-08-14 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Aug 14 23:09:30 UTC 2022 Modified Files: src/sys/arch/x86/x86: genfb_machdep.c Log Message: x86/genfb: Disable shadowfb by default. The motivation for this was obviated by mapping the framebuffer write-combining instead

CVS commit: src/sys/arch/x86/x86

2022-08-14 Thread Michael van Elst
Module Name:src Committed By: mlelstv Date: Sun Aug 14 07:49:33 UTC 2022 Modified Files: src/sys/arch/x86/x86: cpu.c Log Message: Split TSC calibtration into many small steps and disable interrupts for each step. Also add debug messages. To generate a diff of this

CVS commit: src/sys/arch/x86/x86

2022-08-14 Thread Michael van Elst
Module Name:src Committed By: mlelstv Date: Sun Aug 14 07:49:33 UTC 2022 Modified Files: src/sys/arch/x86/x86: cpu.c Log Message: Split TSC calibtration into many small steps and disable interrupts for each step. Also add debug messages. To generate a diff of this

CVS commit: src/sys/arch/x86/x86

2022-08-13 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Aug 13 06:59:56 UTC 2022 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: Fix an inverted KASSERTMSG test from the #ifdef DIAGNOSTIC panic -> KASSERT conversion. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/x86/x86

2022-08-13 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Aug 13 06:59:56 UTC 2022 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: Fix an inverted KASSERTMSG test from the #ifdef DIAGNOSTIC panic -> KASSERT conversion. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/x86/x86

2022-08-12 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Aug 12 15:01:26 UTC 2022 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86/bus_dma: #ifdef DIAGNOSTIC panic -> KASSERT While here, use some better types and avoid integer overflow in the diagnostic tests.

CVS commit: src/sys/arch/x86/x86

2022-08-12 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Aug 12 15:01:26 UTC 2022 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86/bus_dma: #ifdef DIAGNOSTIC panic -> KASSERT While here, use some better types and avoid integer overflow in the diagnostic tests.

CVS commit: src/sys/arch/x86/x86

2022-08-12 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Aug 12 13:44:12 UTC 2022 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86: Adjust fences issued in bus_dmamap_sync after bouncing. And expand the comment on the lfence for POSTREAD before bouncing. Net

CVS commit: src/sys/arch/x86/x86

2022-08-12 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Fri Aug 12 13:44:12 UTC 2022 Modified Files: src/sys/arch/x86/x86: bus_dma.c Log Message: x86: Adjust fences issued in bus_dmamap_sync after bouncing. And expand the comment on the lfence for POSTREAD before bouncing. Net

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