CVS commit: [netbsd-9] src/sys/arch/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Mon Nov  4 14:08:19 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: pmap.c
src/sys/arch/aarch64/include [netbsd-9]: pmap.h

Log Message:
Pull up following revision(s) (requested by maya in ticket #393):

sys/arch/aarch64/include/pmap.h: revision 1.26
sys/arch/aarch64/aarch64/pmap.c: revision 1.48

Define PMAP_NEED_PROCWR, providing strategically placed i-cache
synchronization where just-changed memory is about to be executed.

Fixes SIGILLs seen when running Mono 6 on QEMU Cortex-A57.

ok ryo


To generate a diff of this commit:
cvs rdiff -u -r1.41.2.2 -r1.41.2.3 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.24 -r1.24.4.1 src/sys/arch/aarch64/include/pmap.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.2 src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.3
--- src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.2	Mon Sep 23 07:00:35 2019
+++ src/sys/arch/aarch64/aarch64/pmap.c	Mon Nov  4 14:08:18 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.41.2.2 2019/09/23 07:00:35 martin Exp $	*/
+/*	$NetBSD: pmap.c,v 1.41.2.3 2019/11/04 14:08:18 martin Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.2 2019/09/23 07:00:35 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.3 2019/11/04 14:08:18 martin Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -874,6 +874,22 @@ pmap_icache_sync_range(pmap_t pm, vaddr_
 	pm_unlock(pm);
 }
 
+/*
+ * Routine:	pmap_procwr
+ *
+ * Function:
+ *	Synchronize caches corresponding to [addr, addr+len) in p.
+ *
+ */
+void
+pmap_procwr(struct proc *p, vaddr_t va, int len)
+{
+
+	/* We only need to do anything if it is the current process. */
+	if (p == curproc)
+		cpu_icache_sync_range(va, len);
+}
+
 static pt_entry_t
 _pmap_pte_adjust_prot(pt_entry_t pte, vm_prot_t prot, vm_prot_t protmask,
 bool user)

Index: src/sys/arch/aarch64/include/pmap.h
diff -u src/sys/arch/aarch64/include/pmap.h:1.24 src/sys/arch/aarch64/include/pmap.h:1.24.4.1
--- src/sys/arch/aarch64/include/pmap.h:1.24	Mon Apr  8 21:18:22 2019
+++ src/sys/arch/aarch64/include/pmap.h	Mon Nov  4 14:08:18 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.24 2019/04/08 21:18:22 ryo Exp $ */
+/* $NetBSD: pmap.h,v 1.24.4.1 2019/11/04 14:08:18 martin Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -46,6 +46,7 @@
 
 #include 
 
+#define PMAP_NEED_PROCWR
 #define PMAP_GROWKERNEL
 #define PMAP_STEAL_MEMORY
 
@@ -272,6 +273,7 @@ aarch64_mmap_flags(paddr_t mdpgno)
 #define pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
 #define pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
 
+void	pmap_procwr(struct proc *, vaddr_t, int);
 bool	pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *);
 void	pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t);
 

CVS commit: [netbsd-9] src/sys/arch/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Mon Nov  4 14:08:19 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: pmap.c
src/sys/arch/aarch64/include [netbsd-9]: pmap.h

Log Message:
Pull up following revision(s) (requested by maya in ticket #393):

sys/arch/aarch64/include/pmap.h: revision 1.26
sys/arch/aarch64/aarch64/pmap.c: revision 1.48

Define PMAP_NEED_PROCWR, providing strategically placed i-cache
synchronization where just-changed memory is about to be executed.

Fixes SIGILLs seen when running Mono 6 on QEMU Cortex-A57.

ok ryo


To generate a diff of this commit:
cvs rdiff -u -r1.41.2.2 -r1.41.2.3 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.24 -r1.24.4.1 src/sys/arch/aarch64/include/pmap.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Mon Sep 23 07:00:35 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: pmap.c

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #229):

sys/arch/aarch64/aarch64/pmap.c: revision 1.47

Disable translation table walks using TTBR0 while changing its value and
when deactivating a pmap. Fixes stability issues on Ampere eMAG CPUs.


To generate a diff of this commit:
cvs rdiff -u -r1.41.2.1 -r1.41.2.2 src/sys/arch/aarch64/aarch64/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.1 src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.2
--- src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.1	Sun Sep 22 10:32:38 2019
+++ src/sys/arch/aarch64/aarch64/pmap.c	Mon Sep 23 07:00:35 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.41.2.1 2019/09/22 10:32:38 martin Exp $	*/
+/*	$NetBSD: pmap.c,v 1.41.2.2 2019/09/23 07:00:35 martin Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.1 2019/09/22 10:32:38 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.2 2019/09/23 07:00:35 martin Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -1271,7 +1271,7 @@ void
 pmap_activate(struct lwp *l)
 {
 	struct pmap *pm = l->l_proc->p_vmspace->vm_map.pmap;
-	uint64_t ttbr0;
+	uint64_t ttbr0, tcr;
 
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLED(pmaphist);
@@ -1285,6 +1285,11 @@ pmap_activate(struct lwp *l)
 
 	UVMHIST_LOG(pmaphist, "lwp=%p (pid=%d)", l, l->l_proc->p_pid, 0, 0);
 
+	/* Disable translation table walks using TTBR0 */
+	tcr = reg_tcr_el1_read();
+	reg_tcr_el1_write(tcr | TCR_EPD0);
+	__asm __volatile("isb" ::: "memory");
+
 	/* XXX */
 	CTASSERT(PID_MAX <= 65535);	/* 16bit ASID */
 	if (pm->pm_asid == -1)
@@ -1293,6 +1298,11 @@ pmap_activate(struct lwp *l)
 	ttbr0 = ((uint64_t)pm->pm_asid << 48) | pm->pm_l0table_pa;
 	cpu_set_ttbr0(ttbr0);
 
+	/* Re-enable translation table walks using TTBR0 */
+	tcr = reg_tcr_el1_read();
+	reg_tcr_el1_write(tcr & ~TCR_EPD0);
+	__asm __volatile("isb" ::: "memory");
+
 	pm->pm_activated = true;
 
 	PMAP_COUNT(activate);
@@ -1302,6 +1312,7 @@ void
 pmap_deactivate(struct lwp *l)
 {
 	struct pmap *pm = l->l_proc->p_vmspace->vm_map.pmap;
+	uint64_t tcr;
 
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLED(pmaphist);
@@ -1311,6 +1322,11 @@ pmap_deactivate(struct lwp *l)
 
 	UVMHIST_LOG(pmaphist, "lwp=%p, asid=%d", l, pm->pm_asid, 0, 0);
 
+	/* Disable translation table walks using TTBR0 */
+	tcr = reg_tcr_el1_read();
+	reg_tcr_el1_write(tcr | TCR_EPD0);
+	__asm __volatile("isb" ::: "memory");
+
 	/* XXX */
 	pm->pm_activated = false;
 

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Mon Sep 23 07:00:35 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: pmap.c

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #229):

sys/arch/aarch64/aarch64/pmap.c: revision 1.47

Disable translation table walks using TTBR0 while changing its value and
when deactivating a pmap. Fixes stability issues on Ampere eMAG CPUs.


To generate a diff of this commit:
cvs rdiff -u -r1.41.2.1 -r1.41.2.2 src/sys/arch/aarch64/aarch64/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 12:39:36 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: locore.S

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #226):

sys/arch/aarch64/aarch64/locore.S: revision 1.40

Map device memory for early console XN


To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.39.2.1 src/sys/arch/aarch64/aarch64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.39 src/sys/arch/aarch64/aarch64/locore.S:1.39.2.1
--- src/sys/arch/aarch64/aarch64/locore.S:1.39	Wed Jul 17 08:39:03 2019
+++ src/sys/arch/aarch64/aarch64/locore.S	Sun Sep 22 12:39:36 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.39 2019/07/17 08:39:03 skrll Exp $	*/
+/*	$NetBSD: locore.S,v 1.39.2.1 2019/09/22 12:39:36 martin Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu 
@@ -38,7 +38,7 @@
 #include 
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.39 2019/07/17 08:39:03 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.39.2.1 2019/09/22 12:39:36 martin Exp $")
 
 
 /*#define DEBUG_LOCORE			/* debug print */
@@ -766,6 +766,7 @@ init_mmutable:
 	adr	x6, bootpage_alloc		/* allocator */
 	mov	x5, xzr/* flags = 0 */
 	mov	x4, #LX_BLKPAG_ATTR_DEVICE_MEM|LX_BLKPAG_AP_RW	/* attr */
+	orr	x4, x4, #LX_BLKPAG_UXN|LX_BLKPAG_PXN
 	mov	x3, #L2_SIZE			/* blocksize */
 	mov	x2, #L2_SIZE			/* size */
 	ldr	x1, =CONSADDR			/* pa */
@@ -779,6 +780,7 @@ init_mmutable:
 	adr	x6, bootpage_alloc		/* allocator */
 	mov	x5, xzr/* flags = 0 */
 	mov	x4, #LX_BLKPAG_ATTR_DEVICE_MEM|LX_BLKPAG_AP_RW	/* attr */
+	orr	x4, x4, #LX_BLKPAG_UXN|LX_BLKPAG_PXN
 	mov	x3, #L2_SIZE			/* blocksize */
 	mov	x2, #(1024*1024*1024*4)		/* size */
 	mov	x1, xzr/* pa */

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 12:39:36 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: locore.S

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #226):

sys/arch/aarch64/aarch64/locore.S: revision 1.40

Map device memory for early console XN


To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.39.2.1 src/sys/arch/aarch64/aarch64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 12:27:22 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: cpufunc.c

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #221):

sys/arch/aarch64/aarch64/cpufunc.c: revision 1.6

Do not attempt to change coherency_unit at runtime. Instead, if the
required coherency unit is greater than COHERENCY_UNIT in a MULTIPROCESSOR
kernel, just panic instead.

This makes non-MULTIPROCESSOR kernels work again.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.5.4.1 src/sys/arch/aarch64/aarch64/cpufunc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 12:27:22 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: cpufunc.c

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #221):

sys/arch/aarch64/aarch64/cpufunc.c: revision 1.6

Do not attempt to change coherency_unit at runtime. Instead, if the
required coherency unit is greater than COHERENCY_UNIT in a MULTIPROCESSOR
kernel, just panic instead.

This makes non-MULTIPROCESSOR kernels work again.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.5.4.1 src/sys/arch/aarch64/aarch64/cpufunc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/cpufunc.c
diff -u src/sys/arch/aarch64/aarch64/cpufunc.c:1.5 src/sys/arch/aarch64/aarch64/cpufunc.c:1.5.4.1
--- src/sys/arch/aarch64/aarch64/cpufunc.c:1.5	Fri Dec 21 08:01:01 2018
+++ src/sys/arch/aarch64/aarch64/cpufunc.c	Sun Sep 22 12:27:22 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.c,v 1.5 2018/12/21 08:01:01 ryo Exp $	*/
+/*	$NetBSD: cpufunc.c,v 1.5.4.1 2019/09/22 12:27:22 martin Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu 
@@ -26,8 +26,10 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include "opt_multiprocessor.h"
+
 #include 
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.5 2018/12/21 08:01:01 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.5.4.1 2019/09/22 12:27:22 martin Exp $");
 
 #include 
 #include 
@@ -135,9 +137,12 @@ aarch64_getcacheinfo(void)
 		arm_dcache_align = sizeof(int) << arm_dcache_maxline;
 		arm_dcache_align_mask = arm_dcache_align - 1;
 	}
-	/* update coherency_unit (in param.h) */
+
+#ifdef MULTIPROCESSOR
 	if (coherency_unit < arm_dcache_align)
-		coherency_unit = arm_dcache_align;
+		panic("coherency_unit %ld < arm_dcache_align %d; increase COHERENCY_UNIT",
+		coherency_unit, arm_dcache_align);
+#endif
 
 	/*
 	 * CLIDR -  Cache Level ID Register

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 10:36:30 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: aarch64_machdep.c

Log Message:
Pull up following revision(s) (requested by ryo in ticket #215):

sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.30
sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.31
sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.29

Do not assume that DRAM is linear when creating KSEG mappings. Instead,
create L2 blocks to cover all ranges specified in the memory map.

 -

use L1-L3 blocks/pages for KSEG mappings to fit dramblocks exactly.
r1.29 and this changes avoid over cache prefetch problem (perhaps) with 
PMAP_MAP_POOLPAGE/KSEG on CortexA72, and be more stable for rockpro64.

 -

used L3 even if L2 could cover the range. fix to use larger block if possible 
good enough.
pointed out by jmcneill@. thanks.


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.28.4.1 src/sys/arch/aarch64/aarch64/aarch64_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.28 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.28.4.1
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.28	Sun Jan 27 02:08:36 2019
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c	Sun Sep 22 10:36:30 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.28 2019/01/27 02:08:36 pgoyette Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.28.4.1 2019/09/22 10:36:30 martin Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.28 2019/01/27 02:08:36 pgoyette Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.28.4.1 2019/09/22 10:36:30 martin Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -112,12 +112,13 @@ int dumpsize = 0;   /* also 
 longdumplo = 0;
 
 void
-cpu_kernel_vm_init(uint64_t memory_start, uint64_t memory_size)
+cpu_kernel_vm_init(uint64_t memory_start __unused, uint64_t memory_size __unused)
 {
 	extern char __kernel_text[];
 	extern char _end[];
 	extern char __data_start[];
 	extern char __rodata_start[];
+	u_int blk;
 
 	vaddr_t kernstart = trunc_page((vaddr_t)__kernel_text);
 	vaddr_t kernend = round_page((vaddr_t)_end);
@@ -127,16 +128,84 @@ cpu_kernel_vm_init(uint64_t memory_start
 	vaddr_t rodata_start = (vaddr_t)__rodata_start;
 
 	/* add KSEG mappings of whole memory */
-	VPRINTF("Creating KSEG tables for 0x%016lx-0x%016lx\n",
-	memory_start, memory_start + memory_size);
 	const pt_entry_t ksegattr =
 	LX_BLKPAG_ATTR_NORMAL_WB |
 	LX_BLKPAG_AP_RW |
 	LX_BLKPAG_PXN |
 	LX_BLKPAG_UXN;
-	pmapboot_enter(AARCH64_PA_TO_KVA(memory_start), memory_start,
-	memory_size, L1_SIZE, ksegattr, PMAPBOOT_ENTER_NOOVERWRITE,
-	bootpage_alloc, NULL);
+	for (blk = 0; blk < bootconfig.dramblocks; blk++) {
+		uint64_t start, end, left, mapsize, nblocks;
+
+		start = trunc_page(bootconfig.dram[blk].address);
+		end = round_page(bootconfig.dram[blk].address +
+		(uint64_t)bootconfig.dram[blk].pages * PAGE_SIZE);
+		left = end - start;
+
+		/* align the start address to L2 blocksize */
+		nblocks = ulmin(left / L3_SIZE,
+		Ln_ENTRIES - __SHIFTOUT(start, L3_ADDR_BITS));
+		if (((start & L3_ADDR_BITS) != 0) && (nblocks > 0)) {
+			mapsize = nblocks * L3_SIZE;
+			VPRINTF("Creating KSEG tables for %016lx-%016lx (L3)\n",
+			start, start + mapsize - 1);
+			pmapboot_enter(AARCH64_PA_TO_KVA(start), start,
+			mapsize, L3_SIZE, ksegattr,
+			PMAPBOOT_ENTER_NOOVERWRITE, bootpage_alloc, NULL);
+
+			start += mapsize;
+			left -= mapsize;
+		}
+
+		/* align the start address to L1 blocksize */
+		nblocks = ulmin(left / L2_SIZE,
+		Ln_ENTRIES - __SHIFTOUT(start, L2_ADDR_BITS));
+		if (((start & L2_ADDR_BITS) != 0) && (nblocks > 0)) {
+			mapsize = nblocks * L2_SIZE;
+			VPRINTF("Creating KSEG tables for %016lx-%016lx (L2)\n",
+			start, start + mapsize - 1);
+			pmapboot_enter(AARCH64_PA_TO_KVA(start), start,
+			mapsize, L2_SIZE, ksegattr,
+			PMAPBOOT_ENTER_NOOVERWRITE, bootpage_alloc, NULL);
+			start += mapsize;
+			left -= mapsize;
+		}
+
+		nblocks = left / L1_SIZE;
+		if (nblocks > 0) {
+			mapsize = nblocks * L1_SIZE;
+			VPRINTF("Creating KSEG tables for %016lx-%016lx (L1)\n",
+			start, start + mapsize - 1);
+			pmapboot_enter(AARCH64_PA_TO_KVA(start), start,
+			mapsize, L1_SIZE, ksegattr,
+			PMAPBOOT_ENTER_NOOVERWRITE, bootpage_alloc, NULL);
+			start += mapsize;
+			left -= mapsize;
+		}
+
+		if ((left & L2_ADDR_BITS) != 0) {
+			nblocks = left / L2_SIZE;
+			mapsize = nblocks * L2_SIZE;
+			VPRINTF("Creating KSEG tables for %016lx-%016lx (L2)\n",
+			start, start + mapsize - 1);
+			

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 10:36:30 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: aarch64_machdep.c

Log Message:
Pull up following revision(s) (requested by ryo in ticket #215):

sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.30
sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.31
sys/arch/aarch64/aarch64/aarch64_machdep.c: revision 1.29

Do not assume that DRAM is linear when creating KSEG mappings. Instead,
create L2 blocks to cover all ranges specified in the memory map.

 -

use L1-L3 blocks/pages for KSEG mappings to fit dramblocks exactly.
r1.29 and this changes avoid over cache prefetch problem (perhaps) with 
PMAP_MAP_POOLPAGE/KSEG on CortexA72, and be more stable for rockpro64.

 -

used L3 even if L2 could cover the range. fix to use larger block if possible 
good enough.
pointed out by jmcneill@. thanks.


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.28.4.1 src/sys/arch/aarch64/aarch64/aarch64_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 10:32:38 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: pmap.c

Log Message:
Pull up following revision(s) (requested by ryo in ticket #214):

sys/arch/aarch64/aarch64/pmap.c: revision 1.44
sys/arch/aarch64/aarch64/pmap.c: revision 1.46

- remove incorrect KASSERT. mmap(2) with prot=PROT_WRITE calls pmap_enter(..., 
PROT_WRITE) internally.
- fix to update page reference flags when only PROT_WRITE or PROT_EXECUTE 
specified
ref/mod bit should be set according to 'flags' argument, not 'prot'.  r1.44 was 
incomplete.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.41.2.1 src/sys/arch/aarch64/aarch64/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.41 src/sys/arch/aarch64/aarch64/pmap.c:1.41.2.1
--- src/sys/arch/aarch64/aarch64/pmap.c:1.41	Fri May 17 06:05:07 2019
+++ src/sys/arch/aarch64/aarch64/pmap.c	Sun Sep 22 10:32:38 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.41 2019/05/17 06:05:07 mrg Exp $	*/
+/*	$NetBSD: pmap.c,v 1.41.2.1 2019/09/22 10:32:38 martin Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41 2019/05/17 06:05:07 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.1 2019/09/22 10:32:38 martin Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -1718,10 +1718,11 @@ _pmap_enter(struct pmap *pm, vaddr_t va,
 	/*
 	 * read permission is treated as an access permission internally.
 	 * require to add PROT_READ even if only PROT_WRITE or PROT_EXEC
-	 * for wired mapping.
 	 */
-	if ((flags & PMAP_WIRED) && (prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)))
+	if (prot & (VM_PROT_WRITE|VM_PROT_EXECUTE))
 		prot |= VM_PROT_READ;
+	if (flags & (VM_PROT_WRITE|VM_PROT_EXECUTE))
+		flags |= VM_PROT_READ;
 
 	mdattr = VM_PROT_READ | VM_PROT_WRITE;
 	if (need_update_pv) {
@@ -1818,8 +1819,6 @@ _pmap_enter(struct pmap *pm, vaddr_t va,
 int
 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags)
 {
-	KASSERT((prot & VM_PROT_READ) || !(prot & VM_PROT_WRITE));
-
 	return _pmap_enter(pm, va, pa, prot, flags, false);
 }
 

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 10:32:38 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: pmap.c

Log Message:
Pull up following revision(s) (requested by ryo in ticket #214):

sys/arch/aarch64/aarch64/pmap.c: revision 1.44
sys/arch/aarch64/aarch64/pmap.c: revision 1.46

- remove incorrect KASSERT. mmap(2) with prot=PROT_WRITE calls pmap_enter(..., 
PROT_WRITE) internally.
- fix to update page reference flags when only PROT_WRITE or PROT_EXECUTE 
specified
ref/mod bit should be set according to 'flags' argument, not 'prot'.  r1.44 was 
incomplete.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.41.2.1 src/sys/arch/aarch64/aarch64/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 10:29:44 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: cpufunc_asm_armv8.S

Log Message:
Pull up following revision(s) (requested by ryo in ticket #213):

sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S: revision 1.4

even if "no options MULTIPROCESSOR" requires isb after tlbi op. since it should 
be harmless, dsb is also added.
fixed a problem that rockpro64 doesn't boot without MULTIPROCESSOR.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.4.1 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S
diff -u src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.3 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.3.4.1
--- src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.3	Fri Dec 21 08:01:01 2018
+++ src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S	Sun Sep 22 10:29:44 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc_asm_armv8.S,v 1.3 2018/12/21 08:01:01 ryo Exp $	*/
+/*	$NetBSD: cpufunc_asm_armv8.S,v 1.3.4.1 2019/09/22 10:29:44 martin Exp $	*/
 
 /*-
  * Copyright (c) 2014 Robin Randhawa
@@ -243,16 +243,14 @@ ENTRY(aarch64_tlbi_by_asid_va)
 	/* x8 = bit 63[ASID]48, 47[RES0]44, 43[VA(55:12)]0 */
 	lsl	x8, x0, #48
 	bfxil	x8, x1, #12, #44
-#ifdef MULTIPROCESSOR
-	/* need dsb and isb for inner shareable? */
 	dsb	ishst
+#ifdef MULTIPROCESSOR
 	tlbi	vae1is, x8
-	dsb	ish
-	isb
 #else
-	/* no need dsb and isb for single entry */
 	tlbi	vae1, x8
 #endif
+	dsb	ish
+	isb
 	ret
 END(aarch64_tlbi_by_asid_va)
 
@@ -261,15 +259,13 @@ ENTRY(aarch64_tlbi_by_asid_va_ll)
 	/* x8 = bit 63[ASID]48, 47[RES0]44, 43[VA(55:12)]0 */
 	lsl	x8, x0, #48
 	bfxil	x8, x1, #12, #44
-#ifdef MULTIPROCESSOR
-	/* need dsb and isb for inner shareable? */
 	dsb	ishst
+#ifdef MULTIPROCESSOR
 	tlbi	vale1is, x8
-	dsb	ish
-	isb
 #else
-	/* no need dsb and isb for single entry */
 	tlbi	vale1, x8
 #endif
+	dsb	ish
+	isb
 	ret
 END(aarch64_tlbi_by_asid_va_ll)

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Sun Sep 22 10:29:44 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: cpufunc_asm_armv8.S

Log Message:
Pull up following revision(s) (requested by ryo in ticket #213):

sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S: revision 1.4

even if "no options MULTIPROCESSOR" requires isb after tlbi op. since it should 
be harmless, dsb is also added.
fixed a problem that rockpro64 doesn't boot without MULTIPROCESSOR.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.4.1 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/include

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Tue Aug 13 14:54:32 UTC 2019

Modified Files:
src/sys/arch/aarch64/include [netbsd-9]: bus_funcs.h

Log Message:
Pull up following revision(s) (requested by skrll in ticket #53):

sys/arch/aarch64/include/bus_funcs.h: revision 1.3

Really provide bus_funcs.h


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.2.6.1 src/sys/arch/aarch64/include/bus_funcs.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/include/bus_funcs.h
diff -u src/sys/arch/aarch64/include/bus_funcs.h:1.2 src/sys/arch/aarch64/include/bus_funcs.h:1.2.6.1
--- src/sys/arch/aarch64/include/bus_funcs.h:1.2	Sun Apr  1 04:35:03 2018
+++ src/sys/arch/aarch64/include/bus_funcs.h	Tue Aug 13 14:54:31 2019
@@ -1,3 +1,3 @@
-/*	$NetBSD: bus_funcs.h,v 1.2 2018/04/01 04:35:03 ryo Exp $	*/
+/*	$NetBSD: bus_funcs.h,v 1.2.6.1 2019/08/13 14:54:31 martin Exp $	*/
 
-#include 
+#include 

CVS commit: [netbsd-9] src/sys/arch/aarch64/include

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Tue Aug 13 14:54:32 UTC 2019

Modified Files:
src/sys/arch/aarch64/include [netbsd-9]: bus_funcs.h

Log Message:
Pull up following revision(s) (requested by skrll in ticket #53):

sys/arch/aarch64/include/bus_funcs.h: revision 1.3

Really provide bus_funcs.h


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.2.6.1 src/sys/arch/aarch64/include/bus_funcs.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Wed Aug  7 10:19:55 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: trap.c

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #27):

sys/arch/aarch64/aarch64/trap.c: revision 1.18

trap_el0_32sync: add missing break to ESR_EC_FP_TRAP_A32 case


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.17.4.1 src/sys/arch/aarch64/aarch64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [netbsd-9] src/sys/arch/aarch64/aarch64

[Martin Husemann]

Module Name:src
Committed By:   martin
Date:   Wed Aug  7 10:19:55 UTC 2019

Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: trap.c

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #27):

sys/arch/aarch64/aarch64/trap.c: revision 1.18

trap_el0_32sync: add missing break to ESR_EC_FP_TRAP_A32 case


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.17.4.1 src/sys/arch/aarch64/aarch64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/trap.c
diff -u src/sys/arch/aarch64/aarch64/trap.c:1.17 src/sys/arch/aarch64/aarch64/trap.c:1.17.4.1
--- src/sys/arch/aarch64/aarch64/trap.c:1.17	Sat Apr  6 03:06:24 2019
+++ src/sys/arch/aarch64/aarch64/trap.c	Wed Aug  7 10:19:54 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.17 2019/04/06 03:06:24 thorpej Exp $ */
+/* $NetBSD: trap.c,v 1.17.4.1 2019/08/07 10:19:54 martin Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
 
 #include 
 
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.17 2019/04/06 03:06:24 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.17.4.1 2019/08/07 10:19:54 martin Exp $");
 
 #include "opt_arm_intr_impl.h"
 #include "opt_compat_netbsd32.h"
@@ -355,6 +355,7 @@ trap_el0_32sync(struct trapframe *tf)
 	case ESR_EC_FP_TRAP_A32:
 		do_trapsignal(l, SIGFPE, FPE_FLTUND, NULL, esr); /* XXX */
 		userret(l);
+		break;
 
 	case ESR_EC_PC_ALIGNMENT:
 		do_trapsignal(l, SIGBUS, BUS_ADRALN, (void *)tf->tf_pc, esr);