Re: CVS commit: src/sys/arch/arm/arm

2020-11-11 Thread Rin Okuyama

On 2020/11/12 6:52, matthew green wrote:

"Rin Okuyama" writes:

Module Name:src
Committed By:   rin
Date:   Tue Nov 10 21:40:07 UTC 2020

Modified Files:
src/sys/arch/arm/arm: cpu_exec.c

Log Message:
Test (epp->ep_esch->es_emul != _netbsd) instead of


nice, this is a step forward.

an optimisation on it could be to remove this test entirely
if neither MODULAR or COMAPT_NETBSD32 are set, as it will
always be false there.


Ah, yes. I will commit after some test. Thanks!

rin


re: CVS commit: src/sys/arch/arm/arm

2020-11-11 Thread matthew green
"Rin Okuyama" writes:
> Module Name:  src
> Committed By: rin
> Date: Tue Nov 10 21:40:07 UTC 2020
>
> Modified Files:
>   src/sys/arch/arm/arm: cpu_exec.c
>
> Log Message:
> Test (epp->ep_esch->es_emul != _netbsd) instead of

nice, this is a step forward.

an optimisation on it could be to remove this test entirely
if neither MODULAR or COMAPT_NETBSD32 are set, as it will
always be false there.

thanks.


.mrg.


CVS commit: src/sys/arch/arm/arm

2019-10-28 Thread Joerg Sonnenberger
Module Name:src
Committed By:   joerg
Date:   Mon Oct 28 18:14:38 UTC 2019

Modified Files:
src/sys/arch/arm/arm: fusu.S

Log Message:
Add operand that GNU as considers optional, but LLVM doesn't.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/arm/fusu.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2019-10-28 Thread Joerg Sonnenberger
Module Name:src
Committed By:   joerg
Date:   Mon Oct 28 18:14:38 UTC 2019

Modified Files:
src/sys/arch/arm/arm: fusu.S

Log Message:
Add operand that GNU as considers optional, but LLVM doesn't.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/arm/fusu.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/fusu.S
diff -u src/sys/arch/arm/arm/fusu.S:1.7 src/sys/arch/arm/arm/fusu.S:1.8
--- src/sys/arch/arm/arm/fusu.S:1.7	Sun Apr  7 14:14:03 2019
+++ src/sys/arch/arm/arm/fusu.S	Mon Oct 28 18:14:38 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: fusu.S,v 1.7 2019/04/07 14:14:03 thorpej Exp $	*/
+/*	$NetBSD: fusu.S,v 1.8 2019/10/28 18:14:38 joerg Exp $	*/
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -127,7 +127,7 @@ STRONG_ALIAS(_ufetch_16,_ufetch_16_no_ld
 ENTRY(_ufetch_16_ldrht)
 	UFETCHSTORE_PROLOGUE
 
-	ldrht	r3, [r0]
+	ldrht	r3, [r0], #0
 	strh	r3, [r1]
 
 	UFETCHSTORE_EPILOGUE
@@ -186,7 +186,7 @@ STRONG_ALIAS(_ustore_16,_ustore_16_no_st
 ENTRY(_ustore_16_strht)
 	UFETCHSTORE_PROLOGUE
 
-	strht	r1, [r0]
+	strht	r1, [r0], #0
 
 	UFETCHSTORE_EPILOGUE
 	RETURN_SUCCESS



CVS commit: src/sys/arch/arm/arm

2019-10-24 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Thu Oct 24 18:34:22 UTC 2019

Modified Files:
src/sys/arch/arm/arm: disassem.c

Log Message:
Add a function cast


To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/arm/disassem.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2019-10-24 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Thu Oct 24 18:34:22 UTC 2019

Modified Files:
src/sys/arch/arm/arm: disassem.c

Log Message:
Add a function cast


To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/arm/disassem.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.40 src/sys/arch/arm/arm/disassem.c:1.41
--- src/sys/arch/arm/arm/disassem.c:1.40	Tue Oct 30 05:05:51 2018
+++ src/sys/arch/arm/arm/disassem.c	Thu Oct 24 14:34:22 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: disassem.c,v 1.40 2018/10/30 09:05:51 skrll Exp $	*/
+/*	$NetBSD: disassem.c,v 1.41 2019/10/24 18:34:22 christos Exp $	*/
 
 /*
  * Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.40 2018/10/30 09:05:51 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.41 2019/10/24 18:34:22 christos Exp $");
 
 #include 
 
@@ -951,7 +951,7 @@ disassemble_printaddr(u_int address)
 
 static const disasm_interface_t disassemble_di = {
 	disassemble_readword, disassemble_printaddr,
-	(void (*)(const char *, ...))printf
+	__FPTRCAST(void (*)(const char *, ...), printf)
 };
 
 void



CVS commit: src/sys/arch/arm/arm

2019-07-24 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Jul 25 02:00:40 UTC 2019

Modified Files:
src/sys/arch/arm/arm: efi_runtime.c

Log Message:
Only try to call EFI RT's reset once. If it faults for some reason, just
return an error so the kernel will try to PSCI reset instead. Otherwise
we get stuck in an endless loop..


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/arm/efi_runtime.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2019-07-24 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Jul 25 02:00:40 UTC 2019

Modified Files:
src/sys/arch/arm/arm: efi_runtime.c

Log Message:
Only try to call EFI RT's reset once. If it faults for some reason, just
return an error so the kernel will try to PSCI reset instead. Otherwise
we get stuck in an endless loop..


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/arm/efi_runtime.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/efi_runtime.c
diff -u src/sys/arch/arm/arm/efi_runtime.c:1.1 src/sys/arch/arm/arm/efi_runtime.c:1.2
--- src/sys/arch/arm/arm/efi_runtime.c:1.1	Sun Oct 28 10:21:42 2018
+++ src/sys/arch/arm/arm/efi_runtime.c	Thu Jul 25 02:00:40 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_runtime.c,v 1.1 2018/10/28 10:21:42 jmcneill Exp $ */
+/* $NetBSD: efi_runtime.c,v 1.2 2019/07/25 02:00:40 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: efi_runtime.c,v 1.1 2018/10/28 10:21:42 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_runtime.c,v 1.2 2019/07/25 02:00:40 jmcneill Exp $");
 
 #include 
 #include 
@@ -113,13 +113,19 @@ arm_efirt_settime(struct efi_tm *tm)
 int
 arm_efirt_reset(enum efi_reset type)
 {
+	static int reset_called = false;
 	efi_status status;
 
 	if (RT == NULL || RT->rt_reset == NULL)
 		return ENXIO;
 
 	mutex_enter(_lock);
-	status = RT->rt_reset(type, 0, 0, NULL);
+	if (reset_called == false) {
+		reset_called = true;
+		status = RT->rt_reset(type, 0, 0, NULL);
+	} else {
+		status = 1;
+	}
 	mutex_exit(_lock);
 	if (status)
 		return EIO;



CVS commit: src/sys/arch/arm/arm

2019-06-12 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Jun 12 06:53:21 UTC 2019

Modified Files:
src/sys/arch/arm/arm: armv6_start.S

Log Message:
Comment fix


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/arm/armv6_start.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2019-06-12 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Jun 12 06:53:21 UTC 2019

Modified Files:
src/sys/arch/arm/arm: armv6_start.S

Log Message:
Comment fix


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/arm/armv6_start.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/armv6_start.S
diff -u src/sys/arch/arm/arm/armv6_start.S:1.13 src/sys/arch/arm/arm/armv6_start.S:1.14
--- src/sys/arch/arm/arm/armv6_start.S:1.13	Wed Jun 12 06:51:31 2019
+++ src/sys/arch/arm/arm/armv6_start.S	Wed Jun 12 06:53:21 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: armv6_start.S,v 1.13 2019/06/12 06:51:31 skrll Exp $	*/
+/*	$NetBSD: armv6_start.S,v 1.14 2019/06/12 06:53:21 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2012, 2017, 2018 The NetBSD Foundation, Inc.
@@ -1012,7 +1012,7 @@ armv6_mmuinit:
 	VPRINTF(" ")
 
 	.align 5
-	@ turn mmu on!
+	/* turn mmu on! */
 	mov	r0, r6
 	mcr	p15, 0, r0, c1, c0, 0
 



CVS commit: src/sys/arch/arm/arm

2019-06-12 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Jun 12 06:51:32 UTC 2019

Modified Files:
src/sys/arch/arm/arm: armv6_start.S

Log Message:
Debug output improvement


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/arm/armv6_start.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2019-06-12 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Jun 12 06:51:32 UTC 2019

Modified Files:
src/sys/arch/arm/arm: armv6_start.S

Log Message:
Debug output improvement


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/arm/armv6_start.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/armv6_start.S
diff -u src/sys/arch/arm/arm/armv6_start.S:1.12 src/sys/arch/arm/arm/armv6_start.S:1.13
--- src/sys/arch/arm/arm/armv6_start.S:1.12	Mon Apr  8 07:35:32 2019
+++ src/sys/arch/arm/arm/armv6_start.S	Wed Jun 12 06:51:31 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: armv6_start.S,v 1.12 2019/04/08 07:35:32 skrll Exp $	*/
+/*	$NetBSD: armv6_start.S,v 1.13 2019/06/12 06:51:31 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2012, 2017, 2018 The NetBSD Foundation, Inc.
@@ -209,7 +209,7 @@ generic_savevars:
 	ldr	R_TMP2, =uboot_args
 	sub	R_TMP2, R_VTOPDIFF
 
-	VPRINTF("\n\ruboot : @")
+	VPRINTF("\n\ruboot : ")
 	VPRINTX(R_TMP2)
 	str	r4, [R_TMP2, #(4*0)]
 	str	r5, [R_TMP2, #(4*1)]



Re: CVS commit: src/sys/arch/arm/arm

2013-03-09 Thread David Laight
On Sat, Mar 09, 2013 at 10:10:45AM +, Michael van Elst wrote:
 Module Name:  src
 Committed By: mlelstv
 Date: Sat Mar  9 10:10:45 UTC 2013
 
 Modified Files:
   src/sys/arch/arm/arm: disksubr_acorn.c
 
 Log Message:
 Errors are supposed to be negative errno numbers, not -1 which is interpreted
 as EPERM.

Hmmm... NetBSD usually uses +ve errno values.

David

-- 
David Laight: da...@l8s.co.uk


Re: CVS commit: src/sys/arch/arm/arm

2012-12-27 Thread Matt Thomas

On Dec 27, 2012, at 7:48 PM, SAITOH Masanobu wrote:

 Module Name:  src
 Committed By: msaitoh
 Date: Fri Dec 28 03:48:00 UTC 2012
 
 Modified Files:
   src/sys/arch/arm/arm: cpufunc.c
 
 Log Message:
 Enable DCache Streaming Switch and Write Allocate.
 This change improve system performance significantly.

How does this affect L2 and DMA?


Re: CVS commit: src/sys/arch/arm/arm

2012-12-27 Thread Masanobu SAITOH

Hi, matt.

(2012/12/28 14:10), Matt Thomas wrote:


On Dec 27, 2012, at 7:48 PM, SAITOH Masanobu wrote:


Module Name:src
Committed By:   msaitoh
Date:   Fri Dec 28 03:48:00 UTC 2012

Modified Files:
src/sys/arch/arm/arm: cpufunc.c

Log Message:
Enable DCache Streaming Switch and Write Allocate.
This change improve system performance significantly.


How does this affect L2 and DMA?


Both are not affected.

--
---
SAITOH Masanobu (msai...@execsw.org
 msai...@netbsd.org)


Re: CVS commit: src/sys/arch/arm/arm

2012-12-23 Thread David Laight
On Sun, Dec 23, 2012 at 01:26:21PM +, Matt Thomas wrote:
 Module Name:  src
 Committed By: matt
 Date: Sun Dec 23 13:26:21 UTC 2012
 
 Modified Files:
   src/sys/arch/arm/arm: cpu_in_cksum_fold.S
 
 Log Message:
 Conditional execution still takes one cycle per skipped instruction.
 branch to unlikely cases instead of conditionally skipping them.

Or more for 'ldm' and 'stm' - esp. I think on strongarm!

Conditional execution might also be a full pipeline stall, rather
than a branch which is likely (hopefully) to be predicted correctly.

David

-- 
David Laight: da...@l8s.co.uk


CVS commit: src/sys/arch/arm/arm

2010-01-02 Thread Masao Uebayashi
Module Name:src
Committed By:   uebayasi
Date:   Sun Jan  3 04:25:16 UTC 2010

Modified Files:
src/sys/arch/arm/arm: cpufunc_asm_arm10.S cpufunc_asm_arm11.S
cpufunc_asm_arm67.S cpufunc_asm_arm7tdmi.S cpufunc_asm_arm8.S
cpufunc_asm_arm9.S cpufunc_asm_sa1.S cpufunc_asm_xscale.S

Log Message:
s/These is/These are/


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/cpufunc_asm_arm10.S
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/cpufunc_asm_arm11.S \
src/sys/arch/arm/arm/cpufunc_asm_arm8.S
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/arm/cpufunc_asm_arm67.S \
src/sys/arch/arm/arm/cpufunc_asm_arm7tdmi.S
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/arm/cpufunc_asm_arm9.S
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/arm/cpufunc_asm_sa1.S
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/arm/cpufunc_asm_xscale.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.