CVS commit: src/sys/arch/sparc/dev

2024-04-24 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed Apr 24 11:49:58 UTC 2024

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
allow userland to switch to 16bit colour


To generate a diff of this commit:
cvs rdiff -u -r1.96 -r1.97 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.96 src/sys/arch/sparc/dev/cgfourteen.c:1.97
--- src/sys/arch/sparc/dev/cgfourteen.c:1.96	Wed Dec 20 05:33:18 2023
+++ src/sys/arch/sparc/dev/cgfourteen.c	Wed Apr 24 11:49:58 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.96 2023/12/20 05:33:18 thorpej Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.97 2024/04/24 11:49:58 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -1072,22 +1072,28 @@ cg14_set_depth(struct cgfourteen_softc *
 			CG14_MCTL, CG14_MCTL_ENABLEVID | 
 			CG14_MCTL_PIXMODE_8 | CG14_MCTL_POWERCTL);
 			sc->sc_depth = 8;
-			/* everything is CLUT1 */
-			for (i = 0; i < CG14_CLUT_SIZE; i++)
-			 sc->sc_xlut->xlut_lut[i] = 0;
+			break;
+		case 16:
+			bus_space_write_1(sc->sc_bustag, sc->sc_regh,
+			CG14_MCTL, CG14_MCTL_ENABLEVID | 
+			CG14_MCTL_PIXMODE_16 | CG14_MCTL_POWERCTL);
+			sc->sc_depth = 16;
 			break;
 		case 32:
 			bus_space_write_1(sc->sc_bustag, sc->sc_regh,
 			CG14_MCTL, CG14_MCTL_ENABLEVID | 
 			CG14_MCTL_PIXMODE_32 | CG14_MCTL_POWERCTL);
 			sc->sc_depth = 32;
-			for (i = 0; i < CG14_CLUT_SIZE; i++)
-			 sc->sc_xlut->xlut_lut[i] = 0;
 			break;
 		default:
 			printf("%s: can't change to depth %d\n",
 			device_xname(sc->sc_dev), depth);
+			return;
 	}
+	/* everything is CLUT1 */
+	for (i = 0; i < CG14_CLUT_SIZE; i++)
+	 sc->sc_xlut->xlut_lut[i] = 0;
+
 }
 
 static void
@@ -1432,7 +1438,7 @@ cg14_bitblt_gc(void *cookie, int xs, int
 
 	saddr = sc->sc_fb_paddr + xs + stride * ys;
 	daddr = sc->sc_fb_paddr + xd + stride * yd;
-
+		
 	if (saddr & 3) {
 		swi += saddr & 3;
 		dreg += saddr & 3;



CVS commit: src/sys/arch/sparc/dev

2024-04-24 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed Apr 24 11:49:58 UTC 2024

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
allow userland to switch to 16bit colour


To generate a diff of this commit:
cvs rdiff -u -r1.96 -r1.97 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2024-03-10 Thread Roland Illig
Module Name:src
Committed By:   rillig
Date:   Sun Mar 10 17:02:24 UTC 2024

Modified Files:
src/sys/arch/sparc/dev: sbusreg.h

Log Message:
sparc/sbusreg: fix snprintb format for SBUS_AFSR_BITS


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc/dev/sbusreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/sbusreg.h
diff -u src/sys/arch/sparc/dev/sbusreg.h:1.6 src/sys/arch/sparc/dev/sbusreg.h:1.7
--- src/sys/arch/sparc/dev/sbusreg.h:1.6	Wed Nov 16 00:49:03 2005
+++ src/sys/arch/sparc/dev/sbusreg.h	Sun Mar 10 17:02:24 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: sbusreg.h,v 1.6 2005/11/16 00:49:03 uwe Exp $ */
+/*	$NetBSD: sbusreg.h,v 1.7 2024/03/10 17:02:24 rillig Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -94,7 +94,7 @@ struct sbusreg {
 #define SBUS_AFSR_ERR	0x8000	/* Summary bit: one of LE,TO,BERR */
 #define SBUS_AFSR_BITS	"\177\020"	\
 			"f\0\4PAH\0b\10WM\0f\11\3SSIZ\0f\14\5SA\0"	\
-			"b\11FAV\0b\12RD\0b\13ME\0f\14\4MID\0b\30S\0"	\
+			"b\21FAV\0b\22RD\0b\23ME\0f\24\4MID\0b\30S\0"	\
 			"f\31\3SIZ\0b\34BERR\0b\35TO\0b\36LE\0b\37ERR\0"
 
 /* Arbiter Enable register */



CVS commit: src/sys/arch/sparc/dev

2024-03-10 Thread Roland Illig
Module Name:src
Committed By:   rillig
Date:   Sun Mar 10 17:02:24 UTC 2024

Modified Files:
src/sys/arch/sparc/dev: sbusreg.h

Log Message:
sparc/sbusreg: fix snprintb format for SBUS_AFSR_BITS


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc/dev/sbusreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2024-03-10 Thread Roland Illig
Module Name:src
Committed By:   rillig
Date:   Sun Mar 10 16:58:08 UTC 2024

Modified Files:
src/sys/arch/sparc/dev: vmereg.h

Log Message:
sparc/vmereg: fix snprintb format VMEBUS_AFSR_BITS


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/sparc/dev/vmereg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/vmereg.h
diff -u src/sys/arch/sparc/dev/vmereg.h:1.7 src/sys/arch/sparc/dev/vmereg.h:1.8
--- src/sys/arch/sparc/dev/vmereg.h:1.7	Mon Apr 28 20:23:36 2008
+++ src/sys/arch/sparc/dev/vmereg.h	Sun Mar 10 16:58:08 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: vmereg.h,v 1.7 2008/04/28 20:23:36 martin Exp $ */
+/*	$NetBSD: vmereg.h,v 1.8 2024/03/10 16:58:08 rillig Exp $ */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@ struct vmebusreg {
 #define VMEBUS_AFSR_ME	0x0080	/* Multiple error */
 #define VMEBUS_AFSR_RSVD 0x007f	/* reserved */
 #define VMEBUS_AFSR_BITS "\177\020"	\
-			 "b\27ME\0b\30S\0b\31ERR\0b\32WB\0\33TO\0f\34\3SZ\0"
+	"b\27ME\0b\30S\0b\31ERR\0b\32WB\0b\33BERR\0b\34TO\0f\35\3SZ\0"
 
 struct vmebusvec {
 	volatile uint8_t	vmebusvec[16];



CVS commit: src/sys/arch/sparc/dev

2024-03-10 Thread Roland Illig
Module Name:src
Committed By:   rillig
Date:   Sun Mar 10 16:58:08 UTC 2024

Modified Files:
src/sys/arch/sparc/dev: vmereg.h

Log Message:
sparc/vmereg: fix snprintb format VMEBUS_AFSR_BITS


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/sparc/dev/vmereg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2023-12-11 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Mon Dec 11 22:29:39 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: fd.c

Log Message:
Surround fdc declaration and definition with FD_DEBUG blocks.

FD_DEBUG is defined by default, thus build passes, however would fail otherwise
since it is only used in debug block.


To generate a diff of this commit:
cvs rdiff -u -r1.163 -r1.164 src/sys/arch/sparc/dev/fd.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/fd.c
diff -u src/sys/arch/sparc/dev/fd.c:1.163 src/sys/arch/sparc/dev/fd.c:1.164
--- src/sys/arch/sparc/dev/fd.c:1.163	Sat Aug  7 16:19:05 2021
+++ src/sys/arch/sparc/dev/fd.c	Mon Dec 11 22:29:39 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: fd.c,v 1.163 2021/08/07 16:19:05 thorpej Exp $	*/
+/*	$NetBSD: fd.c,v 1.164 2023/12/11 22:29:39 andvar Exp $	*/
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -101,7 +101,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.163 2021/08/07 16:19:05 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.164 2023/12/11 22:29:39 andvar Exp $");
 
 #include "opt_ddb.h"
 #include "opt_md.h"
@@ -1948,7 +1948,9 @@ int
 fdioctl(dev_t dev, u_long cmd, void *addr, int flag, struct lwp *l)
 {
 	struct fd_softc *fd;
+#ifdef FD_DEBUG
 	struct fdc_softc *fdc;
+#endif
 	struct fdformat_parms *form_parms;
 	struct fdformat_cmd *form_cmd;
 	struct ne7_fd_formb *fd_formb;
@@ -1962,7 +1964,9 @@ fdioctl(dev_t dev, u_long cmd, void *add
 		return (ENXIO);
 
 	fd = device_lookup_private(_cd, FDUNIT(dev));
+#ifdef FD_DEBUG
 	fdc = device_private(device_parent(fd->sc_dv));
+#endif
 
 	switch (cmd) {
 	case DIOCGDINFO:



CVS commit: src/sys/arch/sparc/dev

2023-12-11 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Mon Dec 11 22:29:39 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: fd.c

Log Message:
Surround fdc declaration and definition with FD_DEBUG blocks.

FD_DEBUG is defined by default, thus build passes, however would fail otherwise
since it is only used in debug block.


To generate a diff of this commit:
cvs rdiff -u -r1.163 -r1.164 src/sys/arch/sparc/dev/fd.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2023-06-13 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Tue Jun 13 10:11:17 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
- use sx_wait() to avoid stalling the MBus
- request 32bit alignment for glyphcache cells


To generate a diff of this commit:
cvs rdiff -u -r1.94 -r1.95 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2023-06-13 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Tue Jun 13 10:11:17 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
- use sx_wait() to avoid stalling the MBus
- request 32bit alignment for glyphcache cells


To generate a diff of this commit:
cvs rdiff -u -r1.94 -r1.95 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.94 src/sys/arch/sparc/dev/cgfourteen.c:1.95
--- src/sys/arch/sparc/dev/cgfourteen.c:1.94	Tue May 23 10:20:12 2023
+++ src/sys/arch/sparc/dev/cgfourteen.c	Tue Jun 13 10:11:17 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.94 2023/05/23 10:20:12 macallan Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.95 2023/06/13 10:11:17 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -173,7 +173,9 @@ static void cg14_eraserows(void *, int, 
  * issue ALU instruction:
  * sxi(OPCODE, srcA, srcB, dest, count)
  */
-#define sxi(inst, a, b, d, cnt) sx_write(sc->sc_sx, SX_INSTRUCTIONS, inst((a), (b), (d), (cnt)))
+#define sxi(inst, a, b, d, cnt) \
+	sx_wait(sc->sc_sx); \
+	sx_write(sc->sc_sx, SX_INSTRUCTIONS, inst((a), (b), (d), (cnt)))
 
 /*
  * issue memory referencing instruction:
@@ -770,13 +772,13 @@ cg14_setup_wsdisplay(struct cgfourteen_s
 		sc->sc_defaultscreen_descr.capabilities = ri->ri_caps;
 		sc->sc_defaultscreen_descr.nrows = ri->ri_rows;
 		sc->sc_defaultscreen_descr.ncols = ri->ri_cols;
-		glyphcache_init(>sc_gc, sc->sc_fb.fb_type.fb_height + 5,
+		glyphcache_init_align(>sc_gc, sc->sc_fb.fb_type.fb_height + 5,
 			(sc->sc_vramsize / sc->sc_fb.fb_type.fb_width) - 
 			 sc->sc_fb.fb_type.fb_height - 5,
 			sc->sc_fb.fb_type.fb_width,
 			ri->ri_font->fontwidth,
 			ri->ri_font->fontheight,
-			defattr);
+			defattr, 4);
 	if (is_cons) {
 		wsdisplay_cnattach(>sc_defaultscreen_descr, ri, 0, 0,
 		defattr);



CVS commit: src/sys/arch/sparc/dev

2023-06-13 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Tue Jun 13 10:09:32 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: sx.c sxvar.h

Log Message:
add counter to periodically drain the instruction queue in order to avoid
stalling the MBus during long SX operations
adapted from xf86-video-suncg14


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc/dev/sx.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/sparc/dev/sxvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/sx.c
diff -u src/sys/arch/sparc/dev/sx.c:1.6 src/sys/arch/sparc/dev/sx.c:1.7
--- src/sys/arch/sparc/dev/sx.c:1.6	Thu Apr 13 13:07:48 2023
+++ src/sys/arch/sparc/dev/sx.c	Tue Jun 13 10:09:31 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: sx.c,v 1.6 2023/04/13 13:07:48 macallan Exp $	*/
+/*	$NetBSD: sx.c,v 1.7 2023/06/13 10:09:31 macallan Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.6 2023/04/13 13:07:48 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.7 2023/06/13 10:09:31 macallan Exp $");
 
 #include "locators.h"
 
@@ -84,6 +84,7 @@ sx_attach(device_t parent, device_t self
 	sc->sc_dev = self;
 	sc->sc_tag = ma->ma_bustag;
 	sc->sc_uregs = ma->ma_paddr + 0x1000;
+	sc->sc_cnt = 0;
 
 	if (bus_space_map(sc->sc_tag, ma->ma_paddr, 0x1000, 0, >sc_regh)) {
 		aprint_error_dev(self, "failed to map registers\n");

Index: src/sys/arch/sparc/dev/sxvar.h
diff -u src/sys/arch/sparc/dev/sxvar.h:1.4 src/sys/arch/sparc/dev/sxvar.h:1.5
--- src/sys/arch/sparc/dev/sxvar.h:1.4	Fri Mar  1 02:30:42 2019
+++ src/sys/arch/sparc/dev/sxvar.h	Tue Jun 13 10:09:31 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: sxvar.h,v 1.4 2019/03/01 02:30:42 macallan Exp $	*/
+/*	$NetBSD: sxvar.h,v 1.5 2023/06/13 10:09:31 macallan Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -32,11 +32,14 @@
 #ifndef SXVAR_H
 #define SXVAR_H
 
+#include 
+
 struct sx_softc {
 	device_t		sc_dev;
 	bus_addr_t		sc_uregs;
 	bus_space_tag_t		sc_tag;
 	bus_space_handle_t	sc_regh;
+	int			sc_cnt;
 };
 
 static inline void
@@ -51,6 +54,26 @@ sx_read(struct sx_softc *sc, int addr)
 	return bus_space_read_4(sc->sc_tag, sc->sc_regh, addr);
 }
 
+/*
+ * to be used before issuing SX instructions
+ * this will periodically allow the instruction queue to drain in order
+ * to avoid excessive MBus relinquish & retry cycles during long SX ops
+ * which may cause us to lose interrupts
+ */
+static inline void
+sx_wait(struct sx_softc *sc)
+{
+	uint32_t reg;
+	if (sc->sc_cnt > 6) {
+		do {
+			reg = bus_space_read_4(sc->sc_tag, sc->sc_regh,
+		 SX_CONTROL_STATUS);
+		} while ((reg & SX_MT) == 0);
+		sc->sc_cnt = 0;
+	} else
+		sc->sc_cnt++;
+}
+
 void sx_dump(void);
 
 #endif



CVS commit: src/sys/arch/sparc/dev

2023-06-13 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Tue Jun 13 10:09:32 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: sx.c sxvar.h

Log Message:
add counter to periodically drain the instruction queue in order to avoid
stalling the MBus during long SX operations
adapted from xf86-video-suncg14


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc/dev/sx.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/sparc/dev/sxvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2023-05-23 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Tue May 23 10:20:12 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
use macros compatible with xf86-video-suncg14 to issue SX instructions
much more readable, alignment weirdness is handled automatically and code is
interchangable


To generate a diff of this commit:
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.93 src/sys/arch/sparc/dev/cgfourteen.c:1.94
--- src/sys/arch/sparc/dev/cgfourteen.c:1.93	Wed May 25 21:01:04 2022
+++ src/sys/arch/sparc/dev/cgfourteen.c	Tue May 23 10:20:12 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.93 2022/05/25 21:01:04 macallan Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.94 2023/05/23 10:20:12 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -168,6 +168,19 @@ static void cg14_copycols(void *, int, i
 static void cg14_erasecols(void *, int, int, int, long);
 static void cg14_copyrows(void *, int, int, int);
 static void cg14_eraserows(void *, int, int, long);
+
+/* 
+ * issue ALU instruction:
+ * sxi(OPCODE, srcA, srcB, dest, count)
+ */
+#define sxi(inst, a, b, d, cnt) sx_write(sc->sc_sx, SX_INSTRUCTIONS, inst((a), (b), (d), (cnt)))
+
+/*
+ * issue memory referencing instruction:
+ * sxm(OPCODE, address, start register, count)
+ */
+#define sxm(inst, addr, reg, count) sta((addr) & ~7, ASI_SX, inst((reg), (count), (addr) & 7))
+
 #endif /* NSX > 0 */
 
 #endif
@@ -358,7 +371,7 @@ cgfourteenattach(device_t parent, device
 		sc->sc_fbaddr, 0, 0, 0) & 0xf000;
 		aprint_normal_dev(sc->sc_dev, "using %s\n", 
 		device_xname(sc->sc_sx->sc_dev));
-		aprint_debug_dev(sc->sc_dev, "fb paddr: %08x\n",
+		aprint_normal_dev(sc->sc_dev, "fb paddr: %08x\n",
 		sc->sc_fb_paddr);
 		sx_write(sc->sc_sx, SX_PAGE_BOUND_LOWER, sc->sc_fb_paddr);
 		sx_write(sc->sc_sx, SX_PAGE_BOUND_UPPER,
@@ -379,7 +392,7 @@ cgfourteenattach(device_t parent, device
  * the last close. This kind of nonsense is needed to give screenblank
  * a fighting chance of working.
  */
-
+ 
 int
 cgfourteenopen(dev_t dev, int flags, int mode, struct lwp *l)
 {
@@ -567,8 +580,9 @@ cgfourteenmmap(dev_t dev, off_t off, int
 			0, prot, BUS_SPACE_MAP_LINEAR));
 	} else if (off >= CG14_SXIO_VOFF &&
 		   off < (CG14_SXIO_VOFF + 0x03ff)) {
+		off -= CG14_SXIO_VOFF;
 		return (bus_space_mmap(sc->sc_sx->sc_tag, 0x8LL,
-			sc->sc_fb_paddr + (off - CG14_SXIO_VOFF),
+			sc->sc_fb_paddr + off,
 			prot, BUS_SPACE_MAP_LINEAR));
 #endif
 	} else
@@ -1204,20 +1218,20 @@ cg14_rectfill(struct cgfourteen_softc *s
 		pptr = addr;
 		cnt = wi;
 		if (pre) {
-			sta(pptr & ~7, ASI_SX, SX_STBS(8, pre - 1, pptr & 7));
+			sxm(SX_STBS, pptr, 8, pre - 1);
 			pptr += pre;
 			cnt -= pre;
 		}
 		/* now do the aligned pixels in 32bit chunks */
 		while(cnt > 3) {
 			words = uimin(32, cnt >> 2);
-			sta(pptr & ~7, ASI_SX, SX_STS(8, words - 1, pptr & 7));
+			sxm(SX_STS, pptr, 8, words - 1);
 			pptr += words << 2;
 			cnt -= words << 2;
 		}
 		/* do any remaining pixels byte-wise again */
 		if (cnt > 0)
-			sta(pptr & ~7, ASI_SX, SX_STBS(8, cnt - 1, pptr & 7));
+			sxm(SX_STBS, pptr, 8, cnt - 1);
 		addr += stride;
 	}
 }
@@ -1275,28 +1289,25 @@ cg14_invert(struct cgfourteen_softc *sc,
 	for (line = 0; line < he; line++) {
 		pptr = addr;
 		/* load a whole scanline */
-		sta(pptr & ~7, ASI_SX, SX_LD(8, words - 1, pptr & 7));
+		sxm(SX_LD, pptr, 8, words - 1);
 		reg = 8;
 		if (pre) {
 			cg14_set_mask(sc, lmask);
-			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
-			SX_ROPB(8, 8, 40, 0));
+			sxi(SX_ROPB, 8, 8, 40, 0);
 			reg++;
 		}
 		if (cnt > 0) {
 			cg14_set_mask(sc, 0x);
 			/* XXX handle cnt > 16 */
-			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
-			SX_ROP(reg, reg, reg + 32, cnt - 1));
+			sxi(SX_ROP, reg, reg, reg + 32, cnt - 1);
 			reg += cnt;
 		}
 		if (post) {
 			cg14_set_mask(sc, rmask);
-			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
-			SX_ROPB(reg, 7, reg + 32, 0));
+			sxi(SX_ROPB, reg, 7, reg + 32, 0);
 			reg++;
 		}
-		sta(pptr & ~7, ASI_SX, SX_ST(40, words - 1, pptr & 7));		
+		sxm(SX_ST, pptr, 40, words - 1);		
 		addr += stride;
 	}
 }
@@ -1307,7 +1318,7 @@ cg14_slurp(int reg, uint32_t addr, int c
 	int num;
 	while (cnt > 0) {
 		num = uimin(32, cnt);
-		sta(addr & ~7, ASI_SX, SX_LD(reg, num - 1, addr & 7));
+		sxm(SX_LD, addr, reg, num - 1);
 		cnt -= num;
 		reg += num;
 		addr += (num << 2);
@@ -1320,7 +1331,7 @@ cg14_spit(int reg, uint32_t addr, int cn
 	int num;
 	while (cnt > 0) {
 		num = uimin(32, cnt);
-		sta(addr & ~7, ASI_SX, SX_ST(reg, num - 1, addr & 7));
+		sxm(SX_ST, addr, reg, num - 1);
 		cnt -= num;
 		reg += num;
 		addr += (num << 2);
@@ -1355,10 +1366,8 @@ cg14_bitblt(void *cookie, int xs, int ys
 			dptr = daddr;
 			cnt = wi;
 			if (pre > 

CVS commit: src/sys/arch/sparc/dev

2023-05-23 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Tue May 23 10:20:12 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
use macros compatible with xf86-video-suncg14 to issue SX instructions
much more readable, alignment weirdness is handled automatically and code is
interchangable


To generate a diff of this commit:
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2023-04-13 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Thu Apr 13 13:07:48 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: sx.c

Log Message:
initialize the diagnostic register with the value suggested by the SunOS
header. This sets a bunch of undocumented bits and yields a 10% speed increase
when rendering antialiased text.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/sparc/dev/sx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/sx.c
diff -u src/sys/arch/sparc/dev/sx.c:1.5 src/sys/arch/sparc/dev/sx.c:1.6
--- src/sys/arch/sparc/dev/sx.c:1.5	Sat Sep 11 20:28:05 2021
+++ src/sys/arch/sparc/dev/sx.c	Thu Apr 13 13:07:48 2023
@@ -1,4 +1,4 @@
-/*	$NetBSD: sx.c,v 1.5 2021/09/11 20:28:05 andvar Exp $	*/
+/*	$NetBSD: sx.c,v 1.6 2023/04/13 13:07:48 macallan Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.5 2021/09/11 20:28:05 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.6 2023/04/13 13:07:48 macallan Exp $");
 
 #include "locators.h"
 
@@ -104,7 +104,7 @@ sx_attach(device_t parent, device_t self
 	sx_write(sc, SX_PAGE_BOUND_LOWER, 0xfc00);
 	/* cg14 takes up the whole 64MB chunk */
 	sx_write(sc, SX_PAGE_BOUND_UPPER, 0x);
-	sx_write(sc, SX_DIAGNOSTICS, 0);
+	sx_write(sc, SX_DIAGNOSTICS, SX_DIAG_INIT);
 	sx_write(sc, SX_PLANEMASK, 0x);
 
 	/*



CVS commit: src/sys/arch/sparc/dev

2023-04-13 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Thu Apr 13 13:07:48 UTC 2023

Modified Files:
src/sys/arch/sparc/dev: sx.c

Log Message:
initialize the diagnostic register with the value suggested by the SunOS
header. This sets a bunch of undocumented bits and yields a 10% speed increase
when rendering antialiased text.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/sparc/dev/sx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2022-05-25 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed May 25 21:01:04 UTC 2022

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
be lazy about clearing the cursor since most likely we're going to overwrite
it anyway. Same logic as in cgsix.


To generate a diff of this commit:
cvs rdiff -u -r1.92 -r1.93 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.92 src/sys/arch/sparc/dev/cgfourteen.c:1.93
--- src/sys/arch/sparc/dev/cgfourteen.c:1.92	Fri Dec 17 19:27:57 2021
+++ src/sys/arch/sparc/dev/cgfourteen.c	Wed May 25 21:01:04 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.92 2021/12/17 19:27:57 macallan Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.93 2022/05/25 21:01:04 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -1485,6 +1485,10 @@ cg14_putchar(void *cookie, int row, int 
 	if (!CHAR_IN_FONT(c, font))
 		return;
 
+	if (row == ri->ri_crow && col == ri->ri_ccol) {
+		ri->ri_flg &= ~RI_CURSOR;
+	}
+
 	wi = font->fontwidth;
 	he = font->fontheight;
 
@@ -1538,6 +1542,23 @@ cg14_putchar(void *cookie, int row, int 
 }
 
 static void
+cg14_nuke_cursor(struct rasops_info *ri)
+{
+	struct vcons_screen *scr = ri->ri_hw;
+	struct cgfourteen_softc *sc = scr->scr_cookie;
+	int wi, he, x, y;
+		
+	if (ri->ri_flg & RI_CURSOR) {
+		wi = ri->ri_font->fontwidth;
+		he = ri->ri_font->fontheight;
+		x = ri->ri_ccol * wi + ri->ri_xorigin;
+		y = ri->ri_crow * he + ri->ri_yorigin;
+		cg14_invert(sc, x, y, wi, he);
+		ri->ri_flg &= ~RI_CURSOR;
+	}
+}
+
+static void
 cg14_cursor(void *cookie, int on, int row, int col)
 {
 	struct rasops_info *ri = cookie;
@@ -1549,20 +1570,17 @@ cg14_cursor(void *cookie, int on, int ro
 	he = ri->ri_font->fontheight;
 	
 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
-		x = ri->ri_ccol * wi + ri->ri_xorigin;
-		y = ri->ri_crow * he + ri->ri_yorigin;
-		if (ri->ri_flg & RI_CURSOR) {
-			cg14_invert(sc, x, y, wi, he);
-			ri->ri_flg &= ~RI_CURSOR;
-		}
-		ri->ri_crow = row;
-		ri->ri_ccol = col;
 		if (on) {
-			x = ri->ri_ccol * wi + ri->ri_xorigin;
-			y = ri->ri_crow * he + ri->ri_yorigin;
+			if (ri->ri_flg & RI_CURSOR) {
+cg14_nuke_cursor(ri);
+			}
+			x = col * wi + ri->ri_xorigin;
+			y = row * he + ri->ri_yorigin;
 			cg14_invert(sc, x, y, wi, he);
 			ri->ri_flg |= RI_CURSOR;
 		}
+		ri->ri_crow = row;
+		ri->ri_ccol = col;
 	} else {
 		scr->scr_ri.ri_crow = row;
 		scr->scr_ri.ri_ccol = col;
@@ -1590,6 +1608,10 @@ cg14_putchar_aa(void *cookie, int row, i
 	if (!CHAR_IN_FONT(c, font))
 		return;
 
+	if (row == ri->ri_crow && col == ri->ri_ccol) {
+		ri->ri_flg &= ~RI_CURSOR;
+	}
+
 	wi = font->fontwidth;
 	he = font->fontheight;
 
@@ -1692,12 +1714,20 @@ cg14_copycols(void *cookie, int row, int
 	int32_t xs, xd, y, width, height;
 	
 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
+		if (ri->ri_crow == row && 
+		   (ri->ri_ccol >= srccol && ri->ri_ccol < (srccol + ncols)) &&
+		   (ri->ri_flg & RI_CURSOR)) {
+			cg14_nuke_cursor(ri);
+		}
 		xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol;
 		xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol;
 		y = ri->ri_yorigin + ri->ri_font->fontheight * row;
 		width = ri->ri_font->fontwidth * ncols;
 		height = ri->ri_font->fontheight;
 		cg14_bitblt(sc, xs, y, xd, y, width, height, 0x0c);
+		if (ri->ri_crow == row && 
+		   (ri->ri_ccol >= dstcol && ri->ri_ccol < (dstcol + ncols)))
+			ri->ri_flg &= ~RI_CURSOR;
 	}
 }
 
@@ -1715,8 +1745,11 @@ cg14_erasecols(void *cookie, int row, in
 		width = ri->ri_font->fontwidth * ncols;
 		height = ri->ri_font->fontheight;
 		rasops_unpack_attr(fillattr, , , );
-
 		cg14_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]);
+		if (ri->ri_crow == row && 
+		   (ri->ri_ccol >= startcol && ri->ri_ccol < (startcol + ncols)))
+			ri->ri_flg &= ~RI_CURSOR;
+
 	}
 }
 
@@ -1729,12 +1762,18 @@ cg14_copyrows(void *cookie, int srcrow, 
 	int32_t x, ys, yd, width, height;
 
 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
+		if ((ri->ri_crow >= srcrow && ri->ri_crow < (srcrow + nrows)) &&
+		   (ri->ri_flg & RI_CURSOR)) {
+			cg14_nuke_cursor(ri);
+		}
 		x = ri->ri_xorigin;
 		ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow;
 		yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow;
 		width = ri->ri_emuwidth;
 		height = ri->ri_font->fontheight * nrows;
 		cg14_bitblt(sc, x, ys, x, yd, width, height, 0x0c);
+		if (ri->ri_crow >= dstrow && ri->ri_crow < (dstrow + nrows))
+			ri->ri_flg &= ~RI_CURSOR;
 	}
 }
 
@@ -1752,8 +1791,9 @@ cg14_eraserows(void *cookie, int row, in
 		width = ri->ri_emuwidth;
 		height = ri->ri_font->fontheight * nrows;
 		rasops_unpack_attr(fillattr, , , );
-
 		cg14_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]);
+		if (ri->ri_crow >= row && ri->ri_crow < (row + nrows))
+			ri->ri_flg &= ~RI_CURSOR;
 	}
 }
 



CVS commit: src/sys/arch/sparc/dev

2022-05-25 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed May 25 21:01:04 UTC 2022

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
be lazy about clearing the cursor since most likely we're going to overwrite
it anyway. Same logic as in cgsix.


To generate a diff of this commit:
cvs rdiff -u -r1.92 -r1.93 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2022-01-21 Thread Jason R Thorpe
Module Name:src
Committed By:   thorpej
Date:   Fri Jan 21 19:22:56 UTC 2022

Modified Files:
src/sys/arch/sparc/dev: vme_machdep.c

Log Message:
Don't bother with prom_node_to_devhandle() if we're just forwarding along
our own node; use device_handle(self) instead.


To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/sparc/dev/vme_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2022-01-21 Thread Jason R Thorpe
Module Name:src
Committed By:   thorpej
Date:   Fri Jan 21 19:22:56 UTC 2022

Modified Files:
src/sys/arch/sparc/dev: vme_machdep.c

Log Message:
Don't bother with prom_node_to_devhandle() if we're just forwarding along
our own node; use device_handle(self) instead.


To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/sparc/dev/vme_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/vme_machdep.c
diff -u src/sys/arch/sparc/dev/vme_machdep.c:1.75 src/sys/arch/sparc/dev/vme_machdep.c:1.76
--- src/sys/arch/sparc/dev/vme_machdep.c:1.75	Sun Dec  5 04:21:31 2021
+++ src/sys/arch/sparc/dev/vme_machdep.c	Fri Jan 21 19:22:56 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: vme_machdep.c,v 1.75 2021/12/05 04:21:31 msaitoh Exp $	*/
+/*	$NetBSD: vme_machdep.c,v 1.76 2022/01/21 19:22:56 thorpej Exp $	*/
 
 /*-
  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: vme_machdep.c,v 1.75 2021/12/05 04:21:31 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vme_machdep.c,v 1.76 2022/01/21 19:22:56 thorpej Exp $");
 
 #include 
 #include 
@@ -432,7 +432,7 @@ vmeattach_iommu(device_t parent, device_
 	   sc->sc_reg->vmebus_cr & VMEBUS_CR_IMPL);
 
 	(void)config_found(self, , 0,
-	CFARGS(.devhandle = prom_node_to_devhandle(node)));
+	CFARGS(.devhandle = device_handle(self)));
 #endif /* SUN4M */
 }
 



CVS commit: src/sys/arch/sparc/dev

2021-12-17 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Fri Dec 17 19:27:57 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c cgfourteenvar.h

Log Message:
only write the mask register if we're actually changing it


To generate a diff of this commit:
cvs rdiff -u -r1.91 -r1.92 src/sys/arch/sparc/dev/cgfourteen.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/sparc/dev/cgfourteenvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2021-12-17 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Fri Dec 17 19:27:57 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c cgfourteenvar.h

Log Message:
only write the mask register if we're actually changing it


To generate a diff of this commit:
cvs rdiff -u -r1.91 -r1.92 src/sys/arch/sparc/dev/cgfourteen.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/sparc/dev/cgfourteenvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.91 src/sys/arch/sparc/dev/cgfourteen.c:1.92
--- src/sys/arch/sparc/dev/cgfourteen.c:1.91	Fri Dec 17 18:51:02 2021
+++ src/sys/arch/sparc/dev/cgfourteen.c	Fri Dec 17 19:27:57 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.91 2021/12/17 18:51:02 macallan Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.92 2021/12/17 19:27:57 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -1042,6 +1042,12 @@ cg14_set_depth(struct cgfourteen_softc *
 {
 	int i;
 
+	/* init mask */
+	if (sc->sc_sx != NULL) {
+		sc->sc_mask = 0x;
+		sx_write(sc->sc_sx, SX_QUEUED(R_MASK), sc->sc_mask);
+	}
+
 	if (sc->sc_depth == depth)
 		return;
 
@@ -1226,6 +1232,13 @@ cg14_rectfill_a(void *cookie, int dstx, 
 	sc->sc_vd.active->scr_ri.ri_devcmap[(attr >> 24 & 0xf)]);
 }
 
+static inline void
+cg14_set_mask(struct cgfourteen_softc *sc, uint32_t mask)
+{
+	if (mask == sc->sc_mask) return;
+	sc->sc_mask = mask;
+	sx_write(sc->sc_sx, SX_QUEUED(R_MASK), mask);
+}
 /*
  * invert a rectangle, used only to (un)draw the cursor.
  * - does a scanline at a time
@@ -1258,27 +1271,27 @@ cg14_invert(struct cgfourteen_softc *sc,
 	}
 	words = (wi + pre + 3) >> 2;
 	cnt = words - pwrds;
-	sx_write(sc->sc_sx, SX_QUEUED(7), 0xe0e0e0e0); /* four red pixels */
+
 	for (line = 0; line < he; line++) {
 		pptr = addr;
 		/* load a whole scanline */
 		sta(pptr & ~7, ASI_SX, SX_LD(8, words - 1, pptr & 7));
 		reg = 8;
 		if (pre) {
-			sx_write(sc->sc_sx, SX_QUEUED(R_MASK), lmask);
+			cg14_set_mask(sc, lmask);
 			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
 			SX_ROPB(8, 8, 40, 0));
 			reg++;
 		}
 		if (cnt > 0) {
-			sx_write(sc->sc_sx, SX_QUEUED(R_MASK), 0x);
+			cg14_set_mask(sc, 0x);
 			/* XXX handle cnt > 16 */
 			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
 			SX_ROP(reg, reg, reg + 32, cnt - 1));
 			reg += cnt;
 		}
 		if (post) {
-			sx_write(sc->sc_sx, SX_QUEUED(R_MASK), rmask);
+			cg14_set_mask(sc, rmask);
 			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
 			SX_ROPB(reg, 7, reg + 32, 0));
 			reg++;
@@ -1500,8 +1513,7 @@ cg14_putchar(void *cookie, int row, int 
 			uint32_t reg;
 			for (i = 0; i < he; i++) {
 reg = *data8;
-sx_write(sc->sc_sx, SX_QUEUED(R_MASK),
-reg << 24);
+cg14_set_mask(sc, reg << 24);
 sta(addr & ~7, ASI_SX, SX_STBS(8, wi - 1, addr & 7));
 data8++;
 addr += stride;
@@ -1513,8 +1525,7 @@ cg14_putchar(void *cookie, int row, int 
 			uint32_t reg;
 			for (i = 0; i < he; i++) {
 reg = *data16;
-sx_write(sc->sc_sx, SX_QUEUED(R_MASK),
-reg << 16);
+cg14_set_mask(sc, reg << 16);
 sta(addr & ~7, ASI_SX, SX_STBS(8, wi - 1, addr & 7));
 data16++;
 addr += stride;

Index: src/sys/arch/sparc/dev/cgfourteenvar.h
diff -u src/sys/arch/sparc/dev/cgfourteenvar.h:1.18 src/sys/arch/sparc/dev/cgfourteenvar.h:1.19
--- src/sys/arch/sparc/dev/cgfourteenvar.h:1.18	Sat Apr 30 05:23:03 2016
+++ src/sys/arch/sparc/dev/cgfourteenvar.h	Fri Dec 17 19:27:57 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteenvar.h,v 1.18 2016/04/30 05:23:03 macallan Exp $ */
+/*	$NetBSD: cgfourteenvar.h,v 1.19 2021/12/17 19:27:57 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -98,6 +98,7 @@ struct cgfourteen_softc {
 #if NSX > 0
 	struct sx_softc *sc_sx;
 	uint32_t sc_fb_paddr;
+	uint32_t sc_mask;
 	glyphcache sc_gc;
 #endif /* NSX > 0 */
 #endif



CVS commit: src/sys/arch/sparc/dev

2021-12-17 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Fri Dec 17 18:51:02 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
cg14_invert():
- use only 32bit accesses
- use byte mask / ROPs for partial writes


To generate a diff of this commit:
cvs rdiff -u -r1.90 -r1.91 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.90 src/sys/arch/sparc/dev/cgfourteen.c:1.91
--- src/sys/arch/sparc/dev/cgfourteen.c:1.90	Sat Aug  7 16:19:05 2021
+++ src/sys/arch/sparc/dev/cgfourteen.c	Fri Dec 17 18:51:02 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.90 2021/08/07 16:19:05 thorpej Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.91 2021/12/17 18:51:02 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -1226,50 +1226,64 @@ cg14_rectfill_a(void *cookie, int dstx, 
 	sc->sc_vd.active->scr_ri.ri_devcmap[(attr >> 24 & 0xf)]);
 }
 
+/*
+ * invert a rectangle, used only to (un)draw the cursor.
+ * - does a scanline at a time
+ * - does not handle wi > 64 or wi < 4, not that we need it for our fonts
+ * - uses all 32bit accesses
+ */ 
 static void
 cg14_invert(struct cgfourteen_softc *sc, int x, int y, int wi, int he)
 {
-	uint32_t addr, pptr;
-	int line, cnt, pre, words;
+	uint32_t addr, pptr, lmask, rmask;
+	int line, cnt, pre, words, pwrds = 0, post, reg;
 	int stride = sc->sc_fb.fb_type.fb_width;
 
-	addr = sc->sc_fb_paddr + x + stride * y;
-	sx_write(sc->sc_sx, SX_ROP_CONTROL, 0x33); /* ~src a */
+	addr = (sc->sc_fb_paddr + x + stride * y) & ~3;
+	sx_write(sc->sc_sx, SX_ROP_CONTROL, 0x3C); /* ~src a / src a */
 	/*
-	 * Calculate the number of pixels we need to do one by one
-	 * until we're 32bit aligned, then do the rest in 32bit
-	 * mode. Assumes that stride is always a multiple of 4. 
-	 */ 
-	/* TODO: use 32bit writes with byte mask instead */
-	pre = addr & 3;
-	if (pre != 0) pre = 4 - pre;
+	 * Calculate the number of pixels we need to mask on each end of the
+	 * scanline and how many we can do without mask, if any
+	 */
+	pre = x & 3;
+	if (pre != 0) {
+		lmask = 0x >> pre;
+		pre = 4 - pre;
+		pwrds++;
+	}
+	post = (x + wi) & 3;
+	if (post != 0) {
+		rmask = ~(0x >> post);
+		pwrds++;
+	}
+	words = (wi + pre + 3) >> 2;
+	cnt = words - pwrds;
+	sx_write(sc->sc_sx, SX_QUEUED(7), 0xe0e0e0e0); /* four red pixels */
 	for (line = 0; line < he; line++) {
 		pptr = addr;
-		cnt = wi;
+		/* load a whole scanline */
+		sta(pptr & ~7, ASI_SX, SX_LD(8, words - 1, pptr & 7));
+		reg = 8;
 		if (pre) {
-			sta(pptr & ~7, ASI_SX, SX_LDB(8, pre - 1, pptr & 7));
+			sx_write(sc->sc_sx, SX_QUEUED(R_MASK), lmask);
 			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
-			SX_ROP(8, 8, 32, pre - 1));
-			sta(pptr & ~7, ASI_SX, SX_STB(32, pre - 1, pptr & 7));
-			pptr += pre;
-			cnt -= pre;
+			SX_ROPB(8, 8, 40, 0));
+			reg++;
 		}
-		/* now do the aligned pixels in 32bit chunks */
-		while(cnt > 15) {
-			words = uimin(16, cnt >> 2);
-			sta(pptr & ~7, ASI_SX, SX_LD(8, words - 1, pptr & 7));
+		if (cnt > 0) {
+			sx_write(sc->sc_sx, SX_QUEUED(R_MASK), 0x);
+			/* XXX handle cnt > 16 */
 			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
-			SX_ROP(8, 8, 32, words - 1));
-			sta(pptr & ~7, ASI_SX, SX_ST(32, words - 1, pptr & 7));
-			pptr += words << 2;
-			cnt -= words << 2;
+			SX_ROP(reg, reg, reg + 32, cnt - 1));
+			reg += cnt;
 		}
-		/* do any remaining pixels byte-wise again */
-		if (cnt > 0)
-			sta(pptr & ~7, ASI_SX, SX_LDB(8, cnt - 1, pptr & 7));
+		if (post) {
+			sx_write(sc->sc_sx, SX_QUEUED(R_MASK), rmask);
 			sx_write(sc->sc_sx, SX_INSTRUCTIONS,
-			SX_ROP(8, 8, 32, cnt - 1));
-			sta(pptr & ~7, ASI_SX, SX_STB(32, cnt - 1, pptr & 7));
+			SX_ROPB(reg, 7, reg + 32, 0));
+			reg++;
+		}
+		sta(pptr & ~7, ASI_SX, SX_ST(40, words - 1, pptr & 7));		
 		addr += stride;
 	}
 }



CVS commit: src/sys/arch/sparc/dev

2021-12-17 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Fri Dec 17 18:51:02 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
cg14_invert():
- use only 32bit accesses
- use byte mask / ROPs for partial writes


To generate a diff of this commit:
cvs rdiff -u -r1.90 -r1.91 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2021-12-08 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed Dec  8 17:03:38 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: sxreg.h

Log Message:
be more consistent with underscores in instruction names


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/sparc/dev/sxreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/sxreg.h
diff -u src/sys/arch/sparc/dev/sxreg.h:1.19 src/sys/arch/sparc/dev/sxreg.h:1.20
--- src/sys/arch/sparc/dev/sxreg.h:1.19	Wed Dec  8 16:40:14 2021
+++ src/sys/arch/sparc/dev/sxreg.h	Wed Dec  8 17:03:38 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: sxreg.h,v 1.19 2021/12/08 16:40:14 macallan Exp $	*/
+/*	$NetBSD: sxreg.h,v 1.20 2021/12/08 17:03:38 macallan Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -253,18 +253,18 @@
 SX_UCHAN_24 | (sreg << 7) | (o))
 
 /* ROP and SELECT instructions */
-#define SX_ROPB	(0x0 << 21)	/* mask bits apply to bytes */
-#define SX_ROPM	(0x1 << 21)	/* mask bits apply to each bit */
-#define SX_ROPL	(0x2 << 21)	/* mask bits apply per register */
-#define SX_SELB	(0x4 << 21)	/* byte select scalar */
-#define SX_SELV (0x6 << 21)	/* register select vector */
-#define SX_SELS (0x7 << 21)	/* register select scalar */
+#define SX_ROP_B	(0x0 << 21)	/* mask bits apply to bytes */
+#define SX_ROP_M	(0x1 << 21)	/* mask bits apply to each bit */
+#define SX_ROP_L	(0x2 << 21)	/* mask bits apply per register */
+#define SX_SEL_B	(0x4 << 21)	/* byte select scalar */
+#define SX_SEL_V	(0x6 << 21)	/* register select vector */
+#define SX_SEL_S	(0x7 << 21)	/* register select scalar */
 
-#define SX_ROP(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_ROPL | \
+#define SX_ROP(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_ROP_L | \
 		((sa) << 14) | (sb) | ((d) << 7))
-#define SX_ROPB(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_ROPB | \
+#define SX_ROPB(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_ROP_B | \
 		((sa) << 14) | (sb) | ((d) << 7))
-#define SX_SELECT_S(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_SELS | \
+#define SX_SELECT_S(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_SEL_S | \
 		((sa) << 14) | (sb) | ((d) << 7))
 
 /* multiply group */
@@ -350,30 +350,30 @@
 		 ((sa) << 14) | ((d) << 7) | (sb))
 		 
 /* shift group */
-#define SX_SRLV 	(0 << 21)	/* shift right logical, by vector */
-#define SX_SRLI 	(1 << 21)	/* shift right logical, by immediate */
-#define SX_SRAV 	(2 << 21)	/* shift right arithmetic, by vector */
-#define SX_SRAI 	(3 << 21)	/* shift right arithmetic, by immediate */
-#define SX_SLLV 	(4 << 21)	/* shift left logical, by vector */
-#define SX_SLLI 	(5 << 21)	/* shift left logical, by immediate */
-#define SX_SLFS 	(6 << 21)	/* shift left funnel, by SRCB */
-#define SX_SLFI 	(7 << 21)	/* shift left funnel, by immediate */
+#define SX_SRL_V 	(0 << 21)	/* shift right logical, by vector */
+#define SX_SRL_I 	(1 << 21)	/* shift right logical, by immediate */
+#define SX_SRA_V 	(2 << 21)	/* shift right arithmetic, by vector */
+#define SX_SRA_I 	(3 << 21)	/* shift right arithmetic, by immediate */
+#define SX_SLL_V 	(4 << 21)	/* shift left logical, by vector */
+#define SX_SLL_I 	(5 << 21)	/* shift left logical, by immediate */
+#define SX_SLF_S 	(6 << 21)	/* shift left funnel, by SRCB */
+#define SX_SLF_I 	(7 << 21)	/* shift left funnel, by immediate */
 
-#define SX_SRL_V(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRLV | \
+#define SX_SRLV(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRL_V | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_SRL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRLI | \
+#define SX_SRLI(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRL_I | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_SRA_V(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRAV | \
+#define SX_SRAV(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRA_V | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_SRA_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRAI | \
+#define SX_SRAI(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRA_I | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_SLL_V(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLLV | \
+#define SX_SLLV(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLL_V | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_SLL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLLI | \
+#define SX_SLLI(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLL_I | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_FUNNEL_S(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLFS | \
+#define SX_FUNNEL_S(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLF_S | \
 		  ((sa) << 14) | ((d) << 7) | (sb))
-#define SX_FUNNEL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLFI | \
+#define SX_FUNNEL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLF_I | \
 		  ((sa) << 14) | ((d) << 7) | 

CVS commit: src/sys/arch/sparc/dev

2021-12-08 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed Dec  8 17:03:38 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: sxreg.h

Log Message:
be more consistent with underscores in instruction names


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/sparc/dev/sxreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2021-12-08 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed Dec  8 16:40:14 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: sxreg.h

Log Message:
add SX_ROPB instruction


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/sparc/dev/sxreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/sxreg.h
diff -u src/sys/arch/sparc/dev/sxreg.h:1.18 src/sys/arch/sparc/dev/sxreg.h:1.19
--- src/sys/arch/sparc/dev/sxreg.h:1.18	Fri Dec  3 22:41:18 2021
+++ src/sys/arch/sparc/dev/sxreg.h	Wed Dec  8 16:40:14 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: sxreg.h,v 1.18 2021/12/03 22:41:18 macallan Exp $	*/
+/*	$NetBSD: sxreg.h,v 1.19 2021/12/08 16:40:14 macallan Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -262,6 +262,8 @@
 
 #define SX_ROP(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_ROPL | \
 		((sa) << 14) | (sb) | ((d) << 7))
+#define SX_ROPB(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_ROPB | \
+		((sa) << 14) | (sb) | ((d) << 7))
 #define SX_SELECT_S(sa, sb, d, cnt) (0x9000 | ((cnt) << 24) | SX_SELS | \
 		((sa) << 14) | (sb) | ((d) << 7))
 



CVS commit: src/sys/arch/sparc/dev

2021-12-08 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Wed Dec  8 16:40:14 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: sxreg.h

Log Message:
add SX_ROPB instruction


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/sparc/dev/sxreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2021-12-04 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Sat Dec  4 13:34:35 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: pckbc_js.c

Log Message:
s/establised/established/ in struct variable name. Also fixed typos in comments.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sparc/dev/pckbc_js.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/pckbc_js.c
diff -u src/sys/arch/sparc/dev/pckbc_js.c:1.20 src/sys/arch/sparc/dev/pckbc_js.c:1.21
--- src/sys/arch/sparc/dev/pckbc_js.c:1.20	Sun Nov 22 03:55:33 2020
+++ src/sys/arch/sparc/dev/pckbc_js.c	Sat Dec  4 13:34:35 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: pckbc_js.c,v 1.20 2020/11/22 03:55:33 thorpej Exp $ */
+/*	$NetBSD: pckbc_js.c,v 1.21 2021/12/04 13:34:35 andvar Exp $ */
 
 /*
  * Copyright (c) 2002 Valeriy E. Ushakov
@@ -28,7 +28,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pckbc_js.c,v 1.20 2020/11/22 03:55:33 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pckbc_js.c,v 1.21 2021/12/04 13:34:35 andvar Exp $");
 
 #include 
 #include 
@@ -52,7 +52,7 @@ struct pckbc_js_softc {
 
 	/* kbd and mouse share interrupt in both mr.coffee and krups */
 	uint32_t jsc_intr;
-	int jsc_establised;
+	int jsc_established;
 	void *jsc_int_cookie;
 };
 
@@ -165,7 +165,7 @@ pckbc_js_attach_common(struct pckbc_js_s
 
 	jsc->jsc_pckbc.intr_establish = pckbc_js_intr_establish;
 	jsc->jsc_intr = intr;
-	jsc->jsc_establised = 0;
+	jsc->jsc_established = 0;
 
 	if (isconsole) {
 		int status;
@@ -238,7 +238,7 @@ pckbc_js_intr_establish(struct pckbc_sof
 	struct pckbc_js_softc *jsc = (struct pckbc_js_softc *)sc;
 	void *res;
 
-	if (jsc->jsc_establised) {
+	if (jsc->jsc_established) {
 #ifdef DEBUG
 		aprint_verbose_dev(sc->sc_dv,
 		"%s slot shares interrupt (already established)\n",
@@ -248,7 +248,7 @@ pckbc_js_intr_establish(struct pckbc_sof
 	}
 
 	/*
-	 * We can not choose the devic class interruptlevel freely,
+	 * We can not choose the device class interrupt level freely,
 	 * so we debounce via a softinterrupt.
 	 */
 	jsc->jsc_int_cookie = softint_establish(SOFTINT_SERIAL,
@@ -266,7 +266,7 @@ pckbc_js_intr_establish(struct pckbc_sof
 		"unable to establish %s slot interrupt\n",
 		pckbc_slot_names[slot]);
 	else
-		jsc->jsc_establised = 1;
+		jsc->jsc_established = 1;
 }
 
 static int



CVS commit: src/sys/arch/sparc/dev

2021-12-04 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Sat Dec  4 13:34:35 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: pckbc_js.c

Log Message:
s/establised/established/ in struct variable name. Also fixed typos in comments.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sparc/dev/pckbc_js.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2021-12-03 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Fri Dec  3 22:41:18 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: sxreg.h

Log Message:
add shift instructions


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/sparc/dev/sxreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/sxreg.h
diff -u src/sys/arch/sparc/dev/sxreg.h:1.17 src/sys/arch/sparc/dev/sxreg.h:1.18
--- src/sys/arch/sparc/dev/sxreg.h:1.17	Fri Feb 22 23:01:25 2019
+++ src/sys/arch/sparc/dev/sxreg.h	Fri Dec  3 22:41:18 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: sxreg.h,v 1.17 2019/02/22 23:01:25 macallan Exp $	*/
+/*	$NetBSD: sxreg.h,v 1.18 2021/12/03 22:41:18 macallan Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -225,6 +225,8 @@
 SX_UBYTE_0 | (sreg << 7) | (o))
 #define SX_STP(sreg, cnt, o) (0x8000 | ((cnt) << 23) | SX_STORE | \
 SX_PACKED | (sreg << 7) | (o))
+#define SX_STPS(sreg, cnt, o) (0x8000 | ((cnt) << 23) | SX_STORE_SELECT | \
+SX_PACKED | (sreg << 7) | (o))
 #define SX_STS(sreg, cnt, o) (0x8000 | ((cnt) << 23) | SX_STORE_SELECT \
 | SX_LONG | (sreg << 7) | (o))
 #define SX_STBS(reg, cnt, o) (0x8000 | ((cnt) << 23) | SX_STORE_SELECT \
@@ -344,5 +346,32 @@
 		 ((sa) << 14) | ((d) << 7) | (sb))
 #define SX_SCATTER(sa, sb, d, cnt) (0xe000 | ((cnt) << 24) | SX_SCTR | \
 		 ((sa) << 14) | ((d) << 7) | (sb))
+		 
+/* shift group */
+#define SX_SRLV 	(0 << 21)	/* shift right logical, by vector */
+#define SX_SRLI 	(1 << 21)	/* shift right logical, by immediate */
+#define SX_SRAV 	(2 << 21)	/* shift right arithmetic, by vector */
+#define SX_SRAI 	(3 << 21)	/* shift right arithmetic, by immediate */
+#define SX_SLLV 	(4 << 21)	/* shift left logical, by vector */
+#define SX_SLLI 	(5 << 21)	/* shift left logical, by immediate */
+#define SX_SLFS 	(6 << 21)	/* shift left funnel, by SRCB */
+#define SX_SLFI 	(7 << 21)	/* shift left funnel, by immediate */
+
+#define SX_SRL_V(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRLV | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_SRL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRLI | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_SRA_V(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRAV | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_SRA_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SRAI | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_SLL_V(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLLV | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_SLL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLLI | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_FUNNEL_S(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLFS | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
+#define SX_FUNNEL_I(sa, sb, d, cnt) (0xc000 | ((cnt) << 24) | SX_SLFI | \
+		  ((sa) << 14) | ((d) << 7) | (sb))
 
 #endif /* SXREG_H */



CVS commit: src/sys/arch/sparc/dev

2021-12-03 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Fri Dec  3 22:41:18 UTC 2021

Modified Files:
src/sys/arch/sparc/dev: sxreg.h

Log Message:
add shift instructions


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/sparc/dev/sxreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2019-08-11 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Sun Aug 11 06:04:16 UTC 2019

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
remove orphaned comment


To generate a diff of this commit:
cvs rdiff -u -r1.87 -r1.88 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/sparc/dev

2019-08-11 Thread Michael Lorenz
Module Name:src
Committed By:   macallan
Date:   Sun Aug 11 06:04:16 UTC 2019

Modified Files:
src/sys/arch/sparc/dev: cgfourteen.c

Log Message:
remove orphaned comment


To generate a diff of this commit:
cvs rdiff -u -r1.87 -r1.88 src/sys/arch/sparc/dev/cgfourteen.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/dev/cgfourteen.c
diff -u src/sys/arch/sparc/dev/cgfourteen.c:1.87 src/sys/arch/sparc/dev/cgfourteen.c:1.88
--- src/sys/arch/sparc/dev/cgfourteen.c:1.87	Thu Jan 17 23:05:15 2019
+++ src/sys/arch/sparc/dev/cgfourteen.c	Sun Aug 11 06:04:16 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: cgfourteen.c,v 1.87 2019/01/17 23:05:15 macallan Exp $ */
+/*	$NetBSD: cgfourteen.c,v 1.88 2019/08/11 06:04:16 macallan Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -59,13 +59,6 @@
  * XXX should defer colormap updates to vertical retrace interrupts
  */
 
-/*
- * The following is for debugging only; it opens up a security hole
- * enabled by allowing any user to map the control registers for the
- * cg14 into their space.
- */
-#undef CG14_MAP_REGS
-
 #include "opt_wsemul.h"
 #include "sx.h"
 



CVS commit: src/sys/arch/sparc/dev

2010-01-17 Thread Izumi Tsutsui
Module Name:src
Committed By:   tsutsui
Date:   Sun Jan 17 16:23:43 UTC 2010

Modified Files:
src/sys/arch/sparc/dev: zs.c

Log Message:
Make sure to set ZS_HWFLAG_USE_CONSDEV and zs_consdev into zsc_args
passed to child devices even in !(NWSKBD == 0) case so that zs console
functions are actually used rather than the default prom console.
Fixes stray interrupts on MP machines running GENERIC.MP kernel with
zs serial console.

Ok'ed by m...@.


To generate a diff of this commit:
cvs rdiff -u -r1.116 -r1.117 src/sys/arch/sparc/dev/zs.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.