CVS commit: src/sys/arch/amd64/conf

2019-01-01 Thread Maya Rashish
Module Name:src Committed By: maya Date: Tue Jan 1 08:09:30 UTC 2019 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Add commented out amdgpu. (Builds, untested on hardware) To generate a diff of this commit: cvs rdiff -u -r1.514 -r1.515

CVS commit: src/sys/arch/amd64/amd64

2018-12-24 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Mon Dec 24 21:48:53 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: kobj_machdep.c Log Message: Treat R_X86_64_PLT32 relocation as R_X86_64_PC32 for binutils-2.31 See: https://lore.kernel.org/patchwork/patch/892629/ To

CVS commit: src/sys/arch/amd64/conf

2018-12-09 Thread Jaromir Dolecek
Module Name:src Committed By: jdolecek Date: Sun Dec 9 11:52:11 UTC 2018 Modified Files: src/sys/arch/amd64/conf: ALL Log Message: remove 'NOT WORKING' for ena(4) - while it was not yet confirmed working on x86, it already is confirmed working on aarm64 so chances are

CVS commit: src/sys/arch/amd64/conf

2018-12-02 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Mon Dec 3 00:12:22 UTC 2018 Modified Files: src/sys/arch/amd64/conf: files.amd64 Log Message: KASLR is in files.kern now. To generate a diff of this commit: cvs rdiff -u -r1.107 -r1.108 src/sys/arch/amd64/conf/files.amd64

CVS commit: src/sys/arch/amd64/include

2018-11-19 Thread Robert Elz
Module Name:src Committed By: kre Date: Mon Nov 19 15:43:32 UTC 2018 Modified Files: src/sys/arch/amd64/include: frame.h Log Message: Fix editing screwup in previous... noted by Rin Okuyama (thanks!) To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20

CVS commit: src/sys/arch/amd64/conf

2018-11-17 Thread Valeriy E. Ushakov
Module Name:src Committed By: uwe Date: Sat Nov 17 20:29:49 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Add commented out options WSEMUL_DEFAULT="\"vt100\"" If WSEMUL_SUN is enabled it becomes the default emulation which is most likely not what

CVS commit: src/sys/arch/amd64/amd64

2018-11-11 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Nov 11 10:58:40 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: machdep.c Log Message: Fix stack info leak. There is a big padding in struct sigframe_siginfo. [ 224.006287] kleak: Possible leak in copyout: [len=920,

CVS commit: src/sys/arch/amd64/stand/prekern

2018-11-03 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Nov 3 08:27:16 UTC 2018 Modified Files: src/sys/arch/amd64/stand/prekern: pdir.h Log Message: Remove VA_SIGN_POS from the computation of the indexes, it is not needed. To generate a diff of this commit: cvs rdiff -u -r1.5

CVS commit: src/sys/arch/amd64/include

2018-10-31 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Oct 31 18:35:05 UTC 2018 Modified Files: src/sys/arch/amd64/include: Makefile Log Message: Revert my kasan addition in this makefile, it looks like it causes asan.h to be installed, while we don't want it to be. To generate a

CVS commit: src/sys/arch/amd64/include

2018-10-29 Thread Maya Rashish
Module Name:src Committed By: maya Date: Mon Oct 29 19:43:17 UTC 2018 Modified Files: src/sys/arch/amd64/include: vmparam.h Log Message: Make VM_MIN_KERNEL_ADDRESS and others available in the _KMEMUSER case as well. This affects ddb. Tested by htodd. To generate a diff

CVS commit: src/sys/arch/amd64/include

2018-10-28 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 28 14:12:16 UTC 2018 Modified Files: src/sys/arch/amd64/include: vmparam.h Log Message: Add #ifdef _KERNEL, vaddr_t does not exist in userland, and we don't want externs anyway. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/amd64/amd64

2018-10-27 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Oct 27 06:35:54 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c Log Message: Rename kasan_shadow_fill, remove one check in it, and inline it. Remove the use-after-scope code for now, because our GCC does not support

CVS commit: src/sys/arch/amd64/amd64

2018-10-27 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Oct 27 06:06:31 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c Log Message: Remove functions that aren't supposed to be used. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9

CVS commit: src/sys/arch/amd64/conf

2018-10-07 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 7 08:00:49 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Make it clear that you need to disable SVS if you enable USER_LDT. I could make SVS compatible with it, but there has to be someone doing

CVS commit: src/sys/arch/amd64/amd64

2018-09-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Mon Sep 24 05:47:33 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c Log Message: Don't go beyond start(). To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/amd64/amd64/asan.c Please note that

CVS commit: src/sys/arch/amd64/amd64

2018-09-08 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Sep 8 12:40:17 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: db_disasm.c Log Message: Work around dumb KASSERT in vtopte(), the PTE area can now be above the MAIN area. I guess the KASSERT should be removed because it

CVS commit: src/sys/arch/amd64/conf

2018-08-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Aug 27 16:30:51 UTC 2018 Modified Files: src/sys/arch/amd64/conf: ALL Log Message: Add amdgpu to amd64/ALL. To generate a diff of this commit: cvs rdiff -u -r1.99 -r1.100 src/sys/arch/amd64/conf/ALL Please note that

CVS commit: src/sys/arch/amd64/amd64

2018-08-23 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Aug 23 11:56:10 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c Log Message: Improve the detection on global variables, no need to round up. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6

CVS commit: src/sys/arch/amd64/amd64

2018-08-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Aug 22 17:25:02 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c Log Message: Unwind the stack on error, to get the full path that led to the illegal access. Example of output: kASan: Unauthorized Access In

CVS commit: src/sys/arch/amd64/amd64

2018-08-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Aug 22 17:04:36 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c spl.S Log Message: Explicitly unpoison the stack when entering a softint. Softints are the only place where we "discard" a part of the stack: we may

CVS commit: src/sys/arch/amd64/amd64

2018-08-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Aug 22 09:11:47 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: asan.c Log Message: Fix the computation in kasan_shadow_map, we may need one more page because of the rounddown. To generate a diff of this commit: cvs rdiff

CVS commit: src/sys/arch/amd64/include

2018-08-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Aug 17 14:39:51 UTC 2018 Modified Files: src/sys/arch/amd64/include: pmap.h Log Message: Remove big outdated comment, remove unused macros, remove XXX that has nothing to do here, style. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/amd64/amd64

2018-08-12 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Aug 12 06:11:47 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S genassym.cf Log Message: Eliminate the only ASM reference to VM_MIN_KERNEL_ADDRESS. Rename the value to VM_SPACE_SEP_HIGH32, it is now the highest

CVS commit: src/sys/arch/amd64

2018-08-02 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Aug 2 17:18:00 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: prekern.c src/sys/arch/amd64/stand/prekern: prekern.c Log Message: Add a "version" field in the prekern_args structure. The kernel checks it, and if

CVS commit: src/sys/arch/amd64/amd64

2018-08-02 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Aug 2 16:58:00 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: prekern.c Log Message: Don't forget to call init_slotspace when we're booted via the prekern. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2

CVS commit: src/sys/arch/amd64/include

2018-07-27 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Jul 27 07:35:10 UTC 2018 Modified Files: src/sys/arch/amd64/include: pmap.h Log Message: Remove KERN_BASE, unused. It has always been wrong anyway, the value should have been passed into VA_SIGN_NEG(). To generate a diff of

CVS commit: src/sys/arch/amd64/conf

2018-07-21 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jul 21 06:30:27 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC_KASLR Log Message: Remove "no options GPROF", we don't have GPROF in the x86 kernels anymore. By the way this caused a warning because GPROF is not

CVS commit: src/sys/arch/amd64/include

2018-07-13 Thread Martin Husemann
Module Name:src Committed By: martin Date: Fri Jul 13 14:11:02 UTC 2018 Modified Files: src/sys/arch/amd64/include: frameasm.h Log Message: Provide empty SVS_ENTER_NMI/SVS_LEAVE_NMI for kernels w/o options SVS To generate a diff of this commit: cvs rdiff -u -r1.39

CVS commit: src/sys/arch/amd64/conf

2018-07-12 Thread Maya Rashish
Module Name:src Committed By: maya Date: Thu Jul 12 10:39:06 UTC 2018 Modified Files: src/sys/arch/amd64/conf: ALL GENERIC Log Message: Add entries for viadrmums to amd64 kernel configs too. Commented out for GENERIC, same as i386. To generate a diff of this commit:

CVS commit: src/sys/arch/amd64/amd64

2018-07-09 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Mon Jul 9 18:52:04 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Don't push/pop %rdx, we don't care about preserving its value. To generate a diff of this commit: cvs rdiff -u -r1.168 -r1.169

CVS commit: src/sys/arch/amd64/amd64

2018-07-09 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Mon Jul 9 18:43:05 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Small optimization: don't execute the Meltdown/SpectreV2 cswitch code if we're leaving a softint. We were executing the softint with the

CVS commit: src/sys/arch/amd64/conf

2018-06-24 Thread Jaromir Dolecek
Module Name:src Committed By: jdolecek Date: Sun Jun 24 17:11:57 UTC 2018 Modified Files: src/sys/arch/amd64/conf: kern.ldscript.Xen Log Message: follow change in rev. 1.22 of kern.ldscript and apply same fix for xen ldscript too, but using just regular PAGE_ALIGN

CVS commit: src/sys/arch/amd64/conf

2018-06-23 Thread Jonathan A. Kollasch
Module Name:src Committed By: jakllsch Date: Sat Jun 23 14:14:43 UTC 2018 Modified Files: src/sys/arch/amd64/conf: XEN3_DOM0 Log Message: Add acpiecdt* at acpi?. To generate a diff of this commit: cvs rdiff -u -r1.152 -r1.153 src/sys/arch/amd64/conf/XEN3_DOM0 Please

CVS commit: src/sys/arch/amd64/conf

2018-06-21 Thread D'Arcy J.M. Cain
Module Name:src Committed By: darcy Date: Fri Jun 22 02:51:17 UTC 2018 Modified Files: src/sys/arch/amd64/conf: XEN3_DOM0 Log Message: PR port-xen/50446 With approval from bouyer@ and acceptance, sometimes grudgingly, from others I have removed the AGP lines from the

CVS commit: src/sys/arch/amd64/amd64

2018-06-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Jun 20 11:45:25 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: vector.S Log Message: Put these arrays in .rodata, they aren't supposed to be executable. To generate a diff of this commit: cvs rdiff -u -r1.62 -r1.63

CVS commit: src/sys/arch/amd64/conf

2018-06-16 Thread Jaromir Dolecek
Module Name:src Committed By: jdolecek Date: Sat Jun 16 15:04:29 UTC 2018 Modified Files: src/sys/arch/amd64/conf: ALL Log Message: uncomment ena(4) now that it compiles; even though it's not working yet, this ensures it's included in eventual subsystem rototils To

CVS commit: src/sys/arch/amd64/conf

2018-06-02 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Sat Jun 2 15:09:37 UTC 2018 Modified Files: src/sys/arch/amd64/conf: Makefile.amd64 Log Message: Disable sanitizers for the kernel. To generate a diff of this commit: cvs rdiff -u -r1.70 -r1.71

CVS commit: src/sys/arch/amd64/stand/prekern

2018-06-02 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Sat Jun 2 14:31:40 UTC 2018 Modified Files: src/sys/arch/amd64/stand/prekern: Makefile Log Message: Disable MKSANITIZER To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/amd64/stand/prekern/Makefile

CVS commit: src/sys/arch/amd64/stand/prekern

2018-05-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri May 25 16:01:31 UTC 2018 Modified Files: src/sys/arch/amd64/stand/prekern: locore.S Log Message: Hide a bunch of local symbols. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8

CVS commit: src/sys/arch/amd64/stand/prekern

2018-05-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri May 25 15:52:11 UTC 2018 Modified Files: src/sys/arch/amd64/stand/prekern: prekern.c trap.S Log Message: Rename the entry points of the prekern, rename the array and move it into .rodata. To generate a diff of this commit:

CVS commit: src/sys/arch/amd64/amd64

2018-05-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri May 25 15:33:56 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: When the previous contrext is in kernel mode we are not guaranteed to have a 16-byte-aligned stack pointer, so align it. That's what

CVS commit: src/sys/arch/amd64/conf

2018-05-11 Thread Maya Rashish
Module Name:src Committed By: maya Date: Fri May 11 07:44:48 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Enable bwfm at pci. To generate a diff of this commit: cvs rdiff -u -r1.489 -r1.490 src/sys/arch/amd64/conf/GENERIC Please note that

CVS commit: src/sys/arch/amd64/amd64

2018-04-23 Thread Joerg Sonnenberger
Module Name:src Committed By: joerg Date: Mon Apr 23 22:53:04 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Adjust Xsyscall_svs to not use movq for 64bit immediates either. To generate a diff of this commit: cvs rdiff -u -r1.164 -r1.165

CVS commit: src/sys/arch/amd64/amd64

2018-04-21 Thread Joerg Sonnenberger
Module Name:src Committed By: joerg Date: Sat Apr 21 23:25:01 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Do not use movq for loading arbitrary 64bit immediates. The ISA restricts it to 32bit immediates. To generate a diff of this commit:

CVS commit: src/sys/arch/amd64/conf

2018-04-18 Thread Martin Husemann
Module Name:src Committed By: martin Date: Wed Apr 18 10:38:47 UTC 2018 Modified Files: src/sys/arch/amd64/conf: Makefile.amd64 Log Message: Simplify previous, pointed out by mrg. To generate a diff of this commit: cvs rdiff -u -r1.69 -r1.70

CVS commit: src/sys/arch/amd64/conf

2018-04-18 Thread Martin Husemann
Module Name:src Committed By: martin Date: Wed Apr 18 09:29:36 UTC 2018 Modified Files: src/sys/arch/amd64/conf: Makefile.amd64 Log Message: Fix previous: HAVE_GCC needs to be checked in additon to SPECTRE_V2_GCC_MITIGATION, but SPECTRE_V2_GCC_MITIGATION being empty is

CVS commit: src/sys/arch/amd64/conf

2018-04-18 Thread Martin Husemann
Module Name:src Committed By: martin Date: Wed Apr 18 09:20:42 UTC 2018 Modified Files: src/sys/arch/amd64/conf: Makefile.amd64 Log Message: Fix copy & pasto To generate a diff of this commit: cvs rdiff -u -r1.67 -r1.68 src/sys/arch/amd64/conf/Makefile.amd64 Please

CVS commit: src/sys/arch/amd64/amd64

2018-04-02 Thread Michael van Elst
Module Name:src Committed By: mlelstv Date: Mon Apr 2 22:29:33 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: spl.S Log Message: typo To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33 src/sys/arch/amd64/amd64/spl.S Please note that diffs are not public

CVS commit: src/sys/arch/amd64/amd64

2018-04-02 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Mon Apr 2 20:54:47 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: spl.S Log Message: use the right end macro: IDTVEC_END(name) instead of END(Xname) To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32

CVS commit: src/sys/arch/amd64/amd64

2018-03-30 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Mar 30 10:01:36 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: genassym.cf Log Message: Fix warning when compiling Xen; FLAT_RING3_CS64 is defined in a child of xen.h, which is already included in genassym.cf. So don't

CVS commit: src/sys/arch/amd64/amd64

2018-03-30 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Mar 30 09:53:08 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Add #ifndef XEN, xen doesn't have speculation_barrier. To generate a diff of this commit: cvs rdiff -u -r1.162 -r1.163

CVS commit: src/sys/arch/amd64/amd64

2018-03-28 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Wed Mar 28 19:56:40 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: The call to svs_lwp_switch can clobber %rdi/%rsi, so restore them before calling speculation_barrier. To generate a diff of this commit:

CVS commit: src/sys/arch/amd64/conf

2018-03-22 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Mar 22 12:26:29 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Add njs(4) at pci(4) and cardbus(4). To generate a diff of this commit: cvs rdiff -u -r1.485 -r1.486 src/sys/arch/amd64/conf/GENERIC

CVS commit: src/sys/arch/amd64/amd64

2018-03-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Tue Mar 20 18:27:58 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S locore.S Log Message: (Re)Fix handling of segment register faults. My previous attempt did fix faults occuring when reloading %es/%ds/%fs/%gs, but

CVS commit: src/sys/arch/amd64/amd64

2018-03-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Tue Mar 20 14:26:49 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S locore.S Log Message: Remove the sysretq fault handler. It is broken with SVS, and not really needed anyway. Initially I had added it so that if

CVS commit: src/sys/arch/amd64/amd64

2018-03-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Mar 17 17:12:39 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: machdep.c Log Message: Add missing opt_svs.h. To generate a diff of this commit: cvs rdiff -u -r1.301 -r1.302 src/sys/arch/amd64/amd64/machdep.c Please note

CVS commit: src/sys/arch/amd64/include

2018-03-16 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Mar 16 12:21:50 UTC 2018 Modified Files: src/sys/arch/amd64/include: cpu.h Log Message: Remove the prototypes for cpu_uarea_*, I removed these functions two minutes ago. To generate a diff of this commit: cvs rdiff -u -r1.61

CVS commit: src/sys/arch/amd64/amd64

2018-03-16 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Mar 16 08:48:34 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: db_machdep.c vector.S Log Message: Rename "handle_" -> "Xhandle_", and add the function names (introduced by SVS) in db_machdep.c. Should fix the DDB part of

CVS commit: src/sys/arch/amd64/include

2018-03-16 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Mar 16 08:21:56 UTC 2018 Modified Files: src/sys/arch/amd64/include: param.h Log Message: Add one more page for the stack, to compensate for the fact that SVS's stack switching mechanism consumes approximately one page. To

CVS commit: src/sys/arch/amd64/conf

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Mon Feb 26 05:52:50 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Enable SVS by default. To generate a diff of this commit: cvs rdiff -u -r1.484 -r1.485 src/sys/arch/amd64/conf/GENERIC Please note that

CVS commit: src/sys/arch/amd64/include

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 25 13:14:27 UTC 2018 Modified Files: src/sys/arch/amd64/include: frameasm.h Log Message: Remove INTRENTRY_L, it's not used anymore. To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 25 13:09:34 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: trap.c Log Message: Mmh. We shouldn't read %cr2 here. %cr2 is initialized by the CPU only during page faults (T_PAGEFLT), so here we're reading a value that

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 25 12:37:16 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S locore.S trap.c Log Message: Fix handling of segment register faults when running with SVS. The behavior is changed also in the non-SVS case. I've

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 25 11:57:44 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Ah. Don't use NENTRY() to declare check_swapgs, use LABEL() instead. NENTRY puts the code in the .text section, so the effect of

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 25 08:28:55 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Replace %rax -> %rdi, so that check_swapgs clobbers only one register. To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 25 08:09:07 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: There are two places where we reload %gs: * In setusergs. Here we can't fault. So we don't need to handle this case. * In

CVS commit: src/sys/arch/amd64/amd64

2018-02-24 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 24 17:12:10 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Use %rax instead of %r15 in the non-SVS case, to reduce the diff against SVS. In SVS we use %rax instead of %r15 because the following

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Feb 22 14:57:11 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Adapt previous; put #ifdef SVS around the declaration directly. To generate a diff of this commit: cvs rdiff -u -r1.154 -r1.155

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Martin Husemann
Module Name:src Committed By: martin Date: Thu Feb 22 14:08:48 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Protect the SVS part of SYSCALL_ENTRY by #ifdef SVS to make non-SVS kernels compile again. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Feb 22 10:26:32 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: machdep.c Log Message: Mmh, add #ifdef SVS around svs_init(). To generate a diff of this commit: cvs rdiff -u -r1.299 -r1.300

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Thu Feb 22 08:36:31 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Revert all my latest changes, and restore this file back to how it was in rev1.24. I wanted to replace the functions dynamically for

CVS commit: src/sys/arch/amd64/amd64

2018-02-18 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 18 14:32:31 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Pass the name of the function as argument in SWAPGS_HANDLER. To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 17 21:05:58 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Declare check_swapgs in an ASM macro. No real functional change. To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 17 20:41:57 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Now that [Z]TRAP and [Z]TRAP_NJ are identical, put back the INTRENTRY jmp .Lalltraps_noentry instructions for

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 17 20:33:28 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Declare and use TRAP_ENTRY_POINT_SPUR. No real functional change. To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 17 20:28:18 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Declare and use TRAP_ENTRY_POINT_FPU. No real functional change. To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 17 20:22:05 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Start using ASM macros to define the trap entry points. No real functional change. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Feb 17 19:26:20 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: vector.S Log Message: Define legacy_stubs in a macro. To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/amd64/amd64/vector.S Please

CVS commit: src/sys/arch/amd64/amd64

2018-02-09 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Sat Feb 10 03:55:59 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: db_interface.c Log Message: make it compile without MULTIPROCESSOR (xen?) To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29

CVS commit: src/sys/arch/amd64/amd64

2018-02-09 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Feb 9 08:54:12 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Don't restore segment registers when leaving NMIs. In nmitrap (and the functions it later calls), we are not allowing the trap frame

CVS commit: src/sys/arch/amd64/amd64

2018-02-09 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Feb 9 08:42:26 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: vector.S Log Message: Define INTRSTUB_ARRAY, simplifies a lot. To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/amd64/amd64/vector.S

CVS commit: src/sys/arch/amd64/conf

2018-02-04 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 4 17:54:35 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC_KASLR Log Message: Explicitly disable the kernel-mode GPROF (even though it is never enabled), and explain a bit. To generate a diff of this commit:

CVS commit: src/sys/arch/amd64/amd64

2018-02-04 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Feb 4 17:03:21 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: machdep.c Log Message: Add a TODO list for SVS. To generate a diff of this commit: cvs rdiff -u -r1.296 -r1.297 src/sys/arch/amd64/amd64/machdep.c Please

CVS commit: src/sys/arch/amd64/conf

2018-01-27 Thread Paul Goyette
Module Name:src Committed By: pgoyette Date: Sat Jan 27 21:46:54 UTC 2018 Modified Files: src/sys/arch/amd64/conf: ALL GENERIC XEN3_DOM0 Log Message: Update amdzentemp(4) attachment info. Also for ALL, remove duplicate entry for amdtemp(4). To generate a diff of this

CVS commit: src/sys/arch/amd64/include

2018-01-27 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 27 18:27:08 UTC 2018 Modified Files: src/sys/arch/amd64/include: frameasm.h Log Message: Put the default %cs value in INTR_RECURSE_HWFRAME. Pushing an immediate costs less than reading the %cs register and pushing its

CVS commit: src/sys/arch/amd64

2018-01-27 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 27 18:17:57 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: vector.S src/sys/arch/amd64/include: frameasm.h Log Message: Declare and use INTR_RECURSE_ENTRY, an optimized version of INTRENTRY. When processing

CVS commit: src/sys/arch/amd64/amd64

2018-01-27 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 27 17:54:13 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Use testb, faster. To generate a diff of this commit: cvs rdiff -u -r1.149 -r1.150 src/sys/arch/amd64/amd64/locore.S Please note that

CVS commit: src/sys/arch/amd64/conf

2018-01-26 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Jan 26 14:41:22 UTC 2018 Modified Files: src/sys/arch/amd64/conf: GENERIC Log Message: Add etherip, so that we at least know it exists on amd64. To generate a diff of this commit: cvs rdiff -u -r1.482 -r1.483

CVS commit: src/sys/arch/amd64/amd64

2018-01-26 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Fri Jan 26 14:38:46 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: machdep.c Log Message: Zero out the scratch value in the UTLS page during context switches. We temporarily put %rax there when processing syscalls, and we

CVS commit: src/sys/arch/amd64/conf

2018-01-24 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Thu Jan 25 01:21:40 UTC 2018 Modified Files: src/sys/arch/amd64/conf: ALL GENERIC XEN3_DOM0 Log Message: add amdzentemp To generate a diff of this commit: cvs rdiff -u -r1.78 -r1.79 src/sys/arch/amd64/conf/ALL cvs rdiff -u

CVS commit: src/sys/arch/amd64/amd64

2018-01-22 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Mon Jan 22 08:14:09 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: locore.S Log Message: Ah, remove duplicate SVS_LEAVE. Fixes 32bit binaries. While here remove duplicate 'cli', but that's harmless. To generate a diff of this

CVS commit: src/sys/arch/amd64/amd64

2018-01-21 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Sun Jan 21 16:51:15 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: db_disasm.c Log Message: CID-1364351: Fix uninitialized warnings. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24

CVS commit: src/sys/arch/amd64

2018-01-21 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jan 21 11:21:40 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S locore.S machdep.c vector.S src/sys/arch/amd64/conf: kern.ldscript kern.ldscript.kaslr src/sys/arch/amd64/include: frameasm.h Log

CVS commit: src/sys/arch/amd64

2018-01-21 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jan 21 10:59:21 UTC 2018 Modified Files: src/sys/arch/amd64/include: pmap.h src/sys/arch/amd64/stand/prekern: pdir.h Log Message: Increase the size of the initial mapping of the kernel. KASLR kernels are bigger than

CVS commit: src/sys/arch/amd64/amd64

2018-01-21 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Jan 21 08:20:31 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: machdep.c Log Message: Make it possible for SVS to map in the user page tables a 4K kernel page contained in a 2MB large page. Will be used soon. To generate

CVS commit: src/sys/arch/amd64/include

2018-01-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 20 14:39:21 UTC 2018 Modified Files: src/sys/arch/amd64/include: frameasm.h Log Message: Use .pushsection/.popsection, we will soon embed macros in several layers of nested sections. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/amd64

2018-01-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 20 14:27:15 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S vector.S src/sys/arch/amd64/conf: files.amd64 Log Message: Compile amd64_trap.S as a file instead of including it. To generate a diff of

CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 20 14:08:08 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: vector.S Log Message: Start with .text not to inherit the last section of amd64_trap.S, and remove outdated #define. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 20 13:45:15 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S Log Message: Eliminate a '.text'. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/amd64/amd64/amd64_trap.S Please

CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sat Jan 20 13:42:07 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_trap.S machdep.c Log Message: Don't declare exceptions[] with IDTVEC, it's an array, not a function. Rename it to x86_exceptions[], and move it to

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