Module Name:src
Committed By: skrll
Date: Tue May 18 06:42:12 UTC 2021
Modified Files:
src/sys/arch/riscv/include: db_machdep.h
Log Message:
Use #define in this file
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/db_machdep.h
Module Name:src
Committed By: skrll
Date: Tue May 18 06:40:16 UTC 2021
Modified Files:
src/sys/arch/riscv/include: db_machdep.h
Log Message:
Remove argument names from function declaration prototypes.
Misc tidyup.
To generate a diff of this commit:
cvs rdiff -u -r1.3
Module Name:src
Committed By: jmcneill
Date: Wed May 5 12:47:02 UTC 2021
Added Files:
src/sys/arch/riscv/include: loadfile_machdep.h
Log Message:
Add loadfile_machdep.h for riscv
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1
Module Name:src
Committed By: skrll
Date: Mon May 3 20:07:57 UTC 2021
Modified Files:
src/sys/arch/riscv/include: types.h
Log Message:
Sort __HAVE_ #defines. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/riscv/include/types.h
Please
Module Name:src
Committed By: skrll
Date: Sat May 1 07:09:55 UTC 2021
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
Provide riscvreg_satp_{read,write}
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/include/sysreg.h
Module Name:src
Committed By: skrll
Date: Sat May 1 07:09:04 UTC 2021
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
Indent the FCSR_FRM value #defines
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/riscv/include/sysreg.h
Module Name:src
Committed By: skrll
Date: Sat May 1 07:06:54 UTC 2021
Modified Files:
src/sys/arch/riscv/include: param.h
Log Message:
Bump MSGBUFSIZE (if not defined)
Provide COHERENCY_UNIT and CACHE_LINE_SIZE
Also provide MAXCPUS
To generate a diff of this commit:
Module Name:src
Committed By: skrll
Date: Sat May 1 07:05:07 UTC 2021
Modified Files:
src/sys/arch/riscv/include: asm.h
Log Message:
Provide __CONCAT, __STRING and ___CONCAT
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/asm.h
Module Name:src
Committed By: skrll
Date: Sat May 1 06:45:23 UTC 2021
Modified Files:
src/sys/arch/riscv/include: types.h
Log Message:
Make paddr_t/psize_t __uint64_t for both 32 and 64 bit ports
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11
Module Name:src
Committed By: skrll
Date: Sun Nov 15 08:09:56 UTC 2020
Modified Files:
src/sys/arch/riscv/include: pmap.h
Log Message:
This file is #define
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/pmap.h
Please note that
Module Name:src
Committed By: skrll
Date: Sat Nov 7 14:48:46 UTC 2020
Modified Files:
src/sys/arch/riscv/include: vmparam.h
Log Message:
Use lower case for hex constants
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/vmparam.h
Module Name:src
Committed By: skrll
Date: Sat Nov 7 10:48:17 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/include/reg.h
Please note that diffs are not
Module Name:src
Committed By: skrll
Date: Sat Nov 7 10:47:35 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Indent and annotate FP registers much like the general registers
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7
Module Name:src
Committed By: skrll
Date: Sat Nov 7 10:43:47 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Note if a register is Caller / Callee saved
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/reg.h
Module Name:src
Committed By: skrll
Date: Wed Nov 4 07:41:34 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
whitespace in comments
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/reg.h
Please note that
Module Name:src
Committed By: skrll
Date: Wed Nov 4 07:40:15 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
typo in comment
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/reg.h
Please note that diffs are
Module Name:src
Committed By: skrll
Date: Wed Nov 4 06:24:44 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Remove incorrect comment
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/reg.h
Please note that
Module Name:src
Committed By: skrll
Date: Mon Nov 2 08:37:59 UTC 2020
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
Add SATP_MODE values
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/include/sysreg.h
Please note
Module Name:src
Committed By: skrll
Date: Mon Nov 2 08:36:54 UTC 2020
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/sysreg.h
Please note that diffs
Module Name:src
Committed By: skrll
Date: Sun Nov 1 19:47:46 UTC 2020
Modified Files:
src/sys/arch/riscv/include: pte.h
Log Message:
Comments from zmcgrew@
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/pte.h
Please note that
Module Name:src
Committed By: skrll
Date: Mon Aug 10 06:53:11 UTC 2020
Modified Files:
src/sys/arch/riscv/include: pmap.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/pmap.h
Please note that diffs are
Module Name:src
Committed By: christos
Date: Sat Apr 4 21:13:20 UTC 2020
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
silence lint.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/byte_swap.h
Please note
Module Name:src
Committed By: mrg
Date: Wed Apr 17 11:01:19 UTC 2019
Modified Files:
src/sys/arch/riscv/include: int_fmtio.h
Log Message:
fix for riscv32.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/int_fmtio.h
Please note
Module Name:src
Committed By: maya
Date: Tue Apr 16 07:40:03 UTC 2019
Modified Files:
src/sys/arch/riscv/include: math.h
Log Message:
RISC-V ELF psABI says ILP32 also defaults to 128bit long double.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: maya
Date: Tue Apr 16 07:08:52 UTC 2019
Modified Files:
src/sys/arch/riscv/include: int_fmtio.h
Log Message:
We're now using gcc netbsd-stdint.h instead of our own definitions, so
match those with the format types
XXX wrong for 32bit.
XXX
Module Name:src
Committed By: maya
Date: Mon Apr 15 14:03:32 UTC 2019
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
Avoid -Wconversion warnings
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/byte_swap.h
Module Name:src
Committed By: maya
Date: Sat Apr 13 15:57:31 UTC 2019
Modified Files:
src/sys/arch/riscv/include: ieee.h math.h
Log Message:
Our current configuration is that long double is 128bit, so reflect
that in the relevant headers.
Taken from sparc64.
To
Module Name:src
Committed By: maya
Date: Sat Apr 13 15:56:18 UTC 2019
Modified Files:
src/sys/arch/riscv/include: int_fmtio.h
Log Message:
Provide defines for the 64bit case.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2
Module Name:src
Committed By: maya
Date: Sat Apr 13 12:41:37 UTC 2019
Modified Files:
src/sys/arch/riscv/include: asm.h
Log Message:
Handle changes since the gcc riscv toolchain was upstreamed
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: kamil
Date: Thu Apr 11 11:23:52 UTC 2019
Modified Files:
src/sys/arch/riscv/include: locore.h
Log Message:
Fix a typo in a comment
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/locore.h
Please note
Module Name:src
Committed By: matt
Date: Fri Jun 26 14:20:11 UTC 2015
Modified Files:
src/sys/arch/riscv/include: lock.h
Log Message:
Fix cp error.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/lock.h
Please note that diffs are
Module Name:src
Committed By: matt
Date: Thu May 28 02:19:05 UTC 2015
Modified Files:
src/sys/arch/riscv/include: elf_machdep.h
Log Message:
add ELF64_MACHDEP_ID
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/elf_machdep.h
Please
Module Name:src
Committed By: matt
Date: Wed Apr 1 21:55:03 UTC 2015
Modified Files:
src/sys/arch/riscv/include: cpu.h
Log Message:
_KMEMUSER only needs struct cpu_info
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/cpu.h
Please
Module Name:src
Committed By: matt
Date: Wed Apr 1 21:55:33 UTC 2015
Modified Files:
src/sys/arch/riscv/include: mcontext.h
Log Message:
Add _REG_S0
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/mcontext.h
Please note that
Module Name:src
Committed By: matt
Date: Wed Apr 1 21:59:01 UTC 2015
Modified Files:
src/sys/arch/riscv/include: elf_machdep.h
Log Message:
Add two new relocs for compressed branches.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:14:02 UTC 2015
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
No more fatc (replaced by sfence.vm instruction).
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:12:30 UTC 2015
Modified Files:
src/sys/arch/riscv/include: proc.h
Log Message:
Add a md_tp member to mdlwp so that the exception handler can temporarily
store the user's thread pointer before saving it in the
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:11:42 UTC 2015
Modified Files:
src/sys/arch/riscv/include: cpu.h
Log Message:
Define curcpu() as lwp_getcpu(curlwp) since curlwp is always in the tp
(thread pointer) register.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: matt
Date: Sun Mar 29 09:43:26 UTC 2015
Modified Files:
src/sys/arch/riscv/include: lock.h
Log Message:
Use C11 atomic builtins instead of __asm.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/lock.h
Module Name:src
Committed By: matt
Date: Fri Mar 27 06:57:21 UTC 2015
Modified Files:
src/sys/arch/riscv/include: asm.h elf_machdep.h mcontext.h reg.h
setjmp.h
Log Message:
Switch to new ABI (return values now in a0/a1; v0/v1 are no more)
To generate a diff
Module Name:src
Committed By: matt
Date: Fri Mar 27 23:26:14 UTC 2015
Modified Files:
src/sys/arch/riscv/include: elf_machdep.h
Log Message:
Fix one error and make life for ld.elf_so a little easier.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: dennis
Date: Tue Oct 28 19:46:18 UTC 2014
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
Correct 32 and 64 bit byte swap inlines.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2
Module Name:src
Committed By: dennis
Date: Tue Oct 28 20:25:36 UTC 2014
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
Shave an instruction from the generated code for the 32 bit byte
swap inline. Prune 5 or 9 instructions (depending on what you
Module Name:src
Committed By: dennis
Date: Fri Oct 24 01:08:07 UTC 2014
Modified Files:
src/sys/arch/riscv/include: mcontext.h
Log Message:
Fix a typo: the PC is likely in _REG_PC
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2
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