CVS commit: src/doc

2018-02-22 Thread Sevan Janiyan 
Module Name:src
Committed By:   sevan
Date:   Fri Feb 23 03:33:36 UTC 2018

Modified Files:
src/doc: CHANGES

Log Message:
BUFQ_PRIOCSCAN enabled on macppc port.


To generate a diff of this commit:
cvs rdiff -u -r1.2358 -r1.2359 src/doc/CHANGES

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/doc/CHANGES
diff -u src/doc/CHANGES:1.2358 src/doc/CHANGES:1.2359
--- src/doc/CHANGES:1.2358	Sat Feb 17 00:53:53 2018
+++ src/doc/CHANGES	Fri Feb 23 03:33:36 2018
@@ -1,4 +1,4 @@
-# LIST OF CHANGES FROM LAST RELEASE:			<$Revision: 1.2358 $>
+# LIST OF CHANGES FROM LAST RELEASE:			<$Revision: 1.2359 $>
 #
 #
 # [Note: This file does not mention every change made to the NetBSD source tree.
@@ -113,3 +113,5 @@ Changes from NetBSD 8.0 to NetBSD 9.0:
 	nsd: import 4.1.19 [christos 20180209]
 	ddb(4):	Introduce dumpstack sysctl for printing a stack trace on panic,
 		enable by default. [sevan 20180217]
+	macppc: Enable support for "per-priority cyclical scan" buffer queue
+		strategy. [sevan 20180223]

CVS commit: src/sys/arch/macppc/conf

2018-02-22 Thread Sevan Janiyan 
Module Name:src
Committed By:   sevan
Date:   Fri Feb 23 03:04:01 UTC 2018

Modified Files:
src/sys/arch/macppc/conf: GENERIC GENERIC_601 MAMBO POWERMAC_G5
POWERMAC_G5_11_2

Log Message:
Enable BUFQ_PRIOCSCAN by default for NetBSD/macppc.
Drop references to NEW_BUFQ_STRATEGY and replace with currently available
options BUFQ_READPRIO and BUFQ_PRIOCSCAN.

ok 


To generate a diff of this commit:
cvs rdiff -u -r1.341 -r1.342 src/sys/arch/macppc/conf/GENERIC
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/macppc/conf/GENERIC_601
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/macppc/conf/MAMBO
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/macppc/conf/POWERMAC_G5
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/macppc/conf/POWERMAC_G5_11_2

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/macppc/conf/GENERIC
diff -u src/sys/arch/macppc/conf/GENERIC:1.341 src/sys/arch/macppc/conf/GENERIC:1.342
--- src/sys/arch/macppc/conf/GENERIC:1.341	Fri Feb 23 02:54:56 2018
+++ src/sys/arch/macppc/conf/GENERIC	Fri Feb 23 03:04:01 2018
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.341 2018/02/23 02:54:56 sevan Exp $
+# $NetBSD: GENERIC,v 1.342 2018/02/23 03:04:01 sevan Exp $
 #
 # GENERIC machine description file
 # 
@@ -22,7 +22,7 @@ include		"arch/macppc/conf/std.macppc"
 
 options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
 
-#ident 		"GENERIC-$Revision: 1.341 $"
+#ident 		"GENERIC-$Revision: 1.342 $"
 
 maxusers	32
 
@@ -49,7 +49,7 @@ options 	SYSCTL_INCLUDE_DESCR	# Include 
 # Alternate buffer queue strategies for better responsiveness under high
 # disk I/O load.
 #options 	BUFQ_READPRIO
-#options 	BUFQ_PRIOCSCAN
+options 	BUFQ_PRIOCSCAN
 
 # Diagnostic/debugging support options
 #options 	DIAGNOSTIC	# cheap kernel consistency checks

Index: src/sys/arch/macppc/conf/GENERIC_601
diff -u src/sys/arch/macppc/conf/GENERIC_601:1.17 src/sys/arch/macppc/conf/GENERIC_601:1.18
--- src/sys/arch/macppc/conf/GENERIC_601:1.17	Sat Feb 17 01:31:02 2018
+++ src/sys/arch/macppc/conf/GENERIC_601	Fri Feb 23 03:04:01 2018
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC_601,v 1.17 2018/02/17 01:31:02 sevan Exp $
+# $NetBSD: GENERIC_601,v 1.18 2018/02/23 03:04:01 sevan Exp $
 #
 # GENERIC machine description file
 # 
@@ -28,7 +28,7 @@ include 	"arch/macppc/conf/std.macppc.60
 
 options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
 
-ident 		"GENERIC-$Revision: 1.17 $"
+ident 		"GENERIC-$Revision: 1.18 $"
 
 maxusers	32
 
@@ -53,7 +53,7 @@ options 	SYSCTL_INCLUDE_DESCR	# Include 
 # Alternate buffer queue strategies for better responsiveness under high
 # disk I/O load.
 #options 	BUFQ_READPRIO
-#options 	BUFQ_PRIOCSCAN
+options 	BUFQ_PRIOCSCAN
 
 # Diagnostic/debugging support options
 #options 	DIAGNOSTIC	# cheap kernel consistency checks

Index: src/sys/arch/macppc/conf/MAMBO
diff -u src/sys/arch/macppc/conf/MAMBO:1.28 src/sys/arch/macppc/conf/MAMBO:1.29
--- src/sys/arch/macppc/conf/MAMBO:1.28	Fri Feb 23 02:54:56 2018
+++ src/sys/arch/macppc/conf/MAMBO	Fri Feb 23 03:04:01 2018
@@ -6,7 +6,7 @@ include 	"arch/macppc/conf/std.macppc.g5
 
 options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
 
-#ident 		"GENERIC-$Revision: 1.28 $"
+#ident 		"GENERIC-$Revision: 1.29 $"
 
 maxusers	32
 
@@ -33,7 +33,8 @@ options 	SYSCTL_INCLUDE_DESCR	# Include 
 
 # Alternate buffer queue strategies for better responsiveness under high
 # disk I/O load.
-#options 	NEW_BUFQ_STRATEGY
+#options 	BUFQ_READPRIO
+options 	BUFQ_PRIOCSCAN
 
 # Diagnostic/debugging support options
 options 	DIAGNOSTIC	# cheap kernel consistency checks

Index: src/sys/arch/macppc/conf/POWERMAC_G5
diff -u src/sys/arch/macppc/conf/POWERMAC_G5:1.30 src/sys/arch/macppc/conf/POWERMAC_G5:1.31
--- src/sys/arch/macppc/conf/POWERMAC_G5:1.30	Fri Feb 23 02:54:56 2018
+++ src/sys/arch/macppc/conf/POWERMAC_G5	Fri Feb 23 03:04:01 2018
@@ -30,7 +30,8 @@ options 	SYSCTL_INCLUDE_DESCR	# Include 
 
 # Alternate buffer queue strategies for better responsiveness under high
 # disk I/O load.
-#options 	NEW_BUFQ_STRATEGY
+#options 	BUFQ_READPRIO
+options 	BUFQ_PRIOCSCAN
 
 # Diagnostic/debugging support options
 options 	DIAGNOSTIC	# cheap kernel consistency checks

Index: src/sys/arch/macppc/conf/POWERMAC_G5_11_2
diff -u src/sys/arch/macppc/conf/POWERMAC_G5_11_2:1.8 src/sys/arch/macppc/conf/POWERMAC_G5_11_2:1.9
--- src/sys/arch/macppc/conf/POWERMAC_G5_11_2:1.8	Thu Feb  1 21:47:07 2018
+++ src/sys/arch/macppc/conf/POWERMAC_G5_11_2	Fri Feb 23 03:04:01 2018
@@ -30,7 +30,8 @@ options 	SYSCTL_INCLUDE_DESCR	# Include 
 
 # Alternate buffer queue strategies for better responsiveness under high
 # disk I/O load.
-#options 	NEW_BUFQ_STRATEGY
+#options 	BUFQ_READPRIO
+options 	BUFQ_PRIOCSCAN
 
 # Diagnostic/debugging support options
 options 	DIAGNOSTIC	# cheap kernel consistency checks

CVS commit: src/sys/arch

2018-02-22 Thread Sevan Janiyan 
Module Name:src
Committed By:   sevan
Date:   Fri Feb 23 02:54:56 UTC 2018

Modified Files:
src/sys/arch/macppc/conf: GENERIC MAMBO POWERMAC POWERMAC_G5
src/sys/arch/powerpc/oea: ofw_rascons.c

Log Message:
Remove OFB_ENABLE_CACHE
from 
"it is outdated, genfb and friends don't need or use it, and it makes no sense
on accelerated drivers either. It tries to BAT-map the framebuffer cacheable,
which works on most macs but makes a few models lock up. Genfb doesn't have that
problem and is faster too."


To generate a diff of this commit:
cvs rdiff -u -r1.340 -r1.341 src/sys/arch/macppc/conf/GENERIC
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/macppc/conf/MAMBO
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/macppc/conf/POWERMAC
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/macppc/conf/POWERMAC_G5
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/oea/ofw_rascons.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/macppc/conf/GENERIC
diff -u src/sys/arch/macppc/conf/GENERIC:1.340 src/sys/arch/macppc/conf/GENERIC:1.341
--- src/sys/arch/macppc/conf/GENERIC:1.340	Sat Feb 17 01:31:02 2018
+++ src/sys/arch/macppc/conf/GENERIC	Fri Feb 23 02:54:56 2018
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.340 2018/02/17 01:31:02 sevan Exp $
+# $NetBSD: GENERIC,v 1.341 2018/02/23 02:54:56 sevan Exp $
 #
 # GENERIC machine description file
 # 
@@ -22,7 +22,7 @@ include		"arch/macppc/conf/std.macppc"
 
 options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
 
-#ident 		"GENERIC-$Revision: 1.340 $"
+#ident 		"GENERIC-$Revision: 1.341 $"
 
 maxusers	32
 
@@ -268,10 +268,6 @@ trm*	at pci? dev ? function ?	# Tekram D
 
 # Display devices
 # ofb*	at pci? dev ? function ?	# Generic Open Firmware Framebuffer
-# OFB_ENABLE_CACHE speeds up the console on many machines, but should
-# not be enabled on some older machines, such as the rev. A-D iMacs or any
-# O'Hare based machine that uses external cache like the PowerBook 3400c
-#options 	OFB_ENABLE_CACHE	# Speed up console in ofb
 #options 	OFB_FAKE_VGA_FB		# Allow X to mmap VGA regs
 # 
 # ofb is considered obsolete and machine-independent genfb should be used

Index: src/sys/arch/macppc/conf/MAMBO
diff -u src/sys/arch/macppc/conf/MAMBO:1.27 src/sys/arch/macppc/conf/MAMBO:1.28
--- src/sys/arch/macppc/conf/MAMBO:1.27	Tue Jan 23 14:47:55 2018
+++ src/sys/arch/macppc/conf/MAMBO	Fri Feb 23 02:54:56 2018
@@ -6,7 +6,7 @@ include 	"arch/macppc/conf/std.macppc.g5
 
 options 	INCLUDE_CONFIG_FILE	# embed config file in kernel binary
 
-#ident 		"GENERIC-$Revision: 1.27 $"
+#ident 		"GENERIC-$Revision: 1.28 $"
 
 maxusers	32
 
@@ -130,9 +130,6 @@ ppb*	at pci? dev ? function ?	# PCI-PCI 
 
 # Other  PCI devices
 #ofb*	at pci? dev ? function ?	# Generic Open Firmware Framebuffer
-# OFB_ENABLE_CACHE speeds up the console on many machines, but should
-# not be enabled on some older machines, such as the rev. A-D iMacs.
-#options 	OFB_ENABLE_CACHE	# Speed up console
 pciide* at pci? dev ? function ? flags 0x	# GENERIC pciide driver
 obio*	at pci? dev ? function ?
 macofcons0 at pci? dev ? function ?	# OpenFirmware console (for debugging)

Index: src/sys/arch/macppc/conf/POWERMAC
diff -u src/sys/arch/macppc/conf/POWERMAC:1.68 src/sys/arch/macppc/conf/POWERMAC:1.69
--- src/sys/arch/macppc/conf/POWERMAC:1.68	Fri Sep 22 17:56:07 2017
+++ src/sys/arch/macppc/conf/POWERMAC	Fri Feb 23 02:54:56 2018
@@ -1,4 +1,4 @@
-#	$NetBSD: POWERMAC,v 1.68 2017/09/22 17:56:07 macallan Exp $
+#	$NetBSD: POWERMAC,v 1.69 2018/02/23 02:54:56 sevan Exp $
 #
 # POWERMAC config file
 #
@@ -85,7 +85,6 @@ wsdisplay* at wsemuldisplaydev? console 
 
 # ofb is deprecated, use genfb instead
 #ofb*	at pci? dev ? function ?	# Generic Open Firmware Framebuffer
-#options 	OFB_ENABLE_CACHE	# Speed up console
 obio*	at pci? dev ? function ?
 
 nsphy*	at mii? phy ?			# NS83840 PHYs

Index: src/sys/arch/macppc/conf/POWERMAC_G5
diff -u src/sys/arch/macppc/conf/POWERMAC_G5:1.29 src/sys/arch/macppc/conf/POWERMAC_G5:1.30
--- src/sys/arch/macppc/conf/POWERMAC_G5:1.29	Tue Jan 23 14:47:55 2018
+++ src/sys/arch/macppc/conf/POWERMAC_G5	Fri Feb 23 02:54:56 2018
@@ -147,9 +147,6 @@ wsmouse* at ums?
 
 # Other  PCI devices
 #ofb*	at pci? dev ? function ?	# Generic Open Firmware Framebuffer
-# OFB_ENABLE_CACHE speeds up the console on many machines, but should
-# not be enabled on some older machines, such as the rev. A-D iMacs.
-#options 	OFB_ENABLE_CACHE	# Speed up console
 pciide* at pci? dev ? function ? flags 0x	# GENERIC pciide driver
 svwsata* at pci? dev ? function ?		# ServerWorks SATA controllers
 obio*	at pci? dev ? function ?

Index: src/sys/arch/powerpc/oea/ofw_rascons.c
diff -u src/sys/arch/powerpc/oea/ofw_rascons.c:1.9 src/sys/arch/powerpc/oea/ofw_rascons.c:1.10
--- src/sys/arch/powerpc/oea/ofw_rascons.c:1.9	Thu Apr 11 18:04:20 2013
+++ src/sys/arch/powerpc/oea/ofw_rascons.c	Fri Feb 23 02:54:56 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD

CVS commit: src/external/gpl3/gcc.old

2018-02-22 Thread matthew green 
Module Name:src
Committed By:   mrg
Date:   Fri Feb 23 01:01:22 UTC 2018

Removed Files:
src/external/gpl3/gcc.old: README.gcc53

Log Message:
remove this obsolete file that has a lot of dated info from
about the time we started switching some ports to GCC 5.3.


To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1 -r0 src/external/gpl3/gcc.old/README.gcc53

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64

2018-02-22 Thread matthew green 
Module Name:src
Committed By:   mrg
Date:   Thu Feb 22 22:25:16 UTC 2018

Modified Files:
src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64: configargs.h defs.mk
gtyp-input.list tm.h

Log Message:
regen ppc64 mknative gcc 6 files with biarch support.


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 \
src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/configargs.h
cvs rdiff -u -r1.8 -r1.9 \
src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/defs.mk
cvs rdiff -u -r1.6 -r1.7 \
src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/gtyp-input.list \
src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/tm.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/configargs.h
diff -u src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/configargs.h:1.12 src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/configargs.h:1.13
--- src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/configargs.h:1.12	Tue Feb  6 09:18:33 2018
+++ src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/configargs.h	Thu Feb 22 22:25:16 2018
@@ -3,7 +3,7 @@
 /* Generated from: NetBSD: mknative.common,v 1.15 2017/11/29 03:32:28 christos Exp  */
 
 /* Generated automatically. */
-static const char configuration_arguments[] = "/usr/src/tools/gcc/../../external/gpl3/gcc/dist/configure --target=powerpc64--netbsd --enable-long-long --enable-threads --with-bugurl=http://www.NetBSD.org/Misc/send-pr.html --with-pkgversion='NetBSD nb1 20180203' --with-system-zlib --disable-libstdcxx-dual-abi --enable-__cxa_atexit --enable-libstdcxx-time=rt --enable-libstdcxx-threads --with-diagnostics-color=auto-if-env --with-mpc-lib=/var/obj/mknative/evbppc-powerpc64/usr/src/external/lgpl3/mpc/lib/libmpc --with-mpfr-lib=/var/obj/mknative/evbppc-powerpc64/usr/src/external/lgpl3/mpfr/lib/libmpfr --with-gmp-lib=/var/obj/mknative/evbppc-powerpc64/usr/src/external/lgpl3/gmp/lib/libgmp --with-mpc-include=/usr/src/external/lgpl3/mpc/dist/src --with-mpfr-include=/usr/src/external/lgpl3/mpfr/dist/src --with-gmp-include=/usr/src/external/lgpl3/gmp/lib/libgmp/arch/powerpc64 --enable-tls --disable-multilib --disable-symvers --disable-libstdcxx-pch --disable-libstdcxx-dual-abi --build=x86_64-un
 known-netbsd7.1 --host=powerpc64--netbsd --with-sysroot=/var/obj/mknative/evbppc-powerpc64/usr/src/destdir.evbppc";
+static const char configuration_arguments[] = "/usr/src/tools/gcc/../../external/gpl3/gcc/dist/configure --target=powerpc64--netbsd --enable-long-long --enable-threads --with-bugurl=http://www.NetBSD.org/Misc/send-pr.html --with-pkgversion='NetBSD nb1 20180203' --with-system-zlib --disable-libstdcxx-dual-abi --enable-__cxa_atexit --enable-libstdcxx-time=rt --enable-libstdcxx-threads --with-diagnostics-color=auto-if-env --with-mpc-lib=/var/obj/mknative/evbppc-powerpc64/usr/src/external/lgpl3/mpc/lib/libmpc --with-mpfr-lib=/var/obj/mknative/evbppc-powerpc64/usr/src/external/lgpl3/mpfr/lib/libmpfr --with-gmp-lib=/var/obj/mknative/evbppc-powerpc64/usr/src/external/lgpl3/gmp/lib/libgmp --with-mpc-include=/usr/src/external/lgpl3/mpc/dist/src --with-mpfr-include=/usr/src/external/lgpl3/mpfr/dist/src --with-gmp-include=/usr/src/external/lgpl3/gmp/lib/libgmp/arch/powerpc64 --enable-tls --disable-multilib --disable-symvers --disable-libstdcxx-pch --disable-libstdcxx-dual-abi --build=x86_64-un
 known-netbsd8.0 --host=powerpc64--netbsd --with-sysroot=/var/obj/mknative/evbppc-powerpc64/usr/src/destdir.evbppc";
 static const char thread_model[] = "posix";
 
 static const struct {

Index: src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/defs.mk
diff -u src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/defs.mk:1.8 src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/defs.mk:1.9
--- src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/defs.mk:1.8	Wed Feb  7 05:34:22 2018
+++ src/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/defs.mk	Thu Feb 22 22:25:16 2018
@@ -18,7 +18,7 @@ G_GCC_OBJS=gcc.o gcc-main.o ggc-none.o s
 G_GCOV_OBJS=gcov.o
 G_GCOV_DUMP_OBJS=gcov-dump.o
 G_GXX_OBJS=gcc.o gcc-main.o ggc-none.o spellcheck.o cp/g++spec.o
-G_GTM_H=tm.h  options.h ${GNUHOSTDIST}/gcc/config/rs6000/rs6000.h ${GNUHOSTDIST}/gcc/config/dbxelf.h ${GNUHOSTDIST}/gcc/config/elfos.h ${GNUHOSTDIST}/gcc/config/freebsd-spec.h ${GNUHOSTDIST}/gcc/config/netbsd.h ${GNUHOSTDIST}/gcc/config/netbsd-elf.h ${GNUHOSTDIST}/gcc/config/rs6000/sysv4.h ${GNUHOSTDIST}/gcc/config/rs6000/default64.h ${GNUHOSTDIST}/gcc/config/rs6000/netbsd64.h ${GNUHOSTDIST}/gcc/config/rs6000/option-defaults.h ${GNUHOSTDIST}/gcc/config/initfini-array.h ${GNUHOSTDIST}/gcc/defaults.h insn-constants.h
+G_GTM_H=tm.h  options.h ${GNUHOSTDIST}/gcc/config/rs6000/secureplt.h ${GNUHOSTDIST}/gcc/config/rs6000/biarch64.h ${GNUHOSTDIST}/gcc/config/rs6000/rs6000.h ${GNUHOSTDIST}/gcc/config/dbxelf.h ${GNUHOSTDIST}/gcc/config/elfos.h ${GNUHOSTDIST}/gcc/config/freebsd-spec.h ${GNUHOSTDIST}/gcc/config/netbs

CVS commit: src/external/gpl3/gcc/dist/gcc

2018-02-22 Thread matthew green 
Module Name:src
Committed By:   mrg
Date:   Thu Feb 22 22:20:44 UTC 2018

Modified Files:
src/external/gpl3/gcc/dist/gcc: config.gcc
src/external/gpl3/gcc/dist/gcc/config/rs6000: netbsd64.h

Log Message:
fix powerpc64 bi-arch support:  provide a LINK_SECURE_PLT_SPEC.
with this, and mknative-gcc for it, powerpc64 builds with GCC 6.


To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/external/gpl3/gcc/dist/gcc/config.gcc
cvs rdiff -u -r1.14 -r1.15 \
src/external/gpl3/gcc/dist/gcc/config/rs6000/netbsd64.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/external/gpl3/gcc/dist/gcc/config.gcc
diff -u src/external/gpl3/gcc/dist/gcc/config.gcc:1.39 src/external/gpl3/gcc/dist/gcc/config.gcc:1.40
--- src/external/gpl3/gcc/dist/gcc/config.gcc:1.39	Wed Feb  7 05:34:21 2018
+++ src/external/gpl3/gcc/dist/gcc/config.gcc	Thu Feb 22 22:20:44 2018
@@ -2499,9 +2499,7 @@ powerpc*-*-netbsd*)
 	tm_file="${tm_file} netbsd.h netbsd-elf.h"
 	case ${target} in
 	powerpc64*)
-		# ends up enabling --secure-plt on 64 bit, which isn't good.
-		#tm_file="rs6000/biarch64.h ${tm_file}"
-		enable_secureplt=no
+		tm_file="rs6000/biarch64.h ${tm_file}"
 		tm_file="${tm_file} rs6000/sysv4.h rs6000/default64.h rs6000/netbsd64.h"
 		tmake_file="${tmake_file} rs6000/t-netbsd64"
 		;;

Index: src/external/gpl3/gcc/dist/gcc/config/rs6000/netbsd64.h
diff -u src/external/gpl3/gcc/dist/gcc/config/rs6000/netbsd64.h:1.14 src/external/gpl3/gcc/dist/gcc/config/rs6000/netbsd64.h:1.15
--- src/external/gpl3/gcc/dist/gcc/config/rs6000/netbsd64.h:1.14	Thu Jun  9 23:28:22 2016
+++ src/external/gpl3/gcc/dist/gcc/config/rs6000/netbsd64.h	Thu Feb 22 22:20:44 2018
@@ -188,20 +188,24 @@ extern int dot_symbols;
 #undef	ASM_DEFAULT_SPEC
 #undef	ASM_SPEC
 #undef	LINK_OS_NETBSD_SPEC
+#undef	LINK_SECURE_PLT_SPEC
 
 #ifndef	RS6000_BI_ARCH
 #define	ASM_DEFAULT_SPEC "-mppc64"
 #define	ASM_SPEC	 "%(asm_spec64) %(asm_spec_common)"
 #define	LINK_OS_NETBSD_SPEC "%(link_os_netbsd_spec64)"
+#define	LINK_SECURE_PLT_SPEC ""
 #else
 #if DEFAULT_ARCH64_P
 #define	ASM_DEFAULT_SPEC "-mppc%{!m32:64}"
 #define	ASM_SPEC	 "%{m32:%(asm_spec32)}%{!m32:%(asm_spec64)} %(asm_spec_common)"
 #define	LINK_OS_NETBSD_SPEC "%{m32:%(link_os_netbsd_spec32)}%{!m32:%(link_os_netbsd_spec64)}"
+#define	LINK_SECURE_PLT_SPEC "%{m32: " LINK_SECURE_PLT_DEFAULT_SPEC "}"
 #else
 #define	ASM_DEFAULT_SPEC "-mppc%{m64:64}"
 #define	ASM_SPEC	 "%{!m64:%(asm_spec32)}%{m64:%(asm_spec64)} %(asm_spec_common)"
 #define	LINK_OS_NETBSD_SPEC "%{!m64:%(link_os_netbsd_spec32)}%{m64:%(link_os_netbsd_spec64)}"
+#define	LINK_SECURE_PLT_SPEC "%{!m64: " LINK_SECURE_PLT_DEFAULT_SPEC "}"
 #endif
 #endif

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 14:57:11 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Adapt previous; put #ifdef SVS around the declaration directly.


To generate a diff of this commit:
cvs rdiff -u -r1.154 -r1.155 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.154 src/sys/arch/amd64/amd64/locore.S:1.155
--- src/sys/arch/amd64/amd64/locore.S:1.154	Thu Feb 22 14:08:48 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Feb 22 14:57:11 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.154 2018/02/22 14:08:48 martin Exp $	*/
+/*	$NetBSD: locore.S,v 1.155 2018/02/22 14:57:11 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1378,7 +1378,6 @@ IDTVEC(\name)
 
 #define SP(x,reg)	(x)-(TF_SS+8)(reg)
 
-#ifdef SVS
 	.if	\is_svs
 		movq	%rax,SVS_UTLS+UTLS_SCRATCH
 		movq	SVS_UTLS+UTLS_RSP0,%rax
@@ -1393,7 +1392,6 @@ IDTVEC(\name)
 
 		movq	SVS_UTLS+UTLS_SCRATCH,%rax
 	.else
-#endif
 		movq	%r15,CPUVAR(SCRATCH)
 		movq	CPUVAR(CURLWP),%r15
 		movq	L_PCB(%r15),%r15
@@ -1408,9 +1406,7 @@ IDTVEC(\name)
 		leaq	SP(0,%r15),%rsp			/* %rsp now valid after frame */
 
 		movq	CPUVAR(SCRATCH),%r15
-#ifdef SVS
 	.endif
-#endif
 
 #undef SP
 
@@ -1440,7 +1436,9 @@ SYSCALL_ENTRY	syscall,is_svs=0
 
 	TEXT_USER_BEGIN
 
+#ifdef SVS
 SYSCALL_ENTRY	syscall_svs,is_svs=1
+#endif
 
 IDTVEC(syscall32)
 	sysret		/* go away please */

CVS commit: src/share/man/man7

2018-02-22 Thread Sevan Janiyan 
Module Name:src
Committed By:   sevan
Date:   Thu Feb 22 14:49:29 UTC 2018

Modified Files:
src/share/man/man7: sysctl.7

Log Message:
Improve description of ddb.commandonenter.


To generate a diff of this commit:
cvs rdiff -u -r1.123 -r1.124 src/share/man/man7/sysctl.7

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man7/sysctl.7
diff -u src/share/man/man7/sysctl.7:1.123 src/share/man/man7/sysctl.7:1.124
--- src/share/man/man7/sysctl.7:1.123	Thu Feb 22 14:37:53 2018
+++ src/share/man/man7/sysctl.7	Thu Feb 22 14:49:29 2018
@@ -1,4 +1,4 @@
-.\"	$NetBSD: sysctl.7,v 1.123 2018/02/22 14:37:53 sevan Exp $
+.\"	$NetBSD: sysctl.7,v 1.124 2018/02/22 14:49:29 sevan Exp $
 .\"
 .\" Copyright (c) 1993
 .\"	The Regents of the University of California.  All rights reserved.
@@ -2463,7 +2463,8 @@ privilege may change the value.
 .El
 .Bl -tag -width "123456"
 .It Li ddb.commandonenter
-If not empty, a command to be executed on each enter to the DDB.
+If not empty, the string is used as the DDB command to be executed each time
+DDB is entered.
 .It Li ddb.dumpstack
 A value of 1 causes a stack trace to be printed on entering ddb from a panic.
 A value of 0 disables this behaviour. The default value is 1.

CVS commit: src/share/man/man7

2018-02-22 Thread Sevan Janiyan 
Module Name:src
Committed By:   sevan
Date:   Thu Feb 22 14:37:53 UTC 2018

Modified Files:
src/share/man/man7: sysctl.7

Log Message:
Document ddb.dumpstack sysctl
Remove the mention of ddb.onpanic=2 as that functionality was removed with the
introduction of ddb.dumpstack.

Heads up by 


To generate a diff of this commit:
cvs rdiff -u -r1.122 -r1.123 src/share/man/man7/sysctl.7

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man7/sysctl.7
diff -u src/share/man/man7/sysctl.7:1.122 src/share/man/man7/sysctl.7:1.123
--- src/share/man/man7/sysctl.7:1.122	Thu Feb 22 14:32:50 2018
+++ src/share/man/man7/sysctl.7	Thu Feb 22 14:37:53 2018
@@ -1,4 +1,4 @@
-.\"	$NetBSD: sysctl.7,v 1.122 2018/02/22 14:32:50 sevan Exp $
+.\"	$NetBSD: sysctl.7,v 1.123 2018/02/22 14:37:53 sevan Exp $
 .\"
 .\" Copyright (c) 1993
 .\"	The Regents of the University of California.  All rights reserved.
@@ -2450,6 +2450,7 @@ privilege may change the value.
 .Bl -column "Second level name" "integer" "Changeable" -offset indent
 .It Sy Second level name Ta Sy Type Ta Sy Changeable
 .It ddb.commandonenter	string	yes
+.It ddb.dumpstack 	integer yes
 .It ddb.fromconsole	integer	yes
 .It ddb.lines	integer	yes
 .It ddb.maxoff	integer	yes
@@ -2463,6 +2464,9 @@ privilege may change the value.
 .Bl -tag -width "123456"
 .It Li ddb.commandonenter
 If not empty, a command to be executed on each enter to the DDB.
+.It Li ddb.dumpstack
+A value of 1 causes a stack trace to be printed on entering ddb from a panic.
+A value of 0 disables this behaviour. The default value is 1.
 .It Li ddb.fromconsole ( Dv DDBCTL_FROMCONSOLE )
 If not zero, DDB may be entered by sending a break on a serial
 console or by a special key sequence on a graphics console.
@@ -2474,8 +2478,7 @@ The maximum symbol offset.
 The maximum output line width.
 .It Li ddb.onpanic ( Dv DDBCTL_ONPANIC )
 If greater than zero, DDB will be entered if the kernel panics.
-A value of 1 causes the system to enter DDB on panic, while a value of 2
-causes the kernel to attempt to print out a stack trace before entering DDB.
+A value of 1 causes the system to enter DDB on panic.
 A value of 0 causes the kernel to attempt to print a stack trace, then
 reboot, while a value of \-1 means neither a stack trace will be printed
 nor DDB entered.

CVS commit: src/share/man/man7

2018-02-22 Thread Sevan Janiyan 
Module Name:src
Committed By:   sevan
Date:   Thu Feb 22 14:32:50 UTC 2018

Modified Files:
src/share/man/man7: sysctl.7

Log Message:
Sort ddb section in alphabetical order.
Bump date.


To generate a diff of this commit:
cvs rdiff -u -r1.121 -r1.122 src/share/man/man7/sysctl.7

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man7/sysctl.7
diff -u src/share/man/man7/sysctl.7:1.121 src/share/man/man7/sysctl.7:1.122
--- src/share/man/man7/sysctl.7:1.121	Thu Jan 11 09:53:55 2018
+++ src/share/man/man7/sysctl.7	Thu Feb 22 14:32:50 2018
@@ -1,4 +1,4 @@
-.\"	$NetBSD: sysctl.7,v 1.121 2018/01/11 09:53:55 pgoyette Exp $
+.\"	$NetBSD: sysctl.7,v 1.122 2018/02/22 14:32:50 sevan Exp $
 .\"
 .\" Copyright (c) 1993
 .\"	The Regents of the University of California.  All rights reserved.
@@ -29,7 +29,7 @@
 .\"
 .\"	@(#)sysctl.3	8.4 (Berkeley) 5/9/95
 .\"
-.Dd December 28, 2017
+.Dd February 22, 2018
 .Dt SYSCTL 7
 .Os
 .Sh NAME
@@ -2447,31 +2447,31 @@ The information available for the
 level is detailed below.
 The changeable column shows whether a process with appropriate
 privilege may change the value.
-.\" XXX sort
 .Bl -column "Second level name" "integer" "Changeable" -offset indent
 .It Sy Second level name Ta Sy Type Ta Sy Changeable
-.It ddb.radix	integer	yes
+.It ddb.commandonenter	string	yes
+.It ddb.fromconsole	integer	yes
+.It ddb.lines	integer	yes
 .It ddb.maxoff	integer	yes
 .It ddb.maxwidth	integer	yes
-.It ddb.lines	integer	yes
-.It ddb.tabstops	integer	yes
 .It ddb.onpanic	integer	yes
-.It ddb.fromconsole	integer	yes
-.It ddb.tee_msgbuf	integer	yes
-.It ddb.commandonenter	string	yes
 .It ddb.panicstackframes	integer	yes
+.It ddb.radix	integer	yes
+.It ddb.tabstops	integer	yes
+.It ddb.tee_msgbuf	integer	yes
 .El
 .Bl -tag -width "123456"
-.It Li ddb.radix ( Dv DDBCTL_RADIX )
-The input and output radix.
+.It Li ddb.commandonenter
+If not empty, a command to be executed on each enter to the DDB.
+.It Li ddb.fromconsole ( Dv DDBCTL_FROMCONSOLE )
+If not zero, DDB may be entered by sending a break on a serial
+console or by a special key sequence on a graphics console.
+.It Li ddb.lines ( Dv DDBCTL_LINES )
+Number of display lines.
 .It Li ddb.maxoff ( Dv DDBCTL_MAXOFF )
 The maximum symbol offset.
 .It Li ddb.maxwidth ( Dv DDBCTL_MAXWIDTH )
 The maximum output line width.
-.It Li ddb.lines ( Dv DDBCTL_LINES )
-Number of display lines.
-.It Li ddb.tabstops ( Dv DDBCTL_TABSTOPS )
-Tab width.
 .It Li ddb.onpanic ( Dv DDBCTL_ONPANIC )
 If greater than zero, DDB will be entered if the kernel panics.
 A value of 1 causes the system to enter DDB on panic, while a value of 2
@@ -2479,13 +2479,6 @@ causes the kernel to attempt to print ou
 A value of 0 causes the kernel to attempt to print a stack trace, then
 reboot, while a value of \-1 means neither a stack trace will be printed
 nor DDB entered.
-.It Li ddb.fromconsole ( Dv DDBCTL_FROMCONSOLE )
-If not zero, DDB may be entered by sending a break on a serial
-console or by a special key sequence on a graphics console.
-.It Li ddb.tee_msgbuf
-If not zero, DDB will output also to the kernel message buffer.
-.It Li ddb.commandonenter
-If not empty, a command to be executed on each enter to the DDB.
 .It Li ddb.panicstackframes
 Number of stack frames to display on panic.
 Useful to avoid scrolling away the interesting frames on a glass tty.
@@ -2493,6 +2486,12 @@ Default value is
 .Dv 65535
 (all frames), useful value around
 .Dv 10 .
+.It Li ddb.radix ( Dv DDBCTL_RADIX )
+The input and output radix.
+.It Li ddb.tabstops ( Dv DDBCTL_TABSTOPS )
+Tab width.
+.It Li ddb.tee_msgbuf
+If not zero, DDB will output also to the kernel message buffer.
 .El
 .Pp
 Some of these MIB

CVS commit: src

2018-02-22 Thread Martin Husemann 
Module Name:src
Committed By:   martin
Date:   Thu Feb 22 14:24:03 UTC 2018

Modified Files:
src/distrib/sets/lists/tests: mi
src/tests/crypto/libcrypto: Makefile t_hashes.sh t_libcrypto.sh

Log Message:
PR lib/53044: remove tests not provided by OpenSSL 1.1.x


To generate a diff of this commit:
cvs rdiff -u -r1.774 -r1.775 src/distrib/sets/lists/tests/mi
cvs rdiff -u -r1.12 -r1.13 src/tests/crypto/libcrypto/Makefile
cvs rdiff -u -r1.2 -r1.3 src/tests/crypto/libcrypto/t_hashes.sh
cvs rdiff -u -r1.4 -r1.5 src/tests/crypto/libcrypto/t_libcrypto.sh

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/distrib/sets/lists/tests/mi
diff -u src/distrib/sets/lists/tests/mi:1.774 src/distrib/sets/lists/tests/mi:1.775
--- src/distrib/sets/lists/tests/mi:1.774	Sun Feb 11 16:45:35 2018
+++ src/distrib/sets/lists/tests/mi	Thu Feb 22 14:24:03 2018
@@ -1,4 +1,4 @@
-# $NetBSD: mi,v 1.774 2018/02/11 16:45:35 christos Exp $
+# $NetBSD: mi,v 1.775 2018/02/22 14:24:03 martin Exp $
 #
 # Note: don't delete entries from here - mark them as "obsolete" instead.
 #
@@ -1339,7 +1339,8 @@
 ./usr/tests/crypto/libcrypto/h_threadstest	tests-crypto-tests	compattestfile,atf
 ./usr/tests/crypto/libcrypto/h_x509v3test	comp-obsolete	openssl=11,obsolete
 ./usr/tests/crypto/libcrypto/h_x509v3test	tests-crypto-tests	compattestfile,atf,openssl=10
-./usr/tests/crypto/libcrypto/t_certs		tests-crypto-tests	compattestfile,atf
+./usr/tests/crypto/libcrypto/t_certs		comp-obsolete	openssl=11,obsolete
+./usr/tests/crypto/libcrypto/t_certs		tests-crypto-tests	compattestfile,atf,openssl=10
 ./usr/tests/crypto/libcrypto/t_ciphers		tests-crypto-tests	compattestfile,atf
 ./usr/tests/crypto/libcrypto/t_hashes		tests-crypto-tests	compattestfile,atf
 ./usr/tests/crypto/libcrypto/t_libcrypto	tests-crypto-tests	compattestfile,atf

Index: src/tests/crypto/libcrypto/Makefile
diff -u src/tests/crypto/libcrypto/Makefile:1.12 src/tests/crypto/libcrypto/Makefile:1.13
--- src/tests/crypto/libcrypto/Makefile:1.12	Thu Feb  8 21:59:10 2018
+++ src/tests/crypto/libcrypto/Makefile	Thu Feb 22 14:24:03 2018
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.12 2018/02/08 21:59:10 christos Exp $
+# $NetBSD: Makefile,v 1.13 2018/02/22 14:24:03 martin Exp $
 
 .include 
 
@@ -14,7 +14,9 @@ SUBDIR += lhash sha x509v3
 
 TESTSDIR=	${TESTSBASE}/crypto/libcrypto
 
+.if ${HAVE_OPENSSL} == 10
 TESTS_SH=	t_certs
+.endif
 TESTS_SH+=	t_ciphers
 TESTS_SH+=	t_hashes
 TESTS_SH+=	t_libcrypto

Index: src/tests/crypto/libcrypto/t_hashes.sh
diff -u src/tests/crypto/libcrypto/t_hashes.sh:1.2 src/tests/crypto/libcrypto/t_hashes.sh:1.3
--- src/tests/crypto/libcrypto/t_hashes.sh:1.2	Sat Jul 14 16:04:06 2012
+++ src/tests/crypto/libcrypto/t_hashes.sh	Thu Feb 22 14:24:03 2018
@@ -1,4 +1,4 @@
-# $NetBSD: t_hashes.sh,v 1.2 2012/07/14 16:04:06 spz Exp $
+# $NetBSD: t_hashes.sh,v 1.3 2018/02/22 14:24:03 martin Exp $
 #
 # Copyright (c) 2008, 2009, 2010 The NetBSD Foundation, Inc.
 # All rights reserved.
@@ -103,6 +103,6 @@ atf_init_test_cases()
 	atf_add_test_case md4
 	atf_add_test_case md5
 	atf_add_test_case ripemd
-	atf_add_test_case sha
+	openssl version | fgrep -q "OpenSSL 1.0" && atf_add_test_case sha
 	atf_add_test_case mdc2
 }

Index: src/tests/crypto/libcrypto/t_libcrypto.sh
diff -u src/tests/crypto/libcrypto/t_libcrypto.sh:1.4 src/tests/crypto/libcrypto/t_libcrypto.sh:1.5
--- src/tests/crypto/libcrypto/t_libcrypto.sh:1.4	Thu Oct 13 09:25:37 2016
+++ src/tests/crypto/libcrypto/t_libcrypto.sh	Thu Feb 22 14:24:03 2018
@@ -1,4 +1,4 @@
-# $NetBSD: t_libcrypto.sh,v 1.4 2016/10/13 09:25:37 martin Exp $
+# $NetBSD: t_libcrypto.sh,v 1.5 2018/02/22 14:24:03 martin Exp $
 #
 # Copyright (c) 2008, 2009, 2010 The NetBSD Foundation, Inc.
 # All rights reserved.
@@ -102,6 +102,6 @@ atf_init_test_cases()
 	atf_add_test_case rand
 	atf_add_test_case bn
 	atf_add_test_case conf
-	atf_add_test_case lhash
+	openssl version | fgrep -q "OpenSSL 1.0" && atf_add_test_case lhash
 	atf_add_test_case threads
 }

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Martin Husemann 
Module Name:src
Committed By:   martin
Date:   Thu Feb 22 14:08:48 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Protect the SVS part of SYSCALL_ENTRY by #ifdef SVS to make non-SVS
kernels compile again.


To generate a diff of this commit:
cvs rdiff -u -r1.153 -r1.154 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.153 src/sys/arch/amd64/amd64/locore.S:1.154
--- src/sys/arch/amd64/amd64/locore.S:1.153	Thu Feb 22 10:42:10 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Feb 22 14:08:48 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.153 2018/02/22 10:42:10 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.154 2018/02/22 14:08:48 martin Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1378,6 +1378,7 @@ IDTVEC(\name)
 
 #define SP(x,reg)	(x)-(TF_SS+8)(reg)
 
+#ifdef SVS
 	.if	\is_svs
 		movq	%rax,SVS_UTLS+UTLS_SCRATCH
 		movq	SVS_UTLS+UTLS_RSP0,%rax
@@ -1392,6 +1393,7 @@ IDTVEC(\name)
 
 		movq	SVS_UTLS+UTLS_SCRATCH,%rax
 	.else
+#endif
 		movq	%r15,CPUVAR(SCRATCH)
 		movq	CPUVAR(CURLWP),%r15
 		movq	L_PCB(%r15),%r15
@@ -1406,7 +1408,9 @@ IDTVEC(\name)
 		leaq	SP(0,%r15),%rsp			/* %rsp now valid after frame */
 
 		movq	CPUVAR(SCRATCH),%r15
+#ifdef SVS
 	.endif
+#endif
 
 #undef SP

CVS commit: src/sys/arch

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 13:27:18 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c
src/sys/arch/amd64/include: pmap.h
src/sys/arch/x86/x86: cpu.c svs.c x86_machdep.c

Log Message:
Remove svs_pgg_update(). Instead of manually changing PG_G on each page,
we can disable the global-paging mechanism in %cr4 with CR4_PGE. Do that.

In addition, install CR4_PGE when SVS is disabled manually (via the
sysctl).

Now, doing "sysctl -w machdep.svs_enabled=0" restores the performance
completely, exactly as if SVS hadn't been enabled in the first place.


To generate a diff of this commit:
cvs rdiff -u -r1.300 -r1.301 src/sys/arch/amd64/amd64/machdep.c
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/amd64/include/pmap.h
cvs rdiff -u -r1.148 -r1.149 src/sys/arch/x86/x86/cpu.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/x86/x86/svs.c
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/x86/x86/x86_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.300 src/sys/arch/amd64/amd64/machdep.c:1.301
--- src/sys/arch/amd64/amd64/machdep.c:1.300	Thu Feb 22 10:26:32 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Thu Feb 22 13:27:17 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.300 2018/02/22 10:26:32 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.301 2018/02/22 13:27:17 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.300 2018/02/22 10:26:32 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.301 2018/02/22 13:27:17 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1599,7 +1599,7 @@ init_x86_64(paddr_t first_avail)
 
 	cpu_probe(&cpu_info_primary);
 #ifdef SVS
-	svs_init(true);
+	svs_init();
 #endif
 	cpu_init_msrs(&cpu_info_primary, true);
 

Index: src/sys/arch/amd64/include/pmap.h
diff -u src/sys/arch/amd64/include/pmap.h:1.44 src/sys/arch/amd64/include/pmap.h:1.45
--- src/sys/arch/amd64/include/pmap.h:1.44	Thu Feb 22 09:41:06 2018
+++ src/sys/arch/amd64/include/pmap.h	Thu Feb 22 13:27:18 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.h,v 1.44 2018/02/22 09:41:06 maxv Exp $	*/
+/*	$NetBSD: pmap.h,v 1.45 2018/02/22 13:27:18 maxv Exp $	*/
 
 /*
  * Copyright (c) 1997 Charles D. Cranor and Washington University.
@@ -221,7 +221,7 @@
 void svs_pmap_sync(struct pmap *, int);
 void svs_lwp_switch(struct lwp *, struct lwp *);
 void svs_pdir_switch(struct pmap *);
-void svs_init(bool);
+void svs_init(void);
 extern bool svs_enabled;
 
 #include 

Index: src/sys/arch/x86/x86/cpu.c
diff -u src/sys/arch/x86/x86/cpu.c:1.148 src/sys/arch/x86/x86/cpu.c:1.149
--- src/sys/arch/x86/x86/cpu.c:1.148	Thu Feb 22 08:56:52 2018
+++ src/sys/arch/x86/x86/cpu.c	Thu Feb 22 13:27:18 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.148 2018/02/22 08:56:52 maxv Exp $	*/
+/*	$NetBSD: cpu.c,v 1.149 2018/02/22 13:27:18 maxv Exp $	*/
 
 /*
  * Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.148 2018/02/22 08:56:52 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.149 2018/02/22 13:27:18 maxv Exp $");
 
 #include "opt_ddb.h"
 #include "opt_mpbios.h"		/* for MPDEBUG */
@@ -589,6 +589,9 @@ cpu_init(struct cpu_info *ci)
 	 * hardware supports it.
 	 */
 	if (cpu_feature[0] & CPUID_PGE)
+#ifdef SVS
+		if (!svs_enabled)
+#endif
 		cr4 |= CR4_PGE;	/* enable global TLB caching */
 
 	/*

Index: src/sys/arch/x86/x86/svs.c
diff -u src/sys/arch/x86/x86/svs.c:1.7 src/sys/arch/x86/x86/svs.c:1.8
--- src/sys/arch/x86/x86/svs.c:1.7	Thu Feb 22 11:57:39 2018
+++ src/sys/arch/x86/x86/svs.c	Thu Feb 22 13:27:18 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: svs.c,v 1.7 2018/02/22 11:57:39 maxv Exp $	*/
+/*	$NetBSD: svs.c,v 1.8 2018/02/22 13:27:18 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.7 2018/02/22 11:57:39 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.8 2018/02/22 13:27:18 maxv Exp $");
 
 #include "opt_svs.h"
 
@@ -437,77 +437,6 @@ svs_pdir_switch(struct pmap *pmap)
 }
 
 static void
-svs_pgg_scanlvl(bool enable, int lvl, vaddr_t *levels)
-{
-	pd_entry_t *pde = (pd_entry_t *)(levels[lvl-1]);
-	pt_entry_t set, rem;
-	size_t i, start;
-	paddr_t pa;
-	int nlvl;
-
-	set = enable ? PG_G : 0;
-	rem = enable ? 0 : PG_G;
-
-	start = (lvl == 4) ? 256 : 0;
-
-	for (i = start; i < 512; i++) {
-		if (!pmap_valid_entry(pde[i])) {
-			continue;
-		}
-		if (lvl == 1) {
-			pde[i] = (pde[i] & ~rem) | set;
-		} else if (pde[i] & PG_PS) {
-			pde[i] = (pde[i] & ~rem) | set;
-		} else {
-			pa = (paddr_t)(pde[i] & PG_FRAME);
-			nlvl = lvl - 1;
-
-			/* remove the previous mapping */
-			pmap_kremove_local(levels[nlvl-1], PAGE_SIZE);
-
-			/* kenter the lower level */
-			pmap_kenter_pa(levels[nlvl-

CVS commit: src/sys/arch/x86/x86

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 11:57:39 UTC 2018

Modified Files:
src/sys/arch/x86/x86: svs.c

Log Message:
Ensure the CPUs are all online. We take cpu_lock, so nobody can go offline
in the meantime.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/x86/x86/svs.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/x86/x86/svs.c
diff -u src/sys/arch/x86/x86/svs.c:1.6 src/sys/arch/x86/x86/svs.c:1.7
--- src/sys/arch/x86/x86/svs.c:1.6	Thu Feb 22 10:42:11 2018
+++ src/sys/arch/x86/x86/svs.c	Thu Feb 22 11:57:39 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: svs.c,v 1.6 2018/02/22 10:42:11 maxv Exp $	*/
+/*	$NetBSD: svs.c,v 1.7 2018/02/22 11:57:39 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.6 2018/02/22 10:42:11 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.7 2018/02/22 11:57:39 maxv Exp $");
 
 #include "opt_svs.h"
 
@@ -616,14 +616,28 @@ svs_disable_cpu(void *arg1, void *arg2)
 	x86_write_psl(psl);
 }
 
-static void
+static int
 svs_disable(void)
 {
+	struct cpu_info *ci = NULL;
+	CPU_INFO_ITERATOR cii;
 	uint64_t xc;
 
+	mutex_enter(&cpu_lock);
+
 	/*
-	 * We expect all the CPUs to be online. XXX ensure they are.
+	 * We expect all the CPUs to be online.
 	 */
+	for (CPU_INFO_FOREACH(cii, ci)) {
+		struct schedstate_percpu *spc = &ci->ci_schedstate;
+		if (spc->spc_flags & SPCF_OFFLINE) {
+			printf("[!] cpu%d offline, SVS not disabled\n",
+			cpu_index(ci));
+			mutex_exit(&cpu_lock);
+			return EOPNOTSUPP;
+		}
+	}
+
 	svs_cpu_barrier1 = ncpu;
 	svs_cpu_barrier2 = ncpu;
 
@@ -637,6 +651,10 @@ svs_disable(void)
 	 */
 
 	printf("[+] Done\n");
+
+	mutex_exit(&cpu_lock);
+
+	return 0;
 }
 
 int sysctl_machdep_svs_enabled(SYSCTLFN_ARGS);
@@ -659,10 +677,10 @@ sysctl_machdep_svs_enabled(SYSCTLFN_ARGS
 	if (val == 1) {
 		error = EINVAL;
 	} else {
-		if (svs_enabled) {
-			svs_disable();
-		}
-		error = 0;
+		if (svs_enabled)
+			error = svs_disable();
+		else
+			error = 0;
 	}
 
 	return error;

CVS commit: src/sys/arch

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 10:42:11 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S
src/sys/arch/amd64/include: frameasm.h
src/sys/arch/x86/x86: svs.c x86_machdep.c

Log Message:
Make the machdep.svs_enabled sysctl writable, and add the kernel code
needed to disable SVS at runtime.

We set 'svs_enabled' to false, and hotpatch the kernel entry/exit points
to eliminate the context switch code.

We need to make sure there is no remote CPU that is executing the code we
are hotpatching. So we use two barriers:

 * After the first one each CPU is guaranteed to be executing in
   svs_disable_cpu with interrupts disabled (this way it can't leave this
   place).

 * After the second one it is guaranteed that SVS is disabled, so we flush
   the cache, enable interrupts and continue execution normally.

Between the two barriers, cpu0 will disable SVS (svs_enabled=false and
hotpatch), and each CPU will restore the generic syscall entry point.

Three notes:

 * We should call svs_pgg_update(true) afterwards, to put back PG_G on
   the kernel pages (for better performance). This will be done in another
   commit.

 * The fact that we disable interrupts does not prevent us from receiving
   an NMI, and it would be problematic. So we need to add some code to
   verify that PMCs are disabled before hotpatching. This will be done
   in another commit.

 * In svs_disable() we expect each CPU to be online. We need to add a
   check to make sure they indeed are.

The sysctl allows only a 1->0 transition. There is no point in doing 0->1
transitions anyway, and it would be complicated to implement because we
need to re-synchronize the CPU user page tables with the current ones (we
lost track of them in the last 1->0 transition).


To generate a diff of this commit:
cvs rdiff -u -r1.152 -r1.153 src/sys/arch/amd64/amd64/locore.S
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/amd64/include/frameasm.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/x86/x86/svs.c
cvs rdiff -u -r1.105 -r1.106 src/sys/arch/x86/x86/x86_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.152 src/sys/arch/amd64/amd64/locore.S:1.153
--- src/sys/arch/amd64/amd64/locore.S:1.152	Thu Feb 22 08:56:51 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Feb 22 10:42:10 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.152 2018/02/22 08:56:51 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.153 2018/02/22 10:42:10 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1591,14 +1591,14 @@ END(intrfastexit)
 	TEXT_USER_END
 
 #ifdef SVS
-	.globl	svs_enter
-	.globl	svs_enter_end
-	.globl	svs_enter_altstack
-	.globl	svs_enter_altstack_end
-	.globl	svs_leave
-	.globl	svs_leave_end
-	.globl	svs_leave_altstack
-	.globl	svs_leave_altstack_end
+	.globl	svs_enter, svs_enter_end
+	.globl	svs_enter_altstack, svs_enter_altstack_end
+	.globl	svs_leave, svs_leave_end
+	.globl	svs_leave_altstack, svs_leave_altstack_end
+	.globl	nosvs_enter, nosvs_enter_end
+	.globl	nosvs_enter_altstack, nosvs_enter_altstack_end
+	.globl	nosvs_leave, nosvs_leave_end
+	.globl	nosvs_leave_altstack, nosvs_leave_altstack_end
 
 LABEL(svs_enter)
 	movq	SVS_UTLS+UTLS_KPDIRPA,%rax
@@ -1630,4 +1630,20 @@ LABEL(svs_leave_altstack)
 	movq	%rax,%cr3
 1234:
 LABEL(svs_leave_altstack_end)
+
+LABEL(nosvs_enter)
+	NOSVS_ENTER
+LABEL(nosvs_enter_end)
+
+LABEL(nosvs_enter_altstack)
+	NOSVS_ENTER_ALTSTACK
+LABEL(nosvs_enter_altstack_end)
+
+LABEL(nosvs_leave)
+	NOSVS_LEAVE
+LABEL(nosvs_leave_end)
+
+LABEL(nosvs_leave_altstack)
+	NOSVS_LEAVE_ALTSTACK
+LABEL(nosvs_leave_altstack_end)
 #endif

Index: src/sys/arch/amd64/include/frameasm.h
diff -u src/sys/arch/amd64/include/frameasm.h:1.35 src/sys/arch/amd64/include/frameasm.h:1.36
--- src/sys/arch/amd64/include/frameasm.h:1.35	Thu Feb 22 08:56:51 2018
+++ src/sys/arch/amd64/include/frameasm.h	Thu Feb 22 10:42:11 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: frameasm.h,v 1.35 2018/02/22 08:56:51 maxv Exp $	*/
+/*	$NetBSD: frameasm.h,v 1.36 2018/02/22 10:42:11 maxv Exp $	*/
 
 #ifndef _AMD64_MACHINE_FRAMEASM_H
 #define _AMD64_MACHINE_FRAMEASM_H
@@ -112,28 +112,36 @@
 #define UTLS_RSP0		16
 
 #define SVS_ENTER_BYTES	22
-#define SVS_ENTER \
-	HOTPATCH(HP_NAME_SVS_ENTER, SVS_ENTER_BYTES)	; \
+#define NOSVS_ENTER \
 	.byte 0xEB, (SVS_ENTER_BYTES-2)	/* jmp */	; \
 	.fill	(SVS_ENTER_BYTES-2),1,0xCC
+#define SVS_ENTER \
+	HOTPATCH(HP_NAME_SVS_ENTER, SVS_ENTER_BYTES)	; \
+	NOSVS_ENTER
 
 #define SVS_LEAVE_BYTES	31
-#define SVS_LEAVE \
-	HOTPATCH(HP_NAME_SVS_LEAVE, SVS_LEAVE_BYTES)	; \
+#define NOSVS_LEAVE \
 	.byte 0xEB, (SVS_LEAVE_BYTES-2)	/* jmp */	; \
 	.fill	(SVS_LEAVE_BYTES-2),1,0xCC
+#define SVS_LEAVE \
+	HOTPATCH(HP_NAME_SVS_LEAVE, SVS_LEAVE_BYTES)	; \
+	NOSVS_LEAVE
 
 #define SVS_ENTER_ALT_BYTES	23
-#define SVS_ENTER_ALTSTACK \
-	HOTPATCH(HP_NAME_SVS_ENTER_ALT, SVS_ENTER_ALT_BYT

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 10:26:32 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Mmh, add #ifdef SVS around svs_init().


To generate a diff of this commit:
cvs rdiff -u -r1.299 -r1.300 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.299 src/sys/arch/amd64/amd64/machdep.c:1.300
--- src/sys/arch/amd64/amd64/machdep.c:1.299	Thu Feb 22 09:41:06 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Thu Feb 22 10:26:32 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.299 2018/02/22 09:41:06 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.300 2018/02/22 10:26:32 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.299 2018/02/22 09:41:06 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.300 2018/02/22 10:26:32 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1598,7 +1598,9 @@ init_x86_64(paddr_t first_avail)
 	uvm_lwp_setuarea(&lwp0, lwp0uarea);
 
 	cpu_probe(&cpu_info_primary);
+#ifdef SVS
 	svs_init(true);
+#endif
 	cpu_init_msrs(&cpu_info_primary, true);
 
 	use_pae = 1; /* PAE always enabled in long mode */

CVS commit: src/share/man/man4

2018-02-22 Thread SAITOH Masanobu 
Module Name:src
Committed By:   msaitoh
Date:   Thu Feb 22 10:12:54 UTC 2018

Modified Files:
src/share/man/man4: sdtemp.4

Log Message:
Add Microchip EMC1501.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/share/man/man4/sdtemp.4

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/share/man/man4/sdtemp.4
diff -u src/share/man/man4/sdtemp.4:1.6 src/share/man/man4/sdtemp.4:1.7
--- src/share/man/man4/sdtemp.4:1.6	Thu Jul 28 09:11:14 2016
+++ src/share/man/man4/sdtemp.4	Thu Feb 22 10:12:54 2018
@@ -1,4 +1,4 @@
-.\"	$NetBSD: sdtemp.4,v 1.6 2016/07/28 09:11:14 msaitoh Exp $
+.\"	$NetBSD: sdtemp.4,v 1.7 2018/02/22 10:12:54 msaitoh Exp $
 .\"
 .\" Copyright (c) 2008 The NetBSD Foundation, Inc.
 .\" All rights reserved.
@@ -27,7 +27,7 @@
 .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 .\" POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd July 28, 2016
+.Dd February 22, 2018
 .Dt SDTEMP 4
 .Os
 .Sh NAME
@@ -99,6 +99,7 @@ and
 .Em MAX6604
 .It
 .Tn Microchip Technology
+.Em EMC1501 .
 .Em MCP9804 ,
 .Em MCP9805 ,
 .Em MCP9843 ,

CVS commit: src/sys/dev/i2c

2018-02-22 Thread SAITOH Masanobu 
Module Name:src
Committed By:   msaitoh
Date:   Thu Feb 22 10:09:12 UTC 2018

Modified Files:
src/sys/dev/i2c: sdtemp.c sdtemp_reg.h

Log Message:
- Add Maxim MAX6604.
- Microchip EMC1501.
- ADT7408's device ID is not 0x80 but 0x08.


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/dev/i2c/sdtemp.c
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/i2c/sdtemp_reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/i2c/sdtemp.c
diff -u src/sys/dev/i2c/sdtemp.c:1.32 src/sys/dev/i2c/sdtemp.c:1.33
--- src/sys/dev/i2c/sdtemp.c:1.32	Wed Aug  3 03:35:24 2016
+++ src/sys/dev/i2c/sdtemp.c	Thu Feb 22 10:09:12 2018
@@ -1,4 +1,4 @@
-/*  $NetBSD: sdtemp.c,v 1.32 2016/08/03 03:35:24 msaitoh Exp $*/
+/*  $NetBSD: sdtemp.c,v 1.33 2018/02/22 10:09:12 msaitoh Exp $*/
 
 /*
  * Copyright (c) 2009 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sdtemp.c,v 1.32 2016/08/03 03:35:24 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdtemp.c,v 1.33 2018/02/22 10:09:12 msaitoh Exp $");
 
 #include 
 #include 
@@ -115,6 +115,8 @@ sdtemp_dev_table[] = {
 	"Giantec GT34TS02" },
 { MAXIM_MANUFACTURER_ID, MAX_6604_DEVICE_ID, MAX_6604_MASK,	  NULL,
 	"Maxim MAX6604" },
+{ MAXIM_MANUFACTURER_ID, MAX_6604_2_DEVICE_ID,   MAX_6604_MASK,	  NULL,
+	"Maxim MAX6604" },
 { MCP_MANUFACTURER_ID,  MCP_9804_DEVICE_ID,	 MCP_9804_MASK,	  CMCP,
 	"Microchip Tech MCP9804" },
 { MCP_MANUFACTURER_ID,  MCP_9805_DEVICE_ID,	 MCP_9805_MASK,	  NULL,
@@ -125,6 +127,8 @@ sdtemp_dev_table[] = {
 	"Microchip Tech MCP98243" },
 { MCP_MANUFACTURER_ID,  MCP_98244_DEVICE_ID, MCP_98244_MASK,	  CMCP,
 	"Microchip Tech MCP98244" },
+{ MCP2_MANUFACTURER_ID, MCP2_EMC1501_DEVICE_ID,  MCP2_EMC1501_MASK,	  NULL,
+	"Microchip Tech EMC1501" },
 { ADT_MANUFACTURER_ID,  ADT_7408_DEVICE_ID,	 ADT_7408_MASK,	  NULL,
 	"Analog Devices ADT7408" },
 { NXP_MANUFACTURER_ID,  NXP_SE98_DEVICE_ID,	 NXP_SE98_MASK,	  NULL,

Index: src/sys/dev/i2c/sdtemp_reg.h
diff -u src/sys/dev/i2c/sdtemp_reg.h:1.12 src/sys/dev/i2c/sdtemp_reg.h:1.13
--- src/sys/dev/i2c/sdtemp_reg.h:1.12	Wed Dec  7 04:58:39 2016
+++ src/sys/dev/i2c/sdtemp_reg.h	Thu Feb 22 10:09:12 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: sdtemp_reg.h,v 1.12 2016/12/07 04:58:39 nonaka Exp $	*/
+/*	$NetBSD: sdtemp_reg.h,v 1.13 2018/02/22 10:09:12 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 2009 The NetBSD Foundation, Inc.
@@ -122,6 +122,7 @@
 /* Maxim */
 #define	MAXIM_MANUFACTURER_ID		0x004D
 #define	MAX_6604_DEVICE_ID		0x3E00
+#define	MAX_6604_2_DEVICE_ID		0x5400
 #define	MAX_6604_MASK			0x
 
 /* Microchip */
@@ -136,6 +137,9 @@
 #define	MCP_98243_MASK			0xFFFC
 #define	MCP_98244_DEVICE_ID		0x2200
 #define	MCP_98244_MASK			0xFFFC
+#define	MCP2_MANUFACTURER_ID		0x1055	/* PCI-SIG manufacturer ID */
+#define	MCP2_EMC1501_DEVICE_ID		0x0842
+#define	MCP2_EMC1501_MASK		0x
 
 #define	SDTEMP_REG_MCP_RESOLUTION_9804	0x08 /* 9804, 9824[23] */
 #define	SDTEMP_REG_MCP_RESOLUTION_98244	0x09 /* 98244 */
@@ -150,8 +154,8 @@
 
 /* Analog Devices */
 #define	ADT_MANUFACTURER_ID		0x11D4
-#define	ADT_7408_DEVICE_ID		0x8001
-#define	ADT_7408_MASK			0x
+#define	ADT_7408_DEVICE_ID		0x0800	/* e.g. 0x0801 */
+#define	ADT_7408_MASK			0xFFF0
 
 /* IDT */
 #define	IDT_MANUFACTURER_ID		0x00B3

CVS commit: src/sys/dev/pci/ixgbe

2018-02-22 Thread SAITOH Masanobu 
Module Name:src
Committed By:   msaitoh
Date:   Thu Feb 22 10:02:08 UTC 2018

Modified Files:
src/sys/dev/pci/ixgbe: ix_txrx.c ixgbe.c ixgbe.h ixv.c

Log Message:
 Fix a potential bug that TX/RX might stall when TX rate limit reached.
This change is almost the same as the RX rate limit bug fix in ixgbe.c
rev. 1.121. I've never got any stall, but this must be a bug.


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/dev/pci/ixgbe/ix_txrx.c
cvs rdiff -u -r1.125 -r1.126 src/sys/dev/pci/ixgbe/ixgbe.c
cvs rdiff -u -r1.29 -r1.30 src/sys/dev/pci/ixgbe/ixgbe.h
cvs rdiff -u -r1.80 -r1.81 src/sys/dev/pci/ixgbe/ixv.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/ixgbe/ix_txrx.c
diff -u src/sys/dev/pci/ixgbe/ix_txrx.c:1.31 src/sys/dev/pci/ixgbe/ix_txrx.c:1.32
--- src/sys/dev/pci/ixgbe/ix_txrx.c:1.31	Tue Feb 20 07:30:57 2018
+++ src/sys/dev/pci/ixgbe/ix_txrx.c	Thu Feb 22 10:02:08 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ix_txrx.c,v 1.31 2018/02/20 07:30:57 msaitoh Exp $ */
+/* $NetBSD: ix_txrx.c,v 1.32 2018/02/22 10:02:08 msaitoh Exp $ */
 
 /**
 
@@ -993,7 +993,7 @@ ixgbe_tso_setup(struct tx_ring *txr, str
  *   processing the packet then free associated resources. The
  *   tx_buffer is put back on the free queue.
  /
-void
+bool
 ixgbe_txeof(struct tx_ring *txr)
 {
 	struct adapter		*adapter = txr->adapter;
@@ -1032,13 +1032,13 @@ ixgbe_txeof(struct tx_ring *txr)
 		 txd[kring->nr_kflags].wb.status & IXGBE_TXD_STAT_DD)) {
 			netmap_tx_irq(ifp, txr->me);
 		}
-		return;
+		return false;
 	}
 #endif /* DEV_NETMAP */
 
 	if (txr->tx_avail == txr->num_desc) {
 		txr->busy = 0;
-		return;
+		return false;
 	}
 
 	/* Get work starting point */
@@ -1139,7 +1139,7 @@ ixgbe_txeof(struct tx_ring *txr)
 	if (txr->tx_avail == txr->num_desc)
 		txr->busy = 0;
 
-	return;
+	return ((limit > 0) ? false : true);
 } /* ixgbe_txeof */
 
 /

Index: src/sys/dev/pci/ixgbe/ixgbe.c
diff -u src/sys/dev/pci/ixgbe/ixgbe.c:1.125 src/sys/dev/pci/ixgbe/ixgbe.c:1.126
--- src/sys/dev/pci/ixgbe/ixgbe.c:1.125	Tue Feb 20 08:49:23 2018
+++ src/sys/dev/pci/ixgbe/ixgbe.c	Thu Feb 22 10:02:08 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.125 2018/02/20 08:49:23 knakahara Exp $ */
+/* $NetBSD: ixgbe.c,v 1.126 2018/02/22 10:02:08 msaitoh Exp $ */
 
 /**
 
@@ -5768,7 +5768,7 @@ ixgbe_handle_que(void *context)
 	if (ifp->if_flags & IFF_RUNNING) {
 		more = ixgbe_rxeof(que);
 		IXGBE_TX_LOCK(txr);
-		ixgbe_txeof(txr);
+		more |= ixgbe_txeof(txr);
 		if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
 			if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
 ixgbe_mq_start_locked(ifp, txr);

Index: src/sys/dev/pci/ixgbe/ixgbe.h
diff -u src/sys/dev/pci/ixgbe/ixgbe.h:1.29 src/sys/dev/pci/ixgbe/ixgbe.h:1.30
--- src/sys/dev/pci/ixgbe/ixgbe.h:1.29	Wed Dec  6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe.h	Thu Feb 22 10:02:08 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.h,v 1.29 2017/12/06 04:08:50 msaitoh Exp $ */
+/* $NetBSD: ixgbe.h,v 1.30 2018/02/22 10:02:08 msaitoh Exp $ */
 
 /**
   SPDX-License-Identifier: BSD-3-Clause
@@ -717,7 +717,7 @@ int  ixgbe_setup_transmit_structures(str
 void ixgbe_free_transmit_structures(struct adapter *);
 int  ixgbe_setup_receive_structures(struct adapter *);
 void ixgbe_free_receive_structures(struct adapter *);
-void ixgbe_txeof(struct tx_ring *);
+bool ixgbe_txeof(struct tx_ring *);
 bool ixgbe_rxeof(struct ix_queue *);
 
 const struct sysctlnode *ixgbe_sysctl_instance(struct adapter *);

Index: src/sys/dev/pci/ixgbe/ixv.c
diff -u src/sys/dev/pci/ixgbe/ixv.c:1.80 src/sys/dev/pci/ixgbe/ixv.c:1.81
--- src/sys/dev/pci/ixgbe/ixv.c:1.80	Thu Feb 22 08:49:42 2018
+++ src/sys/dev/pci/ixgbe/ixv.c	Thu Feb 22 10:02:08 2018
@@ -1,4 +1,4 @@
-/*$NetBSD: ixv.c,v 1.80 2018/02/22 08:49:42 msaitoh Exp $*/
+/*$NetBSD: ixv.c,v 1.81 2018/02/22 10:02:08 msaitoh Exp $*/
 
 /**
 
@@ -2622,7 +2622,7 @@ ixv_handle_que(void *context)
 	if (ifp->if_flags & IFF_RUNNING) {
 		more = ixgbe_rxeof(que);
 		IXGBE_TX_LOCK(txr);
-		ixgbe_txeof(txr);
+		more |= ixgbe_txeof(txr);
 		if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
 			if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
 ixgbe_mq_start_locked(ifp, txr);

CVS commit: src/sys/arch

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 09:41:06 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c
src/sys/arch/amd64/include: pmap.h
src/sys/arch/x86/include: cpufunc.h
src/sys/arch/x86/x86: patch.c svs.c x86_machdep.c

Log Message:
Improve the SVS initialization.

Declare x86_patch_window_open() and x86_patch_window_close(), and globalify
x86_hotpatch().

Introduce svs_enable() in x86/svs.c, that does the SVS hotpatching.

Change svs_init() to take a bool. This function gets called twice; early
when the system just booted (and nothing is initialized), lately when at
least pmap_kernel has been initialized.


To generate a diff of this commit:
cvs rdiff -u -r1.298 -r1.299 src/sys/arch/amd64/amd64/machdep.c
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/amd64/include/pmap.h
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/x86/include/cpufunc.h
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/x86/x86/patch.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/x86/x86/svs.c
cvs rdiff -u -r1.104 -r1.105 src/sys/arch/x86/x86/x86_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.298 src/sys/arch/amd64/amd64/machdep.c:1.299
--- src/sys/arch/amd64/amd64/machdep.c:1.298	Sun Feb 11 09:39:36 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Thu Feb 22 09:41:06 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.298 2018/02/11 09:39:36 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.299 2018/02/22 09:41:06 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.298 2018/02/11 09:39:36 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.299 2018/02/22 09:41:06 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1598,6 +1598,7 @@ init_x86_64(paddr_t first_avail)
 	uvm_lwp_setuarea(&lwp0, lwp0uarea);
 
 	cpu_probe(&cpu_info_primary);
+	svs_init(true);
 	cpu_init_msrs(&cpu_info_primary, true);
 
 	use_pae = 1; /* PAE always enabled in long mode */

Index: src/sys/arch/amd64/include/pmap.h
diff -u src/sys/arch/amd64/include/pmap.h:1.43 src/sys/arch/amd64/include/pmap.h:1.44
--- src/sys/arch/amd64/include/pmap.h:1.43	Sun Feb 18 14:07:29 2018
+++ src/sys/arch/amd64/include/pmap.h	Thu Feb 22 09:41:06 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.h,v 1.43 2018/02/18 14:07:29 maxv Exp $	*/
+/*	$NetBSD: pmap.h,v 1.44 2018/02/22 09:41:06 maxv Exp $	*/
 
 /*
  * Copyright (c) 1997 Charles D. Cranor and Washington University.
@@ -221,6 +221,7 @@
 void svs_pmap_sync(struct pmap *, int);
 void svs_lwp_switch(struct lwp *, struct lwp *);
 void svs_pdir_switch(struct pmap *);
+void svs_init(bool);
 extern bool svs_enabled;
 
 #include 

Index: src/sys/arch/x86/include/cpufunc.h
diff -u src/sys/arch/x86/include/cpufunc.h:1.23 src/sys/arch/x86/include/cpufunc.h:1.24
--- src/sys/arch/x86/include/cpufunc.h:1.23	Sun Oct 15 11:31:00 2017
+++ src/sys/arch/x86/include/cpufunc.h	Thu Feb 22 09:41:06 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.h,v 1.23 2017/10/15 11:31:00 maxv Exp $	*/
+/*	$NetBSD: cpufunc.h,v 1.24 2018/02/22 09:41:06 maxv Exp $	*/
 
 /*-
  * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
@@ -50,6 +50,9 @@ void	x86_sfence(void);
 void	x86_mfence(void);
 void	x86_flush(void);
 #ifndef XEN
+void	x86_hotpatch(uint32_t, const uint8_t *, size_t);
+void	x86_patch_window_open(u_long *, u_long *);
+void	x86_patch_window_close(u_long, u_long);
 void	x86_patch(bool);
 #endif
 void	invlpg(vaddr_t);

Index: src/sys/arch/x86/x86/patch.c
diff -u src/sys/arch/x86/x86/patch.c:1.32 src/sys/arch/x86/x86/patch.c:1.33
--- src/sys/arch/x86/x86/patch.c:1.32	Thu Feb 22 08:56:52 2018
+++ src/sys/arch/x86/x86/patch.c	Thu Feb 22 09:41:06 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: patch.c,v 1.32 2018/02/22 08:56:52 maxv Exp $	*/
+/*	$NetBSD: patch.c,v 1.33 2018/02/22 09:41:06 maxv Exp $	*/
 
 /*-
  * Copyright (c) 2007, 2008, 2009 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: patch.c,v 1.32 2018/02/22 08:56:52 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: patch.c,v 1.33 2018/02/22 09:41:06 maxv Exp $");
 
 #include "opt_lockdebug.h"
 #ifdef i386
@@ -143,7 +143,7 @@ patchbytes(void *addr, const uint8_t *by
 	}
 }
 
-static void
+void
 x86_hotpatch(uint32_t name, const uint8_t *bytes, size_t size)
 {
 	extern char __rodata_hotpatch_start;
@@ -165,6 +165,30 @@ x86_hotpatch(uint32_t name, const uint8_
 }
 
 void
+x86_patch_window_open(u_long *psl, u_long *cr0)
+{
+	/* Disable interrupts. */
+	*psl = x86_read_psl();
+	x86_disable_intr();
+
+	/* Disable write protection in supervisor mode. */
+	*cr0 = rcr0();
+	lcr0(*cr0 & ~CR0_WP);
+}
+
+void
+x86_patch_window_close(u_long psl, u_long cr0)
+{
+	/* Write back and invalidate cache, flush pipelines. */
+	wbinvd();
+	x86_flush();
+	x86_write_psl(psl);
+
+	/* Re-enable write protecti

CVS commit: src/sys/arch

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 08:56:52 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S
src/sys/arch/amd64/include: frameasm.h
src/sys/arch/x86/x86: cpu.c patch.c svs.c x86_machdep.c

Log Message:
Add a dynamic detection for SVS.

The SVS_* macros are now compiled as skip-noopt. When the system boots, if
the cpu is from Intel, they are hotpatched to their real content.
Typically:

jmp 1f
int3
int3
int3
... int3 ...
1:

gets hotpatched to:

movqSVS_UTLS+UTLS_KPDIRPA,%rax
movq%rax,%cr3
movqCPUVAR(KRSP0),%rsp

These two chunks of code being of the exact same size. We put int3 (0xCC)
to make sure we never execute there.

In the non-SVS (ie non-Intel) case, all it costs is one jump. Given that
the SVS_* macros are small, this jump will likely leave us in the same
icache line, so it's pretty fast.

The syscall entry point is special, because there we use a scratch uint64_t
not in curcpu but in the UTLS page, and it's difficult to hotpatch this
properly. So instead of hotpatching we declare the entry point as an ASM
macro, and define two functions: syscall and syscall_svs, the latter being
the one used in the SVS case.

While here 'syscall' is optimized not to contain an SVS_ENTER - this way
we don't even need to do a jump on the non-SVS case.

When adding pages in the user page tables, make sure we don't have PG_G,
now that it's dynamic.

A read-only sysctl is added, machdep.svs_enabled, that tells whether the
kernel uses SVS or not.

More changes to come, svs_init() is not very clean.


To generate a diff of this commit:
cvs rdiff -u -r1.151 -r1.152 src/sys/arch/amd64/amd64/locore.S
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/amd64/include/frameasm.h
cvs rdiff -u -r1.147 -r1.148 src/sys/arch/x86/x86/cpu.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/x86/x86/patch.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/x86/x86/svs.c
cvs rdiff -u -r1.103 -r1.104 src/sys/arch/x86/x86/x86_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.151 src/sys/arch/amd64/amd64/locore.S:1.152
--- src/sys/arch/amd64/amd64/locore.S:1.151	Sun Feb 18 14:07:29 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Feb 22 08:56:51 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.151 2018/02/18 14:07:29 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.152 2018/02/22 08:56:51 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1117,17 +1117,27 @@ ENTRY(cpu_switchto)
 
 	/* Switch ring0 stack */
 #ifdef SVS
+	movb	_C_LABEL(svs_enabled),%al
+	testb	%al,%al
+	jz	.Lno_svs_switch
+
 	movq	CPUVAR(RSP0),%rax
 	movq	CPUVAR(TSS),%rdi
 	movq	%rax,TSS_RSP0(%rdi)
-#elif !defined(XEN)
+	jmp	.Lring0_switched
+
+.Lno_svs_switch:
+#endif
+
+#if !defined(XEN)
 	movq	PCB_RSP0(%r14),%rax
 	movq	CPUVAR(TSS),%rdi
 	movq	%rax,TSS_RSP0(%rdi)
 #else
 	movq	%r14,%rdi
-	callq	_C_LABEL(x86_64_switch_context);
+	callq	_C_LABEL(x86_64_switch_context)
 #endif
+.Lring0_switched:
 
 	/* Don't bother with the rest if switching to a system process. */
 	testl	$LW_SYSTEM,L_FLAG(%r12)
@@ -1347,9 +1357,10 @@ END(lwp_trampoline)
 /*
  * Entry points of the 'syscall' instruction, 64bit and 32bit mode.
  */
-	TEXT_USER_BEGIN
 
-IDTVEC(syscall)
+
+.macro	SYSCALL_ENTRY	name,is_svs
+IDTVEC(\name)
 #ifndef XEN
 	/*
 	 * The user %rip is in %rcx and the user %rflags in %r11. The kernel %cs
@@ -1365,31 +1376,39 @@ IDTVEC(syscall)
 	 */
 	swapgs
 
-#ifdef SVS
-	movq	%rax,SVS_UTLS+UTLS_SCRATCH
-	movq	SVS_UTLS+UTLS_RSP0,%rax
-#define SP(x)	(x)-(TF_SS+8)(%rax)
-#else
-	movq	%r15,CPUVAR(SCRATCH)
-	movq	CPUVAR(CURLWP),%r15
-	movq	L_PCB(%r15),%r15
-	movq	PCB_RSP0(%r15),%r15	/* LWP's kernel stack pointer */
-#define SP(x)	(x)-(TF_SS+8)(%r15)
-#endif
+#define SP(x,reg)	(x)-(TF_SS+8)(reg)
 
-	/* Make stack look like an 'int nn' frame */
-	movq	$(LSEL(LUDATA_SEL, SEL_UPL)),SP(TF_SS)	/* user %ss */
-	movq	%rsp,SP(TF_RSP)/* user %rsp */
-	movq	%r11,SP(TF_RFLAGS)			/* user %rflags */
-	movq	$(LSEL(LUCODE_SEL, SEL_UPL)),SP(TF_CS)	/* user %cs */
-	movq	%rcx,SP(TF_RIP)/* user %rip */
+	.if	\is_svs
+		movq	%rax,SVS_UTLS+UTLS_SCRATCH
+		movq	SVS_UTLS+UTLS_RSP0,%rax
+
+		/* Make stack look like an 'int nn' frame */
+		movq	$(LSEL(LUDATA_SEL, SEL_UPL)),SP(TF_SS,%rax)	/* user %ss */
+		movq	%rsp,SP(TF_RSP,%rax)/* user %rsp */
+		movq	%r11,SP(TF_RFLAGS,%rax)/* user %rflags */
+		movq	$(LSEL(LUCODE_SEL, SEL_UPL)),SP(TF_CS,%rax)	/* user %cs */
+		movq	%rcx,SP(TF_RIP,%rax)/* user %rip */
+		leaq	SP(0,%rax),%rsp			/* %rsp now valid after frame */
+
+		movq	SVS_UTLS+UTLS_SCRATCH,%rax
+	.else
+		movq	%r15,CPUVAR(SCRATCH)
+		movq	CPUVAR(CURLWP),%r15
+		movq	L_PCB(%r15),%r15
+		movq	PCB_RSP0(%r15),%r15	/* LWP's kernel stack pointer */
+
+		/* Mak

CVS commit: src/sys/dev/pci/ixgbe

2018-02-22 Thread SAITOH Masanobu 
Module Name:src
Committed By:   msaitoh
Date:   Thu Feb 22 08:49:42 UTC 2018

Modified Files:
src/sys/dev/pci/ixgbe: ixv.c

Log Message:
- Apply ixgbe.c rev. 1.124 to ixv.c. Fix a bug that RX may stall on heavy load
 on ixv(4) derived from FreeBSD's AIM (Auto Interrupt Moderation) bug.
 ITR_INTERVAL value must be larger than 4us.

- The bitfield of EITR register is different between 82598 and others.
 ixv.c had a bug that it accessed 82598's way even though only 82599 and
 newer support virtual function. Fix it using with new ixv_eitr_write()
 function.


To generate a diff of this commit:
cvs rdiff -u -r1.79 -r1.80 src/sys/dev/pci/ixgbe/ixv.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/ixgbe/ixv.c
diff -u src/sys/dev/pci/ixgbe/ixv.c:1.79 src/sys/dev/pci/ixgbe/ixv.c:1.80
--- src/sys/dev/pci/ixgbe/ixv.c:1.79	Fri Feb 16 10:11:21 2018
+++ src/sys/dev/pci/ixgbe/ixv.c	Thu Feb 22 08:49:42 2018
@@ -1,4 +1,4 @@
-/*$NetBSD: ixv.c,v 1.79 2018/02/16 10:11:21 msaitoh Exp $*/
+/*$NetBSD: ixv.c,v 1.80 2018/02/22 08:49:42 msaitoh Exp $*/
 
 /**
 
@@ -118,6 +118,7 @@ static int	ixv_sysctl_debug(SYSCTLFN_PRO
 static void	ixv_set_ivar(struct adapter *, u8, u8, s8);
 static void	ixv_configure_ivars(struct adapter *);
 static u8 *	ixv_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
+static void	ixv_eitr_write(struct ix_queue *, uint32_t);
 
 static void	ixv_setup_vlan_support(struct adapter *);
 #if 0
@@ -867,8 +868,7 @@ ixv_msix_que(void *arg)
 	 *the last interval.
 	 */
 	if (que->eitr_setting)
-		IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEITR(que->msix),
-		que->eitr_setting);
+		ixv_eitr_write(que, que->eitr_setting);
 
 	que->eitr_setting = 0;
 
@@ -891,7 +891,17 @@ ixv_msix_que(void *arg)
 	else
 		newitr = (newitr / 2);
 
-	newitr |= newitr << 16;
+	/*
+	 * When RSC is used, ITR interval must be larger than RSC_DELAY.
+	 * Currently, we use 2us for RSC_DELAY. The minimum value is always
+	 * greater than 2us on 100M (and 10M?(not documented)), but it's not
+	 * on 1G and higher.
+	 */
+	if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
+	&& (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
+		if (newitr < IXGBE_MIN_RSC_EITR_10G1G)
+			newitr = IXGBE_MIN_RSC_EITR_10G1G;
+	}
 
 	/* save for next interrupt */
 	que->eitr_setting = newitr;
@@ -932,6 +942,21 @@ ixv_msix_mbx(void *arg)
 	return 1;
 } /* ixv_msix_mbx */
 
+static void
+ixv_eitr_write(struct ix_queue *que, uint32_t itr)
+{
+	struct adapter *adapter = que->adapter;
+
+	/*
+	 * Newer devices than 82598 have VF function, so this function is
+	 * simple.
+	 */
+	itr |= IXGBE_EITR_CNT_WDIS;
+
+	IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEITR(que->msix), itr);
+}
+
+
 /
  * ixv_media_status - Media Ioctl callback
  *
@@ -1943,14 +1968,15 @@ ixv_configure_ivars(struct adapter *adap
 {
 	struct ix_queue *que = adapter->queues;
 
+	/* XXX We should sync EITR value calculation with ixgbe.c? */
+
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		/* First the RX queue entry */
 		ixv_set_ivar(adapter, i, que->msix, 0);
 		/* ... and the TX */
 		ixv_set_ivar(adapter, i, que->msix, 1);
 		/* Set an initial value in EITR */
-		IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEITR(que->msix),
-		IXGBE_EITR_DEFAULT);
+		ixv_eitr_write(que, IXGBE_EITR_DEFAULT);
 	}
 
 	/* For the mailbox interrupt */

CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard 
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 08:36:31 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Revert all my latest changes, and restore this file back to how it was
in rev1.24. I wanted to replace the functions dynamically for SVS, but
that was a dumb idea, we'll just hotpatch instead.


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.32 src/sys/arch/amd64/amd64/amd64_trap.S:1.33
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.32	Sun Feb 18 14:32:31 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Thu Feb 22 08:36:31 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.32 2018/02/18 14:32:31 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.33 2018/02/22 08:36:31 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -95,48 +95,27 @@
 #define	PRE_TRAP
 #endif
 
-#ifdef XEN
-/*
- * I don't believe XEN generates in-kernel traps for the
- * equivalent of iret, if it does this code would be needed
- * in order to copy the user segment registers into the fault frame.
- */
-#define check_swapgs alltraps
-#endif
+#define TRAPENTRY			\
+	INTRENTRY			; \
+	jmp	.Lalltraps_noentry
 
-#define	TRAP(a)		PRE_TRAP ; pushq $(a)
-#define	ZTRAP(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
+#define	TRAP_NJ(a)	PRE_TRAP ; pushq $(a)
+#define	ZTRAP_NJ(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
+#define	TRAP(a)		TRAP_NJ(a) ; TRAPENTRY
+#define	ZTRAP(a)	ZTRAP_NJ(a) ; TRAPENTRY
 
-.macro	TRAP_ENTRY_POINT	name,code,is_ztrap
-IDTVEC(\name)
-	.if	\is_ztrap
-		ZTRAP(\code)
-	.else
-		TRAP(\code)
-	.endif
-	INTRENTRY
-	jmp	.Lalltraps_noentry
-IDTVEC_END(\name)
-.endm
+	.text
 
-.macro	TRAP_ENTRY_POINT_SWAPGS	name,code,is_ztrap
-IDTVEC(\name)
-	.if	\is_ztrap
-		ZTRAP(\code)
-	.else
-		TRAP(\code)
-	.endif
-	jmp	check_swapgs
-IDTVEC_END(\name)
-.endm
+	TEXT_USER_BEGIN
+
+IDTVEC(trap00)
+	ZTRAP(T_DIVIDE)
+IDTVEC_END(trap00)
+
+IDTVEC(trap01)
+	ZTRAP(T_TRCTRAP)
+IDTVEC_END(trap01)
 
-.macro	TRAP_ENTRY_POINT_NMI	name,code
-IDTVEC(\name)
-	ZTRAP(\code)
-#if defined(XEN)
-	INTRENTRY
-	jmp	.Lalltraps_noentry
-#else
 /*
  * Non Maskable Interrupts are a special case: they can be triggered even
  * with interrupts disabled, and once triggered they block further NMIs
@@ -148,6 +127,11 @@ IDTVEC(\name)
  * We need to be careful about %gs too, because it is possible that we were
  * running in kernel mode with a userland %gs.
  */
+IDTVEC(trap02)
+#if defined(XEN)
+	ZTRAP(T_NMI)
+#else
+	ZTRAP_NJ(T_NMI)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	SVS_ENTER_ALTSTACK
@@ -182,16 +166,14 @@ IDTVEC(\name)
 	addq	$TF_REGSIZE+16,%rsp
 	iretq
 #endif
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap02)
 
-.macro	TRAP_ENTRY_POINT_BPT	name,code
-IDTVEC(\name)
-	ZTRAP(\code)
-	INTRENTRY
+IDTVEC(trap03)
 #ifndef KDTRACE_HOOKS
-	jmp	.Lalltraps_noentry
+	ZTRAP(T_BPTFLT)
 #else
+	ZTRAP_NJ(T_BPTFLT)
+	INTRENTRY
 	STI(si)
 	/*
 	 * DTrace Function Boundary Trace (fbt) probes are triggered
@@ -213,12 +195,22 @@ IDTVEC(\name)
 	movq	dtrace_invop_jump_addr, %rax
 	jmpq	*dtrace_invop_jump_addr
 #endif
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap03)
 
-.macro	TRAP_ENTRY_POINT_DNA	name,code
-IDTVEC(\name)
-	ZTRAP(\code)
+IDTVEC(trap04)
+	ZTRAP(T_OFLOW)
+IDTVEC_END(trap04)
+
+IDTVEC(trap05)
+	ZTRAP(T_BOUND)
+IDTVEC_END(trap05)
+
+IDTVEC(trap06)
+	ZTRAP(T_PRIVINFLT)
+IDTVEC_END(trap06)
+
+IDTVEC(trap07)
+	ZTRAP_NJ(T_DNA)
 	INTRENTRY
 #ifdef DIAGNOSTIC
 	movl	CPUVAR(ILEVEL),%ebx
@@ -226,20 +218,17 @@ IDTVEC(\name)
 	movq	%rsp,%rdi
 	call	_C_LABEL(fpudna)
 	jmp	.Lalltraps_checkusr
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap07)
 
-.macro	TRAP_ENTRY_POINT_DOUBLE	name,code
-IDTVEC(\name)
-	TRAP(\code)
-#if defined(XEN)
-	INTRENTRY
-	jmp	.Lalltraps_noentry
-#else
 /*
  * Double faults execute on a particular stack, and we must not jump out
  * of it. So don't enable interrupts.
  */
+IDTVEC(trap08)
+#if defined(XEN)
+	TRAP(T_DOUBLEFLT)
+#else
+	TRAP_NJ(T_DOUBLEFLT)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	SVS_ENTER_ALTSTACK
@@ -268,16 +257,56 @@ IDTVEC(\name)
 	addq	$TF_REGSIZE+16,%rsp
 	iretq
 #endif
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap08)
+
+IDTVEC(trap09)
+	ZTRAP(T_FPOPFLT)
+IDTVEC_END(trap09)
+
+IDTVEC(trap10)
+	TRAP(T_TSSFLT)
+IDTVEC_END(trap10)
+
+#ifdef XEN
+/*
+ * I don't believe XEN generates in-kernel traps for the
+ * equivalent of iret, if it does this code would be needed
+ * in order to copy the user segment registers into the fault frame.
+ */
+#define check_swapgs alltraps
+#endif
+
+IDTVEC(trap11)		/* #NP() Segment not present */
+	TRAP_NJ(T_SEGNPFLT)
+	jmp	check_swapgs
+IDTVEC_END(trap11)
+
+IDTVEC(trap12)		/* #SS() Stack exception */
+	TRAP_NJ(T_STKFLT)
+	jmp	check_swapgs
+IDTVEC_END(trap12)
+
+IDTVEC(trap13)		/* #GP()

CVS commit: src/lib/libc/stdio

2018-02-22 Thread Paul Goyette 
Module Name:src
Committed By:   pgoyette
Date:   Thu Feb 22 08:33:43 UTC 2018

Modified Files:
src/lib/libc/stdio: stdio.3

Log Message:
Remove extra "an"

Thanks to J. Lewis Muir


To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/lib/libc/stdio/stdio.3

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/lib/libc/stdio/stdio.3
diff -u src/lib/libc/stdio/stdio.3:1.26 src/lib/libc/stdio/stdio.3:1.27
--- src/lib/libc/stdio/stdio.3:1.26	Sun Sep  6 04:20:50 2015
+++ src/lib/libc/stdio/stdio.3	Thu Feb 22 08:33:43 2018
@@ -1,4 +1,4 @@
-.\"	$NetBSD: stdio.3,v 1.26 2015/09/06 04:20:50 mrg Exp $
+.\"	$NetBSD: stdio.3,v 1.27 2018/02/22 08:33:43 pgoyette Exp $
 .\"
 .\" Copyright (c) 1990, 1991, 1993
 .\"	The Regents of the University of California.  All rights reserved.
@@ -29,7 +29,7 @@
 .\"
 .\" @(#)stdio.3	8.7 (Berkeley) 4/19/94
 .\"
-.Dd September 6, 2015
+.Dd February 22, 2018
 .Dt STDIO 3
 .Os
 .Sh NAME
@@ -137,7 +137,7 @@ In fact,
 freshly-opened streams that refer to terminal devices
 default to line buffering, and
 pending output to such streams is written automatically
-whenever an such an input stream is read.
+whenever such an input stream is read.
 Note that this applies only to
 .Dq "true reads" ;
 if the read request can be satisfied by existing buffered data,