CVS commit: src/sys/dev/pci

Module Name:src Committed By: msaitoh Date: Fri Dec 21 08:29:22 UTC 2018 Modified Files: src/sys/dev/pci: if_wm.c Log Message: Fix WoL detection once again. To generate a diff of this commit: cvs rdiff -u -r1.610 -r1.611 src/sys/dev/pci/if_wm.c Please note that diffs

CVS commit: src/sys/arch/aarch64

Module Name:src Committed By: ryo Date: Fri Dec 21 08:01:01 UTC 2018 Modified Files: src/sys/arch/aarch64/aarch64: cpu.c cpufunc.c cpufunc_asm_armv8.S pmap.c src/sys/arch/aarch64/include: cpu.h cpufunc.h Log Message: - add workaround for Cavium

CVS commit: src/usr.bin/make

Module Name:src Committed By: sjg Date: Sat Dec 22 00:36:32 UTC 2018 Modified Files: src/usr.bin/make: parse.c Log Message: ParseVErrorInternal: use .PARSEDIR and apply realpath(3) if not absolute, and use .PARSEFILE for consitent results. Reviewed by: christos To

CVS commit: src

Module Name:src Committed By: msaitoh Date: Fri Dec 21 08:58:08 UTC 2018 Modified Files: src/sbin/ifconfig: ether.c extern.h ifconfig.c src/sys/net: if.c if_ethersubr.c src/sys/sys: sockio.h Log Message: Add SIOCSETHERCAP. It's used to change

CVS commit: src/doc

X1 SoC SATA. [skrll 20181214] kernel: Remove COMPAT_SVR4 and COMPAT_SVR4_32. [maxv 20181219] sqlite3: Import 3.26.0. [christos 20181219] + network: Add SIOCSETHERCAP ioctl. [msaitoh 20181221]

CVS commit: src/sys/sys

Module Name:src Committed By: msaitoh Date: Fri Dec 21 09:00:32 UTC 2018 Modified Files: src/sys/sys: param.h Log Message: Welcome to 8.99.28 (SIOCSETHERCAP addition). To generate a diff of this commit: cvs rdiff -u -r1.572 -r1.573 src/sys/sys/param.h Please note that

CVS commit: src/external/gpl3/gdb/dist/gdb

Module Name:src Committed By: mrg Date: Fri Dec 21 11:11:40 UTC 2018 Modified Files: src/external/gpl3/gdb/dist/gdb: aarch64-nbsd-tdep.c aarch64-nbsd-tdep.h src/external/gpl3/gdb/dist/gdb/config/aarch64: nbsd.mh Log Message: s/Free/Net/; s/amd64/aarch64/. To

CVS commit: src/sys/arch/evbarm/conf

Module Name:src Committed By: jmcneill Date: Fri Dec 21 14:52:12 UTC 2018 Modified Files: src/sys/arch/evbarm/conf: GENERIC64 Log Message: Add com at acpi To generate a diff of this commit: cvs rdiff -u -r1.69 -r1.70 src/sys/arch/evbarm/conf/GENERIC64 Please note that

CVS commit: src/sys/dev/acpi

Module Name:src Committed By: jmcneill Date: Fri Dec 21 14:51:12 UTC 2018 Modified Files: src/sys/dev/acpi: acpi_util.c acpi_util.h Log Message: Add acpi_dsd_integer, which reads an integer value from an ACPI 5.0 _DSD key/value package list. To generate a diff of this

CVS commit: src/sys/arch/arm/acpi

Module Name:src Committed By: jmcneill Date: Fri Dec 21 14:50:18 UTC 2018 Modified Files: src/sys/arch/arm/acpi: acpi_platform.c Log Message: Use SPCR to force console selection for com@acpi. This is needed because we may use a non-standard bus_space tag (a4x) to attach

CVS commit: src/sys/dev/acpi

Module Name:src Committed By: jmcneill Date: Fri Dec 21 14:51:47 UTC 2018 Modified Files: src/sys/dev/acpi: com_acpi.c Log Message: Support Designware APB UART To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/dev/acpi/com_acpi.c Please note that

CVS commit: src/sys/net

Module Name:src Committed By: rin Date: Sat Dec 22 04:28:30 UTC 2018 Modified Files: src/sys/net: if_bridge.c Log Message: Take the interface out of promiscuous mode in bridge_delete_member() instead of bridge_ioctl_del(). Otherwise, the member interfaces are left in

CVS commit: src/external/public-domain/sqlite/dist

Module Name:src Committed By: christos Date: Sat Dec 22 03:22:19 UTC 2018 Modified Files: src/external/public-domain/sqlite/dist: sqlite3.c Log Message: remove stray line To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18

CVS commit: src/sys/arch

Module Name:src Committed By: cherry Date: Sat Dec 22 06:59:27 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_mainbus.c src/sys/arch/i386/i386: i386_mainbus.c src/sys/arch/xen/x86: xen_mainbus.c Log Message: Don't forget pedigree. Re-introduce

CVS commit: src/sys/arch

Module Name:src Committed By: cherry Date: Sat Dec 22 06:33:37 UTC 2018 Modified Files: src/sys/arch/amd64/conf: files.amd64 src/sys/arch/i386/conf: files.i386 src/sys/arch/xen/conf: files.xen Added Files: src/sys/arch/amd64/amd64: amd64_mainbus.c

CVS commit: src/sys/arch

Module Name:src Committed By: cherry Date: Sat Dec 22 07:45:59 UTC 2018 Modified Files: src/sys/arch/amd64/amd64: amd64_mainbus.c src/sys/arch/amd64/conf: XEN3_DOM0 files.amd64 src/sys/arch/i386/conf: XEN3PAE_DOM0 files.i386 src/sys/arch/i386/i386: