CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: snj
Date: Mon Feb 19 19:24:43 UTC 2018
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: cpufunc_asm_arm11x6.S
Log Message:
Pull up following revision(s) (requested by skrll in ticket #1555):
sys/arch/arm/arm/cpufunc_asm_arm11x6.S: 1.10
PR/52934: Yasushi Oshima: Apply the erratum fix that was applied to wbinv_range
to isync_range so that we don't hang when we try to sync from execcmd_readvn().
To generate a diff of this commit:
cvs rdiff -u -r1.7.2.1 -r1.7.2.2 src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S
diff -u src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S:1.7.2.1 src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S:1.7.2.2
--- src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S:1.7.2.1 Sun Jul 23 06:14:03 2017
+++ src/sys/arch/arm/arm/cpufunc_asm_arm11x6.S Mon Feb 19 19:24:43 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_arm11x6.S,v 1.7.2.1 2017/07/23 06:14:03 snj Exp $ */
+/* $NetBSD: cpufunc_asm_arm11x6.S,v 1.7.2.2 2018/02/19 19:24:43 snj Exp $ */
/*
* Copyright (c) 2007 Microsoft
@@ -63,7 +63,7 @@
#include
#include
-RCSID("$NetBSD: cpufunc_asm_arm11x6.S,v 1.7.2.1 2017/07/23 06:14:03 snj Exp $")
+RCSID("$NetBSD: cpufunc_asm_arm11x6.S,v 1.7.2.2 2018/02/19 19:24:43 snj Exp $")
#if 0
#define Invalidate_I_cache(Rtmp1, Rtmp2) \
@@ -137,6 +137,11 @@ ENTRY_NP(arm11x6_flush_prefetchbuf)
END(arm11x6_flush_prefetchbuf)
ENTRY_NP(arm11x6_icache_sync_range)
+ ldr r2, .Larm_pcache
+ ldr r2, [r2, #DCACHE_SIZE]
+ cmp r1, r2
+ bge arm11x6_icache_sync_all
+
add r1, r1, r0
sub r1, r1, #1
/* Erratum ARM1136 371025, workaround #2 */
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: snj
Date: Fri Feb 26 22:25:07 UTC 2016
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: disassem.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #1104):
sys/arch/arm/arm/disassem.c: revisions 1.29-1.34
Remove duplicate entry
--
Document 'e'
--
Remove incorrect entries
--
More instructions. Lots left to do.
--
Move /* A5.2.10 Synchronisation primitives */ block earlier so it
matches correctly
--
Move mcrr and mrrc up the list so they match ahead of ldc/ldc2
To generate a diff of this commit:
cvs rdiff -u -r1.24.4.3 -r1.24.4.4 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.24.4.3 src/sys/arch/arm/arm/disassem.c:1.24.4.4
--- src/sys/arch/arm/arm/disassem.c:1.24.4.3 Fri May 15 04:12:07 2015
+++ src/sys/arch/arm/arm/disassem.c Fri Feb 26 22:25:07 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.24.4.3 2015/05/15 04:12:07 snj Exp $ */
+/* $NetBSD: disassem.c,v 1.24.4.4 2016/02/26 22:25:07 snj Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.24.4.3 2015/05/15 04:12:07 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.24.4.4 2016/02/26 22:25:07 snj Exp $");
#include
@@ -71,15 +71,21 @@ __KERNEL_RCSID(0, "$NetBSD: disassem.c,v
* the instruction. The only exception is the writeback flag which
* follows a operand.
*
- *
+ * !c - cps flags and mode
+ * !d - debug option (bit 0-3)
+ * !l - dmb/dsb limitation
+ * !m - mode
* 2 - print Operand 2 of a data processing instruction
* a - address operand of ldr/str instruction
* b - branch address
* c - comment field bits(0-23)
* d - destination register (bits 12-15)
+ * e - address operand of ldrx/strx instruction
* f - 1st fp operand (register) (bits 12-14)
* g - 2nd fp operand (register) (bits 16-18)
* h - 3rd fp operand (register/immediate) (bits 0-4)
+ * i - lsb operand (bits 7-11)
+ * j - msb operand (bits 6,7,12-14)
* k - breakpoint comment (bits 0-3, 8-19)
* l - register list for ldm/stm instruction
* m - m register (bits 0-3)
@@ -87,6 +93,7 @@ __KERNEL_RCSID(0, "$NetBSD: disassem.c,v
* o - indirect register rn (bits 16-19) (used by swap)
* p - saved or current status register
* q - neon N register (7, 19-16)
+ * r - width minus 1 (bits 16-20)
* s - s register (bits 8-11)
* t - thumb branch address (bits 24, 0-23)
* u - neon M register (5, 3-0)
@@ -95,6 +102,7 @@ __KERNEL_RCSID(0, "$NetBSD: disassem.c,v
* x - instruction in hex
* y - co-processor data processing registers
* z - co-processor register transfer registers
+ * C - cps effect
* D - destination-is-r15 (P) flag on TST, TEQ, CMP, CMN
* F - PSR transfer fields
* I - NEON operand size
@@ -120,62 +128,140 @@ struct arm32_insn {
};
static const struct arm32_insn arm32_i[] = {
-{ 0x0fff, 0x0ff0, "imb", "c" }, /* Before swi */
-{ 0x0fff, 0x0ff1, "imbrange", "c" }, /* Before swi */
-{ 0x0fff, 0x0320f003, "yield", "" }, /* Before swi */
-{ 0x0fff, 0x0320f002, "wfe", "" }, /* Before swi */
-{ 0x0fff, 0x0320f003, "wfi", "" }, /* Before swi */
-{ 0x0f00, 0x0f00, "swi", "c" },
+/* A5.7 Unconditional instructions */
+/*
+ * A5.7.1 Memory hints, Advanced SIMD instructions, and
+ * miscellaneous instructions
+ */
+{ 0xfff10020, 0xf100, "cps", "C!c" },
+{ 0xfff100f0, 0xf101, "setend\tle", "" },
+{ 0xfff102f0, 0xf1010200, "setend\tbe", "" },
+/* pli */
+/* pld */
+{ 0x, 0xf57ff01f, "clrex", "" },
+{ 0xfff0, 0xf57ff040, "dsb","!l" },
+{ 0xfff0, 0xf57ff050, "dmb","!l" },
+{ 0xfff0, 0xf57ff060, "isb","" },
+/* pli */
+/* pld */
+
+//{ 0x0e10, 0x0800, "stm", "XnWl" },
+{ 0xfe5fffe0, 0xf84d0500, "srs", "XnW!m" },
+{ 0xfe50, 0xf8100a00, "rfe", "XnW" },
{ 0xfe00, 0xfa00, "blx", "t" }, /* Before b and bl */
-{ 0x0f00, 0x0a00, "b", "b" },
-{ 0x0f00, 0x0b00, "bl", "b" },
-{ 0x0fe000f0, 0x0090, "mul", "Snms" },
-{ 0x0fe000f0, 0x00200090, "mla", "Snmsd" },
-{ 0x0fe000f0, 0x00800090, "umull", "Sdnms" },
-{ 0x0fe000f0, 0x00c00090, "smull", "Sdnms" },
-{ 0x0fe000f0, 0x00a00090, "umlal", "Sdnms" },
-{ 0x0fe000f0, 0x00e00090, "smlal", "Sdnms" },
+{ 0xfe100090, 0xfc00, "stc2", "L#v" },
+{ 0x0e100090, 0x0c00, "stc", "L#v" },
+{ 0x0ff0, 0x0c40, "mcrr", "#&" },
+{ 0x0ff0, 0x0c50, "mrrc", "#&" },
+{ 0xfe100090, 0xfc10, "ldc2", "L#v" },
+{ 0x0e100090, 0x0c10, "ldc", "L#v" },
+{ 0xff10, 0xfe00, "cdp2", "#y" },
+{ 0x0f10, 0x0e00, "cdp", "#y" },
+{ 0xff100010, 0xfe10, "mcr2", "#z" },
+{
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: snj
Date: Tue Jan 12 10:16:50 UTC 2016
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: cpufunc.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #1060):
sys/arch/arm/arm/cpufunc.c: revision 1.159
PR port-arm/50512: Source code condition impossible
Fix condition which broke ARM1136 function selection when ARM1176 support
was added
To generate a diff of this commit:
cvs rdiff -u -r1.150.2.1 -r1.150.2.2 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.150.2.1 src/sys/arch/arm/arm/cpufunc.c:1.150.2.2
--- src/sys/arch/arm/arm/cpufunc.c:1.150.2.1 Wed May 27 05:33:29 2015
+++ src/sys/arch/arm/arm/cpufunc.c Tue Jan 12 10:16:50 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.150.2.1 2015/05/27 05:33:29 msaitoh Exp $ */
+/* $NetBSD: cpufunc.c,v 1.150.2.2 2016/01/12 10:16:50 snj Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150.2.1 2015/05/27 05:33:29 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150.2.2 2016/01/12 10:16:50 snj Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -1920,7 +1920,7 @@ set_cpufuncs(void)
cputype == CPU_ID_ARM1176JZS) {
cpufuncs = arm11_cpufuncs;
#if defined(CPU_ARM1136)
- if (cputype == CPU_ID_ARM1136JS &&
+ if (cputype == CPU_ID_ARM1136JS ||
cputype == CPU_ID_ARM1136JSR1) {
cpufuncs = arm1136_cpufuncs;
if (cputype == CPU_ID_ARM1136JS)
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src Committed By: martin Date: Tue Feb 17 15:30:34 UTC 2015 Modified Files: src/sys/arch/arm/arm [netbsd-7]: cpu_in_cksum.S Log Message: Fix previous (r1.11 missing in last pullup) To generate a diff of this commit: cvs rdiff -u -r1.8.4.1 -r1.8.4.2 src/sys/arch/arm/arm/cpu_in_cksum.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpu_in_cksum.S diff -u src/sys/arch/arm/arm/cpu_in_cksum.S:1.8.4.1 src/sys/arch/arm/arm/cpu_in_cksum.S:1.8.4.2 --- src/sys/arch/arm/arm/cpu_in_cksum.S:1.8.4.1 Mon Feb 16 21:33:13 2015 +++ src/sys/arch/arm/arm/cpu_in_cksum.S Tue Feb 17 15:30:34 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_in_cksum.S,v 1.8.4.1 2015/02/16 21:33:13 martin Exp $ */ +/* $NetBSD: cpu_in_cksum.S,v 1.8.4.2 2015/02/17 15:30:34 martin Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include machine/asm.h -RCSID($NetBSD: cpu_in_cksum.S,v 1.8.4.1 2015/02/16 21:33:13 martin Exp $) +RCSID($NetBSD: cpu_in_cksum.S,v 1.8.4.2 2015/02/17 15:30:34 martin Exp $) #include assym.h @@ -190,7 +190,7 @@ ASENTRY_NP(arm_cksumdata) #else RETc(eq) /* done */ #endif - adds r7, r7, r1 /* undo sub */ + adds r1, r1, r7 /* undo sub */ subs r7, r7, r1 lsls r7, r7, #3 #if defined(__ARMEB__)
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: martin
Date: Sun Jan 25 09:20:18 UTC 2015
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: db_trace.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #454):
sys/arch/arm/arm/db_trace.c: revision 1.31
Fix crash(8) backtrace support.
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.30.4.1 src/sys/arch/arm/arm/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/db_trace.c
diff -u src/sys/arch/arm/arm/db_trace.c:1.30 src/sys/arch/arm/arm/db_trace.c:1.30.4.1
--- src/sys/arch/arm/arm/db_trace.c:1.30 Sat Mar 29 15:48:01 2014
+++ src/sys/arch/arm/arm/db_trace.c Sun Jan 25 09:20:18 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.30 2014/03/29 15:48:01 skrll Exp $ */
+/* $NetBSD: db_trace.c,v 1.30.4.1 2015/01/25 09:20:18 martin Exp $ */
/*
* Copyright (c) 2000, 2001 Ben Harris
@@ -31,7 +31,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: db_trace.c,v 1.30 2014/03/29 15:48:01 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: db_trace.c,v 1.30.4.1 2015/01/25 09:20:18 martin Exp $);
#include sys/proc.h
#include arm/armreg.h
@@ -155,9 +155,19 @@ db_stack_trace_print(db_expr_t addr, boo
} else
frame = (uint32_t *)(addr);
}
- lastframe = NULL;
scp_offset = -(get_pc_str_offset() 2);
+ if (frame == NULL)
+ return;
+
+ lastframe = frame;
+#ifndef _KERNEL
+ uint32_t frameb[4];
+ db_read_bytes((db_addr_t)(frame - 3), sizeof(frameb),
+ (char *)frameb);
+ frame = frameb + 3;
+#endif
+
/*
* In theory, the SCP isn't guaranteed to be in the function
* that generated the stack frame. We hope for the best.
@@ -169,7 +179,7 @@ db_stack_trace_print(db_expr_t addr, boo
#endif
pc = scp;
- while (count-- frame != NULL) {
+ while (count--) {
uint32_t savecode;
int r;
uint32_t *rp;
@@ -180,14 +190,8 @@ db_stack_trace_print(db_expr_t addr, boo
#else
scp = frame[FR_SCP];
#endif
- lastframe = frame;
- (*pr)(%p: , frame);
-#ifndef _KERNEL
- uint32_t frameb[4];
- db_read_bytes((db_addr_t)(frame - 3), sizeof(frameb),
- (char *)frameb);
- frame = frameb + 3;
-#endif
+ (*pr)(%p: , lastframe);
+
db_printsym(pc, DB_STGY_PROC, pr);
if (trace_full) {
(*pr)(\n\t);
@@ -244,6 +248,9 @@ db_stack_trace_print(db_expr_t addr, boo
frame = (uint32_t *)(frame[FR_RFP]);
+ if (frame == NULL)
+ break;
+
if (INKERNEL((int)frame)) {
/* staying in kernel */
if (frame = lastframe) {
@@ -262,5 +269,11 @@ db_stack_trace_print(db_expr_t addr, boo
break;
}
}
+ lastframe = frame;
+#ifndef _KERNEL
+ db_read_bytes((db_addr_t)(frame - 3), sizeof(frameb),
+ (char *)frameb);
+ frame = frameb + 3;
+#endif
}
}
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: martin
Date: Sun Jan 4 11:40:17 UTC 2015
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: disassem.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #375):
sys/arch/arm/arm/disassem.c: revision 1.26
The mode synonyms are different for stm and ldm - handle this.
PR/49520: arm/disassem.c doesn't use proper address mode name for loads
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.24.4.1 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.24 src/sys/arch/arm/arm/disassem.c:1.24.4.1
--- src/sys/arch/arm/arm/disassem.c:1.24 Mon Mar 3 08:51:39 2014
+++ src/sys/arch/arm/arm/disassem.c Sun Jan 4 11:40:17 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.24 2014/03/03 08:51:39 matt Exp $ */
+/* $NetBSD: disassem.c,v 1.24.4.1 2015/01/04 11:40:17 martin Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.24 2014/03/03 08:51:39 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.24.4.1 2015/01/04 11:40:17 martin Exp $);
#include sys/systm.h
@@ -276,7 +276,8 @@ static char const insn_block_transfers[]
};
static char const insn_stack_block_transfers[][4] = {
- ed, ea, fd, fa
+ ed, ea, fd, fa, /* stm */
+ fa, fd, ea, ed, /* ldm */
};
static char const op_shifts[][4] = {
@@ -298,7 +299,7 @@ static char const insn_fpaconstants[][8]
#define insn_condition(x) arm32_insn_conditions[(x 28) 0x0f]
#define insn_blktrans(x) insn_block_transfers[(x 23) 3]
-#define insn_stkblktrans(x) insn_stack_block_transfers[(x 23) 3]
+#define insn_stkblktrans(x) insn_stack_block_transfers[((x (20 - 2)) 4)|((x 23) 3)]
#define op2_shift(x) op_shifts[(x 5) 3]
#define insn_fparnd(x) insn_fpa_rounding[(x 5) 0x03]
#define insn_fpaprec(x) insn_fpa_precision[(((x 18) 2)|(x 7)) 1]
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: martin
Date: Sun Jan 4 11:43:53 UTC 2015
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: disassem.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #377):
sys/arch/arm/arm/disassem.c: revision 1.27
sys/arch/arm/arm/disassem.c: revision 1.28
Trailing whitespace.
Do revision 1.20: Decode movw/movt properly.
Hi Matt.
To generate a diff of this commit:
cvs rdiff -u -r1.24.4.1 -r1.24.4.2 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.24.4.1 src/sys/arch/arm/arm/disassem.c:1.24.4.2
--- src/sys/arch/arm/arm/disassem.c:1.24.4.1 Sun Jan 4 11:40:17 2015
+++ src/sys/arch/arm/arm/disassem.c Sun Jan 4 11:43:53 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.24.4.1 2015/01/04 11:40:17 martin Exp $ */
+/* $NetBSD: disassem.c,v 1.24.4.2 2015/01/04 11:43:53 martin Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.24.4.1 2015/01/04 11:40:17 martin Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.24.4.2 2015/01/04 11:43:53 martin Exp $);
#include sys/systm.h
@@ -146,9 +146,9 @@ static const struct arm32_insn arm32_i[]
{ 0x0fff, 0x092d, push, l }, /* separate out r13 base */
{ 0x0fff, 0x08bd, pop, l }, /* separate out r13 base */
{ 0x0e1f, 0x080d, stm, YnWl },/* separate out r13 base */
-{ 0x0e1f, 0x081d, ldm, YnWl },/* separate out r13 base */
+{ 0x0e1f, 0x081d, ldm, YnWl },/* separate out r13 base */
{ 0x0e10, 0x0800, stm, XnWl },
-{ 0x0e10, 0x0810, ldm, XnWl },
+{ 0x0e10, 0x0810, ldm, XnWl },
{ 0x0ff00fff, 0x01900f9f, ldrex, da },
{ 0x0ff00fff, 0x01b00f9f, ldrexd, da },
{ 0x0ff00fff, 0x01d00f9f, ldrexb, da },
@@ -174,24 +174,24 @@ static const struct arm32_insn arm32_i[]
{ 0x0fff0ff0, 0x016f0f10, clz, dm },
{ 0x0ff0, 0x012fff30, blx, m },
{ 0xfff000f0, 0xe1200070, bkpt, k },
-{ 0x0fe0, 0x0200, and, Sdn2 },
-{ 0x0fe0, 0x0220, eor, Sdn2 },
-{ 0x0fe0, 0x0240, sub, Sdn2 },
-{ 0x0fe0, 0x0260, rsb, Sdn2 },
-{ 0x0fe0, 0x0280, add, Sdn2 },
-{ 0x0fe0, 0x02a0, adc, Sdn2 },
-{ 0x0fe0, 0x02c0, sbc, Sdn2 },
-{ 0x0fe0, 0x02e0, rsc, Sdn2 },
{ 0x0ff0, 0x0300, movw, dZ },
-{ 0x0ff0, 0x0310, tst, Dn2 },
-{ 0x0ff0, 0x0330, teq, Dn2 },
{ 0x0ff0, 0x0340, movt, dZ },
-{ 0x0ff0, 0x0350, cmp, Dn2 },
-{ 0x0ff0, 0x0370, cmn, Dn2 },
-{ 0x0fe0, 0x0380, orr, Sdn2 },
+{ 0x0de0, 0x, and, Sdn2 },
+{ 0x0de0, 0x0020, eor, Sdn2 },
+{ 0x0de0, 0x0040, sub, Sdn2 },
+{ 0x0de0, 0x0060, rsb, Sdn2 },
+{ 0x0de0, 0x0080, add, Sdn2 },
+{ 0x0de0, 0x00a0, adc, Sdn2 },
+{ 0x0de0, 0x00c0, sbc, Sdn2 },
+{ 0x0de0, 0x00e0, rsc, Sdn2 },
+{ 0x0df0, 0x0110, tst, Dn2 },
+{ 0x0df0, 0x0130, teq, Dn2 },
+{ 0x0df0, 0x0150, cmp, Dn2 },
+{ 0x0df0, 0x0170, cmn, Dn2 },
+{ 0x0de0, 0x0180, orr, Sdn2 },
{ 0x0de0, 0x01a0, mov, Sd2 },
-{ 0x0fe0, 0x03c0, bic, Sdn2 },
-{ 0x0fe0, 0x03e0, mvn, Sd2 },
+{ 0x0de0, 0x01c0, bic, Sdn2 },
+{ 0x0de0, 0x01e0, mvn, Sd2 },
{ 0x0ff08f10, 0x0e000100, adf, PRfgh },
{ 0x0ff08f10, 0x0e100100, muf, PRfgh },
{ 0x0ff08f10, 0x0e200100, suf, PRfgh },
@@ -384,7 +384,7 @@ disasm(const disasm_interface_t *di, vad
di-di_printf(#0x%08x,
(insn 0xff) (32 - rotate) |
(insn 0xff) rotate);
- } else {
+ } else {
disasm_register_shift(di, insn);
}
break;
CVS commit: [netbsd-7] src/sys/arch/arm/arm
Module Name:src
Committed By: martin
Date: Mon Nov 10 19:20:33 UTC 2014
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: ast.c
Log Message:
Actually do pullup rev 1.25 for ticket #188
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.23.4.1 src/sys/arch/arm/arm/ast.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/ast.c
diff -u src/sys/arch/arm/arm/ast.c:1.23 src/sys/arch/arm/arm/ast.c:1.23.4.1
--- src/sys/arch/arm/arm/ast.c:1.23 Fri Mar 28 21:43:49 2014
+++ src/sys/arch/arm/arm/ast.c Mon Nov 10 19:20:33 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: ast.c,v 1.23 2014/03/28 21:43:49 matt Exp $ */
+/* $NetBSD: ast.c,v 1.23.4.1 2014/11/10 19:20:33 martin Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe
@@ -41,7 +41,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: ast.c,v 1.23 2014/03/28 21:43:49 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: ast.c,v 1.23.4.1 2014/11/10 19:20:33 martin Exp $);
#include opt_ddb.h
@@ -71,9 +71,6 @@ void ast(struct trapframe *);
void
userret(struct lwp *l)
{
- /* Invoke MI userret code */
- mi_userret(l);
-
#if defined(__PROG32) defined(ARM_MMU_EXTENDED)
/*
* If our ASID got released, access via TTBR0 will have been disabled.
@@ -83,8 +80,12 @@ userret(struct lwp *l)
if (armreg_ttbcr_read() TTBCR_S_PD0) {
pmap_activate(l);
}
+ KASSERT(!(armreg_ttbcr_read() TTBCR_S_PD0));
#endif
+ /* Invoke MI userret code */
+ mi_userret(l);
+
#if defined(__PROG32) defined(DIAGNOSTIC)
KASSERT((lwp_trapframe(l)-tf_spsr IF32_bits) == 0);
#endif
