CVS commit: src/sys/arch/mips/mips

2018-03-28 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 28 17:56:52 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Leave TS and RE alone for the benefit of emips, which failed to boot even earlier after locore.S:1.211. Do this unconditionally to avoid

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 20:48:00 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Remove now duplicate code for enabling FPU before reading FPU_ID To generate a diff of this commit: cvs rdiff -u -r1.216 -r1.217

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 20:46:06 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Remove now duplicate code to read FPU_ID into t1 To generate a diff of this commit: cvs rdiff -u -r1.215 -r1.216

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 20:43:54 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Remove duplicate confused code for enabling 64bit addressing To generate a diff of this commit: cvs rdiff -u -r1.214 -r1.215

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 15:56:34 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Add duplicate code to read the FPU ID. enable & disable the FPU around it. To generate a diff of this commit: cvs rdiff -u -r1.213 -r1.214

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 15:52:43 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Move the hpcmips L1 cache disable hack up where another machine-specific hacks exists. Note that no existing kernel seems to enable this

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 15:49:45 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Add duplicate code that enables 64bit addressing under the right macro conditions that is, _LP64. The existing, previous code uses NOFPU as

CVS commit: src/sys/arch/mips/mips

2018-03-07 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Mar 7 15:44:15 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Replace early interrupt disable code. As suggested by dh, carefully disable interrupts before frobbing interrupt mask, which might trigger

CVS commit: src/sys/arch/mips/mips

2018-03-03 Thread Felix Deichmann
Module Name:src Committed By: flxd Date: Sat Mar 3 15:47:50 UTC 2018 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Add missing call to mips_dcache_compute_align() affecting "modern" MIPS (MIPS32{,R2}/MIPS64{,R2}). Thanks jmcneill@; OK skrll@. To generate

CVS commit: src/sys/arch/mips/mips

2018-01-25 Thread Maya Rashish
Module Name:src Committed By: maya Date: Fri Jan 26 05:29:43 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore_mips3.S Log Message: Don't warn about MIPS1 MULTIPROCESSOR in a mips3 file. To generate a diff of this commit: cvs rdiff -u -r1.113 -r1.114

CVS commit: src/sys/arch/mips/mips

2018-01-23 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Jan 24 03:13:36 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Clarify this is a load delay nop. To generate a diff of this commit: cvs rdiff -u -r1.209 -r1.210 src/sys/arch/mips/mips/locore.S Please

CVS commit: src/sys/arch/mips/mips

2018-01-23 Thread Maya Rashish
Module Name:src Committed By: maya Date: Wed Jan 24 03:11:30 UTC 2018 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Add whitespace for clarity. To generate a diff of this commit: cvs rdiff -u -r1.208 -r1.209 src/sys/arch/mips/mips/locore.S Please note

CVS commit: src/sys/arch/mips/mips

2018-01-22 Thread Felix Deichmann
Module Name:src Committed By: flxd Date: Mon Jan 22 18:15:57 UTC 2018 Modified Files: src/sys/arch/mips/mips: bus_space_alignstride_chipdep.c Log Message: Use right variable as revealed by previous typo... To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 \

CVS commit: src/sys/arch/mips/mips

2018-01-21 Thread Felix Deichmann
Module Name:src Committed By: flxd Date: Sun Jan 21 16:38:25 UTC 2018 Modified Files: src/sys/arch/mips/mips: bus_space_alignstride_chipdep.c Log Message: fix typo To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 \

CVS commit: src/sys/arch/mips/mips

2017-12-22 Thread Maya Rashish
Module Name:src Committed By: maya Date: Fri Dec 22 22:59:26 UTC 2017 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: Don't handle emulations overriding e_fault. No existing emulations do this. (COMPAT_IRIX did, but was removed) To generate a diff of this

CVS commit: src/sys/arch/mips/mips

2017-08-24 Thread matthew green
Module Name:src Committed By: mrg Date: Thu Aug 24 23:45:08 UTC 2017 Modified Files: src/sys/arch/mips/mips: bds_emul.S Log Message: mips_emul_daddi and mips_emul_daddiu don't exist, but there are bcemul_daddi and bcemul_daddiu here that should be used. however,

CVS commit: src/sys/arch/mips/mips

2017-08-24 Thread Maya Rashish
Module Name:src Committed By: maya Date: Thu Aug 24 14:26:16 UTC 2017 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: Eliminate redundant load delays. Machines that need load delays do not have ll/sc instructions. To generate a diff of this

CVS commit: src/sys/arch/mips/mips

2017-08-20 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Aug 20 11:06:36 UTC 2017 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: spl leak, found by mootja To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33 src/sys/arch/mips/mips/cpu_subr.c Please note

CVS commit: src/sys/arch/mips/mips

2017-08-20 Thread Maya Rashish
Module Name:src Committed By: maya Date: Sun Aug 20 09:47:14 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: use meaningful name for errata hack, dedup To generate a diff of this commit: cvs rdiff -u -r1.103 -r1.104

CVS commit: src/sys/arch/mips/mips

2017-08-20 Thread Maya Rashish
Module Name:src Committed By: maya Date: Sun Aug 20 09:21:54 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Don't need the errata workaround on user return It's reported that the MMU will block such invalid reads in userland, and it's only

CVS commit: src/sys/arch/mips/mips

2017-08-08 Thread Maya Rashish
Module Name:src Committed By: maya Date: Tue Aug 8 09:34:59 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Remove whitespace I just introduced To generate a diff of this commit: cvs rdiff -u -r1.101 -r1.102

CVS commit: src/sys/arch/mips/mips

2017-08-08 Thread Maya Rashish
Module Name:src Committed By: maya Date: Tue Aug 8 09:33:41 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: In working around loongson errata clear BTB and RAS, same as other operating systems. 15 Errata: Issue of Out-of-order in loongson

CVS commit: src/sys/arch/mips/mips

2017-07-14 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Fri Jul 14 20:32:32 UTC 2017 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: Advance the PC on breakpoint instruction to avoid infinite loop DoS! To generate a diff of this commit: cvs rdiff -u -r1.243 -r1.244

CVS commit: src/sys/arch/mips/mips

2017-07-14 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Fri Jul 14 17:54:00 UTC 2017 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: KASSERT Fires for MIPS1, disable. To generate a diff of this commit: cvs rdiff -u -r1.158 -r1.159

CVS commit: src/sys/arch/mips/mips

2017-06-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Jun 9 06:43:30 UTC 2017 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Maintain the split of physical memory into the defined freelists, but only force pool pages to VM_FREELIST_FIRST512M for non _LP64

CVS commit: src/sys/arch/mips/mips

2017-06-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Jun 9 06:39:24 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Always use XKPHYS for pool pages on _LP64; otherwise use KSEG0 To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21

CVS commit: src/sys/arch/mips/mips

2017-06-07 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Jun 8 05:46:57 UTC 2017 Modified Files: src/sys/arch/mips/mips: locore_mips1.S Log Message: Add a missing ".set at" to make previous build To generate a diff of this commit: cvs rdiff -u -r1.92 -r1.93

CVS commit: src/sys/arch/mips/mips

2017-06-07 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Jun 7 08:45:51 UTC 2017 Modified Files: src/sys/arch/mips/mips: locore_mips1.S Log Message: fix tlb_record_asids 2nd arg to match usage - it's a maximum asid value and not a mask To generate a diff of this commit: cvs rdiff

CVS commit: src/sys/arch/mips/mips

2017-06-05 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Jun 5 10:45:36 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Fix the PMAP_NO_PV_UNCACHED pmap_md_vca_add case where the pmap_update call would cause problems for pmap_remove_all case where the

CVS commit: src/sys/arch/mips/mips

2017-05-18 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu May 18 13:20:37 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Don't use index cache operations unnecessarily. To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19

CVS commit: src/sys/arch/mips/mips

2017-05-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon May 15 10:59:24 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Fix off-by-one in tlb_record_asids To generate a diff of this commit: cvs rdiff -u -r1.99 -r1.100 src/sys/arch/mips/mips/mipsX_subr.S

CVS commit: src/sys/arch/mips/mips

2017-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 15:36:46 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Remove #if 0'ed old style cache handling in pmap_md_unmap_poolpage To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18

CVS commit: src/sys/arch/mips/mips

2017-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 11:46:22 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Handle the maximum number of colors across [di]caches To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17

CVS commit: src/sys/arch/mips/mips

2017-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 09:37:13 UTC 2017 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Set mci_{,i}cache_alias_mask for all variants that can have virtual cache aliases Set ncolors appropriately These align to dcache and

CVS commit: src/sys/arch/mips/mips

2017-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 09:33:17 UTC 2017 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Really fix typo that got dcache alias mask set from icache way_mask To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57

CVS commit: src/sys/arch/mips/mips

2017-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 09:32:01 UTC 2017 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Fix typo that got dcache alias mask set from icache way_mask To generate a diff of this commit: cvs rdiff -u -r1.55 -r1.56

CVS commit: src/sys/arch/mips/mips

2017-05-12 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri May 12 06:49:31 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Sprinkle some KASSERTs To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/mips/mips/pmap_machdep.c Please

CVS commit: src/sys/arch/mips/mips

2017-05-12 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri May 12 06:43:42 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Code style and add a comment To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/mips/mips/pmap_machdep.c

CVS commit: src/sys/arch/mips/mips

2017-05-12 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri May 12 06:38:18 UTC 2017 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Don't access pg before the KASSERT it's not NULL To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14

CVS commit: src/sys/arch/mips/mips

2017-05-11 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu May 11 09:09:54 UTC 2017 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Fix non-DIAGNOSTIC build To generate a diff of this commit: cvs rdiff -u -r1.157 -r1.158 src/sys/arch/mips/mips/vm_machdep.c Please

CVS commit: src/sys/arch/mips/mips

2017-05-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed May 10 22:23:13 UTC 2017 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Add a KASSERT To generate a diff of this commit: cvs rdiff -u -r1.156 -r1.157 src/sys/arch/mips/mips/vm_machdep.c Please note that

CVS commit: src/sys/arch/mips/mips

2017-05-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed May 10 22:19:31 UTC 2017 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Make cpu_uarea_{alloc,free} conditional on PMAP_{,UN}MAP_POOLPAGE and use PMAP_{,UN}_POOLPAGE to ensure cache aliases are handled

CVS commit: src/sys/arch/mips/mips

2017-05-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed May 10 12:12:21 UTC 2017 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Allow cpu_uarea_alloc to return NULL for non-system LWPs in the non-_LP64 case. That way TLB mapped KVA can be found by

CVS commit: src/sys/arch/mips/mips

2017-05-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed May 10 11:27:14 UTC 2017 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Improve comment wording. To generate a diff of this commit: cvs rdiff -u -r1.153 -r1.154 src/sys/arch/mips/mips/vm_machdep.c Please

CVS commit: src/sys/arch/mips/mips

2017-05-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 7 05:50:39 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Check the TLB entry ASID against base (a0) and limit (a1), and not limit (a1) and random register value (a2) While here shave an

CVS commit: src/sys/arch/mips/mips

2017-05-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 7 05:48:01 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Save/restore pgMask in tlb_record_asids To generate a diff of this commit: cvs rdiff -u -r1.97 -r1.98

CVS commit: src/sys/arch/mips/mips

2017-05-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 7 05:45:07 UTC 2017 Modified Files: src/sys/arch/mips/mips: mips3_clock.c mips_dsp.c mips_fpu.c mips_machdep.c Log Message: opt_multiprocessor.h police To generate a diff of this commit: cvs rdiff -u -r1.13

CVS commit: src/sys/arch/mips/mips

2017-05-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 7 04:59:19 UTC 2017 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Call an ASID an ASID in comments To generate a diff of this commit: cvs rdiff -u -r1.96 -r1.97 src/sys/arch/mips/mips/mipsX_subr.S

CVS commit: src/sys/arch/mips/mips

2017-05-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 7 04:14:20 UTC 2017 Modified Files: src/sys/arch/mips/mips: cpu_subr.c pmap_machdep.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/mips/mips/cpu_subr.c cvs rdiff -u -r1.12

CVS commit: src/sys/arch/mips/mips

2017-04-27 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Apr 27 20:05:09 UTC 2017 Modified Files: src/sys/arch/mips/mips: cache_r5k.c Log Message: Typo in comment To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/mips/mips/cache_r5k.c Please note that

CVS commit: src/sys/arch/mips/mips

2017-04-27 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Apr 27 19:40:55 UTC 2017 Modified Files: src/sys/arch/mips/mips: cache_r4k_subr.S Log Message: Typo in comment To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/mips/cache_r4k_subr.S Please note

CVS commit: src/sys/arch/mips/mips

2017-04-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Apr 22 20:32:35 UTC 2017 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Comment indentation To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/mips/mips/cache.c Please note that diffs

CVS commit: src/sys/arch/mips/mips

2017-03-01 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Mar 1 11:54:53 UTC 2017 Modified Files: src/sys/arch/mips/mips: lock_stubs_ras.S Log Message: Can't profile ras_atomic_cas_noupdate To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9

CVS commit: src/sys/arch/mips/mips

2017-02-26 Thread Chuck Silvers
Module Name:src Committed By: chs Date: Mon Feb 27 06:57:45 UTC 2017 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: in mips_emul_fp(), clear all pending FP exceptions rather than just a particular one, otherwise the kernel can take another FPU trap when it

CVS commit: src/sys/arch/mips/mips

2017-02-26 Thread Chuck Silvers
Module Name:src Committed By: chs Date: Mon Feb 27 06:56:33 UTC 2017 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: the second operand to cfc1/ctc1 isn't an FPU data register so don't make it look like one. To generate a diff of this commit: cvs rdiff

CVS commit: src/sys/arch/mips/mips

2016-12-21 Thread matthew green
Module Name:src Committed By: mrg Date: Thu Dec 22 07:56:38 UTC 2016 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: fix lp64 kvm access for many kernel addresses. in mm_md_kernacc() allow an address if it matches MIPS_KSEG0_P(). now a static n64

CVS commit: src/sys/arch/mips/mips

2016-11-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Nov 19 09:05:50 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Optimise the interrupt vector a litte. From matt@ To generate a diff of this commit: cvs rdiff -u -r1.95 -r1.96

CVS commit: src/sys/arch/mips/mips

2016-11-18 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Nov 18 16:23:40 UTC 2016 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: Sprinkle MFC0_HAZARD for previous and PARANOIA To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/mips/mips/spl.S

CVS commit: src/sys/arch/mips/mips

2016-11-18 Thread Michael Lorenz
Module Name:src Committed By: macallan Date: Fri Nov 18 13:50:36 UTC 2016 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: don't blindly zero STATUS in order to disable interrupts, instead take care to preserve bits like KX in case we catch an interrupt between

CVS commit: src/sys/arch/mips/mips

2016-11-11 Thread Maya Rashish
Module Name:src Committed By: maya Date: Fri Nov 11 16:49:30 UTC 2016 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: switch post-mfc0 call "hazard barrier" from NOP_L to MFC0_HAZARD. this means it will be applied if MIPS3 too, and now with the prior commit,

CVS commit: src/sys/arch/mips/mips

2016-11-11 Thread Maya Rashish
Module Name:src Committed By: maya Date: Fri Nov 11 16:45:14 UTC 2016 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: remove redundant NOP_L. we do not use the register immediately after load, so it's not needed. To generate a diff of this commit: cvs rdiff

CVS commit: src/sys/arch/mips/mips

2016-10-16 Thread Maxime Villard
Module Name:src Committed By: maxv Date: Sun Oct 16 10:57:58 UTC 2016 Modified Files: src/sys/arch/mips/mips: cpu_exec.c Log Message: Remove unused (and buggy) function. Not even compile-tested, but I've been told to go ahead anyway. To generate a diff of this commit:

CVS commit: src/sys/arch/mips/mips

2016-10-13 Thread Michael Lorenz
Module Name:src Committed By: macallan Date: Thu Oct 13 18:58:00 UTC 2016 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: include locore.h for MIPS3_PLUS, while there annotate some #else and #endif To generate a diff of this commit: cvs rdiff -u -r1.206

CVS commit: src/sys/arch/mips/mips

2016-10-13 Thread Michael Lorenz
Module Name:src Committed By: macallan Date: Thu Oct 13 18:54:46 UTC 2016 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: include locore.h so MIPS3_PLUS is visible and we build support for MIPS-III and newer FPUs as needed no more SIGILLs on trunc.d.* with n32

CVS commit: src/sys/arch/mips/mips

2016-10-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Oct 10 07:37:56 UTC 2016 Modified Files: src/sys/arch/mips/mips: cache_r5k.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mips/mips/cache_r5k.c Please note that

CVS commit: src/sys/arch/mips/mips

2016-10-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Oct 10 07:37:17 UTC 2016 Modified Files: src/sys/arch/mips/mips: cache_r5k.c Log Message: vaddr_t -> register_t in range cache ops To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18

CVS commit: src/sys/arch/mips/mips

2016-10-08 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Oct 8 08:19:22 UTC 2016 Modified Files: src/sys/arch/mips/mips: mips_fixup.c Log Message: Sign extend VA for cache operations. OK matt@ To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19

CVS commit: src/sys/arch/mips/mips

2016-10-07 Thread Michael Lorenz
Module Name:src Committed By: macallan Date: Sat Oct 8 00:39:53 UTC 2016 Modified Files: src/sys/arch/mips/mips: cache_r5k.c Log Message: - don't clear KX when disabling interrupts - sign extend addresses as needed - use PAGE_SIZE instead of blindly assuming 4KB now n32

CVS commit: src/sys/arch/mips/mips

2016-10-02 Thread Maya Rashish
Module Name:src Committed By: maya Date: Sun Oct 2 09:06:35 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Simplify. LOONGSON2 and MIPSNNR2 not possible. To generate a diff of this commit: cvs rdiff -u -r1.93 -r1.94

CVS commit: src/sys/arch/mips/mips

2016-09-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Sep 10 13:42:11 UTC 2016 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: Remove stray assignment. To generate a diff of this commit: cvs rdiff -u -r1.242 -r1.243 src/sys/arch/mips/mips/trap.c Please note that

CVS commit: src/sys/arch/mips/mips

2016-09-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Sep 10 13:40:14 UTC 2016 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: Fixup siginfo To generate a diff of this commit: cvs rdiff -u -r1.241 -r1.242 src/sys/arch/mips/mips/trap.c Please note that diffs are not

CVS commit: src/sys/arch/mips/mips

2016-09-05 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Sep 5 06:59:25 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Flush the dcache before syncing the icache as previous mappings (UBC) might have used the same colo(u)r and the dcache won't have

CVS commit: src/sys/arch/mips/mips

2016-09-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Sep 4 15:25:11 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Another typo... that's what you get for not compile testing To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10

CVS commit: src/sys/arch/mips/mips

2016-09-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Sep 4 15:23:15 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Typo in previous To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/mips/pmap_machdep.c Please note

CVS commit: src/sys/arch/mips/mips

2016-09-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Sep 4 15:21:54 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Safely remove non-PV_KENTER pages from pv_list To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8

CVS commit: src/sys/arch/mips/mips

2016-09-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Sep 4 07:47:12 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Sign extend va for use with cache ops To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7

CVS commit: src/sys/arch/mips/mips

2016-09-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Sep 4 07:38:45 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: More debug To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/mips/pmap_machdep.c Please note that

CVS commit: src/sys/arch/mips/mips

2016-09-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Sep 4 07:30:52 UTC 2016 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Remove old and incorrect comments To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/mips/mips/cache.c Please

CVS commit: src/sys/arch/mips/mips

2016-08-27 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Aug 27 07:22:15 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Comment consistency. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.92 -r1.93

CVS commit: src/sys/arch/mips/mips

2016-08-23 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 23 07:29:46 UTC 2016 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Whitespcae To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are

CVS commit: src/sys/arch/mips/mips

2016-08-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 22 11:34:42 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are

CVS commit: src/sys/arch/mips/mips

2016-08-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 22 11:34:06 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Can't KASSERT that a lock isn't held. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4

CVS commit: src/sys/arch/mips/mips

2016-08-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Aug 19 10:05:35 UTC 2016 Modified Files: src/sys/arch/mips/mips: cache.c lock_stubs_llsc.S lock_stubs_ras.S locore.S pmap_machdep.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/mips/mips

2016-08-18 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 18 19:25:34 UTC 2016 Modified Files: src/sys/arch/mips/mips: mips_fixup.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/mips/mips/mips_fixup.c Please note

CVS commit: src/sys/arch/mips/mips

2016-08-18 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 18 19:24:31 UTC 2016 Modified Files: src/sys/arch/mips/mips: mips_fixup.c Log Message: Make the fixup code play nicely with the current exception handlers. >From matt@ To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/mips/mips

2016-08-18 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 18 14:39:04 UTC 2016 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Initialise ci_pmap_kern_segtab in cpu_info_alloc To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28

CVS commit: src/sys/arch/mips/mips

2016-08-17 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Aug 17 22:02:19 UTC 2016 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: Spelling in comment To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/mips/mips/bus_dma.c Please note that

CVS commit: src/sys/arch/mips/mips

2016-08-17 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Aug 17 20:59:08 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: loongson whack-a-mole. - clear the top bits so the legal address check is correct. - need to sign-extend the seg offset for kernel

CVS commit: src/sys/arch/mips/mips

2016-08-16 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 16 09:55:14 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Code consistency. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.90 -r1.91

CVS commit: src/sys/arch/mips/mips

2016-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 15 14:45:31 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Fix copy shift value - hopefully this will fix LOONGSON/GDIUM To generate a diff of this commit: cvs rdiff -u -r1.89 -r1.90

CVS commit: src/sys/arch/mips/mips

2016-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 15 14:44:44 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Typo in comment To generate a diff of this commit: cvs rdiff -u -r1.88 -r1.89 src/sys/arch/mips/mips/mipsX_subr.S Please note that

CVS commit: src/sys/arch/mips/mips

2016-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 15 14:26:48 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Fix an instruction number in a comment To generate a diff of this commit: cvs rdiff -u -r1.87 -r1.88

CVS commit: src/sys/arch/mips/mips

2016-08-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 9 16:38:24 UTC 2016 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Sign extended uarea va appropriately for mips_dcache_inv_range To generate a diff of this commit: cvs rdiff -u -r1.152 -r1.153

CVS commit: src/sys/arch/mips/mips

2016-08-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 9 09:06:31 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Disable the USPACE cpu_switch_resume optimisation for 16KB PAGE_SIZE Always check for existing TLB entry and remove it Add a comment

CVS commit: src/sys/arch/mips/mips

2016-08-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 9 09:02:10 UTC 2016 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Initialise md_upte for the new lwp KASSERT that we're always direct mapped when we expect to be To generate a diff of this commit:

CVS commit: src/sys/arch/mips/mips

2016-08-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 9 08:59:08 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S vm_machdep.c Log Message: Fixup the #if to reflect when we can have non-direct mappable USPACE To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/mips/mips

2016-08-09 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Aug 9 08:56:23 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Correct a comment To generate a diff of this commit: cvs rdiff -u -r1.84 -r1.85 src/sys/arch/mips/mips/mipsX_subr.S Please note that

CVS commit: src/sys/arch/mips/mips

2016-08-08 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 8 10:21:34 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Use MFC0_HAZARD - no functional change To generate a diff of this commit: cvs rdiff -u -r1.83 -r1.84

CVS commit: src/sys/arch/mips/mips

2016-08-07 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Aug 7 07:13:57 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Fix two bugs for tlb_invalidate_addr for (PGSHIFT & 1) == 0 - t0/t1 weren't being updated when both lo0/lo1 become invalid - the

CVS commit: src/sys/arch/mips/mips

2016-08-07 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Aug 7 06:15:50 UTC 2016 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Restore a MFC0_HAZARD lost in r1.68 To generate a diff of this commit: cvs rdiff -u -r1.81 -r1.82 src/sys/arch/mips/mips/mipsX_subr.S

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