CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: skrll Date: Sun Aug 9 07:08:29 UTC 2020 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: Type consistency To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: nisimura Date: Thu Apr 2 13:03:03 UTC 2020 Modified Files: src/sys/arch/mips/ingenic: ingenic_dme.c Log Message: add miivar.h and put a stop gap to compile. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_dme.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: thorpej Date: Mon Dec 23 02:16:43 UTC 2019 Modified Files: src/sys/arch/mips/ingenic: jziic.c Log Message: No need to check cold ourselves; iic_exec() does it for us. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ingenic/jziic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: skrll Date: Fri May 19 07:43:31 UTC 2017 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_com.c ingenic_dme.c jzfb_regs.h jziic.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mips/ingenic/apbus.c cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ingenic/ingenic_com.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_dme.c cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/jzfb_regs.h cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/jziic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: skrll Date: Sat Aug 27 05:56:33 UTC 2016 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Apr 7 01:00:05 UTC 2016 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Added Files: src/sys/arch/mips/ingenic: jzfb_regs.h Log Message: moar registers, less tpyos To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/mips/ingenic/ingenic_regs.h cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ingenic/jzfb_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Wed Feb 17 20:12:42 UTC 2016 Modified Files: src/sys/arch/mips/ingenic: ingenic_rng.c Log Message: Adapt CI20 HWRNG to synchronous on-demand callback. Omit needless softint/locking dance. from riastradh@ To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_rng.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Jan 2 16:50:52 UTC 2016 Modified Files: src/sys/arch/mips/ingenic: ingenic_ehci.c Log Message: properly initialize the EHCI from Alexander Kabaev ( kan at freebsd.org ) To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_ehci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon Dec 14 23:21:23 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: jziic.c Log Message: zero out struct i2cbus_attach_args before messing with it To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/jziic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Nov 17 16:53:21 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_rng.c Log Message: Long overdue suggestions from Taylor Campbell and a few syntax/style tweaks from myself. >From Michael McConville To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_rng.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Wed Oct 14 15:44:57 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_efuse.c Log Message: add some comments To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_efuse.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Oct 8 18:20:31 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_efuse.c Log Message: fix build with INGENIC_DEBUG To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_efuse.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Oct 8 17:55:58 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_dme.c Log Message: use the MAC address passed as a property if available instead of relying on u-boot to program it into the chip for us ( which it may not do if we're not netbooting ) To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_dme.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sun Aug 30 05:09:16 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_rng.c Log Message: add attribution, no functional change. from Michael McConville To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_rng.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Fri Aug 7 17:37:54 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: - sprinkle volatile - add RNG registers - fix some comments To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Jul 11 18:54:03 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: fix tpyos To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Fri May 29 18:47:13 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: fix pasto To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon May 18 15:11:47 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: explicitly un-suspend the OTG port after PHY reset To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon May 18 15:07:53 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_var.h Log Message: pass the appropriate clock register to devices so different instances of the same driver don't have to guess also wire the ddc2 part to iic4 for now so we can see the monitor To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/mips/ingenic/apbus.c cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ingenic/ingenic_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon May 18 15:03:16 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: add some clock divider registers To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon May 4 12:23:15 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_var.h Log Message: - fix pclk calculation - report CPU clock - pass mclk to child devices - wire up pins for MSC / sdmmc To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/ingenic/apbus.c cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon May 4 12:16:24 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: moar registers ( clock and gpio related ) To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Apr 28 15:07:07 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: 'USB' -> 'USB OTG' to distinguish this one from the other USB hosts To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Apr 28 15:08:07 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: add entries for sdmmc hosts, no driver yet To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src
Committed By: macallan
Date: Tue Apr 28 15:05:45 UTC 2015
Modified Files:
src/sys/arch/mips/ingenic: ingenic_regs.h
Log Message:
add sdmmc ('MSC') registers
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/mips/ingenic/ingenic_regs.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Apr 23 01:20:20 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: more bits & registers To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Apr 21 19:57:41 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: enable clocks as needed To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Apr 21 19:56:02 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: #define some bits in the clock gating registers To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Apr 21 19:19:31 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: fix comments, add LCDC*_BASEs To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Apr 21 06:12:41 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: jziic.c Log Message: support interrupt-driven transfers To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/jziic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Wed Mar 25 11:25:10 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_var.h Log Message: - determine bus clock, pass it to devices - more clock enabling / gpio setup To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/ingenic/apbus.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Wed Mar 25 11:23:26 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: more clock and gpio stuff To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Mar 19 12:22:36 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: add SMBus registers To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Mar 19 12:22:00 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: spin up SMBus clocks before attaching drivers TODO: only enable clocks for drivers that actually attach To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 17 09:27:09 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c ingenic_ehci.c ingenic_ohci.c Log Message: set root hub vendor IDs To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/ingenic/ingenic_dwctwo.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_ehci.c \ src/sys/arch/mips/ingenic/ingenic_ohci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 17 09:26:31 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: always print the child devices' address, print irq if not -1 and a driver is actually attaching To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 17 07:25:08 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_dwctwo.c ingenic_ehci.c ingenic_ohci.c ingenic_var.h Log Message: - keep a list of devices, addresses and interrupts in apbus.c - pass irq numbers to devices - reduce magic numbers in device drivers - allow multiple instances of device drivers To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/ingenic/apbus.c \ src/sys/arch/mips/ingenic/ingenic_dwctwo.c cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_ehci.c \ src/sys/arch/mips/ingenic/ingenic_ohci.c \ src/sys/arch/mips/ingenic/ingenic_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 17 07:22:40 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: add SMBus base addresses To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 10 18:15:47 UTC 2015 Added Files: src/sys/arch/mips/ingenic: ingenic_dme.c Log Message: support CI20's onboard Ethernet controller To generate a diff of this commit: cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ingenic/ingenic_dme.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 10 18:03:18 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: flash the LED to show we're doing something ( and as a side effect make sure the USB PHY is powered up ) To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Mar 10 18:02:16 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: add gpio registers To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon Mar 9 13:23:57 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: magic number reduction To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon Mar 9 13:24:21 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: moar devices To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Mon Mar 9 13:22:37 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: moar registers To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Mar 7 15:36:16 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: add memory controller registers To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Mar 7 15:35:33 UTC 2015 Modified Files: src/sys/arch/mips/ingenic: ingenic_com.c Log Message: fix uart parameters, now speed setting actually works To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Dec 27 17:22:16 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_dwctwo.c Log Message: restrict DMA buffers to the lower 256MB -> now dwc2 DMA works To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ingenic/apbus.c cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Dec 25 05:13:50 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: - use the same parameter block as the linux driver, only with DMA disabled - reset the chip before handing it to dwc2/ now it actually detects some devices To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Dec 25 05:10:50 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: un-gate yet another clock To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Thu Dec 25 05:10:00 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: even more registers To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 18:48:52 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: apbus.c ingenic_dwctwo.c ingenic_regs.h Log Message: appease nick To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/apbus.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_dwctwo.c cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 16:16:03 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: wake up the USB ports before attaching dwctwo now it finds a root hub To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 16:15:05 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: yet more registers To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 15:13:30 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: establish interrupt do some PHY setup, now the hardware actually responds To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 15:12:23 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_com.c Log Message: establish interrupt To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 15:11:05 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: apbus.c Log Message: use defflag-ed debug options enable USB clocks before attaching dwctwo To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/apbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Tue Dec 23 15:03:56 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: moar registers To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Dec 6 14:35:47 UTC 2014 Added Files: src/sys/arch/mips/ingenic: ingenic_dwctwo.c Log Message: dwc2 attachment, doesn't do much yet To generate a diff of this commit: cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ingenic/ingenic_dwctwo.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Dec 6 14:34:57 UTC 2014 Added Files: src/sys/arch/mips/ingenic: apbus.c ingenic_var.h Log Message: peripheral bus, not really tested To generate a diff of this commit: cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ingenic/apbus.c \ src/sys/arch/mips/ingenic/ingenic_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Dec 6 14:33:34 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_regs.h Log Message: moar registers! To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_regs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/ingenic
Module Name:src Committed By: macallan Date: Sat Dec 6 14:33:18 UTC 2014 Modified Files: src/sys/arch/mips/ingenic: ingenic_com.c Log Message: sprinkle static To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/ingenic_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
