Module Name:src
Committed By: rin
Date: Mon Aug 7 01:14:19 UTC 2023
Modified Files:
src/sys/crypto/arch/arm: arm_neon.h
Log Message:
sys/crypto: aarch64: Catch up with builtin rename for GCC12
Kernel self tests successfully pass for aarch64{,eb}.
Same binary generated
Module Name:src
Committed By: rin
Date: Mon Aug 7 01:14:19 UTC 2023
Modified Files:
src/sys/crypto/arch/arm: arm_neon.h
Log Message:
sys/crypto: aarch64: Catch up with builtin rename for GCC12
Kernel self tests successfully pass for aarch64{,eb}.
Same binary generated
Module Name:src
Committed By: rin
Date: Mon Aug 7 01:07:36 UTC 2023
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_impl.h
src/sys/crypto/aes/arch/x86: aes_sse2_impl.h aes_ssse3_impl.h
src/sys/crypto/chacha/arch/arm: chacha_neon.c
Module Name:src
Committed By: rin
Date: Mon Aug 7 01:07:36 UTC 2023
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_impl.h
src/sys/crypto/aes/arch/x86: aes_sse2_impl.h aes_ssse3_impl.h
src/sys/crypto/chacha/arch/arm: chacha_neon.c
Module Name:src
Committed By: rin
Date: Mon Aug 7 00:58:35 UTC 2023
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
Log Message:
sys/crypto/{aes,chacha}/arch/arm/arm_neon.h: Sync (whitespace fix)
No binary changes.
To generate a diff of this commit:
cvs rdiff
Module Name:src
Committed By: rin
Date: Mon Aug 7 00:58:35 UTC 2023
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
Log Message:
sys/crypto/{aes,chacha}/arch/arm/arm_neon.h: Sync (whitespace fix)
No binary changes.
To generate a diff of this commit:
cvs rdiff
Module Name:src
Committed By: riastradh
Date: Sat Aug 5 11:39:18 UTC 2023
Modified Files:
src/sys/crypto/cprng_fast: cprng_fast.c
Log Message:
cprng_fast(9): Drop and retake percpu reference across cprng_strong.
cprng_strong may sleep on an adaptive lock (via
Module Name:src
Committed By: riastradh
Date: Sat Aug 5 11:39:18 UTC 2023
Modified Files:
src/sys/crypto/cprng_fast: cprng_fast.c
Log Message:
cprng_fast(9): Drop and retake percpu reference across cprng_strong.
cprng_strong may sleep on an adaptive lock (via
Module Name:src
Committed By: jmcneill
Date: Sat Nov 5 17:36:33 UTC 2022
Modified Files:
src/sys/crypto/aes: aes_impl.c
src/sys/crypto/chacha: chacha_impl.c
Log Message:
Make aes and chacha prints debug only.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: jmcneill
Date: Sat Nov 5 17:36:33 UTC 2022
Modified Files:
src/sys/crypto/aes: aes_impl.c
src/sys/crypto/chacha: chacha_impl.c
Log Message:
Make aes and chacha prints debug only.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Thu Sep 1 18:32:25 UTC 2022
Modified Files:
src/sys/crypto/cprng_fast: cprng_fast.c
Log Message:
cprng_fast(9): Assert not in pserialize read section.
This may sleep to take the global entropy lock in case it needs to be
Module Name:src
Committed By: riastradh
Date: Thu Sep 1 18:32:25 UTC 2022
Modified Files:
src/sys/crypto/cprng_fast: cprng_fast.c
Log Message:
cprng_fast(9): Assert not in pserialize read section.
This may sleep to take the global entropy lock in case it needs to be
Module Name:src
Committed By: riastradh
Date: Sun Jun 26 17:52:54 UTC 2022
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c
Log Message:
arm/aes_neon: Fix formatting of self-test failure message.
Discovered by code inspection. Remarkably, a combination of
Module Name:src
Committed By: riastradh
Date: Sun Jun 26 17:52:54 UTC 2022
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c
Log Message:
arm/aes_neon: Fix formatting of self-test failure message.
Discovered by code inspection. Remarkably, a combination of
Module Name:src
Committed By: riastradh
Date: Wed Jun 1 15:44:37 UTC 2022
Modified Files:
src/sys/crypto/cprng_fast: cprng_fast.c
Log Message:
cprng(9): cprng_fast is no longer used from interrupt context.
Rip out logic to defer reseeding to softint.
To generate a
Module Name:src
Committed By: riastradh
Date: Wed Jun 1 15:44:37 UTC 2022
Modified Files:
src/sys/crypto/cprng_fast: cprng_fast.c
Log Message:
cprng(9): cprng_fast is no longer used from interrupt context.
Rip out logic to defer reseeding to softint.
To generate a
Module Name:src
Committed By: msaitoh
Date: Sun Dec 5 04:48:35 UTC 2021
Modified Files:
src/sys/crypto/aes: aes_selftest.c
Log Message:
s/folllowing/following/
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/crypto/aes/aes_selftest.c
Please note
Module Name:src
Committed By: msaitoh
Date: Sun Dec 5 04:48:35 UTC 2021
Modified Files:
src/sys/crypto/aes: aes_selftest.c
Log Message:
s/folllowing/following/
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/crypto/aes/aes_selftest.c
Please note
Module Name:src
Committed By: jmcneill
Date: Sun Oct 17 14:45:45 UTC 2021
Modified Files:
src/sys/crypto/adiantum: adiantum.c
src/sys/crypto/aes: aes_ccm.c
src/sys/crypto/blake2: blake2s.c
Log Message:
Upgrade self-test passed messages from verbose to
Module Name:src
Committed By: jmcneill
Date: Sun Oct 17 14:45:45 UTC 2021
Modified Files:
src/sys/crypto/adiantum: adiantum.c
src/sys/crypto/aes: aes_ccm.c
src/sys/crypto/blake2: blake2s.c
Log Message:
Upgrade self-test passed messages from verbose to
Module Name:src
Committed By: gutteridge
Date: Sat Sep 4 00:33:10 UTC 2021
Modified Files:
src/sys/crypto/camellia: camellia-api.c camellia.c
Log Message:
Fix typos in comments and add missing KERNEL_RCSID
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2
Module Name:src
Committed By: gutteridge
Date: Sat Sep 4 00:33:10 UTC 2021
Modified Files:
src/sys/crypto/camellia: camellia-api.c camellia.c
Log Message:
Fix typos in comments and add missing KERNEL_RCSID
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2
Module Name:src
Committed By: christos
Date: Wed Apr 14 21:29:57 UTC 2021
Modified Files:
src/sys/crypto/adiantum: adiantum.c
Log Message:
use an enum instead of constant variables so that they work in CTASSERT.
To generate a diff of this commit:
cvs rdiff -u -r1.5
Module Name:src
Committed By: christos
Date: Wed Apr 14 21:29:57 UTC 2021
Modified Files:
src/sys/crypto/adiantum: adiantum.c
Log Message:
use an enum instead of constant variables so that they work in CTASSERT.
To generate a diff of this commit:
cvs rdiff -u -r1.5
Module Name:src
Committed By: rin
Date: Sat Nov 21 08:09:21 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c
Log Message:
Fix build with clang for earmv7hf; loadroundkey() is used only for __aarch64__.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: rin
Date: Sat Nov 21 08:09:21 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c
Log Message:
Fix build with clang for earmv7hf; loadroundkey() is used only for __aarch64__.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: jmcneill
Date: Sat Oct 10 08:24:10 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_impl.c
src/sys/crypto/chacha/arch/arm: chacha_neon_impl.c
Log Message:
Fix detection of NEON features. ID_AA64PFR0_EL1_ADV_SIMD_NONE
Module Name:src
Committed By: jmcneill
Date: Sat Oct 10 08:24:10 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_impl.c
src/sys/crypto/chacha/arch/arm: chacha_neon_impl.c
Log Message:
Fix detection of NEON features. ID_AA64PFR0_EL1_ADV_SIMD_NONE
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:31:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Gather mc_forward/backward so we can load 256 bits at once.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:31:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Gather mc_forward/backward so we can load 256 bits at once.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:30:28 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Hoist dsbd/dsbe address calculation out of loop.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:30:28 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Hoist dsbd/dsbe address calculation out of loop.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:30:08 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Tweak register usage.
- Call r12 by its usual name, ip.
- No need for r7 or r11=fp at the moment.
To generate a
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:30:08 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Tweak register usage.
- Call r12 by its usual name, ip.
- No need for r7 or r11=fp at the moment.
To generate a
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:29:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Write vtbl with {qN} rather than {d(2N)-d(2N+1)}.
Cosmetic; no functional change.
To generate a diff of this
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:29:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Write vtbl with {qN} rather than {d(2N)-d(2N+1)}.
Cosmetic; no functional change.
To generate a diff of this
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:29:02 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Issue 256-bit loads rather than pairs of 128-bit loads.
Not sure why I didn't realize you could do this before!
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:29:02 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Issue 256-bit loads rather than pairs of 128-bit loads.
Not sure why I didn't realize you could do this before!
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:58:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Reallocate registers to shave off unnecessary MOV.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:57:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Issue two 4-register ld/st, not four 2-register ld/st.
To generate a diff of this commit:
cvs rdiff -u -r1.13
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:57:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Issue two 4-register ld/st, not four 2-register ld/st.
To generate a diff of this commit:
cvs rdiff -u -r1.13
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:57:13 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Adapt aes_armv8_64.S to big-endian.
Patch mainly from (and tested by) jakllsch@ with minor tweaks by me.
To
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:58:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Reallocate registers to shave off unnecessary MOV.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:57:13 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Adapt aes_armv8_64.S to big-endian.
Patch mainly from (and tested by) jakllsch@ with minor tweaks by me.
To
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 22:48:24 UTC 2020
Modified Files:
src/sys/crypto/aes: aes_selftest.c
src/sys/crypto/aes/arch/x86: aes_sse2_subr.c
Log Message:
aes(9): Fix edge case in bitsliced SSE2 AES-CBC decryption.
Make sure
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 22:48:24 UTC 2020
Modified Files:
src/sys/crypto/aes: aes_selftest.c
src/sys/crypto/aes/arch/x86: aes_sse2_subr.c
Log Message:
aes(9): Fix edge case in bitsliced SSE2 AES-CBC decryption.
Make sure
Module Name:src
Committed By: jakllsch
Date: Tue Sep 8 17:17:32 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: files.chacha_arm
Log Message:
use correct condition
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: jakllsch
Date: Tue Sep 8 17:17:32 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: files.chacha_arm
Log Message:
use correct condition
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: jakllsch
Date: Mon Sep 7 18:06:13 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Log Message:
Fix vgetq_lane_u32 for aarch64eb with GCC
Fixes NEON AES on aarch64eb
To
Module Name:src
Committed By: jakllsch
Date: Mon Sep 7 18:06:13 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Log Message:
Fix vgetq_lane_u32 for aarch64eb with GCC
Fixes NEON AES on aarch64eb
To
Module Name:src
Committed By: jakllsch
Date: Mon Sep 7 18:05:17 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Use a working macro to detect big endian aarch64.
Fixes aarch64eb NEON ChaCha.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: jakllsch
Date: Mon Sep 7 18:05:17 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Use a working macro to detect big endian aarch64.
Fixes aarch64eb NEON ChaCha.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: riastradh
Date: Sun Aug 23 16:39:06 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_32.S
Log Message:
Adjust sp, not fp, to allocate a 32-byte temporary.
Costs another couple MOV instructions, but we can't skimp on this
Module Name:src
Committed By: riastradh
Date: Sun Aug 23 16:39:06 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_32.S
Log Message:
Adjust sp, not fp, to allocate a 32-byte temporary.
Costs another couple MOV instructions, but we can't skimp on this
Module Name:src
Committed By: riastradh
Date: Thu Aug 20 21:21:05 UTC 2020
Added Files:
src/sys/crypto/blake2: blake2s.c blake2s.h files.blake2s
Log Message:
Import small BLAKE2s implementation.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1
Module Name:src
Committed By: riastradh
Date: Thu Aug 20 21:21:05 UTC 2020
Added Files:
src/sys/crypto/blake2: blake2s.c blake2s.h files.blake2s
Log Message:
Import small BLAKE2s implementation.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1
Module Name:src
Committed By: riastradh
Date: Sun Aug 16 18:02:03 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S files.aesneon
Log Message:
Fix AES NEON code for big-endian softfp ARM.
...which is how the kernel runs. Switch to using __SOFTFP__ for
Module Name:src
Committed By: riastradh
Date: Sun Aug 16 18:02:03 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S files.aesneon
Log Message:
Fix AES NEON code for big-endian softfp ARM.
...which is how the kernel runs. Switch to using __SOFTFP__ for
Module Name:src
Committed By: rin
Date: Mon Aug 10 06:27:29 UTC 2020
Modified Files:
src/sys/crypto/aes: aes_ccm.c
Log Message:
Add hack to compile aes_ccm_tag() with -O0 for m68k for GCC8.
GCC 8 miscompiles aes_ccm_tag() for m68k with optimization level -O[12],
which
Module Name:src
Committed By: rin
Date: Mon Aug 10 06:27:29 UTC 2020
Modified Files:
src/sys/crypto/aes: aes_ccm.c
Log Message:
Add hack to compile aes_ccm_tag() with -O0 for m68k for GCC8.
GCC 8 miscompiles aes_ccm_tag() for m68k with optimization level -O[12],
which
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:49:38 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Log Message:
Fix some clang neon intrinsics.
Compile-tested only, with
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:49:38 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Log Message:
Fix some clang neon intrinsics.
Compile-tested only, with
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:48:38 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Log Message:
Use vshlq_n_s32 rather than vsliq_n_s32 with zero
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:48:38 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Log Message:
Use vshlq_n_s32 rather than vsliq_n_s32 with zero
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:00:57 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c
Log Message:
Nix outdated comment.
I implemented this parallelism a couple weeks ago.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:00:57 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c
Log Message:
Nix outdated comment.
I implemented this parallelism a couple weeks ago.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 01:59:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon_imm.h
src/sys/crypto/chacha/arch/arm: arm_neon_imm.h
Log Message:
Fix mistake in big-endian arm clang.
Swapped the two halves (only
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 01:59:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon_imm.h
src/sys/crypto/chacha/arch/arm: arm_neon_imm.h
Log Message:
Fix mistake in big-endian arm clang.
Swapped the two halves (only
Module Name:src
Committed By: riastradh
Date: Sat Aug 8 14:47:01 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S aes_neon.c aes_neon_32.S
aes_neon_impl.h aes_neon_subr.c arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Module Name:src
Committed By: riastradh
Date: Sat Aug 8 14:47:01 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S aes_neon.c aes_neon_32.S
aes_neon_impl.h aes_neon_subr.c arm_neon.h
src/sys/crypto/chacha/arch/arm: arm_neon.h
Module Name:src
Committed By: riastradh
Date: Wed Jul 29 14:23:59 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_32.S
Log Message:
Issue three more swaps to save eight stores.
Reduces code size and yields a small (~2%) cgd throughput boost.
Remove
Module Name:src
Committed By: riastradh
Date: Wed Jul 29 14:23:59 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_32.S
Log Message:
Issue three more swaps to save eight stores.
Reduces code size and yields a small (~2%) cgd throughput boost.
Remove
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 20:11:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c aes_neon_impl.h aes_neon_subr.c
arm_neon.h
Log Message:
Draft 2x vectorized neon vpaes for aarch64.
Gives a modest speed boost
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 20:11:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c aes_neon_impl.h aes_neon_subr.c
arm_neon.h
Log Message:
Draft 2x vectorized neon vpaes for aarch64.
Gives a modest speed boost
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 20:05:33 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon.c
Log Message:
Fix big-endian build with appropriate casts around vrev32q_u8.
To generate a diff of this commit:
cvs rdiff -u -r1.5
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 20:05:33 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon.c
Log Message:
Fix big-endian build with appropriate casts around vrev32q_u8.
To generate a diff of this commit:
cvs rdiff -u -r1.5
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 15:42:41 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Fix typo in comment.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 15:42:41 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Fix typo in comment.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 14:01:35 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_via.c
Log Message:
Initialize authctr in both branches.
I guess I didn't test the unaligned case, weird.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 14:01:35 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_via.c
Log Message:
Initialize authctr in both branches.
I guess I didn't test the unaligned case, weird.
To generate a diff of this commit:
cvs
On 27/07/2020 21:44, Taylor R Campbell wrote:
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:44:30 UTC 2020
Modified Files:
src/sys/crypto/aes: aes_ccm.c aes_ccm.h
Log Message:
Gather auth[16] and ctr[16] into one authctr[32].
Should appease clang.
clang
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:58:56 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: arm_neon.h chacha_neon.c
Log Message:
Note that VSRI seems to hurt here.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:58:56 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: arm_neon.h chacha_neon.c
Log Message:
Note that VSRI seems to hurt here.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:58:07 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: arm_neon.h chacha_neon.c
Log Message:
Take advantage of REV32 and TBL for 16-bit and 8-bit rotations.
However, disable use of (V)TBL on
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:57:23 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S aes_neon_32.S
src/sys/crypto/aes/arch/x86: aes_ni_64.S
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Add
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:58:07 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: arm_neon.h chacha_neon.c
Log Message:
Take advantage of REV32 and TBL for 16-bit and 8-bit rotations.
However, disable use of (V)TBL on
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:57:23 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S aes_neon_32.S
src/sys/crypto/aes/arch/x86: aes_ni_64.S
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Add
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:54:12 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Issue aese/aesmc and aesd/aesimc in pairs.
Advised by the aarch64 optimization guide; increases cgd throughput
by about
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:54:12 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Issue aese/aesmc and aesd/aesimc in pairs.
Advised by the aarch64 optimization guide; increases cgd throughput
by about
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:53:23 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S aes_neon_32.S
src/sys/crypto/aes/arch/x86: aes_ni_64.S
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:53:23 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S aes_neon_32.S
src/sys/crypto/aes/arch/x86: aes_ni_64.S
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:52:11 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
PIC for aes_neon_32.S.
Without this, tests/sys/crypto/aes/t_aes fails to start on armv7
because of R_ARM_ABS32 relocations
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:52:11 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
PIC for aes_neon_32.S.
Without this, tests/sys/crypto/aes/t_aes fails to start on armv7
because of R_ARM_ABS32 relocations
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:50:25 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Use rather than copying things from it here.
Vestige from userland build on netbsd-9 during development.
To
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:50:25 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon_64.S
Log Message:
Use rather than copying things from it here.
Vestige from userland build on netbsd-9 during development.
To
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:49:10 UTC 2020
Modified Files:
src/sys/crypto/chacha: chacha_impl.c
Log Message:
Simplify ChaCha selection and allow it to be used much earlier.
This way we can use it for cprng_fast early on. ChaCha is easy
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:49:10 UTC 2020
Modified Files:
src/sys/crypto/chacha: chacha_impl.c
Log Message:
Simplify ChaCha selection and allow it to be used much earlier.
This way we can use it for cprng_fast early on. ChaCha is easy
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:48:18 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon.c
src/sys/crypto/chacha/arch/x86: chacha_sse2.c
Log Message:
Reduce some duplication.
Shouldn't substantively hurt performance
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:48:18 UTC 2020
Modified Files:
src/sys/crypto/chacha/arch/arm: chacha_neon.c
src/sys/crypto/chacha/arch/x86: chacha_sse2.c
Log Message:
Reduce some duplication.
Shouldn't substantively hurt performance
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:45:15 UTC 2020
Modified Files:
src/sys/crypto/aes: aes_impl.c
src/sys/crypto/chacha: chacha_impl.c
Log Message:
New sysctl subtree kern.crypto.
kern.crypto.aes.selected (formerly hw.aes_impl)
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