We notice that when system wake up from OFF mode, then CS is in inactive
state until the first SPI transfer.
For our design it lead to some conflict on this I/O.
Inactive state for CS when there is no transfer should be the correct
behavior: this is the purpose of these patches.
* Change from
When SPI wake up from OFF mode, CS is in the wrong state: force it to
the inactive state.
During the system life, I monitored the CS behavior using a
oscilloscope. I also activated debug in omap2_mcspi, so I saw when
driver disable the clocks and
Each time the CS was in the correct state.
It
The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
patch implements a driver for that.
Signed-off-by: Gabor Juhos juh...@openwrt.org
Cc: David Brownell dbrown...@users.sourceforge.net
Cc: spi-devel-general@lists.sourceforge.net
---
Gregory CLEMENT gregory.clem...@free-electrons.com writes:
When SPI wake up from OFF mode, CS is in the wrong state: force it to
the inactive state.
During the system life, I monitored the CS behavior using a
oscilloscope. I also activated debug in omap2_mcspi, so I saw when
driver disable
The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
patch implements a driver for that.
Signed-off-by: Gabor Juhos juh...@openwrt.org
Cc: David Brownell dbrown...@users.sourceforge.net
Cc: spi-devel-general@lists.sourceforge.net
---
Sorry for sending this twice, i forgot to
On 11/12/2010 09:37 PM, Kevin Hilman wrote:
Gregory CLEMENTgregory.clem...@free-electrons.com writes:
When SPI wake up from OFF mode, CS is in the wrong state: force it to
the inactive state.
During the system life, I monitored the CS behavior using a
oscilloscope. I also activated debug
We notice that when system wake up from OFF mode, then CS is in inactive
state until the first SPI transfer.
For our design it lead to some conflict on this I/O.
Inactive state for CS when there is no transfer should be the correct
behavior: this is the purpose of these patches.
* Change from
When SPI wake up from OFF mode, CS is in the wrong state: force it to
the inactive state.
During the system life, I monitored the CS behavior using a oscilloscope.
I also activated debug in omap2_mcspi, so I saw when driver disable the
clocks and restore context when device is not used.
Each
On Fri, Nov 12, 2010 at 4:44 PM, Gregory CLEMENT
gregory.clem...@free-electrons.com wrote:
We notice that when system wake up from OFF mode, then CS is in inactive
state until the first SPI transfer.
For our design it lead to some conflict on this I/O.
Inactive state for CS when there is no
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