hi Grant,
Thanks!
2012/1/31 Grant Likely :
> On Wed, Dec 14, 2011 at 04:23:27PM +0800, Barry Song wrote:
>> From: Zhiwu Song
>>
>> CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
>> * Master and slave modes
>> * 8-/12-/16-/32-bit data unit
>> * 256 bytes receive data FIFO and 256 bytes tr
On Wed, Dec 14, 2011 at 04:23:27PM +0800, Barry Song wrote:
> From: Zhiwu Song
>
> CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
> * Master and slave modes
> * 8-/12-/16-/32-bit data unit
> * 256 bytes receive data FIFO and 256 bytes transmit data FIFO
> * Multi-unit frame
> * Configura
ping...
2011/12/14 Barry Song :
> From: Zhiwu Song
>
> CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
> * Master and slave modes
> * 8-/12-/16-/32-bit data unit
> * 256 bytes receive data FIFO and 256 bytes transmit data FIFO
> * Multi-unit frame
> * Configurable SPI_EN (chip select pin)
From: Zhiwu Song
CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
* Master and slave modes
* 8-/12-/16-/32-bit data unit
* 256 bytes receive data FIFO and 256 bytes transmit data FIFO
* Multi-unit frame
* Configurable SPI_EN (chip select pin) active state
* Configurable SPI_CLK polarity
*