On Oct 17, 2010, at 2:44 AM, Artem Bityutskiy wrote:
On Sat, 2010-10-16 at 19:05 -0600, Grant Likely wrote:
On Sat, Oct 16, 2010 at 1:17 PM, Artem Bityutskiy dedeki...@gmail.com
wrote:
On Tue, 2010-10-12 at 18:18 +0800, Mingkai Hu wrote:
Signed-off-by: Mingkai Hu mingkai...@freescale.com
From: Michael Hennerich michael.henner...@analog.com
The error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis. Once the error interrupt is enabled
for one peripheral, it is automatically enabled for all.
So in the Blackfin on-chip SPI driver, we need to clear out
these
From: Michael Hennerich michael.henner...@analog.com
The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested. So make sure we only request the
pin on the first setup of a SPI device. Otherwise, if you attempts to
reconfigure a SPI device on the
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
From: Michael Hennerich michael.henner...@analog.com
The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested. So make sure we only request the
pin on the first setup of a SPI
On Fri, Oct 22, 2010 at 02:30, Grant Likely wrote:
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
From: Michael Hennerich michael.henner...@analog.com
The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested. So make sure we
On Fri, Oct 22, 2010 at 02:53:35AM -0400, Mike Frysinger wrote:
From: Cliff Cai cliff@analog.com
The Blackfin SPORT peripheral is a pretty flexible device. With enough
coaching, we can make it generate SPI compatible waveforms. This is
desirable as the SPORT can run at much higher
On Fri, Oct 22, 2010 at 03:16, Grant Likely wrote:
On Fri, Oct 22, 2010 at 02:53:35AM -0400, Mike Frysinger wrote:
From: Cliff Cai cliff@analog.com
The Blackfin SPORT peripheral is a pretty flexible device. With enough
coaching, we can make it generate SPI compatible waveforms. This is
On Fri, Oct 22, 2010 at 02:41:12AM -0400, Mike Frysinger wrote:
On Fri, Oct 22, 2010 at 02:30, Grant Likely wrote:
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
From: Michael Hennerich michael.henner...@analog.com
The gpiolib code does not allow people to do
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
From: Michael Hennerich michael.henner...@analog.com
The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested. So make sure we only request the
pin on the first setup of a SPI
On Fri, Oct 22, 2010 at 02:01:48AM -0400, Mike Frysinger wrote:
From: Michael Hennerich michael.henner...@analog.com
The error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis. Once the error interrupt is enabled
for one peripheral, it is automatically enabled for all.
On Fri, Oct 22, 2010 at 03:24:11AM -0400, Mike Frysinger wrote:
On Fri, Oct 22, 2010 at 03:16, Grant Likely wrote:
On Fri, Oct 22, 2010 at 02:53:35AM -0400, Mike Frysinger wrote:
From: Cliff Cai cliff@analog.com
The Blackfin SPORT peripheral is a pretty flexible device. With enough
On Fri, Oct 22, 2010 at 03:25, Grant Likely wrote:
On Fri, Oct 22, 2010 at 02:41:12AM -0400, Mike Frysinger wrote:
On Fri, Oct 22, 2010 at 02:30, Grant Likely wrote:
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
From: Michael Hennerich michael.henner...@analog.com
The
On Fri, Oct 22, 2010 at 01:01:12AM -0500, Kumar Gala wrote:
On Oct 17, 2010, at 2:44 AM, Artem Bityutskiy wrote:
On Sat, 2010-10-16 at 19:05 -0600, Grant Likely wrote:
On Sat, Oct 16, 2010 at 1:17 PM, Artem Bityutskiy dedeki...@gmail.com
wrote:
On Tue, 2010-10-12 at 18:18 +0800,
2010/10/22 David Brownell davi...@pacbell.net:
and then two hardcoded
strings passed in as parameters.
Which reduced the text space used by the driver, by sharing parts
of the message that were not variable.
When I look at it, it doesn't. Quite the reverse.
I was curious on how much this
On 10/21/2010 07:12 PM, Andrew Morton wrote:
...
+/* Register Access Helpers */
+static inline u32 ssp_read(struct ti_ssp *ssp, int reg)
+{
+return __raw_readl(ssp-regs + reg);
+}
+
+static inline void ssp_write(struct ti_ssp *ssp, int reg, u32 val)
+{
+__raw_writel(val,
On Friday 22 October 2010 14:39:33 Cyril Chemparathy wrote:
+/* Register Access Helpers */
+static inline u32 ssp_read(struct ti_ssp *ssp, int reg)
+{
+return __raw_readl(ssp-regs + reg);
+}
+
+static inline void ssp_write(struct ti_ssp *ssp, int reg, u32 val)
+{
+
On Thu, 21 Oct 2010 17:01:02 -0400
Cyril Chemparathy cy...@ti.com wrote:
TI's sequencer serial port (TI-SSP) is a jack-of-all-trades type of serial
port
device. It has a built-in programmable execution engine that can be
programmed
to operate as almost any serial bus (I2C, SPI, EasyScale,
On Thu, Oct 21, 2010 at 09:06:44PM +0200, Linus Walleij wrote:
Those things in the SPI core just strike me as particularly odd:
dev_dbg() used in an obvious error branch, and then two hardcoded
strings passed in as parameters.
Signed-off-by: Linus Walleij linus.wall...@stericsson.com
This is a first pass submit of the SSP SPI driver for the Intel MID
platforms (Moorestown and Medfield).
From: Mathieu SOULARD mathieux.soul...@intel.com
This driver is a fusion of various internal drivers into a single
driver for the SPI slave/master on the Intel Moorestown and Medfield
SSP
On 10/22/2010 10:20 AM, Alan Cox wrote:
On Thu, 21 Oct 2010 17:01:02 -0400
Cyril Chemparathy cy...@ti.com wrote:
TI's sequencer serial port (TI-SSP) is a jack-of-all-trades type of serial
port
device. It has a built-in programmable execution engine that can be
programmed
to operate as
On 10/22/2010 08:48 AM, Arnd Bergmann wrote:
On Friday 22 October 2010 14:39:33 Cyril Chemparathy wrote:
+/* Register Access Helpers */
+static inline u32 ssp_read(struct ti_ssp *ssp, int reg)
+{
+return __raw_readl(ssp-regs + reg);
+}
+
+static inline void ssp_write(struct ti_ssp
From: Feng Tang feng.t...@intel.com
dw_spi driver in upstream only supports PIO mode, and this patch
will support it to cowork with the Designware DMA controller used
on Intel Moorestown platform
It has been tested with a Option GTM501L 3G modem, to use DMA mode,
DMA controller 2 of Moorestown
On Fri, Oct 22, 2010 at 03:33:43PM -0400, Cyril Chemparathy wrote:
On 10/22/2010 08:48 AM, Arnd Bergmann wrote:
On Friday 22 October 2010 14:39:33 Cyril Chemparathy wrote:
+/* Register Access Helpers */
+static inline u32 ssp_read(struct ti_ssp *ssp, int reg)
+{
+return
--- On Fri, 10/22/10, Grant Likely grant.lik...@secretlab.ca wrote:
We're quibbling over *bytes* in the
single digits in a multi-megabyte kernel.
The total size of printk messages
is indeed a problem, but it isn't going
to be solved by the
kind of micro-optimizations here.
True.
24 matches
Mail list logo
