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Hi, Mark,
> -Original Message-
> From: Yang, Wenyou
> Sent: 2013年4月2日 13:50
> To: 'Mark Brown'
> Cc: linux-arm-ker...@lists.infradead.org; grant.lik...@secretlab.ca;
> richard.gen...@gmail.com; plagn...@jcrosoft.com; Ferre, Nicolas; Lin, JM;
> spi-devel-general@lists.sourceforge.net; linux
Hi, Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@opensource.wolfsonmicro.com]
> Sent: 2013年4月1日 21:42
> To: Yang, Wenyou
> Cc: linux-arm-ker...@lists.infradead.org; grant.lik...@secretlab.ca;
> richard.gen...@gmail.com; plagn...@jcrosoft.com; Ferre, Nicolas; Lin, JM;
> spi
Hi, Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@opensource.wolfsonmicro.com]
> Sent: 2013年4月1日 21:54
> To: Yang, Wenyou
> Cc: linux-arm-ker...@lists.infradead.org; grant.lik...@secretlab.ca;
> richard.gen...@gmail.com; plagn...@jcrosoft.com; Ferre, Nicolas; Lin, JM;
> spi
Hi, Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@opensource.wolfsonmicro.com]
> Sent: 2013年4月1日 21:51
> To: Yang, Wenyou
> Cc: linux-arm-ker...@lists.infradead.org; grant.lik...@secretlab.ca;
> richard.gen...@gmail.com; plagn...@jcrosoft.com; Ferre, Nicolas; Lin, JM;
> spi
Dear Trent Piepho,
> On Mon, Apr 1, 2013 at 4:11 PM, Marek Vasut wrote:
> >> +#define TXRX_WRITE 1 /* This is a write */
> >> +#define TXRX_DEASSERT_CS 2 /* De-assert CS at end of txrx */
> >
> > New flags? I'm sure the GCC can optimize function parameters pretty well,
On 04/01/2013 01:52 PM, Trent Piepho wrote:
> On Tue, Mar 26, 2013 at 7:37 PM, Stephen Warren wrote:
>> Allow SPI masters to define the set of bits_per_word values they support.
>> If they do this, then the SPI core will reject transfers that attempt to
>> use an unsupported bits_per_word value. T
On 04/01/2013 07:18 AM, Mark Brown wrote:
> The core can do the validation for us.
Reviewed-by: Stephen Warren
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On Mon, Apr 1, 2013 at 5:02 PM, Marek Vasut wrote:
>> On Mon, Apr 1, 2013 at 4:30 PM, Marek Vasut wrote:
>> >> >> -static uint32_t mxs_spi_cs_to_reg(unsigned cs)
>> >> >> +static u32 mxs_spi_cs_to_reg(unsigned cs)
>> >> >>
>> >> >> {
>> >> >>
>> >> >> - uint32_t select = 0;
>> >> >> + u3
On Mon, Apr 1, 2013 at 4:11 PM, Marek Vasut wrote:
>> +#define TXRX_WRITE 1 /* This is a write */
>> +#define TXRX_DEASSERT_CS 2 /* De-assert CS at end of txrx */
>
> New flags? I'm sure the GCC can optimize function parameters pretty well, esp.
> if you make the bool.
N
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Dear Trent Piepho,
> On Mon, Apr 1, 2013 at 4:37 PM, Marek Vasut wrote:
> >> On Mon, Apr 1, 2013 at 4:16 PM, Marek Vasut wrote:
> >> >> The ssp struct has a clock rate field, to provide the actual value,
> >> >> in Hz, of the SSP output clock (the rate of SSP_SCK) after
> >> >> mxs_ssp_set_clk_r
On Mon, Apr 1, 2013 at 4:37 PM, Marek Vasut wrote:
>> On Mon, Apr 1, 2013 at 4:16 PM, Marek Vasut wrote:
>> >> The ssp struct has a clock rate field, to provide the actual value, in
>> >> Hz, of the SSP output clock (the rate of SSP_SCK) after
>> >> mxs_ssp_set_clk_rate() is called. It should be
Dear Trent Piepho,
> On Mon, Apr 1, 2013 at 4:30 PM, Marek Vasut wrote:
> >> >> -static uint32_t mxs_spi_cs_to_reg(unsigned cs)
> >> >> +static u32 mxs_spi_cs_to_reg(unsigned cs)
> >> >>
> >> >> {
> >> >>
> >> >> - uint32_t select = 0;
> >> >> + u32 select = 0;
> >>
> >> I'll make it
On Mon, Apr 1, 2013 at 4:30 PM, Marek Vasut wrote:
>> >> -static uint32_t mxs_spi_cs_to_reg(unsigned cs)
>> >> +static u32 mxs_spi_cs_to_reg(unsigned cs)
>> >>
>> >> {
>> >>
>> >> - uint32_t select = 0;
>> >> + u32 select = 0;
>>
>> I'll make it a separate patch.
>
> This is completely i
Dear Trent Piepho,
> On Mon, Apr 1, 2013 at 4:16 PM, Marek Vasut wrote:
> >> The ssp struct has a clock rate field, to provide the actual value, in
> >> Hz, of the SSP output clock (the rate of SSP_SCK) after
> >> mxs_ssp_set_clk_rate() is called. It should be read-only, except for
> >> mxs_ssp_
On Mon, Apr 1, 2013 at 4:16 PM, Marek Vasut wrote:
>> The ssp struct has a clock rate field, to provide the actual value, in Hz,
>> of the SSP output clock (the rate of SSP_SCK) after mxs_ssp_set_clk_rate()
>> is called. It should be read-only, except for mxs_ssp_set_clk_rate().
>>
>> For some re
Dear Trent Piepho,
> On Mon, Apr 1, 2013 at 4:13 PM, Marek Vasut wrote:
> >> Change the code to set the CS bits in the message transfer function
> >> once. Now the DMA and PIO txrx functions don't need to care about CS
> >> at all.
> >
> > Ok, lemme ask this one more time -- will the DMA work w
On Mon, Apr 1, 2013 at 4:13 PM, Marek Vasut wrote:
>>
>> Change the code to set the CS bits in the message transfer function
>> once. Now the DMA and PIO txrx functions don't need to care about CS
>> at all.
>
> Ok, lemme ask this one more time -- will the DMA work with long transfers
> where
>
Dear Trent Piepho,
> Despite many warnings in the SPI documentation and code, the spi-mxs
> driver sets shared chip registers in the ->setup method. This method can
> be called when transfers are in progress on other slaves controlled by the
> master. Setting registers or any other shared state
Dear Trent Piepho,
> The ssp struct has a clock rate field, to provide the actual value, in Hz,
> of the SSP output clock (the rate of SSP_SCK) after mxs_ssp_set_clk_rate()
> is called. It should be read-only, except for mxs_ssp_set_clk_rate().
>
> For some reason the spi-mxs driver decides to w
Dear Trent Piepho,
> In DMA mode the chip select control bits would be ORed into the CTRL0
> register without first clearing the bits. This means that after
> addressing slave 1 the bit would be still be set when addressing slave
> 0, resulting in slave 1 continuing to be addressed.
>
> The mess
Dear Trent Piepho,
> There are two bits which control the CS line in the CTRL0 register:
> LOCK_CS and IGNORE_CRC. The latter would be better named DEASSERT_CS
> in SPI mode.
>
> LOCK_CS keeps CS asserted though the entire transfer. This should
> always be set. The DMA code will always set it,
On Tue, Mar 26, 2013 at 7:37 PM, Stephen Warren wrote:
> Allow SPI masters to define the set of bits_per_word values they support.
> If they do this, then the SPI core will reject transfers that attempt to
> use an unsupported bits_per_word value. This eliminates the need for each
> SPI driver to
There is no need to disable transmitter/receiver after each loop
iteration and re-enable it for next loop iteration. Enable the
transmitter/receiver before xfer loop starts and disable it when
the whole transfer is done.
Signed-off-by: Anatolij Gustschin
---
drivers/spi/spi-mpc512x-psc.c | 10
Currently the driver only uses one internal chip select.
Add support for gpio chip selects configured by cs-gpios
DT binding.
Signed-off-by: Anatolij Gustschin
---
v2 resend:
- no changes, resend to Mark
v2:
- do not parse GPIO chip selects manually
drivers/spi/spi-mpc512x-psc.c | 31 +
On Fri, Mar 22, 2013 at 11:09:08AM +0900, Jingoo Han wrote:
> Add CONFIG_PM_SLEEP to suspend/resume functions to fix the following
> build warning when CONFIG_PM_SLEEP is not selected. This is because
> sleep PM callbacks defined by SET_SYSTEM_SLEEP_PM_OPS are only used
> when the CONFIG_PM_SLEEP i
On Mon, 1 Apr 2013 14:30:17 +0100
Mark Brown wrote:
> On Wed, Mar 13, 2013 at 02:57:43PM +0100, Anatolij Gustschin wrote:
> > Some SPI slave devices require asserted chip select signal across
> > multiple transfer segments of an SPI message. Currently the driver
>
> This isn't some devices, it's
The core can do the validation for us.
Signed-off-by: Mark Brown
---
drivers/spi/spi-s3c64xx.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 7f5f8ee..27ff669 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b
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