[PATCH 2/2] ARM: u300: switch SSP/SPI clock name to SSPCLK

2014-02-24 Thread Linus Walleij
As noted in recent discussions the name of the core clock for
the PL022 derived SPI blocks is erroneously named in the
U300 device tree. The kernel doesn't currently use the name,
but may do so soon so let use rename all these clocks in
accordance with the name given in the PL022 TRM (ARM DDI 0194G).

Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 arch/arm/boot/dts/ste-u300.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index a9da4800daf0..6fe688e9e4da 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -457,7 +457,7 @@
interrupt-parent = vica;
interrupts = 23;
clocks = spi_clk, spi_clk;
-   clock-names = apb_pclk, spi_clk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dmac 27 dmac 28;
dma-names = tx, rx;
num-cs = 3;
-- 
1.8.5.3


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[PATCH 1/2] ARM: ux500: switch SSP/SPI clock name to SSPCLK

2014-02-24 Thread Linus Walleij
As noted in recent discussions the name of the core clock for
the PL022 derived SPI blocks is erroneously named in the
Ux500 device trees. The kernel doesn't currently use the name,
but may do so soon so let use rename all these clocks in
accordance with the name given in the PL022 TRM (ARM DDI 0194G).

Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 arch/arm/boot/dts/ste-dbx5x0.dtsi | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi 
b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index e0853ea02df2..e41eedca3ce3 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -705,7 +705,7 @@
#address-cells = 1;
#size-cells = 0;
clocks = prcc_kclk 3 1, prcc_pclk 3 1;
-   clock-names = ssp0clk, apb_pclk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dma 8 0 0x2, /* Logical - DevToMem */
   dma 8 0 0x0; /* Logical - MemToDev */
dma-names = rx, tx;
@@ -718,7 +718,7 @@
#address-cells = 1;
#size-cells = 0;
clocks = prcc_kclk 3 2, prcc_pclk 3 2;
-   clock-names = ssp1clk, apb_pclk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dma 9 0 0x2, /* Logical - DevToMem */
   dma 9 0 0x0; /* Logical - MemToDev */
dma-names = rx, tx;
@@ -732,7 +732,7 @@
#size-cells = 0;
/* Same clock wired to kernel and pclk */
clocks = prcc_pclk 2 8, prcc_pclk 2 8;
-   clock-names = spi0clk, apb_pclk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dma 0 0 0x2, /* Logical - DevToMem */
   dma 0 0 0x0; /* Logical - MemToDev */
dma-names = rx, tx;
@@ -746,7 +746,7 @@
#size-cells = 0;
/* Same clock wired to kernel and pclk */
clocks = prcc_pclk 2 2, prcc_pclk 2 2;
-   clock-names = spi1clk, apb_pclk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dma 35 0 0x2, /* Logical - DevToMem */
   dma 35 0 0x0; /* Logical - MemToDev */
dma-names = rx, tx;
@@ -760,7 +760,7 @@
#size-cells = 0;
/* Same clock wired to kernel and pclk */
clocks = prcc_pclk 2 1, prcc_pclk 2 1;
-   clock-names = spi2clk, apb_pclk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dma 33 0 0x2, /* Logical - DevToMem */
   dma 33 0 0x0; /* Logical - MemToDev */
dma-names = rx, tx;
@@ -774,7 +774,7 @@
#size-cells = 0;
/* Same clock wired to kernel and pclk */
clocks = prcc_pclk 1 7, prcc_pclk 1 7;
-   clock-names = spi3clk, apb_pclk;
+   clock-names = SSPCLK, apb_pclk;
dmas = dma 40 0 0x2, /* Logical - DevToMem */
   dma 40 0 0x0; /* Logical - MemToDev */
dma-names = rx, tx;
-- 
1.8.5.3


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Re: Depreciated spi_master.transfer and prepared spi messages for an optimized pipelined-SPI-DMA-driver

2013-10-29 Thread Linus Walleij
On Mon, Oct 28, 2013 at 11:42 AM, Martin Sperl mar...@sperl.org wrote:

 (... ) I thought of moving away from spi_transfer_one_message and back to
 the simpler transfer interface, where the preprocessing would get done
 (DMA control block-chain generation) and then appending it to the
 existing (possibly running) DMA chain.

OK quite a cool idea.

But I hope that you have the necessary infrastructure using the dmaengine
subsystem for this, or that changes requires will be proposed to that
first or together with these changes.

As you will be using dmaengine (I guess?) maybe a lot of this can
actually be handled directly in the core since that code should be
pretty generic, or in a separate file like spi-dmaengine-chain.c?

 But just yesterday I was looking thru the code and came to the message:
 master is unqueued, this is depreciated (drivers/spi/spi.c Line 1167).
 This came in with commit ffbbdd21329f3e15eeca6df2d4bc11c04d9d91c0 and got 
 included in 3.4.

 So I am wondering why you would depreciate this interface

Simply because none of the in-kernel users was doing what you are
trying to do now. And noone said anything about such future usecases,
so how could we know?

 Now this brings me to different question:
 Could we implement some additional functions for preparing
 an SPI message (...)
 The interface could looks something like this:
 int spi_prepare_message(struct_spi_dev*, struct spi_message *);
 int spi_unprepare_message(struct_spi_dev*, struct spi_message *);

Maybe? I cannot tell from the above how this would look so
I think it is better if you send a patch showing how this improves
efficiency.

Yours,
Linus Walleij

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[PATCH 21/23] ARM: u300: probe the U300 dummy-spichip from device tree

2013-04-22 Thread Linus Walleij
From: Linus Walleij linus.wall...@linaro.org

This probes the U300 dummy-spichip from the device tree
and adds the apropriate node to the tree.

Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 arch/arm/boot/dts/ste-u300.dts| 5 +
 arch/arm/mach-u300/dummyspichip.c | 6 ++
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index 979d96c..9a163e1 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -220,6 +220,11 @@
reg = 0xc0006000 0x1000;
interrupt-parent = vica;
interrupts = 23;
+   spi-dummy@1 {
+   compatible = arm,pl022-dummy;
+   reg = 1;
+   spi-max-frequency = 2000;
+   };
};
};
 };
diff --git a/arch/arm/mach-u300/dummyspichip.c 
b/arch/arm/mach-u300/dummyspichip.c
index 2785cb6..52962bf 100644
--- a/arch/arm/mach-u300/dummyspichip.c
+++ b/arch/arm/mach-u300/dummyspichip.c
@@ -263,10 +263,16 @@ static int pl022_dummy_remove(struct spi_device *spi)
return 0;
 }
 
+static const struct of_device_id pl022_dummy_dt_match[] = {
+   { .compatible = arm,pl022-dummy },
+   {},
+};
+
 static struct spi_driver pl022_dummy_driver = {
.driver = {
.name   = spi-dummy,
.owner  = THIS_MODULE,
+   .of_match_table = pl022_dummy_dt_match,
},
.probe  = pl022_dummy_probe,
.remove = pl022_dummy_remove,
-- 
1.7.11.3


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[PATCH 20/23] ARM: u300: add SPI PL022 to the device tree

2013-04-22 Thread Linus Walleij
From: Linus Walleij linus.wall...@linaro.org

This registers the PL022 PrimeCell from the U300 device
tree. We make a new copy of the platform data for the
device tree boot path, as the old platform data is in an
older file which will be going away.

Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 arch/arm/boot/dts/ste-u300.dts |  7 +++
 arch/arm/mach-u300/core.c  | 19 +++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index cdffeb9..979d96c 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -214,5 +214,12 @@
cd-inverted;
vmmc-supply = ab3100_ldo_g_reg;
};
+
+   spi: ssp@c0006000 {
+   compatible = arm,pl022, arm,primecell;
+   reg = 0xc0006000 0x1000;
+   interrupt-parent = vica;
+   interrupts = 23;
+   };
};
 };
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 98d4dbe..9467ffe 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -19,6 +19,7 @@
 #include linux/dmaengine.h
 #include linux/amba/bus.h
 #include linux/amba/mmci.h
+#include linux/amba/pl022.h
 #include linux/amba/serial.h
 #include linux/platform_device.h
 #include linux/gpio.h
@@ -703,6 +704,22 @@ MACHINE_END
 
 #ifdef CONFIG_OF
 
+static struct pl022_ssp_controller spi_plat_data = {
+   /* If you have several SPI buses this varies, we have only bus 0 */
+   .bus_id = 0,
+   /*
+* On the APP CPU GPIO 4, 5 and 6 are connected as generic
+* chip selects for SPI. (Same on U330, U335 and U365.)
+* TODO: make sure the GPIO driver can select these properly
+* and do padmuxing accordingly too.
+*/
+   .num_chipselect = 3,
+   .enable_dma = 1,
+   .dma_filter = coh901318_filter_id,
+   .dma_rx_param = (void *) U300_DMA_SPI_RX,
+   .dma_tx_param = (void *) U300_DMA_SPI_TX,
+};
+
 /* These are mostly to get the right device names for the clock lookups */
 static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA(stericsson,pinctrl-u300, U300_SYSCON_BASE,
@@ -719,6 +736,8 @@ static struct of_dev_auxdata u300_auxdata_lookup[] 
__initdata = {
uart0, uart0_plat_data),
OF_DEV_AUXDATA(arm,primecell, U300_UART1_BASE,
uart1, uart1_plat_data),
+   OF_DEV_AUXDATA(arm,primecell, U300_SPI_BASE,
+   pl022, spi_plat_data),
OF_DEV_AUXDATA(st,ddci2c, U300_I2C0_BASE,
stu300.0, NULL),
OF_DEV_AUXDATA(st,ddci2c, U300_I2C1_BASE,
-- 
1.7.11.3


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Re: [PATCH v4] gpio: mcp23s08: convert driver to DT

2013-04-10 Thread Linus Walleij
On Thu, Apr 4, 2013 at 12:02 PM, Lars Poeschel la...@wh2.tu-dresden.de wrote:

 From: Lars Poeschel poesc...@lemonage.de

 This converts the mcp23s08 driver to be able to be used with device
 tree.
 There is a spi-present-mask device tree property, that allows to
 use multiple of this spi chips on the same chipselect.

 Signed-off-by: Lars Poeschel poesc...@lemonage.de
 ---
 v4:
 - removed the ability to specify the pullup from device tree
 - updated binding doc

Patch applied!

Thanks,
Linus Walleij

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Re: [PATCH v4] gpio: mcp23s08: convert driver to DT

2013-04-04 Thread Linus Walleij
On Thu, Apr 4, 2013 at 12:02 PM, Lars Poeschel la...@wh2.tu-dresden.de wrote:

 From: Lars Poeschel poesc...@lemonage.de

 This converts the mcp23s08 driver to be able to be used with device
 tree.
 There is a spi-present-mask device tree property, that allows to
 use multiple of this spi chips on the same chipselect.

 Signed-off-by: Lars Poeschel poesc...@lemonage.de
 ---
 v4:
 - removed the ability to specify the pullup from device tree
 - updated binding doc
(...)
 @@ -668,6 +742,7 @@ static struct spi_driver mcp23s08_driver = {
 .driver = {
 .name   = mcp23s08,
 .owner  = THIS_MODULE,
 +   .of_match_table = of_match_ptr(mcp23s08_spi_of_match),

Will this compile if CONFIG_OF is not enabled?

Yours,
Linus Walleij

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Re: [PATCH v3] gpio: mcp23s08: convert driver to DT

2013-03-27 Thread Linus Walleij
On Wed, Mar 27, 2013 at 12:35 PM, Lars Poeschel poesc...@lemonage.de wrote:
 On Friday 22 March 2013 at 09:33:10, Linus Walleij wrote:

 I would currently feel a lot better if you did not include this
 flag. How would you control this the day drivers need to
 enable/disable pull-up at runtime?

 For me it would also be easier to remove the flag (for DT boot case). I don't
 need the pullups. I did only include it, because this is how the driver is
 designed to work and what it did already. What I wanted was to make a good
 transfer from what the features of the driver are and how it works to be able
 to use it with device tree. If it now turns out that's bad for some reason, I
 have no problem to remove this from the patch completely.
 You're right: Runtime config is not possible this way.
 What should I do now ? Remove it ?

Remove. The less complicated binding, the better.

  +- gpio-controller : Marks the device node as a GPIO controller.
  +- reg : For an address on its bus

 On the I2C/SPI bus?

 Yes, both. For I2C it's the I2C address, for SPI it's the chip select to use
 for this chip.

OK please write these specifics in the binding doc.

 Please state here what kind of buses it can be. Explain if multiple
 buses are supported.

 Ok, I will add a line about it.

Thx.

  +Required device specific properties (only for SPI chips):
  +- mcp,spi-present-mask : This is a present flag, that makes only sense
  for SPI +chips - as the name suggests.

 AFAIK this is not how we disable/enable devices in the device tree.

 Istead we include a property on the node called status and set it
 to disabled if the device is not there.

 This would require multiple instances with the same reg property as up to 8
 chips can live on the same chip select. I wonder if this is possible ?

If there is not one instance/device node per chip things are
very wrong anyway. Maybe I don't understand fully... each
device on the system should have a node, you can't have a node
spanning several devices unless it's a bus node.

 Grant had the idea with the bitfield. You have the reg property specifying
 the chip select line. This bitfield is then used to indicate which of the 8
 possible chips on this same chip select line is really present. Not beeing
 able to support more than 8 devices is not problem, because it is a hardware
 limitation, that not more than 8 devices can share the same SPI chip select.
 This is again how the driver worked so far.

 What about just using a number?

 This would again require multiple instances with the same reg property for
 SPI. Is this really possible ?

If Grant is OK with this then so am I, he surely know this better
than me. But you nee to trick him to come out and review it.

Yours,
Linus Walleij

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Re: [PATCH v3] gpio: mcp23s08: convert driver to DT

2013-03-22 Thread Linus Walleij
Hi Lars,

sorry for taking eternities to review stuff :-(

I recommend that you include SPI co-maintainer Mark Brown on subsequent
postings.

On Mon, Mar 4, 2013 at 5:34 PM, Lars Poeschel la...@wh2.tu-dresden.de wrote:

 This converts the mcp23s08 driver to be able to be used with device
 tree.

OK!

 +++ b/Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt
 @@ -0,0 +1,43 @@
 +Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for
 +8-/16-bit I/O expander with serial interface (I2C/SPI)
 +
 +Required properties:
 +- compatible : Should be
 +- mcp,mcp23s08 for  8 GPIO SPI version
 +- mcp,mcp23s17 for 16 GPIO SPI version
 +- mcp,mcp23008 for  8 GPIO I2C version or
 +- mcp,mcp23017 for 16 GPIO I2C version of the chip
 +- #gpio-cells : Should be two.
 +  - first cell is the pin number
 +  - second cell is used to specify flags. Flags currently used:
 +bit0 : activate a ~100k pullup

Pullup is basically about pin config. This is sort of sneaking
behind the subsystems, but I know I might be overzealous.

Can the electronics do more things than pull-up?

Like pull-down, open drain, drive strength...

If it's a lot it's better to consider pinctrl from the start.
I'm saying this because the DT bindings will be maintained
perpetually and need to set a good example.

I would currently feel a lot better if you did not include this
flag. How would you control this the day drivers need to
enable/disable pull-up at runtime?

 +- gpio-controller : Marks the device node as a GPIO controller.
 +- reg : For an address on its bus

On the I2C/SPI bus?

Please state here what kind of buses it can be. Explain if multiple
buses are supported.

 +Required device specific properties (only for SPI chips):
 +- mcp,spi-present-mask : This is a present flag, that makes only sense for 
 SPI
 +chips - as the name suggests.

AFAIK this is not how we disable/enable devices in the device tree.

Istead we include a property on the node called status and set it
to disabled if the device is not there.

 +Multiple chips can share the same
 +SPI chipselect. Set bit 0-7 in this mask to 1 if there is a chip
 +connected with this spi address. If you have a chip with address 3
 +connected, you have to set bit3 to 1, which is 0x08. mcp23s08 only
 +supports bits 0-3. It is not possible to mix mcp23s08 and mcp23s17
 +on the same chipselect. Set at least one bit to 1 for SPI chips.

This looks awkward, why are you using a bitfield for this? Then you
can only ever support 8 devices, since the text also implies that the
value is 8bit (this should be stated).

What about just using a number?

 diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c
 index 3cea0ea..a8ca469 100644
 --- a/drivers/gpio/gpio-mcp23s08.c
 +++ b/drivers/gpio/gpio-mcp23s08.c
 @@ -12,6 +12,8 @@
  #include linux/spi/mcp23s08.h
  #include linux/slab.h
  #include asm/byteorder.h
 +#include linux/of.h
 +#include linux/of_device.h

  /**
   * MCP types supported by driver
 @@ -21,6 +23,11 @@
  #define MCP_TYPE_008   2
  #define MCP_TYPE_017   3

 +/**
 + * Flags used in device tree
 + */
 +#define MCP_DT_FLAG_PULLUP 0x01

So I'm sceptical here. Is this already supported using platform data?

  /* Registers are all 8 bits wide.
   *
   * The mcp23s17 has twice as many bits, and can be configured to work
 @@ -75,6 +82,25 @@ struct mcp23s08_driver_data {
 struct mcp23s08 chip[];
  };

 +#ifdef CONFIG_OF
 +static int mcp23s08_of_xlate(struct gpio_chip *gc,
 +   const struct of_phandle_args *gpiospec, u32 *flags);
 +
 +static int mcp23s08_set_pullup(struct mcp23s08 *mcp, unsigned offset)
 +{
 +   int status;
 +   u16 value;
 +
 +   mutex_lock(mcp-lock);
 +   value = mcp-cache[MCP_GPPU] | (1  offset);
 +   status = mcp-ops-write(mcp, MCP_GPPU, value);
 +   if (!status)
 +   mcp-cache[MCP_GPPU] = value;
 +   mutex_unlock(mcp-lock);
 +
 +   return status;
 +}

The pull-up business actually looks like new functionality that
has nothing to do with adding device tree support and should be
a separate patch.

Yours,
Linus Walleij

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Re: [PATCH v2] gpio: mcp23s08: convert driver to DT

2013-02-15 Thread Linus Walleij
On Thu, Feb 14, 2013 at 1:22 PM, Lars Poeschel poesc...@lemonage.de wrote:
 On Wednesday 13 February 2013 at 13:51:12, Linus Walleij wrote:

 Have you considered this [pinctrl] approach?

 No, I haven't. And although this doesn't solve all my problems, I like the
 idea very much! Thank you for this! But at the moment it looks to me that
 this could be a bit overkill for setting this single register and I don't
 think this is, what Grant meant me to do.

So there is this corner case where some GPIO driver does some
pinctrl business, I mean, really really little of it. And then it may be
overkill. Sometimes though, the hardware actually can do a lot of
this biasing and muxing it just wasn't part of the driver yet or done
in e.g. boot loaders, and then it's usually better to use pinctrl.

Adding custom APIs to the GPIO drivers will however always
cause a maintenance burden on the GPIO maintainers, so that's
why pinctrl  GPIO is nice.

I don't know which case this would be though.

Yours,
Linus Walleij

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Re: [PATCH v2] gpio: mcp23s08: convert driver to DT

2013-02-13 Thread Linus Walleij
On Wed, Feb 13, 2013 at 12:13 PM, Lars Poeschel poesc...@lemonage.de wrote:
 On Monday 11 February 2013 at 22:25:51, Grant Likely wrote:

 However, is the pullup selection per-gpio line? If so, then why not
 encode it into the flags field of the gpio specifier?

 Yes, the pullup is per-gpio line. I am working on that. It turns out, that
 this is a bit difficult for me, as there is no real documentation and no
 other driver is doing it or something similar yet. Exception are very few
 gpio soc drivers where situation is a bit different. They seem to rely an
 fixed global gpio numbers and they are always memory mapped.
 But as I said I am working on it...

Part of your problem is that pull-up is pin control territory.

We invented that subsystem for a reason, and that reason
was that the GPIO subsystem had a hard time accomodating
things like this.

If you look in drivers/pinctrl/pinctrl-abx500.c which is my
latest submitted pinctrl driver you can see that this is basically
a quite simple GPIO chip, we just model it as a pin controller
with a GPIO front-end too exactly because it can do things
like multiplexing, pull-up and pull-down.

Have you considered this approach?

Yours,
Linus Walleij

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Re: [PATCH 2/5] spi: pl022: use generic DMA slave configuration if possible

2013-02-08 Thread Linus Walleij
On Fri, Feb 8, 2013 at 5:28 PM, Arnd Bergmann a...@arndb.de wrote:
 On Friday 08 February 2013 16:22:48 Russell King - ARM Linux wrote:
 If it's DMA _to_ a device, then we will only ever clean the lines prior to
 a transfer, never invalidate them.  So that's not really a concern.  (There
 better not be any dirty cache lines associated with the empty zero page
 either.)

 Right, makes sense. I thought I had read about a CPU that
 could not flush a cache line without also invalidating
 it, but that must have been something other than ARM,
 or maybe I'm misremembering it.

I don't think it matters one bit. The page can contain a bitmap
of Donald Duck or zero FWIW. It's just that the DMA
controller just neeeds to read *something* that does not cause
a bus stall.

It's due to the syncronous nature of the SPI protocol, to get
something out you need to put something in. So when reading,
this is a way to feed in some junk.

So this goes on my TODO...

Yours,
Linus Walleij

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Re: [PATCH RFC 1/1] gpio: mcp23s08: convert driver to DT

2013-02-06 Thread Linus Walleij
On Wed, Feb 6, 2013 at 10:31 AM, Lars Poeschel poesc...@lemonage.de wrote:

 The thing that confused me was, that the platform_data for the chip has a
 mandatory base member, that sets the linux global gpio number at which the
 chip should appear.

Yes this is common. I think you should look at other drivers
under drivers/gpio using device tree, and how they work around
this.

As stated, as a last resort you can use AUXDATA to anyway assign
a piece of platform data per instance.

In the Nomadik driver, we use the block instance ID and multiply
by a factor of the numbers of GPIOs on each instance.
And luckily the base is zero. Not elegant maybe, but the
global GPIO numberspace is not elegant by nature.

Yours,
Linus Walleij

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Re: [PATCH v7 01/10] ARM: davinci: move private EDMA API to arm/common

2013-02-05 Thread Linus Walleij
On Mon, Feb 4, 2013 at 10:54 PM, Cyril Chemparathy cy...@ti.com wrote:
 On 02/04/2013 04:11 PM, Linus Walleij wrote:

 Cyril, just stack up the cookies and take a sweep over them to see
 which ones are baked when the NAPI poll comes in - problem
 solved.

 You're assuming that cookies complete in order.  That is not necessarily
 true.

So put them on a wait list? Surely you will have a list of pending
cookies and pick from the front of the queue if there isn't a hole on
queue position 0.

Yours,
Linus Walleij

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Re: [PATCH v7 01/10] ARM: davinci: move private EDMA API to arm/common

2013-02-05 Thread Linus Walleij
 want from the API.

Yours,
Linus Walleij

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Re: [PATCH v7 01/10] ARM: davinci: move private EDMA API to arm/common

2013-02-05 Thread Linus Walleij
On Tue, Feb 5, 2013 at 5:47 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
 On Tue, Feb 05, 2013 at 05:21:48PM +0100, Linus Walleij wrote:

 For IRQ mode, use the completion callback to push each cookie
 to NAPI, and thus let the IRQ drive the traffic.

 The whole purpose of NAPI is to avoid taking interrupts for completion
 of transfers.  Anything that generates interrupts when NAPI is in
 polling mode is defeating the point.

So what I was trying to get across is that when you're in polling
mode you do not set DMA_PREP_INTERRUPT on your transfers,
just throw the obtained struct dma_async_tx_descriptor on some
list and then when polling use dma_async_is_tx_complete()
on the channel and the cookie inside the descriptor.

I was trying to describe that you can move from
IRQ mode to polling mode and back again by selectively
choosing to set/not set the DMA_PREP_INTERRUPT flag.

If polling is all you want you never set it.

Then there is the fact that the transfer needs to have
been flagged complete and it is indeed something that needs
to be set in some bytes somewhere. By something. But it
doesn't have to be an interrupt from the DMA controller.

In such cases we use dma_async_is_tx_complete() with
channel and cookies as parameter. This will call down into the
driver chan-device-device_tx_status() and there we can
actually poll the hardware to see if the transfer happens to
be complete, and if it is flag it complete.

Which is likely what we want.

No interrupts, only function calls as far as I can see.

(I bet Russell will poke a hole in my reasoning, but it's worth
a try.)

Yours,
Linus Walleij

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Re: [PATCH v7 01/10] ARM: davinci: move private EDMA API to arm/common

2013-02-05 Thread Linus Walleij
On Tue, Feb 5, 2013 at 6:14 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
 On Tue, Feb 05, 2013 at 04:30:45PM +0100, Linus Walleij wrote:

 So put them on a wait list? Surely you will have a list of pending
 cookies and pick from the front of the queue if there isn't a hole on
 queue position 0.

 Not quite.  The key is the cookie system DMA engine employs to indicate
 when a cookie is complete.

 Cookies between the issued sequence and completed sequence are defined
 to be in progress, everything else is defined to be completed.

 This means that if completed sequence is 1, and issued sequence is 5,
 then cookies with values 2, 3, 4, 5 are in progress.  You can't mark
 sequence 4 as being complete until 2 and 3 have completed.

Yes that is true. DMA transfers on a certain channel are defined
as progressing linearly per-cookie. I wonder if that is a problem
in this case though (actually it seems the reverse, this helps
in Cyril's case.)

 If we need out-of-order completion, then that's a problem for the DMA
 engine API, because you'd need to radically change the way completion
 is marked.

True. I wonder if this usecase is ever going to be applicable
however. It could maybe be useful in some instances of
memcpy() I could dream up, whereas for device transfers it
seems unlikely to me.

Yours,
Linus Walleij

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Re: [PATCH v7 01/10] ARM: davinci: move private EDMA API to arm/common

2013-02-04 Thread Linus Walleij
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy cy...@ti.com wrote:

 Based on our experience with fitting multiple subsystems on top of this
 DMA-Engine driver, I must say that the DMA-Engine interface has proven
 to be a less than ideal fit for the network driver use case.

 The first problem is that the DMA-Engine interface expects to push
 completed traffic up into the upper layer as a part of its callback.
 This doesn't fit cleanly with NAPI, which expects to pull completed
 traffic from below in the NAPI poll.  We've somehow kludged together a
 solution around this, but it isn't very elegant.

I cannot understand the actual technical problem from the above
paragraphs though. dmaengine doesn't have a concept of pushing
nor polling, it basically copies streams of words from A to B, where
A/B can be a device or a buffer, nothing else.

The thing you're looking for sounds more like an adapter on top
of dmaengine, which can surely be constructed, some
drivers/dma/dmaengine-napi.c or whatever.

 The second problem is one of binding fixed DMA resources to fixed users.
   AFAICT, the stock DMA-Engine mechanism works best when one DMA
 resource is as good as any other.

The filter function picks a channel for whatever reason. That reason
can be, well whatever. Some engines have a clever mechanism to
select resources on the other end.

Then for tying devices to channels we have the dmaengine
DT branch:
http://git.infradead.org/users/vkoul/slave-dma.git/shortlog/refs/heads/topic/dmaengine_dt

This stuff didn't go into v3.8 but you can *sure* expect it
to be in v3.9.

Or are you referring to a multi-engine scenario? Say if there is engine
A and B and depending on circumstances A or B may be preferred
in some order (and permutations of this problem). That is currently
identified as a shortcoming that we need help to address.

 To get over this problem, we've added
 support for named channels, and drivers specifically request for a DMA
 resource by name.  Again, this is less than ideal.

Jon Hunter has been working on a mechanism to look up DMA channels
from struct device *, dev_name() or a device tree node for example.
Just like we do with clocks or regulators.

Look at this patch from the dmaengine_dt branch:
http://git.infradead.org/users/vkoul/slave-dma.git/commitdiff/528499a7037ebec0636d928f88cd783c618df3c5

Looks up an optionally named channel for a certain
device.

It currently only supports device tree, but you are free to
patch in whatever mechanism you need there. Static tables
in platform data works too. Just nobody did it.

So go ahead and hack on dma_request_slave_channel().
(I would just branch of the DT branch.)

 We found that virtio devices offer a more elegant solution to this
 problem.  First, the virtqueue interface is a much better fit into NAPI
 (callback -- napi schedule, napi poll -- get_buf), and this eliminates
 the need for aforementioned kludges in the code.  Second, the virtio
 device infrastructure nicely uses the device model to solve the problem
 of binding DMA users to specific DMA resources.

Not that I understand the polling issue, but it sounds to me like
what Jon is doing is similar.

Surely the way to look up resources cannot be paramount in this
discussion, I think the real problem must be your specific networking
usecase, so we need to drill into that.

Yours,
Linus Walleij

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Re: [PATCH v7 01/10] ARM: davinci: move private EDMA API to arm/common

2013-02-04 Thread Linus Walleij
On Mon, Feb 4, 2013 at 9:33 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
 On Mon, Feb 04, 2013 at 09:29:46PM +0100, Linus Walleij wrote:
 On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy cy...@ti.com wrote:

  Based on our experience with fitting multiple subsystems on top of this
  DMA-Engine driver, I must say that the DMA-Engine interface has proven
  to be a less than ideal fit for the network driver use case.

  The first problem is that the DMA-Engine interface expects to push
  completed traffic up into the upper layer as a part of its callback.
  This doesn't fit cleanly with NAPI, which expects to pull completed
  traffic from below in the NAPI poll.  We've somehow kludged together a
  solution around this, but it isn't very elegant.

 I cannot understand the actual technical problem from the above
 paragraphs though. dmaengine doesn't have a concept of pushing
 nor polling, it basically copies streams of words from A to B, where
 A/B can be a device or a buffer, nothing else.

 The thing you're looking for sounds more like an adapter on top
 of dmaengine, which can surely be constructed, some
 drivers/dma/dmaengine-napi.c or whatever.

 Broadly speaking what NAPI wants is to never get any callbacks from the
 hardware (or DMAs).  It wants to wake up periodically, take a look at
 what packets have been read by the hardware and process them.  The goal
 is to have the DMAs sitting and running without disturbing the processor
 at all after the first packet has been handled.

OK we should definately be able to encompass that in dmaengine
quite easily.

So I think the above concerns are moot. The callback we can
set on cookies is entirely optional, and it's even implemented by
each DMA engine, and some may not even support it but *require*
polling, and then it won't even be implemented by the driver.

Which probably stems from the original design of the dmaengine
API, which was for TCP networking acceleration, mainly.

Cyril, just stack up the cookies and take a sweep over them to see
which ones are baked when the NAPI poll comes in - problem
solved.

Yours,
Linus Walleij

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Re: [PATCH v2 2/6] of: Return -ENXIO from of_parse_phandle_with_args for too large index and return errors from of_gpio_named_count

2013-02-01 Thread Linus Walleij
On Tue, Jan 29, 2013 at 3:53 PM, Andreas Larsson andr...@gaisler.com wrote:

 This lets of_gpio_named_count return an errno on errors by being able to
 distinguish between reaching the end of the phandle list and getting some 
 other
 error from of_parse_phandle_with_args.

 Return error from of_spi_register_master when there is an cs-gpios list for
 which gp_gpio_named_count fails.

 Adjust various drivers cope with error return from of_gpio_named_count,
 including via of_gpio_count.

 Signed-off-by: Andreas Larsson andr...@gaisler.com
 ---
 Changes since v1:
 - Handle error return values from calls to of_gpio_count

Looks correct to me, but I'm no DT-ninja.

For the GPIO portions:
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH RFC 1/1] gpio: mcp23s08: convert driver to DT

2013-01-31 Thread Linus Walleij
On Thu, Jan 31, 2013 at 4:58 PM, Lars Poeschel la...@wh2.tu-dresden.de wrote:

 --- /dev/null
 +++ b/Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt
 @@ -0,0 +1,27 @@
 +Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for
 +8-/16-bit I/O expander with serial interface (I2C/SPI)
 +
 +Required properties:
 +- compatible : Should be mcp,mcp23s08-gpio, mcp,mcp23s17-gpio,
 +   mcp,mcp23008-gpio or mcp,mcp23017-gpio
 +- base : The first gpio number that should be assigned by this chip.

No. We do not tie the global GPIO numbers into the device tree.

In the DT GPIOs are referenced by ampersand gpio0 1 2
notation referring to the instance, so as you realize DT itself
has no need for that number.

Further it is not OS-neutral.

You have to find another way to handle this in the driver code.
In worst case: use AUXDATA.

Yours,
Linus Walleij

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Re: [PATCH] SPI: SSP SPI Controller driver

2013-01-10 Thread Linus Walleij
On Wed, Jan 9, 2013 at 5:25 AM, Vinod Koul vinod.k...@intel.com wrote:

 Also I have some questions on this approach. Is this driver for SSP ip or SPI
 ip, looks like latter. In both the cases there are some existing drivers in
 kernel and adding one more IMHO doesnt make sense. What we really need a
 common core for dw IP and SSP IP (i think pxa uses same stuff). That way lot 
 of
 code will get reduced from driver

+1 on this comment, I didn't even notice :-(

Linus Walleij

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Re: [PATCH v2 1/2] spi: bitbang: simplify pointer arithmetics

2013-01-10 Thread Linus Walleij
On Wed, Jan 9, 2013 at 3:08 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:

 Add a pointer variable to make spi_bitbang_start() look simpler.

 Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de

Acked-by: Linus Walleij linus.wall...@linaro.org

I think Mark Brown is still backing up Grant sometimes, so include
him on CC.

Yours,
Linus Walleij

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Re: [PATCH v2 2/2] spi: bitbang: convert to using core message queue

2013-01-10 Thread Linus Walleij
On Wed, Jan 9, 2013 at 3:44 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:

 [   79.968000] mmc0: new SD card on SPI
 [   79.976000] mmcblk0: mmc0: SU02G 1.84 GiB
 [   80.024000]  mmcblk0: p1
 [   80.132000] mmcblk0: error -38 sending status command, retrying
 [   80.136000] mmcblk0: error -38 sending status command, retrying
 [   80.14] mmcblk0: error -38 sending status command, aborting
 [   81.028000] mmc0: SPI card removed
 [   81.572000] mmc0: error -110 whilst initialising SD card

The queue mechanism has not changed.

This *could* be the card itself. So it doesn't appear before the patch?

Yours,
Linus Walleij

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Re: [PATCH 3/3] spi: bitbang: convert to using core message queue

2013-01-08 Thread Linus Walleij
On Sat, May 26, 2012 at 1:29 AM, Grant Likely grant.lik...@secretlab.ca wrote:
 On Mon, 21 May 2012 13:25:23 +0200 (CEST), Guennadi Liakhovetski 
 g.liakhovet...@gmx.de wrote:
 The SPI subsystem core now manages message queues internally. Remove the
 local message queue implementation from the spi-bitbang driver and
 migrate to the common one.

 Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de

 Okay, I'm going to be really nitpicky here.  The change is fine, but the
 diff is too big; particularly for anyone trying to figure out what has
 changed if it causes breakage.  I wouldn't worry about this as much
 for an individual driver, but spi_bitbang is common infrastructure.

Did this ever get around to get fixed? I guess not

Guennadi, are you going to fix the patch according to Grant's
requests or should I try to clean it and resubmit? The problem
is that I have no real way of testing this. But if I break something
I guess people will notice :-D

Yours,
Linus Walleij

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Re: [PATCH] SPI: SSP SPI Controller driver

2012-12-20 Thread Linus Walleij
 on peripheral clock frequency.

So then write in a comment that it's the number of clock cycles
or something?

  +#define SRAM_BASE_ADDR 0xfffdc000

 Should be passed as resource, se above reasoning for the
 I2C base address. What happens on next ASIC spin when
 the engineer move this base offset etc, don't you have any
 system discovery?

 This is fix value for Moorestown  Medfield platforms as what is
 declared in the file header. If any hardware change, the address should
 be changed accordantly.

I don't get it. That's not how we usually do this kind of things.
We usually pass it as a resource. Doesn't the Moorestown/Medfield
devices have a central resource registry of any kind?

We've got all kind of crap for encoding things into the ARM plaforms
like this, so let's not repeat that mistake.

Yours,
Linus Walleij

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Re: [PATCH] SPI: SSP SPI Controller driver

2012-12-17 Thread Linus Walleij
On Tue, Dec 11, 2012 at 9:58 AM, chao bi chao...@intel.com wrote:

 1. I understand the workqueue in spi core is for driving message
 transfer, so SPI driver should not create new workqueue for this usage.
 However, the workqueue created here is not for this usage it's to call
 back to SPI protocol driver (ifx6x60.c) when DMA data transfer is
 finished, so it seems not conflict with spi core. Am I right?

So a single message can contain several transfers, and if this
is some per-transfer DMA thing, it could be valid. I need to go
in and look closer at the patch.

I've considered trying to also generalize parts of the transfer
handling but ran out of energy.

Yours,
Linus Walleij

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Re: [PATCH] SPI: SSP SPI Controller driver

2012-12-17 Thread Linus Walleij
;
 +   struct workqueue_struct *dma_wq;
 +   struct work_struct complete_work;
 +
 +   u8 __iomem *virt_addr_sram_tx;
 +   u8 __iomem *virt_addr_sram_rx;
 +
 +   int txdma_done;
 +   int rxdma_done;
 +   struct callback_param tx_param;
 +   struct callback_param rx_param;

With kerneldoc it's easier to tell what the usecase is for these
callbacks.

 +   struct pci_dev *dmac1;

It seems that something like a pci_dev * should be used
to refer to the I2C and SRAM as well?

 +
 +   unsigned long quirks;
 +   u32 rx_fifo_threshold;
 +};
 +
 +struct chip_data {
 +   u32 cr0;
 +   u32 cr1;
 +   u32 timeout;
 +   u8 n_bytes;
 +   u8 dma_enabled;

bool?

 +   u8 bits_per_word;
 +   u32 speed_hz;

Should that be u32? unsigned int seems more apropriate for a frequency.

 +   int (*write)(struct ssp_driver_context *drv_context);
 +   int (*read)(struct ssp_driver_context *drv_context);
 +};

kerneldoc me.

 +enum intel_mid_ssp_spi_fifo_burst {
 +   IMSS_FIFO_BURST_1,
 +   IMSS_FIFO_BURST_4,
 +   IMSS_FIFO_BURST_8
 +};
 +
 +/* spi_board_info.controller_data for SPI slave devices,
 + * copied to spi_device.platform_data ... mostly for dma tuning
 + */
 +struct intel_mid_ssp_spi_chip {
 +   enum intel_mid_ssp_spi_fifo_burst burst_size;
 +   u32 timeout;
 +   u8 enable_loopback;
 +   u8 dma_enabled;

The last two entries looks like they should be bool.

 +};

kerneldoc.

 +#define SPI_DIB_NAME_LEN  16
 +#define SPI_DIB_SPEC_INFO_LEN  10
 +
 +struct spi_dib_header {
 +   u32   signature;
 +   u32   length;
 +   u8 rev;
 +   u8 checksum;
 +   u8 dib[0];
 +} __packed;

Why is this packed?

Yours,
Linus Walleij

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Re: [PATCH] spi/pl022: Activate resourses before deactivate them in suspend

2012-10-28 Thread Linus Walleij
On Sat, Oct 27, 2012 at 11:46 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
 On Fri, Oct 05, 2012 at 09:43:32AM +0200, Ulf Hansson wrote:

 To be able to deactivate resourses in suspend, the resourses must
 first be surely active. This is done with a pm_runtime_get_sync.
 Once the resourses are restored to active state again in resume,
 the runtime pm usage count can be decreased with a pm_runtime_put.

 The PM core will ensure devices are runtime resumed before we enter
 suspend precisely due to this sort of issue.

I asked the very same question to Ulf (in speech, sorry
so you couldn't see it...)

So I guess we are talking about drivers/base/main.c

in device_prepare()
pm_runtime_get_noresume() is called
and in device_complete()
pm_runtime_put_sync() is called.

Both put into current for in
commit 88d26136a256576e444db312179e17af6dd0ea87
on sep 19th.

Yes it seems like it will do the job.

Ulf can you comment on this...

Yours,
Linus Walleij

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Re: [PATCH] spi/pl022: add IDLE state pin management

2012-10-17 Thread Linus Walleij
On Wed, Oct 17, 2012 at 9:24 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
 On Thu, Oct 11, 2012 at 02:03:51PM +0200, Linus Walleij wrote:
 From: Patrice Chotard patrice.chot...@stericsson.com

 This commit allow to put pins in IDLE state in
 runtime_suspend and in SLEEP state in suspend, corresponding
 to defined semantics in linux/pinctrl/pinctrl-state.h.

 Not sure what tree this is against but it doesn't apply to v3.7-rc1.

OK I'll rebase and respin.

Yours,
Linus Walleij

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[PATCH 0/4] PL022 patch queue

2012-10-17 Thread Linus Walleij
Hi Mark, it turns out the reason that the IDLE state patch did
not apply was due to this dependency chain, all tested by me.
So I signed them all off and rebased on top of spi-next, hope
this works out.

Patrice Chotard (1):
  spi/pl022: add IDLE state pin management

Ulf Hansson (3):
  Revert spi/pl022: enable runtime PM
  spi: spi-pl022: Minor simplification for runtime pm
  spi/pl022: Activate resourses before deactivate them in suspend

 drivers/spi/spi-pl022.c | 56 +++--
 1 file changed, 36 insertions(+), 20 deletions(-)

-- 
1.7.11.3


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[PATCH 1/4] Revert spi/pl022: enable runtime PM

2012-10-17 Thread Linus Walleij
From: Ulf Hansson ulf.hans...@linaro.org

This reverts commit 2fb30d1147c599f5657e8c62c862f9a0f58d9d99.

This patch is reverted due to wrong runtime PM code.

Conflicts:

drivers/spi/spi-pl022.c

Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 5cf0643..a1db91a 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2186,9 +2186,6 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
printk(KERN_INFO pl022: mapped registers from 0x%08x to %p\n,
   adev-res.start, pl022-virtbase);
 
-   pm_runtime_enable(dev);
-   pm_runtime_resume(dev);
-
pl022-clk = devm_clk_get(adev-dev, NULL);
if (IS_ERR(pl022-clk)) {
status = PTR_ERR(pl022-clk);
@@ -2293,7 +2290,6 @@ pl022_remove(struct amba_device *adev)
 
clk_disable(pl022-clk);
clk_unprepare(pl022-clk);
-   pm_runtime_disable(adev-dev);
amba_release_regions(adev);
tasklet_disable(pl022-pump_transfers);
spi_unregister_master(pl022-master);
-- 
1.7.11.3


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[PATCH 2/4] spi: spi-pl022: Minor simplification for runtime pm

2012-10-17 Thread Linus Walleij
From: Ulf Hansson ulf.hans...@linaro.org

In probe pm_runtime_put_autosuspend has the same effect as doing
pm_runtime_put. This due to upper layer in driver core is preventing
the device from being runtime suspended by a pm_runtime_get*.

Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index a1db91a..51b7a95 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2246,10 +2246,9 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
pm_runtime_set_autosuspend_delay(dev,
platform_info-autosuspend_delay);
pm_runtime_use_autosuspend(dev);
-   pm_runtime_put_autosuspend(dev);
-   } else {
-   pm_runtime_put(dev);
}
+   pm_runtime_put(dev);
+
return 0;
 
  err_spi_register:
-- 
1.7.11.3


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[PATCH 3/4] spi/pl022: Activate resourses before deactivate them in suspend

2012-10-17 Thread Linus Walleij
From: Ulf Hansson ulf.hans...@linaro.org

To be able to deactivate resourses in suspend, the resourses must
first be surely active. This is done with a pm_runtime_get_sync.
Once the resourses are restored to active state again in resume,
the runtime pm usage count can be decreased with a pm_runtime_put.

Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 51b7a95..51329b2 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2346,6 +2346,8 @@ static int pl022_suspend(struct device *dev)
dev_warn(dev, cannot suspend master\n);
return ret;
}
+
+   pm_runtime_get_sync(dev);
pl022_suspend_resources(pl022);
 
dev_dbg(dev, suspended\n);
@@ -2358,6 +2360,7 @@ static int pl022_resume(struct device *dev)
int ret;
 
pl022_resume_resources(pl022);
+   pm_runtime_put(dev);
 
/* Start the queue running */
ret = spi_master_resume(pl022-master);
-- 
1.7.11.3


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[PATCH 4/4] spi/pl022: add IDLE state pin management

2012-10-17 Thread Linus Walleij
From: Patrice Chotard patrice.chot...@stericsson.com

This commit allow to put pins in IDLE state in
runtime_suspend and in SLEEP state in suspend, corresponding
to defined semantics in linux/pinctrl/pinctrl-state.h.

To do this, just add a boolean parameter runtime
to pl022_resume_resources/pl022_suspend_resources which
indicates if it's called from PM_RUNTIME callbacks or not.

Signed-off-by: Patrice Chotard patrice.chot...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 44 +++-
 1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 51329b2..1361868 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -371,6 +371,7 @@ struct pl022 {
/* Two optional pin states - default  sleep */
struct pinctrl  *pinctrl;
struct pinctrl_state*pins_default;
+   struct pinctrl_state*pins_idle;
struct pinctrl_state*pins_sleep;
struct spi_master   *master;
struct pl022_ssp_controller *master_info;
@@ -2116,6 +2117,11 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
} else
dev_err(dev, could not get default pinstate\n);
 
+   pl022-pins_idle = pinctrl_lookup_state(pl022-pinctrl,
+ PINCTRL_STATE_IDLE);
+   if (IS_ERR(pl022-pins_idle))
+   dev_dbg(dev, could not get idle pinstate\n);
+
pl022-pins_sleep = pinctrl_lookup_state(pl022-pinctrl,
   PINCTRL_STATE_SLEEP);
if (IS_ERR(pl022-pins_sleep))
@@ -2302,35 +2308,47 @@ pl022_remove(struct amba_device *adev)
  * the runtime counterparts to handle external resources like
  * clocks, pins and regulators when going to sleep.
  */
-static void pl022_suspend_resources(struct pl022 *pl022)
+static void pl022_suspend_resources(struct pl022 *pl022, bool runtime)
 {
int ret;
+   struct pinctrl_state *pins_state;
 
clk_disable(pl022-clk);
 
+   pins_state = runtime ? pl022-pins_idle : pl022-pins_sleep;
/* Optionally let pins go into sleep states */
-   if (!IS_ERR(pl022-pins_sleep)) {
-   ret = pinctrl_select_state(pl022-pinctrl,
-  pl022-pins_sleep);
+   if (!IS_ERR(pins_state)) {
+   ret = pinctrl_select_state(pl022-pinctrl, pins_state);
if (ret)
-   dev_err(pl022-adev-dev,
-   could not set pins to sleep state\n);
+   dev_err(pl022-adev-dev, could not set %s pins\n,
+   runtime ? idle : sleep);
}
 }
 
-static void pl022_resume_resources(struct pl022 *pl022)
+static void pl022_resume_resources(struct pl022 *pl022, bool runtime)
 {
int ret;
 
/* Optionaly enable pins to be muxed in and configured */
+   /* First go to the default state */
if (!IS_ERR(pl022-pins_default)) {
-   ret = pinctrl_select_state(pl022-pinctrl,
-  pl022-pins_default);
+   ret = pinctrl_select_state(pl022-pinctrl, pl022-pins_default);
if (ret)
dev_err(pl022-adev-dev,
could not set default pins\n);
}
 
+   if (!runtime) {
+   /* Then let's idle the pins until the next transfer happens */
+   if (!IS_ERR(pl022-pins_idle)) {
+   ret = pinctrl_select_state(pl022-pinctrl,
+   pl022-pins_idle);
+   if (ret)
+   dev_err(pl022-adev-dev,
+   could not set idle pins\n);
+   }
+   }
+
clk_enable(pl022-clk);
 }
 #endif
@@ -2348,7 +2366,7 @@ static int pl022_suspend(struct device *dev)
}
 
pm_runtime_get_sync(dev);
-   pl022_suspend_resources(pl022);
+   pl022_suspend_resources(pl022, false);
 
dev_dbg(dev, suspended\n);
return 0;
@@ -2359,7 +2377,7 @@ static int pl022_resume(struct device *dev)
struct pl022 *pl022 = dev_get_drvdata(dev);
int ret;
 
-   pl022_resume_resources(pl022);
+   pl022_resume_resources(pl022, false);
pm_runtime_put(dev);
 
/* Start the queue running */
@@ -2378,7 +2396,7 @@ static int pl022_runtime_suspend(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
 
-   pl022_suspend_resources(pl022);
+   pl022_suspend_resources(pl022, true);
return 0;
 }
 
@@ -2386,7 +2404,7 @@ static int pl022_runtime_resume(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
 
-   pl022_resume_resources(pl022);
+   pl022_resume_resources(pl022, true);
return 0

Re: [PATCH 2/4] spi: spi-pl022: Minor simplification for runtime pm

2012-10-17 Thread Linus Walleij
On Wed, Oct 17, 2012 at 4:39 PM, Ulf Hansson ulf.hans...@linaro.org wrote:

 We have discussed this patch previously. I think we shall use it, but
 we should change the commit msg since it does not reflect the truth.
 It is no more true that upper layer in driver core is preventing the
 device from being runtime suspended by a pm_runtime_get*. This was
 the case earlier.

OK I'll update the commit message and respin this one *only*
as [PATCH 2/4 v2] hold on...

Yours,
Linus Walleij

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[PATCH 2/4 v2] spi: spi-pl022: Minor simplification for runtime pm

2012-10-17 Thread Linus Walleij
From: Ulf Hansson ulf.hans...@linaro.org

In probe pm_runtime_put_autosuspend has the same effect as doing
pm_runtime_put.

Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index a1db91a..51b7a95 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2246,10 +2246,9 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
pm_runtime_set_autosuspend_delay(dev,
platform_info-autosuspend_delay);
pm_runtime_use_autosuspend(dev);
-   pm_runtime_put_autosuspend(dev);
-   } else {
-   pm_runtime_put(dev);
}
+   pm_runtime_put(dev);
+
return 0;
 
  err_spi_register:
-- 
1.7.11.3


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[PATCH] spi/pl022: add IDLE state pin management

2012-10-11 Thread Linus Walleij
From: Patrice Chotard patrice.chot...@stericsson.com

This commit allow to put pins in IDLE state in
runtime_suspend and in SLEEP state in suspend, corresponding
to defined semantics in linux/pinctrl/pinctrl-state.h.

To do this, just add a boolean parameter runtime
to pl022_resume_resources/pl022_suspend_resources which
indicates if it's called from PM_RUNTIME callbacks or not.

Signed-off-by: Patrice Chotard patrice.chot...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 44 +++-
 1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 51329b2..1361868 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -371,6 +371,7 @@ struct pl022 {
/* Two optional pin states - default  sleep */
struct pinctrl  *pinctrl;
struct pinctrl_state*pins_default;
+   struct pinctrl_state*pins_idle;
struct pinctrl_state*pins_sleep;
struct spi_master   *master;
struct pl022_ssp_controller *master_info;
@@ -2116,6 +2117,11 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
} else
dev_err(dev, could not get default pinstate\n);
 
+   pl022-pins_idle = pinctrl_lookup_state(pl022-pinctrl,
+ PINCTRL_STATE_IDLE);
+   if (IS_ERR(pl022-pins_idle))
+   dev_dbg(dev, could not get idle pinstate\n);
+
pl022-pins_sleep = pinctrl_lookup_state(pl022-pinctrl,
   PINCTRL_STATE_SLEEP);
if (IS_ERR(pl022-pins_sleep))
@@ -2302,35 +2308,47 @@ pl022_remove(struct amba_device *adev)
  * the runtime counterparts to handle external resources like
  * clocks, pins and regulators when going to sleep.
  */
-static void pl022_suspend_resources(struct pl022 *pl022)
+static void pl022_suspend_resources(struct pl022 *pl022, bool runtime)
 {
int ret;
+   struct pinctrl_state *pins_state;
 
clk_disable(pl022-clk);
 
+   pins_state = runtime ? pl022-pins_idle : pl022-pins_sleep;
/* Optionally let pins go into sleep states */
-   if (!IS_ERR(pl022-pins_sleep)) {
-   ret = pinctrl_select_state(pl022-pinctrl,
-  pl022-pins_sleep);
+   if (!IS_ERR(pins_state)) {
+   ret = pinctrl_select_state(pl022-pinctrl, pins_state);
if (ret)
-   dev_err(pl022-adev-dev,
-   could not set pins to sleep state\n);
+   dev_err(pl022-adev-dev, could not set %s pins\n,
+   runtime ? idle : sleep);
}
 }
 
-static void pl022_resume_resources(struct pl022 *pl022)
+static void pl022_resume_resources(struct pl022 *pl022, bool runtime)
 {
int ret;
 
/* Optionaly enable pins to be muxed in and configured */
+   /* First go to the default state */
if (!IS_ERR(pl022-pins_default)) {
-   ret = pinctrl_select_state(pl022-pinctrl,
-  pl022-pins_default);
+   ret = pinctrl_select_state(pl022-pinctrl, pl022-pins_default);
if (ret)
dev_err(pl022-adev-dev,
could not set default pins\n);
}
 
+   if (!runtime) {
+   /* Then let's idle the pins until the next transfer happens */
+   if (!IS_ERR(pl022-pins_idle)) {
+   ret = pinctrl_select_state(pl022-pinctrl,
+   pl022-pins_idle);
+   if (ret)
+   dev_err(pl022-adev-dev,
+   could not set idle pins\n);
+   }
+   }
+
clk_enable(pl022-clk);
 }
 #endif
@@ -2348,7 +2366,7 @@ static int pl022_suspend(struct device *dev)
}
 
pm_runtime_get_sync(dev);
-   pl022_suspend_resources(pl022);
+   pl022_suspend_resources(pl022, false);
 
dev_dbg(dev, suspended\n);
return 0;
@@ -2359,7 +2377,7 @@ static int pl022_resume(struct device *dev)
struct pl022 *pl022 = dev_get_drvdata(dev);
int ret;
 
-   pl022_resume_resources(pl022);
+   pl022_resume_resources(pl022, false);
pm_runtime_put(dev);
 
/* Start the queue running */
@@ -2378,7 +2396,7 @@ static int pl022_runtime_suspend(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
 
-   pl022_suspend_resources(pl022);
+   pl022_suspend_resources(pl022, true);
return 0;
 }
 
@@ -2386,7 +2404,7 @@ static int pl022_runtime_resume(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
 
-   pl022_resume_resources(pl022);
+   pl022_resume_resources(pl022, true);
return 0

Re: [PATCH V2 3/3] spi: spi-pl022: Minor simplification for runtime pm

2012-10-05 Thread Linus Walleij
On Thu, Oct 4, 2012 at 11:07 AM, Ulf Hansson ulf.hans...@linaro.org wrote:

 Mark, I am not sure this particular patch is actually wanted. Realized
 that when reading up on the driver/base/* patches for PM changes this
 summer. Especially how device probe/suspend/shutdown etc. has been
 changed for runtime PM point of view.

Mark will get you for top-posting ;-)

 From: Ulf Hansson ulf.hans...@linaro.org

 In probe pm_runtime_put_autosuspend has the same effect as doing
 pm_runtime_put. This due to upper layer in driver core is preventing
 the device from being runtime suspended by a pm_runtime_get*.

 Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
 Reviewed-by: Linus Walleij linus.wall...@linaro.org
 ---
  drivers/spi/spi-pl022.c |5 ++---
  1 file changed, 2 insertions(+), 3 deletions(-)

 diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
 index a1db91a..51b7a95 100644
 --- a/drivers/spi/spi-pl022.c
 +++ b/drivers/spi/spi-pl022.c
 @@ -2246,10 +2246,9 @@ pl022_probe(struct amba_device *adev, const struct 
 amba_id *id)
 pm_runtime_set_autosuspend_delay(dev,
 platform_info-autosuspend_delay);
 pm_runtime_use_autosuspend(dev);
 -   pm_runtime_put_autosuspend(dev);
 -   } else {
 -   pm_runtime_put(dev);
 }
 +   pm_runtime_put(dev);
 +
 return 0;

I'm paging Rafael and Magnus for their comments so we don't
overload Mark with runtime PM semantics...

Yours,
Linus Walleij

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Re: [PATCH V2 0/3] spi: spi-pl022: Fixup use of runtime pm

2012-10-05 Thread Linus Walleij
On Thu, Oct 4, 2012 at 10:04 AM, Ulf Hansson ulf.hans...@stericsson.com wrote:
 From: Ulf Hansson ulf.hans...@linaro.org

 Some old runtime pm patches got merged whiched messed up things.
 These are now reverted. Additionaly one patch do a simplification
 of the use of runtime pm functions.

 V2:
 Rebased patches and updated commit messages.

 Ulf Hansson (3):
   Revert spi/pl022: fix spi-pl022 pm enable at probe
   Revert spi/pl022: enable runtime PM
   spi: spi-pl022: Minor simplification for runtime pm

I think patch 1/3 and 2/3 needs to go into the -rc fixes.

Who's funneling this now? Grant or Mark?

Yours,
Linus Walleij

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Re: [PATCH 1/3] Revert spi/pl022: fix spi-pl022 pm enable at probe

2012-09-30 Thread Linus Walleij
On Fri, Sep 28, 2012 at 1:21 PM, Ulf Hansson ulf.hans...@stericsson.com wrote:

 From: Ulf Hansson ulf.hans...@linaro.org

 This reverts commit 6887237cd7da904184dab2750504040c68f3a080.

 Signed-off-by: Ulf Hansson ulf.hans...@linaro.org

Why?

It was removed in this commit, is it wrong?

Author: Michel JAOUEN michel.jao...@stericsson.com
Date:   Fri Aug 17 17:28:41 2012 +0200

spi/pl022: fix spi-pl022 pm enable at probe

amba drivers does not need to enable pm runtime at probe.
amba_probe already enables pm runtime.

This rids this warning in the ux500 boot log:
ssp-pl022 ssp0: Unbalanced pm_runtime_enable!

Signed-off-by: Michel JAOUEN michel.jao...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com

Yours,
Linus Walleij

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Re: [PATCH 2/3] Revert spi/pl022: enable runtime PM

2012-09-30 Thread Linus Walleij
On Fri, Sep 28, 2012 at 1:21 PM, Ulf Hansson ulf.hans...@stericsson.com wrote:

 From: Ulf Hansson ulf.hans...@linaro.org

 This reverts commit 2fb30d1147c599f5657e8c62c862f9a0f58d9d99.

 Signed-off-by: Ulf Hansson ulf.hans...@linaro.org

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Thanks for fixing my stupid mistakes ...
Linus Walleij

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Re: [PATCH 3/3] spi: spi-pl022: Minor simplification for runtime pm

2012-09-30 Thread Linus Walleij
On Fri, Sep 28, 2012 at 1:21 PM, Ulf Hansson ulf.hans...@stericsson.com wrote:

 From: Ulf Hansson ulf.hans...@linaro.org

 In probe pm_runtime_put_autosuspend has the same effect as doing
 pm_runtime_put. This due to upper layer in driver core is preventing
 the device from being runtime suspended by a pm_runtime_get*.

 Signed-off-by: Ulf Hansson ulf.hans...@linaro.org

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH 1/2] spi:pl022: Disable/Enable functional clock from suspend/resume

2012-09-26 Thread Linus Walleij
On Wed, Sep 26, 2012 at 1:24 PM, Vipul Kumar Samar
vipulkumar.sa...@st.com wrote:

 SPI functional clock must be disalble/enable in non RTPM suspend/resume
 hooks. Currently it is only done for RTPM cases.

 This patch add support to disable/enbale clock for conventional
 suspend/resume calls.

 Signed-off-by: Vipul Kumar Samar vipulkumar.sa...@st.com

Cross dependency between runtime suspend/resume and
common suspend/resume. Oh the horror ...

Ulf Hansson has experienced pain with this as well, let's
discuss this a bit.

 @@ -2310,6 +2310,8 @@ static int pl022_suspend(struct device *dev)
 }

 dev_dbg(dev, suspended\n);
 +   clk_disable(pl022-clk);
 +
 return 0;
  }

 @@ -2318,6 +2320,12 @@ static int pl022_resume(struct device *dev)
 struct pl022 *pl022 = dev_get_drvdata(dev);
 int ret;

 +   ret = clk_enable(pl022-clk);
 +   if (ret) {
 +   dev_err(dev, could not enable SSP/SPI bus clock\n);
 +   return ret;
 +   }
 +

There is a potential race between the runtime
suspend/resume and ordinary suspend/resume hooks here
I'm afraid.

I think in this case since we're not reading nor writing
registers, we should just wait for the device to
go down to runtime suspend in the ordinary suspend
hook, just wait for runtime suspend to happen in
suspend, do nothing in resume (and wait for the device
to wake itself as needed).

So something like:

while (!pm_runtime_status_suspended(dev))
   cpu_relax();  // or usleep_range()?
/* Here you know the block is gated off */

Or is this better:

pm_runtime_get_sync();
/* Now we know for sure it's on! */
pm_runtime_put_sync();
/* Now we know for sure it's off! */

Is there a *good* way to await runtime suspend?

I don't know if any of this is the proper solution so let
Rafael and Magnus comment on how it's supposed
to be done.


Ramblings:

The semantics between runtime suspend/resume and
ordinary suspend/resume are unclear to me, it seems like
this is all up to the drivers and busses to figure out. Like
you weren't supposed to use both at the same time.

What we've done in other drivers here at ST-Ericsson is
to make the .suspend hook actually do a runtime get so that
runtime PM is running, then hammer off all resources
and go to suspend with PM runtime actually enabled.

Something like this:

suspend()
  pm_runtime_get_sync()
  /* Maybe poke some registers here */
  clk_disable();

resume():
  clk_enable();
  /* Maybe poke some registers here */
  pm_runtime_put();

This is to be sure that there is not a race between runtime
suspend/resume and ordinary suspend/resume.

I don't like it since it actually turns things upside-down
completely, during ordinary suspend the device is
runtime resumed for example.

Rafael, Magnus: help.

Yours,
Linus Walleij

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Re: [PATCH 2/2] ARM: ABMA: Disable/Enable interface clock from suspend/resume

2012-09-26 Thread Linus Walleij
On Wed, Sep 26, 2012 at 1:24 PM, Vipul Kumar Samar
vipulkumar.sa...@st.com wrote:

 AMBA devices interface clock is disabled in RTPM suspend/resume hooks
 but not in conventional hooks.

 This patch adds support to disable/enable clock for conventional
 suspend/resume calls.
(...)
 +   struct amba_device *pcdev = to_amba_device(dev);
 int ret = 0;

 if (!drv)
 @@ -132,16 +133,27 @@ static int amba_pm_suspend(struct device *dev)
 ret = amba_legacy_suspend(dev, PMSG_SUSPEND);
 }

 +   if (!ret)
 +   clk_disable(pcdev-pclk);
 +
 return ret;
  }

You're not accounting for the case where pcdev-pclk
is an error pointer (as happens if pclk lookup fails at
probe).

I think you can simplify some of the code using
the external accessors from linux/amba/bus.h:

amba_pclk_enable();
amba_pclk_disable();

But:

Again this is a case where you have a race between runtime
suspend/resume and ordinary suspend/resume.

These ordinary suspend/resume operations should probably
wait for runtime suspend to happen *first* if and only if
runtime PM is enabled, and then the block will be gated
off. So we really need to figure out how we can make sure
that this happens.

If just ordinary PM is enabled, the above makes sense but in
that case I think we should have that #ifdef:ed as an alternative
or something.

So something like:

suspend():
#ifdef CONFIG_PM_RUNTIME
   /* Wait for runtime PM to hammer down the pclk */
#elif CONFIG_PM
   amba_pclk_disable();
#endif

resume():
#if defined(CONFIG_PM)  !defined(CONFIG_PM_RUNTIME)
  amba_pclk_enable();
#endif
  /* Let runtime PM lazily enable the clock when needed */

To complicate things further the bus operations can be
overridden by e.g. voltage domains. In this case we (ux500)
have choosen to call out to the AMBA level to make sure
semantics are preserved.

Yours,
Linus Walleij

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Re: [PATCH 1/2] spi:pl022: Disable/Enable functional clock from suspend/resume

2012-09-26 Thread Linus Walleij
On Wed, Sep 26, 2012 at 2:19 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
 On Wed, Sep 26, 2012 at 02:17:36PM +0200, Linus Walleij wrote:
 On Wed, Sep 26, 2012 at 1:24 PM, Vipul Kumar Samar

  SPI functional clock must be disalble/enable in non RTPM suspend/resume
  hooks. Currently it is only done for RTPM cases.

  This patch add support to disable/enbale clock for conventional
  suspend/resume calls.

 Cross dependency between runtime suspend/resume and
 common suspend/resume. Oh the horror ...

 This should be fine, we runtime resume before we suspend.
(...)
 This was clarified at some point relatively recently with the above
 (which is essentially the same as the solution you describe).

Oh. How come that whenever I poke my nose into this stuff I
feel like a compleat n00b X-D

Can you point me to the relevant posts/doc so I can read up on
it, would be much appreciated!

Yours,
Linus Walleij

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Re: [PATCH 1/2] spi:pl022: Disable/Enable functional clock from suspend/resume

2012-09-26 Thread Linus Walleij
On Wed, Sep 26, 2012 at 4:08 PM, viresh kumar viresh.ku...@linaro.org wrote:
 On Wed, Sep 26, 2012 at 5:49 PM, Mark Brown
 broo...@opensource.wolfsonmicro.com wrote:
 On Wed, Sep 26, 2012 at 02:17:36PM +0200, Linus Walleij wrote:
 On Wed, Sep 26, 2012 at 1:24 PM, Vipul Kumar Samar

  SPI functional clock must be disalble/enable in non RTPM suspend/resume
  hooks. Currently it is only done for RTPM cases.

  This patch add support to disable/enbale clock for conventional
  suspend/resume calls.

 Cross dependency between runtime suspend/resume and
 common suspend/resume. Oh the horror ...

 This should be fine, we runtime resume before we suspend.

 I believe Vipul sent this patch for the cases where RTPM in not
 enabled in the configs.

OK so we need to handle the cases where either, both or
just one of them is enabled...

Mark says the defined semantics is that runtime PM is
resumed across suspend/resume but I'd just like to
understand the overall mechanism that makes sure
this happens and I'm go...

However there is another problem with the patch,
because in -next there is also pin control handling
in the runtime hooks, so we need to duplicate
not only clocks but also that in each of the functions.

Maybe we can first make a patch that breaks out
resource handling so we can call that from each
of the suspend/resume calls? (I'll try.)

Yours,
Linus Walleij

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[PATCH] spi/pl022: use more managed resources

2012-09-26 Thread Linus Walleij
This switches the PL022 SPI driver to use devm_* managed resources
for IRQ, clocks, ioremap and GPIO. Prior to this, the GPIOs would
even leak.

Signed-off-by: Linus Walleij linus.wall...@stericsson.com
---
 drivers/spi/spi-pl022.c | 31 ++-
 1 file changed, 10 insertions(+), 21 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index f8568b4..15737bc 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -1,7 +1,7 @@
 /*
  * A driver for the ARM PL022 PrimeCell SSP/SPI bus master.
  *
- * Copyright (C) 2008-2009 ST-Ericsson AB
+ * Copyright (C) 2008-2012 ST-Ericsson AB
  * Copyright (C) 2006 STMicroelectronics Pvt. Ltd.
  *
  * Author: Linus Walleij linus.wall...@stericsson.com
@@ -2074,24 +2074,21 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
 
if (!platform_info) {
dev_err(dev, probe: no platform data defined\n);
-   status = -ENODEV;
-   goto err_no_pdata;
+   return -ENODEV;
}
 
if (platform_info-num_chipselect) {
num_cs = platform_info-num_chipselect;
} else {
dev_err(dev, probe: no chip select defined\n);
-   status = -ENODEV;
-   goto err_no_pdata;
+   return -ENODEV;
}
 
/* Allocate master with space for data */
master = spi_alloc_master(dev, sizeof(struct pl022));
if (master == NULL) {
dev_err(adev-dev, probe - cannot alloc SPI master\n);
-   status = -ENOMEM;
-   goto err_no_master;
+   return -ENOMEM;
}
 
pl022 = spi_master_get_devdata(master);
@@ -2153,7 +2150,7 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
pl022-chipselects[i] = cs_gpio;
 
if (gpio_is_valid(cs_gpio)) {
-   if (gpio_request(cs_gpio, ssp-pl022))
+   if (devm_gpio_request(dev, cs_gpio, 
ssp-pl022))
dev_err(adev-dev,
could not request %d gpio\n,
cs_gpio);
@@ -2180,7 +2177,8 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
goto err_no_ioregion;
 
pl022-phybase = adev-res.start;
-   pl022-virtbase = ioremap(adev-res.start, resource_size(adev-res));
+   pl022-virtbase = devm_ioremap(dev, adev-res.start,
+  resource_size(adev-res));
if (pl022-virtbase == NULL) {
status = -ENOMEM;
goto err_no_ioremap;
@@ -2190,7 +2188,7 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
 
pm_runtime_resume(dev);
 
-   pl022-clk = clk_get(adev-dev, NULL);
+   pl022-clk = devm_clk_get(adev-dev, NULL);
if (IS_ERR(pl022-clk)) {
status = PTR_ERR(pl022-clk);
dev_err(adev-dev, could not retrieve SSP/SPI bus clock\n);
@@ -2218,8 +2216,8 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
   SSP_CR1(pl022-virtbase));
load_ssp_default_config(pl022);
 
-   status = request_irq(adev-irq[0], pl022_interrupt_handler, 0, pl022,
-pl022);
+   status = devm_request_irq(dev, adev-irq[0], pl022_interrupt_handler,
+ 0, pl022, pl022);
if (status  0) {
dev_err(adev-dev, probe - cannot get IRQ (%d)\n, status);
goto err_no_irq;
@@ -2259,24 +2257,18 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
  err_spi_register:
if (platform_info-enable_dma)
pl022_dma_remove(pl022);
-
-   free_irq(adev-irq[0], pl022);
  err_no_irq:
clk_disable(pl022-clk);
  err_no_clk_en:
clk_unprepare(pl022-clk);
  err_clk_prep:
-   clk_put(pl022-clk);
  err_no_clk:
-   iounmap(pl022-virtbase);
  err_no_ioremap:
amba_release_regions(adev);
  err_no_ioregion:
  err_no_gpio:
  err_no_pinctrl:
spi_master_put(master);
- err_no_master:
- err_no_pdata:
return status;
 }
 
@@ -2298,12 +2290,9 @@ pl022_remove(struct amba_device *adev)
if (pl022-master_info-enable_dma)
pl022_dma_remove(pl022);
 
-   free_irq(adev-irq[0], pl022);
clk_disable(pl022-clk);
clk_unprepare(pl022-clk);
-   clk_put(pl022-clk);
pm_runtime_disable(adev-dev);
-   iounmap(pl022-virtbase);
amba_release_regions(adev);
tasklet_disable(pl022-pump_transfers);
spi_unregister_master(pl022-master);
-- 
1.7.11.3


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[PATCH] spi/pl022: get/put resources on suspend/resume

2012-09-26 Thread Linus Walleij
This factors out the resource handling in runtime
suspend/resume and also calls it from the ordinary suspend
and resume hooks.

The semantics require that ordinary PM op suspend is called
with runtime PM in resumed mode, so that ordinary suspend
can assume that it will e.g. decrease the clock reference
counter to 0, runtime resume having previously increased it
to 1.

Cc: Ulf Hansson ulf.hans...@linaro.org
Cc: Vipul Kumar Samar vipulkumar.sa...@st.com
Cc: Viresh Kumar viresh.ku...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@stericsson.com
---
Vipin: can you confirm that this approach works for your
case with only suspend/resume but no runtime PM?

Question: can I be sure that the above semantics is taken
care of by runtime PM, or will I have to add kludges to
the ordinary suspend/resume hooks to make sure that the
device is out of runtime suspend before suspending?
---
 drivers/spi/spi-pl022.c | 64 -
 1 file changed, 42 insertions(+), 22 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 15737bc..63cd7c6 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2300,6 +2300,43 @@ pl022_remove(struct amba_device *adev)
return 0;
 }
 
+/*
+ * These two functions are used from both suspend/resume and
+ * the runtime counterparts to handle external resources like
+ * clocks, pins and regulators when going to sleep.
+ */
+static void pl022_suspend_resources(struct pl022 *pl022)
+{
+   int ret;
+
+   clk_disable(pl022-clk);
+
+   /* Optionally let pins go into sleep states */
+   if (!IS_ERR(pl022-pins_sleep)) {
+   ret = pinctrl_select_state(pl022-pinctrl,
+  pl022-pins_sleep);
+   if (ret)
+   dev_err(pl022-adev-dev,
+   could not set pins to sleep state\n);
+   }
+}
+
+static void pl022_resume_resources(struct pl022 *pl022)
+{
+   int ret;
+
+   /* Optionaly enable pins to be muxed in and configured */
+   if (!IS_ERR(pl022-pins_default)) {
+   ret = pinctrl_select_state(pl022-pinctrl,
+  pl022-pins_default);
+   if (ret)
+   dev_err(pl022-adev-dev,
+   could not set default pins\n);
+   }
+
+   clk_enable(pl022-clk);
+}
+
 #ifdef CONFIG_SUSPEND
 static int pl022_suspend(struct device *dev)
 {
@@ -2311,6 +2348,7 @@ static int pl022_suspend(struct device *dev)
dev_warn(dev, cannot suspend master\n);
return ret;
}
+   pl022_suspend_resources(pl022);
 
dev_dbg(dev, suspended\n);
return 0;
@@ -2321,6 +2359,8 @@ static int pl022_resume(struct device *dev)
struct pl022 *pl022 = dev_get_drvdata(dev);
int ret;
 
+   pl022_resume_resources(pl022);
+
/* Start the queue running */
ret = spi_master_resume(pl022-master);
if (ret)
@@ -2336,36 +2376,16 @@ static int pl022_resume(struct device *dev)
 static int pl022_runtime_suspend(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
-   int status = 0;
-
-   clk_disable(pl022-clk);
-
-   /* Optionally let pins go into sleep states */
-   if (!IS_ERR(pl022-pins_sleep)) {
-   status = pinctrl_select_state(pl022-pinctrl,
-   pl022-pins_sleep);
-   if (status)
-   dev_err(dev, could not set pins to sleep state\n);
-   }
 
+   pl022_suspend_resources(pl022);
return 0;
 }
 
 static int pl022_runtime_resume(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
-   int status = 0;
-
-   /* Optionaly enable pins to be muxed in and configured */
-   if (!IS_ERR(pl022-pins_default)) {
-   status = pinctrl_select_state(pl022-pinctrl,
-   pl022-pins_default);
-   if (status)
-   dev_err(dev, could not set default pins\n);
-   }
-
-   clk_enable(pl022-clk);
 
+   pl022_resume_resources(pl022);
return 0;
 }
 #endif
-- 
1.7.11.3


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Re: [PATCH] spi/pl022: get/put resources on suspend/resume

2012-09-26 Thread Linus Walleij
On Wed, Sep 26, 2012 at 5:23 PM, Ulf Hansson ulf.hans...@linaro.org wrote:

 You will have compile warnings when not having CONFIG_SUSPEND and
 CONFIG_RUNTIME_PM, due to unused code/functions.

Argh the evil #fidefs... I'll put in even more of them then.

 Otherwise you have my ack.

Thanks!

Yours,
Linus Walleij

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[PATCH v2] spi/pl022: get/put resources on suspend/resume

2012-09-26 Thread Linus Walleij
This factors out the resource handling in runtime
suspend/resume and also calls it from the ordinary suspend
and resume hooks.

The semantics require that ordinary PM op suspend is called
with runtime PM in resumed mode, so that ordinary suspend
can assume that it will e.g. decrease the clock reference
counter to 0, runtime resume having previously increased it
to 1.

Cc: Vipul Kumar Samar vipulkumar.sa...@st.com
Cc: Viresh Kumar viresh.ku...@linaro.org
Acked-by: Ulf Hansson ulf.hans...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@stericsson.com
---
ChangeLog v1-v2:
- Add more #ifdef for the case where we have neither normal
  PM nor runtime PM.
---
 drivers/spi/spi-pl022.c | 66 -
 1 file changed, 44 insertions(+), 22 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 15737bc..9194641 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2300,6 +2300,45 @@ pl022_remove(struct amba_device *adev)
return 0;
 }
 
+#if defined(CONFIG_SUSPEND) || defined(CONFIG_PM_RUNTIME)
+/*
+ * These two functions are used from both suspend/resume and
+ * the runtime counterparts to handle external resources like
+ * clocks, pins and regulators when going to sleep.
+ */
+static void pl022_suspend_resources(struct pl022 *pl022)
+{
+   int ret;
+
+   clk_disable(pl022-clk);
+
+   /* Optionally let pins go into sleep states */
+   if (!IS_ERR(pl022-pins_sleep)) {
+   ret = pinctrl_select_state(pl022-pinctrl,
+  pl022-pins_sleep);
+   if (ret)
+   dev_err(pl022-adev-dev,
+   could not set pins to sleep state\n);
+   }
+}
+
+static void pl022_resume_resources(struct pl022 *pl022)
+{
+   int ret;
+
+   /* Optionaly enable pins to be muxed in and configured */
+   if (!IS_ERR(pl022-pins_default)) {
+   ret = pinctrl_select_state(pl022-pinctrl,
+  pl022-pins_default);
+   if (ret)
+   dev_err(pl022-adev-dev,
+   could not set default pins\n);
+   }
+
+   clk_enable(pl022-clk);
+}
+#endif
+
 #ifdef CONFIG_SUSPEND
 static int pl022_suspend(struct device *dev)
 {
@@ -2311,6 +2350,7 @@ static int pl022_suspend(struct device *dev)
dev_warn(dev, cannot suspend master\n);
return ret;
}
+   pl022_suspend_resources(pl022);
 
dev_dbg(dev, suspended\n);
return 0;
@@ -2321,6 +2361,8 @@ static int pl022_resume(struct device *dev)
struct pl022 *pl022 = dev_get_drvdata(dev);
int ret;
 
+   pl022_resume_resources(pl022);
+
/* Start the queue running */
ret = spi_master_resume(pl022-master);
if (ret)
@@ -2336,36 +2378,16 @@ static int pl022_resume(struct device *dev)
 static int pl022_runtime_suspend(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
-   int status = 0;
-
-   clk_disable(pl022-clk);
-
-   /* Optionally let pins go into sleep states */
-   if (!IS_ERR(pl022-pins_sleep)) {
-   status = pinctrl_select_state(pl022-pinctrl,
-   pl022-pins_sleep);
-   if (status)
-   dev_err(dev, could not set pins to sleep state\n);
-   }
 
+   pl022_suspend_resources(pl022);
return 0;
 }
 
 static int pl022_runtime_resume(struct device *dev)
 {
struct pl022 *pl022 = dev_get_drvdata(dev);
-   int status = 0;
-
-   /* Optionaly enable pins to be muxed in and configured */
-   if (!IS_ERR(pl022-pins_default)) {
-   status = pinctrl_select_state(pl022-pinctrl,
-   pl022-pins_default);
-   if (status)
-   dev_err(dev, could not set default pins\n);
-   }
-
-   clk_enable(pl022-clk);
 
+   pl022_resume_resources(pl022);
return 0;
 }
 #endif
-- 
1.7.11.3


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Re: [PATCH] spi: pl022: Add clk_{un}prepare() support in runtime PM

2012-09-20 Thread Linus Walleij
On Wed, Sep 19, 2012 at 5:31 AM, viresh kumar viresh.ku...@linaro.org wrote:
 On Tue, Sep 18, 2012 at 5:20 PM, Linus Walleij linus.wall...@linaro.org 
 wrote:
 On Tue, Sep 18, 2012 at 6:09 AM, viresh kumar viresh.ku...@linaro.org 
 wrote:

 The amba layer is taking care of interface clock only and not
 functional clock. So
 i believe that's not the magic code. :)

 This clock is the one for the external bus. In some designs these two
 clocks are one and the same, and these won't currently get into any clock
 disabled states, sadly. (We need to fix that some day.)

 I went through the code and found following in amba/bus.c:


 static int amba_pm_runtime_suspend(struct device *dev)
 {
 struct amba_device *pcdev = to_amba_device(dev);
 int ret = pm_generic_runtime_suspend(dev);

 if (ret == 0  dev-driver)
 clk_disable(pcdev-pclk);

 return ret;
 }

 static int amba_pm_runtime_resume(struct device *dev)
 {
 struct amba_device *pcdev = to_amba_device(dev);
 int ret;

 if (dev-driver) {
 ret = clk_enable(pcdev-pclk);
 /* Failure is probably fatal to the system, but... */
 if (ret)
 return ret;
 }

 return pm_generic_runtime_resume(dev);
 }

 If i am not wrong, these routines also get called with runtiime suspend/resume
 of pl022?

Maybe. And that is part of the problem. Check this in
drivers/base/power/runtime.c, rpm_suspend():

if (dev-pm_domain)
callback = dev-pm_domain-ops.runtime_suspend;
else if (dev-type  dev-type-pm)
callback = dev-type-pm-runtime_suspend;
else if (dev-class  dev-class-pm)
callback = dev-class-pm-runtime_suspend;
else if (dev-bus  dev-bus-pm)
callback = dev-bus-pm-runtime_suspend;
else
callback = NULL;

So as you see the AMBA bus-level runtime PM callbacks will be
called UNLESS there is a class and UNLESS there is a type
and UNLESS there is a voltage domain for this device.

In Ux500 we solved this by calling the AMBA bus-level code
from the voltage domain so it's not completely overridden,
but the semantics are complex here. :-/

(And then we have yet to bring common suspend/resume
into the picture ... which makes is ever more complex.)

If the SPEAr is not using any voltage domains for example,
it'll be unaffected and work fine.

 If that is the case, the even the interface clock of pl022 is getting
 disabled when not in used.

Yes, hopefully...

 And so for Architectures like SPEAr (where functional and interface
 clock are controlled
 by a single bit), we don't need anything else for power saving, with
 respect to clocks.
 Isn't it so?

If you have no power domains I hope the ref goes down to
zero and gates off the clock, so yes!

Yours,
Linus Walleij

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[PATCH] spi/pl022: adopt pinctrl support

2012-09-19 Thread Linus Walleij
From: Patrice Chotard patrice.chot...@stericsson.com

Amend the PL022 pin controller to optionally take a pin control
handle and set the state of the pins to default on boot and
runtime resume, and to sleep at runtime suspend. This way we
will dynamically save power on the SPI busses, for example some
electronic designs may be able to ground the pins when unused
instead of pull-up. Some pin controllers may want to set the
pins as wake-up sources when sleeping.

Effect on platforms using the PL022 driver:

- If the platform does not use pin control - no semantic effect,
  the pinctrl stubs will kick in and resolve the situation.

- Platforms using this driver and have pin control but no
  function defined for the PL022 need to either supply a
  default function in their map or enable pinctrl dummies
  so the driver is satisfied.

- Platforms using this driver with hogs for setting up the PL022
  pin control - stop using hogs to take the pl022 pin control
  handle, let the driver handle this.

I'be looked at some platforms that may be affected:

- SPEAr: appears to define the proper functions in their device
  trees and not hogging them, so things should be smooth, the
  driver will simply start to take its pins.

- Ux500: the proper function is defined and will be taken properly
  by the driver. New sleep states introduced by a separate patch to
  ux500 but no regression, since the default state is sufficient.

- U300: old hog deleted as part of this patch.

- LPC32xx: does not appear to be using pinctrl.

- ARM Integrator IMPD1, RealView  Versatile: does not use pinctrl.

Cc: Pawel Moll pawel.m...@arm.com
Cc: Roland Stigge sti...@antcom.de
Cc: Shiraz Hashim shiraz.linux.ker...@gmail.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Vinit Kamalaksha Shenoy vinit.she...@st.com
Cc: Viresh Kumar viresh.ku...@arm.com
Signed-off-by: Patrice Chotard patrice.chot...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 arch/arm/mach-u300/core.c |  3 ---
 drivers/spi/spi-pl022.c   | 46 ++
 2 files changed, 46 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 03acf18..281292e 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1605,9 +1605,6 @@ static struct u300_mux_hog u300_mux_hogs[] = {
.dev = uart0_device.dev,
},
{
-   .dev = pl022_device.dev,
-   },
-   {
.dev = mmcsd_device.dev,
},
 };
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index e43b610..423513c 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -42,6 +42,7 @@
 #include linux/pm_runtime.h
 #include linux/gpio.h
 #include linux/of_gpio.h
+#include linux/pinctrl/consumer.h
 
 /*
  * This macro is used to define some register default values.
@@ -367,6 +368,10 @@ struct pl022 {
resource_size_t phybase;
void __iomem*virtbase;
struct clk  *clk;
+   /* Two optional pin states - default  sleep */
+   struct pinctrl  *pinctrl;
+   struct pinctrl_state*pins_default;
+   struct pinctrl_state*pins_sleep;
struct spi_master   *master;
struct pl022_ssp_controller *master_info;
/* Message per-transfer pump */
@@ -2068,6 +2073,28 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
pl022-chipselects = devm_kzalloc(dev, num_cs * sizeof(int),
  GFP_KERNEL);
 
+   pl022-pinctrl = devm_pinctrl_get(dev);
+   if (IS_ERR(pl022-pinctrl)) {
+   status = PTR_ERR(pl022-pinctrl);
+   goto err_no_pinctrl;
+   }
+
+   pl022-pins_default = pinctrl_lookup_state(pl022-pinctrl,
+PINCTRL_STATE_DEFAULT);
+   /* enable pins to be muxed in and configured */
+   if (!IS_ERR(pl022-pins_default)) {
+   status = pinctrl_select_state(pl022-pinctrl,
+   pl022-pins_default);
+   if (status)
+   dev_err(dev, could not set default pins\n);
+   } else
+   dev_err(dev, could not get default pinstate\n);
+
+   pl022-pins_sleep = pinctrl_lookup_state(pl022-pinctrl,
+  PINCTRL_STATE_SLEEP);
+   if (IS_ERR(pl022-pins_sleep))
+   dev_dbg(dev, could not get sleep pinstate\n);
+
/*
 * Bus Number Which has been Assigned to this SSP controller
 * on this board
@@ -2217,6 +2244,7 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
amba_release_regions(adev);
  err_no_ioregion:
  err_no_gpio:
+ err_no_pinctrl:
spi_master_put(master);
  err_no_master:
  err_no_pdata:
@@ -2290,15 +2318,33 @@ static int pl022_resume(struct

Re: [PATCH] spi: pl022: Add clk_{un}prepare() support in runtime PM

2012-09-18 Thread Linus Walleij
On Tue, Sep 18, 2012 at 6:09 AM, viresh kumar viresh.ku...@linaro.org wrote:

 Yes, we don't need to call prepare() again atleast for SPEAr. You are correct.
 I saw the driver after a long time :)

I'm asking because it's actually OK to do this, I was more asking whether it
was really needed by any platforms...

 Can you please elaborate, why can't i see any clk_disable/enable calls 
 anywhere
 else from probe. If i remember correctly, earlier we used to enable/disable
 clk after transfers and also during suspend/resume.

We clk_disable() at runtime_suspend() and clk_enable() at runtime resume,
and the driver gives hints to the runtime PM layer to autosuspend the
driver whenever it's unused. Check the pm_runtime_* calls.

 The amba layer is taking care of interface clock only and not
 functional clock. So
 i believe that's not the magic code. :)

This clock is the one for the external bus. In some designs these two
clocks are one and the same, and these won't currently get into any clock
disabled states, sadly. (We need to fix that some day.)

Yours,
Linus Walleij

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Re: [PATCH 09/19] ARM: ux500: Enable SSP (SPI) for HREF when booting Device Tree

2012-09-18 Thread Linus Walleij
On Mon, Sep 17, 2012 at 7:03 PM, Roland Stigge sti...@antcom.de wrote:
 On 09/10/2012 01:11 PM, Linus Walleij wrote:

 It appears Roland has written his bindings such that DT
 data augments platform data (yes, I am also getting crazy
 about this prioritization, mea culpa for ACKing this without
 proper discussion) so it appears that you could actually
 use AUXDATA and some stuff in the DT at the same
 time.

 Sorry for the incompleteness of the devicetree conversion. I'm sending a
 patch (separately) that makes it possible to specify everything via
 devicetree, so you can choose between dt and platform data.

OK it was not such a big deal, but many many thanks for fixing this
up! :-)

 Except in case of callback specification (dma_filter()), you need to
 provide platform data.

OK.

 Interestingly, when I removed the actual platform data from the board
 file, I noticed that I still needed to specify a device name (like
 dev:ssp0) to make it work. But this seems to be expected according to
 the documentation of OF_DEV_AUXDATA(). Are there any plans or ideas how
 to fix this?

This is very likely because the clock tree has a name like dev:ssp0
encoded for this device, and if you don't nail it down like that the
device name will be the same as the node in your device tree and
then clock lookup will fail.

The real fix is to convert the clock drivers to use device tree so
the drivers can just refer to the phandles to figure out what clock
node they need.

Along with the DMA channel mapping this is one of the major
roadblocks to finalizing the device tree adoptions.

 When we have sorted out this driver change (please check the new pl022
 specific dt property names!), I will provide patches for arm-soc to
 actually use this new interface via dts files.

OK cool I guess you will do this for the LPC32xx? Or are you testing
this on some other platforms?

Yours,
Linus Walleij

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Re: [PATCH v2 2/2] ARM: OMAP2+: Enable pinctrl dummy states

2012-09-18 Thread Linus Walleij
On Mon, Sep 17, 2012 at 7:22 PM, Matt Porter mpor...@ti.com wrote:

 Enable pinctrl dummy states for all OMAP platforms that don't
 populate DT. This allows drivers to be converted to pinctrl
 and not generate new warnings on platforms that do not provide
 pinctrl data. These platforms already have pinmuxes configured
 before the drivers probe.

 Signed-off-by: Matt Porter mpor...@ti.com

Looks like a good idea, so FWIW:
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH] spi: pl022: Add clk_{un}prepare() support in runtime PM

2012-09-17 Thread Linus Walleij
On Mon, Sep 17, 2012 at 12:37 PM, Vipul Kumar Samar
vipulkumar.sa...@st.com wrote:

 clk_{un}prepare is mandatory for platforms using common clock framework. Add
 clk_{un}prepare() support for spi-pl022 runtime PM.

 Signed-off-by: Vipul Kumar Samar vipulkumar.sa...@st.com

This driver does clk_prepare/unprepare at probe
and removed, so I guess what you're trying to say is that
on your platform the clk_unprepare() process context call
is needed to save power?

Please elaborate...

Yours,
Linus Walleij

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Re: [PATCH v6 1/3] spi/pl022: Add chip select handling via GPIO

2012-09-03 Thread Linus Walleij
On Sun, Sep 2, 2012 at 3:12 PM, shiraz hashim
shiraz.linux.ker...@gmail.com wrote:
 Hi Linus,

 Yes that is why the allocation looks like this:

 +   master = spi_alloc_master(dev, sizeof(struct pl022) + sizeof(int) *
 + platform_info-num_chipselect);


 The allocation is such because type of chipselects is int.

 The statement for allocation is correct, but

pl022-chipselects = (int *) pl022 + sizeof(struct pl022);

 is not adding  sizeof(struct pl022) bytes to pl022 base (which we want),
 but infact 4 times the size of pl022 (because type of pl022 is now int *).

 Do you get my point ?  This would go way beyond memory allocated
 for chipselects.

Yes of course ... how could I not see this. Sorry!

Yours,
Linus Walleij

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Re: [PATCH] spi/pl022: Fix chipselects pointer computation

2012-09-03 Thread Linus Walleij
On Mon, Sep 3, 2012 at 10:14 AM, Roland Stigge sti...@antcom.de wrote:

 The new chip select handling via GPIO introduced a pointer computation bug:

 (int *) pl022 + sizeof(struct pl022)

 doesn't point to the data immediately after the actual struct pl022 (as was
 intended) but to a multiple of bytes after it because of the (int *) type.

 Replacing the kludgy pointer arithmetic with managed memory allocation for the
 chip selects.

 Signed-off-by: Roland Stigge sti...@antcom.de

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Thanks for fixing this! And thanks to Shiraz for spotting the problem,
Mark you could add a:

Reported-by: Shiraz Hashim shiraz.linux.ker...@gmail.com

when applying this.

Yours,
Linus Walleij

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Re: [PATCH resend 2/2] SPI: spi-gpio: Add DT bindings

2012-09-03 Thread Linus Walleij
On Sun, Sep 2, 2012 at 10:17 PM, Daniel Mack zon...@gmail.com wrote:
 On 05.08.2012 21:12, Linus Walleij wrote:
 On Sun, Aug 5, 2012 at 1:57 PM, Daniel Mack zon...@gmail.com wrote:

 Acked-by: Linus Walleij linus.wall...@linaro.org

 Ok, thanks. Mark, did the patches reach you this time? I think they
 should go thru the SPI tree.

 Yeah no problem, Mark is always faster than me ...

 Hmm, I don't know whether anyone took those patches yet? Mark?

Mark better take them, ping on Mark.

Yours,
Linus Walleij

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Re: [PATCH v6 1/3] spi/pl022: Add chip select handling via GPIO

2012-09-02 Thread Linus Walleij
On Sat, Sep 1, 2012 at 1:14 PM, shiraz hashim
shiraz.linux.ker...@gmail.com wrote:
 Hi Roland,

 On Wed, Aug 22, 2012 at 7:19 PM, Roland Stigge sti...@antcom.de wrote:
 @@ -2016,6 +2030,8 @@ pl022_probe(struct amba_device *adev, co
 pl022-master_info = platform_info;
 pl022-adev = adev;
 pl022-vendor = id-data;
 +   /* Point chipselects to allocated memory beyond the main struct */
 +   pl022-chipselects = (int *) pl022 + sizeof(struct pl022);

 This is going beyond memory allocated for chipselects
 as it adds 4 * sizeof(struct pl022) bytes to pl022.

Yes that is why the allocation looks like this:

+   master = spi_alloc_master(dev, sizeof(struct pl022) + sizeof(int) *
+ platform_info-num_chipselect);

 pl022-chipselects = (int *) pl022[1];
 can be musch safer.

I see absolutely no sematic difference between these two
methods to reach the first position beyond the first struct.

If we're gonna be debating this it's a safe sign that this is
not a good design pattern at all, so then it is better to simply
devm_kzalloc(sizeof(int) * platform_info-num_chipselect);
separately.

(But I'm happy with the patch as it is. And the other way
too, since I'm not very picky.)

Yours,
Linus Walleij

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Re: [PATCH] spi/pl022: Fill master-dev.of_node to get spi devices registered via DT

2012-08-22 Thread Linus Walleij
On Wed, Aug 22, 2012 at 11:16 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
 On 19 August 2012 03:56, Linus Walleij linus.wall...@linaro.org wrote:
 On Sat, Aug 18, 2012 at 4:25 AM, Viresh Kumar viresh.ku...@linaro.org
 Isn't this one of those things that *have* to be #ifdef CONFIG_OF?

 Next iteration, remember to add Mark Brown on To: because je's taking
 care of SPI patches for the moment.

 Ahh!! Forgot to reply :(

 Dropping this patch as it is already fixed in Roland's patches

No problem, I was probably wrong anyway. It appears that
part of the device struct is no longer ifdef:ed, so it will compile
nicely.

Yours,
Linus Walleij

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Re: [PATCH v5 2/2] spi/pl022: Add devicetree support

2012-08-22 Thread Linus Walleij
On Tue, Aug 21, 2012 at 6:01 PM, Roland Stigge sti...@antcom.de wrote:

 This patch adds device tree support to the spi-pl022 driver.
(...)

 --- linux-2.6.orig/Documentation/devicetree/bindings/spi/spi_pl022.txt
 +++ linux-2.6/Documentation/devicetree/bindings/spi/spi_pl022.txt
 @@ -6,7 +6,22 @@ Required properties:
  - interrupts : Should contain SPI controller interrupt

  Optional properties:
 +- num-cs : total number of chipselects

I don't know if it's proper to duplicate but atleast *also* patch
Documentation/devicetree/bindings/gpio/gpio.txt to indicate that
this is a generic property on all GPIO drivers.

The rest looks good.

Yours,
Linus Walleij

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Re: [PATCH v6 1/3] spi/pl022: Add chip select handling via GPIO

2012-08-22 Thread Linus Walleij
On Wed, Aug 22, 2012 at 3:49 PM, Roland Stigge sti...@antcom.de wrote:

 This patch adds the ability for the driver to control the chip select 
 directly.
 This enables independence from cs_control callbacks.  Configurable via
 platform_data, to be extended as DT in the following patch.

 Based on the initial patch by Alexandre Pereira da Silva 
 aletes@gmail.com

 Signed-off-by: Roland Stigge sti...@antcom.de
 Acked-by: Alexandre Pereira da Silva aletes@gmail.com

Thanks Roland, excellent work!
Reviewed-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH v6 3/3] DT bindings documentation: num-cs property for SPI controllers

2012-08-22 Thread Linus Walleij
On Wed, Aug 22, 2012 at 3:49 PM, Roland Stigge sti...@antcom.de wrote:

 Several SPI controller drivers have defined differently named properties for
 the number of chip selects.  Now adding num-cs as a reference name for new
 bindings.

 Signed-off-by: Roland Stigge sti...@antcom.de

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Yours,
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Re: [PATCH v6 2/3] spi/pl022: Add devicetree support

2012-08-22 Thread Linus Walleij
On Wed, Aug 22, 2012 at 3:49 PM, Roland Stigge sti...@antcom.de wrote:

 This patch adds device tree support to the spi-pl022 driver.

 Based on the initial patch by Alexandre Pereira da Silva 
 aletes@gmail.com

 Signed-off-by: Roland Stigge sti...@antcom.de
 Acked-by: Alexandre Pereira da Silva aletes@gmail.com

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH RESEND v4] spi/pl022: add devicetree support

2012-08-20 Thread Linus Walleij
,
 +chip select function is NULL for this 
 chip\n);
 } else
 chip-cs_control = chip_info-cs_control;

Goes into first patch.

 @@ -1988,7 +2028,8 @@ pl022_probe(struct amba_device *adev, const struct 
 amba_id *id)
 struct pl022_ssp_controller *platform_info = adev-dev.platform_data;
 struct spi_master *master;
 struct pl022 *pl022 = NULL; /*Data for this driver */
 -   int status = 0;
 +   struct device_node *np = adev-dev.of_node;

Does this compile without CONFIG_OF?
(Second patch)

 +   int status = 0, i, num_cs;

 dev_info(adev-dev,
  ARM PL022 driver, device ID: 0x%08x\n, adev-periphid);
 @@ -1998,8 +2039,14 @@ pl022_probe(struct amba_device *adev, const struct 
 amba_id *id)
 goto err_no_pdata;
 }

 +   num_cs = platform_info-num_chipselect;
 +   if (IS_ENABLED(CONFIG_OF))
 +   of_property_read_u32(np, pl022,num-chipselects, num_cs);
 +
 +

Shouldn't it be the other way around: platform data overrides
DT data. Attempt DT and if platform_info-num_chipselect
!= 0 let it override.

(Second patch.)

 /* Allocate master with space for data */
 -   master = spi_alloc_master(dev, sizeof(struct pl022));
 +   master = spi_alloc_master(dev,
 +   sizeof(struct pl022) + sizeof(int) * num_cs);

First patch.

 if (master == NULL) {
 dev_err(adev-dev, probe - cannot alloc SPI master\n);
 status = -ENOMEM;
 @@ -2017,13 +2064,41 @@ pl022_probe(struct amba_device *adev, const struct 
 amba_id *id)
  * on this board
  */
 master-bus_num = platform_info-bus_id;
 -   master-num_chipselect = platform_info-num_chipselect;
 +   master-num_chipselect = num_cs;

OK first patch.

 master-cleanup = pl022_cleanup;
 master-setup = pl022_setup;
 master-prepare_transfer_hardware = pl022_prepare_transfer_hardware;
 master-transfer_one_message = pl022_transfer_one_message;
 master-unprepare_transfer_hardware = 
 pl022_unprepare_transfer_hardware;
 master-rt = platform_info-rt;
 +   master-dev.of_node = dev-of_node;

Does this compile without CONFIG_OF?
Second patch.

 +   if (IS_ENABLED(CONFIG_OF)) {
 +   for (i = 0; i  num_cs; i++) {
 +   int cs_gpio = of_get_named_gpio(np, cs-gpios, i);
 +
 +   if (cs_gpio == -EPROBE_DEFER) {
 +   status = -EPROBE_DEFER;
 +   goto err_no_gpio;
 +   }
 +
 +   pl022-chipselect[i] = cs_gpio;
 +
 +   if (gpio_is_valid(cs_gpio)) {
 +   if (gpio_request(cs_gpio, ssp-pl022))
 +   dev_err(adev-dev,
 +   could not request %d gpio\n,
 +   cs_gpio);
 +   else if (gpio_direction_output(cs_gpio, 1))
 +   dev_err(adev-dev,
 +   could set gpio %d as 
 output\n,
 +   cs_gpio);
 +   }
 +   }
 +   } else {
 +   for (i = 0; i  num_cs; i++)
 +   pl022-chipselect[i] = -EINVAL;

Why? Instead, add a  int *chipselects; field to the struct pl022_ssp_controller
platform data in include/linux/amba/pl022.h and copy it from there if
num_chipselects in the same data != 0.

(First patch.)

Yours,
Linus Walleij

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Re: [PATCH RESEND v4] spi/pl022: add devicetree support

2012-08-20 Thread Linus Walleij
On Mon, Aug 20, 2012 at 4:22 PM, Rob Herring robherri...@gmail.com wrote:
 On 08/20/2012 06:39 AM, Alexandre Pereira da Silva wrote:

 +- pl022,hierarchy : master or slave interface

 Is attaching a master and using the pl022 as a slave really a supported
 use case?

No not currently. People doing this crazy stuff need to have
the kernel with the hard real-time patches and lightening response
first. But it's in the platform data because it's a feature supported by
the hardware.

 The DT spi bindings are really designed for a master node with
 N slave nodes. So there is more general question of how to describe a
 spi controller as a slave. It's not really one I care to answer as the
 Linux spi framework isn't designed to act as a slave.

Currently the code should hardwire this to master and not define
a binding for it I think.

 +- pl022,slave-tx-disable : disconnect tx line in slave mode

Applies also to this, then.

 +- pl022,com-mode : polling, interrupt or dma
 +- pl022,rx-level-trig : Rx FIFO watermark level
 +- pl022,tx-level-trig : Tx FIFO watermark level
 +- pl022,ctrl-len : Microwire interface: Control length
 +- pl022,wait-state : Microwire interface: Wait state
 +- pl022,duplex : Microwire interface: Full/Half duplex

 Most of these properties aren't used anywhere in the kernel other than
 u300 and I'm not sure what to purpose of dummy_chip_info is.

It is used for loopback-testing of the PL022. They're probably
not necessary there either.

 Perhaps
 Linus has some input? I think either they can be decided by the spi
 controller (com-mode, fifo watermark) or should be standard properties
 (microwire settings). I would argue they should be removed if the spi
 framework doesn't have support in a standard way.

Uncertain about this, others would need to comment.
At some point there has been a chip needing these to be set
to some magic values.

Yours,
Linus Walleij

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Re: [PATCH] spi/pl022: Fill master-dev.of_node to get spi devices registered via DT

2012-08-18 Thread Linus Walleij
On Sat, Aug 18, 2012 at 4:25 AM, Viresh Kumar viresh.ku...@linaro.org wrote:

 spi_register_master() calls of_register_spi_devices() to register spi devices.
 This routine expects master-dev.of_node to be a valid pointer. This is
 responsibility of master driver to fill this field, which wasn't done for 
 pl022.
 Fix it to get devices added to pl022.

OK...

 master-rt = platform_info-rt;
 +   master-dev.of_node = dev-of_node;

Isn't this one of those things that *have* to be #ifdef CONFIG_OF?

Next iteration, remember to add Mark Brown on To: because je's taking
care of SPI patches for the moment.

Yours,
Linus Walleij

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[PATCH] spi/pl022: fix spi-pl022 pm enable at probe

2012-08-17 Thread Linus Walleij
From: Michel JAOUEN michel.jao...@stericsson.com

amba drivers does not need to enable pm runtime at probe.
amba_probe already enables pm runtime.

This rids this warning in the ux500 boot log:
ssp-pl022 ssp0: Unbalanced pm_runtime_enable!

Signed-off-by: Michel JAOUEN michel.jao...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index aab518e..6abbe23 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2053,7 +2053,6 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
printk(KERN_INFO pl022: mapped registers from 0x%08x to %p\n,
   adev-res.start, pl022-virtbase);
 
-   pm_runtime_enable(dev);
pm_runtime_resume(dev);
 
pl022-clk = clk_get(adev-dev, NULL);
-- 
1.7.11.3


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Re: [PATCH resend 2/2] SPI: spi-gpio: Add DT bindings

2012-08-04 Thread Linus Walleij
On Wed, Aug 1, 2012 at 10:57 PM, Daniel Mack zon...@gmail.com wrote:

 This patch adds DT bindings to the spi-gpio driver and some
 documentation about how to use it.

 Signed-off-by: Daniel Mack zon...@gmail.com
 Cc: Mark Brown broo...@opensource.wolfsonmicro.com
 Cc: Grant Likely grant.lik...@secretlab.ca
 Cc: Linus Walleij linus.wall...@stericsson.com

From a GPIO point of view this looks good to me.

Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Fwd: [GIT PULL] PL022 patches for v3.6

2012-07-10 Thread Linus Walleij
Hi Mark,

Can you please pull in these PL022 patches to your spi-next tree?

Yours,
Linus Walleij


-- Forwarded message --
From: Linus Walleij linus.wall...@linaro.org
Date: Thu, Jul 5, 2012 at 4:27 PM
Subject: [GIT PULL] PL022 patches for v3.6
To: Wolfram Sang w.s...@pengutronix.de
Cc: spi mailing list spi-devel-general@lists.sourceforge.net,
Alexandre Pereira aletes@gmail.com, Virupax Sadashivpetimath
virupax.sadashivpetim...@stericsson.com


Hi Wolfram,

since I guess you're gonna harvest SPI patches for the next merge window
could you please pull this set of PL022 patches?

The following changes since commit 6887a4131da3adaab011613776d865f4bcfb5678:

  Linux 3.5-rc5 (2012-06-30 16:08:57 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
pl022

for you to fetch changes up to 5b063b87deba33ed1676db9d16c52ede662132d8:

  spi/pl022: cleanup pl022 header documentation (2012-07-02 13:55:36 +0200)


Alexandre Pereira da Silva (1):
  spi/pl022: cleanup pl022 header documentation

Linus Walleij (2):
  spi/pl022: delete DB5500 support
  spi/pl022: enable runtime PM

Virupax Sadashivpetimath (1):
  spi/pl022: disable port when unused

 drivers/spi/spi-pl022.c|   23 +--
 include/linux/amba/pl022.h |9 +
 2 files changed, 10 insertions(+), 22 deletions(-)

Thanks,
Linus Walleij

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Re: [PATCH RFC] spi/gpio: start with CS non-active

2012-07-09 Thread Linus Walleij
On Mon, Jul 9, 2012 at 2:08 PM, Mark Brown broo...@sirena.org.uk wrote:
 On Thu, Jul 05, 2012 at 09:45:40AM +0200, Uwe Kleine-K?nig wrote:
 On Thu, Feb 09, 2012 at 10:21:45PM +0100, Uwe Kleine-K?nig wrote:
  The chip select line was configured as output with the initial value
  being active explicitly. It was later deasserted during
  spi_bitbang_setup() without any clock activity in between. So it makes
  no sense to activate the device at all and the chip select line can
  better start non-active.
 
  Signed-off-by: Uwe Kleine-K?nig u.kleine-koe...@pengutronix.de
  ---
  Hello,
 
  I'm not sure if an active chip select line without any clock activity can
  confuse a device. If so, this patch might qualify as fix. But with my
  limited knowledge about spi it's also possible that I just miss why the
  active chip select is important. For the devices I have it doesn't seem
  to make a difference.
 ping

 You probably want to resend this with Linus W in the CCs.

It all makes sense to me so:
Acked-by: Linus Walleij linus.wall...@linaro.org

Now the SPI maintainer needs to pick it up though, if your proposal
to pick it up goes through this patch is all yours now.

Yours,
Linus Walleij

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[GIT PULL] PL022 patches for v3.6

2012-07-05 Thread Linus Walleij
Hi Wolfram,

since I guess you're gonna harvest SPI patches for the next merge window
could you please pull this set of PL022 patches?

The following changes since commit 6887a4131da3adaab011613776d865f4bcfb5678:

  Linux 3.5-rc5 (2012-06-30 16:08:57 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
pl022

for you to fetch changes up to 5b063b87deba33ed1676db9d16c52ede662132d8:

  spi/pl022: cleanup pl022 header documentation (2012-07-02 13:55:36 +0200)


Alexandre Pereira da Silva (1):
  spi/pl022: cleanup pl022 header documentation

Linus Walleij (2):
  spi/pl022: delete DB5500 support
  spi/pl022: enable runtime PM

Virupax Sadashivpetimath (1):
  spi/pl022: disable port when unused

 drivers/spi/spi-pl022.c|   23 +--
 include/linux/amba/pl022.h |9 +
 2 files changed, 10 insertions(+), 22 deletions(-)

Thanks,
Linus Walleij

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Re: [PATCH 1/2] spi/s3c64xx: Convert to devm_request_and_ioremap()

2012-06-28 Thread Linus Walleij
On Thu, Jun 28, 2012 at 3:23 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:

 Saves some error handling and a small amount of code.

 Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com

Elegant, monsieur.
Acked-by: Linus Walleij linus.wall...@linaro.org

I'm starting to wonder if it would not be possible to mass-convert these
using coccinelle.

Yours,
Linus Walleij

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Re: [PATCH] spi: Unlock a spinlock before calling into the controller driver.

2012-06-25 Thread Linus Walleij
On Tue, Jun 26, 2012 at 1:07 AM, Doug Anderson diand...@chromium.org wrote:

 Specifically there should be only one instance of spi_pump_messages()
 running at a time per master.  That's because it's a kthread work
 function.  ...so we can't possibly get a prepare in the middle of the
 unprepare when prepare is called because the only caller to
 prepare/unprepare is spi_pump_messages().

Yes that's how the message pump is designed.

 I can't comment on whether it's better to do something like add a
 workqueue (which might be more obvious / less fragile) or just to add
 a comment.  I will let others comment on that.  :)

The message pump initially used a workqueue, but was converted
to a kthread because we needed to push the queue to run as
realtime for some important low-latency workloads across
SPI. The code is basically a tweaked workqueue if you dive down
in the implementation.

Yours,
Linus Walleij

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Re: [PATCH] spi: Unlock a spinlock before calling into the controller driver.

2012-06-25 Thread Linus Walleij
On Sat, Jun 23, 2012 at 7:53 AM, Bryan Freed bfr...@chromium.org wrote:

 spi_pump_messages() calls into a controller driver with
 unprepare_transfer_hardware() which is documented as This may sleep.
 As in the prepare_transfer_hardware() call below, we should release the
 queue_lock spinlock before making the call.
 Rework the logic a bit to hold queue_lock to protect the 'busy' flag,
 then release it to call unprepare_transfer_hardware().

 Signed-off-by: Bryan Freed bfr...@chromium.org

Yes, this looks correct to me! Good catch.
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH] spi: spi-pl022: Adjust probe() to of_get_named_gpio() returning -EPROBE_DEFER

2012-06-18 Thread Linus Walleij
On Mon, Jun 18, 2012 at 11:20 AM, Roland Stigge sti...@antcom.de wrote:

 The patch to gpiolib-of.c providing -EPROBE_DEFER as a hint to defer
 of_get_named_gpio*() to a later probe() breaks spi-pl022.c.

 This patch adjusts to this change, using -EPROBE_DEFER as indication to defer.

 Signed-off-by: Roland Stigge sti...@antcom.de

Acked-by: Linus Walleij linus.wall...@linaro.org

 Should this patch be joined with gpiolib-of's patch to of_get_named_gpio()? Or
 should they just be issued as a series?

If it's not bisectable unless you change this in the same patch then join
them. Else I'd put them in a series and try to figure out a good tree for
merging them.

Yours,
Linus Walleij

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Re: [PATCH] spi/pl022: cleanup pl022 header documentation

2012-06-17 Thread Linus Walleij
On Thu, Jun 14, 2012 at 3:10 PM, Alexandre Pereira da Silva
aletes@gmail.com wrote:

 Remove the unused fields from struct ssp_config_chip that was removed
 before
 Add bus_id documentation to pl022_ssp_controller

 Signed-off-by: Alexandre Pereira da Silva aletes@gmail.com
 Signed-off-by: Roland Stigge sti...@antcom.de

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Thanks for fixing this!
Grant, will you please pick this to the SPI tree.

Yours,
Linus Walleij

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[PATCH v2] RFC: spi/sa1100: rewrite the SA1100 SPI driver

2012-06-13 Thread Linus Walleij
This heavily rewrites the SA1100 SPI driver and moves it to the
SPI subsystem. I seriously doubt it will work (though you're
encouraged to give it a spin). It is meant as a starting
point for others who are able to pick up on it. I discussed
this with Kristoffer some time back.

The Jornada 720 seems to be the only in-kernel user of the SSP,
so the MCU driver (now called jornada720_ssp.c) is now an
SPI device on the SPI bus, and the jornada720_ssp is just
some SPI device. Anything generic (like GPIO toggling to
sync to the other side) is now in the SPI driver. The
spinlock across transfers found in jornada720_ssp is probably
not going to play well with the SPI subsystem so this has
been replaced by a mutex.

Cc: Kristoffer Ericson kristoffer.eric...@gmail.com
Cc: Nicolas Pitre nicolas.pi...@linaro.org
Cc: Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
ChangeLog v1-v2:
- Rebase to v3.5-rc1
- Move SA1100 SSP platform data to linux/platform_data
- Store bits per word (bpw) for the device in the state holder.
- Rewrite to use the new transfer queue.
- Delete reference to the FIFO data register from SA-1100.h since
  SA1100 now uses dmaengine and the device tells the engine what
  register to use.
- Use devm_* family for iomap, irq request etc.

Kristoffer, can you test this on the Jornada? I suspect you're
the only one who can actually take the SSP driver for a ride on
real hardware.
---
 arch/arm/include/asm/hardware/ssp.h |   28 --
 arch/arm/mach-sa1100/Kconfig|   10 +-
 arch/arm/mach-sa1100/Makefile   |1 -
 arch/arm/mach-sa1100/include/mach/SA-1100.h |   83 +-
 arch/arm/mach-sa1100/jornada720.c   |   52 +++-
 arch/arm/mach-sa1100/jornada720_ssp.c   |   79 ++---
 arch/arm/mach-sa1100/ssp.c  |  243 --
 drivers/spi/Kconfig |7 +
 drivers/spi/Makefile|1 +
 drivers/spi/spi-sa1100.c|  470 +++
 include/linux/platform_data/sa1100-ssp.h|   15 +
 11 files changed, 574 insertions(+), 415 deletions(-)
 delete mode 100644 arch/arm/include/asm/hardware/ssp.h
 delete mode 100644 arch/arm/mach-sa1100/ssp.c
 create mode 100644 drivers/spi/spi-sa1100.c
 create mode 100644 include/linux/platform_data/sa1100-ssp.h

diff --git a/arch/arm/include/asm/hardware/ssp.h 
b/arch/arm/include/asm/hardware/ssp.h
deleted file mode 100644
index 3b42e18..000
--- a/arch/arm/include/asm/hardware/ssp.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  ssp.h
- *
- *  Copyright (C) 2003 Russell King, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef SSP_H
-#define SSP_H
-
-struct ssp_state {
-   unsigned intcr0;
-   unsigned intcr1;
-};
-
-int ssp_write_word(u16 data);
-int ssp_read_word(u16 *data);
-int ssp_flush(void);
-void ssp_enable(void);
-void ssp_disable(void);
-void ssp_save_state(struct ssp_state *ssp);
-void ssp_restore_state(struct ssp_state *ssp);
-int ssp_init(void);
-void ssp_exit(void);
-
-#endif
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index 42625e4..cb1c115 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -95,7 +95,8 @@ config SA1100_JORNADA720
 
 config SA1100_JORNADA720_SSP
bool HP Jornada 720 Extended SSP driver
-   select SA1100_SSP
+   select SPI
+   select SPI_SA1100
depends on SA1100_JORNADA720
help
  Say Y here if you have a HP Jornada 7xx handheld computer and you
@@ -157,13 +158,6 @@ config SA1100_SIMPAD
  like CL4 in additional it has a PCMCIA-Slot. For more information
  visit http://www.usa.siemens.com/ or http://www.siemens.ch/.
 
-config SA1100_SSP
-   tristate Generic PIO SSP
-   help
- Say Y here to enable support for the generic PIO SSP driver.
- This isn't for audio support, but for attached sensors and
- other devices, eg for BadgePAD 4 sensor support.
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 60b97ec..b7f348e 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -51,5 +51,4 @@ obj-$(CONFIG_LEDS) += $(led-y)
 
 # Miscellaneous functions
 obj-$(CONFIG_PM)   += pm.o sleep.o
-obj-$(CONFIG_SA1100_SSP)   += ssp.o
 
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h 
b/arch/arm/mach-sa1100/include/mach/SA-1100.h
index 3f2d1b6..b6310b2 100644
--- a/arch/arm/mach-sa1100/include/mach/SA-1100.h
+++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h
@@ -727,86 +727,8 @@
 #define MCCR1_F10MHz   (MCCR1_CFS*1)   /*  Freq. (fmc) = ~ 10 MHz */
/*  (9.585 MHz

[PATCH 2/3] spi/pl022: delete DB5500 support

2012-06-12 Thread Linus Walleij
From: Linus Walleij linus.wall...@linaro.org

This ASIC variant has been deleted from the ARM tree, no need
to keep support around.

Cc: Vinit Shenoy vinit.she...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c |   14 --
 1 file changed, 14 deletions(-)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 469eb28..5eab281 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2256,15 +2256,6 @@ static struct vendor_data vendor_st_pl023 = {
.loopback = false,
 };
 
-static struct vendor_data vendor_db5500_pl023 = {
-   .fifodepth = 32,
-   .max_bpw = 32,
-   .unidir = false,
-   .extended_cr = true,
-   .pl023 = true,
-   .loopback = true,
-};
-
 static struct amba_id pl022_ids[] = {
{
/*
@@ -2296,11 +2287,6 @@ static struct amba_id pl022_ids[] = {
.mask   = 0x,
.data   = vendor_st_pl023,
},
-   {
-   .id = 0x10080023,
-   .mask   = 0x,
-   .data   = vendor_db5500_pl023,
-   },
{ 0, 0 },
 };
 
-- 
1.7.9.2


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[PATCH 3/3] spi/pl022: enable runtime PM

2012-06-12 Thread Linus Walleij
From: Linus Walleij linus.wall...@linaro.org

If we're gonna use runtime PM it's a pretty good idea to actually
enable it in probe() and disable it in remove() too, so it
gets used for real. Up until now we only fooled around with the
reference count.

Cc: Vinit Shenoy vinit.she...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/spi/spi-pl022.c |4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 5eab281..aab518e 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -2053,6 +2053,9 @@ pl022_probe(struct amba_device *adev, const struct 
amba_id *id)
printk(KERN_INFO pl022: mapped registers from 0x%08x to %p\n,
   adev-res.start, pl022-virtbase);
 
+   pm_runtime_enable(dev);
+   pm_runtime_resume(dev);
+
pl022-clk = clk_get(adev-dev, NULL);
if (IS_ERR(pl022-clk)) {
status = PTR_ERR(pl022-clk);
@@ -2163,6 +2166,7 @@ pl022_remove(struct amba_device *adev)
clk_disable(pl022-clk);
clk_unprepare(pl022-clk);
clk_put(pl022-clk);
+   pm_runtime_disable(adev-dev);
iounmap(pl022-virtbase);
amba_release_regions(adev);
tasklet_disable(pl022-pump_transfers);
-- 
1.7.9.2


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Re: [PATCH 2/9] SPI: Refactor spi-orion to use SPI framework queue.

2012-06-11 Thread Linus Walleij
On Sun, Jun 10, 2012 at 12:31 PM, Andrew Lunn and...@lunn.ch wrote:

 Replace the deprecated master-transfer with transfer_one_message()
 and allow the SPI subsystem handle all the queuing of messages.

 Signed-off-by: Andrew Lunn and...@lunn.ch
 Acked-by: Linus Walleij linus.wall...@linaro.org

Looks good to me:
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH 3/3] spi: bitbang: convert to using core message queue

2012-05-21 Thread Linus Walleij
On Mon, May 21, 2012 at 1:25 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:

 The SPI subsystem core now manages message queues internally. Remove the
 local message queue implementation from the spi-bitbang driver and
 migrate to the common one.

 Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de

Acked-by: Linus Walleij linus.wall...@linaro.org

Thanks,
Linus Walleij

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Re: [PATCH] SPI: PRIMA2: use the newest APIs of PINCTRL to fix compiling errors

2012-05-15 Thread Linus Walleij
On Tue, May 15, 2012 at 4:21 AM, Barry Song barry.s...@csr.com wrote:

 From: Barry Song baohua.s...@csr.com

 Fix the compiling errors:
 drivers/spi/spi-sirf.c: In function 'spi_sirfsoc_probe':
 drivers/spi/spi-sirf.c:563: error: implicit declaration of function 
 'pinmux_get'
 drivers/spi/spi-sirf.c:563: warning: assignment makes pointer from integer 
 without a cast
 drivers/spi/spi-sirf.c:568: error: implicit declaration of function 
 'pinmux_enable'
 drivers/spi/spi-sirf.c:602: error: implicit declaration of function 
 'pinmux_disable'
 drivers/spi/spi-sirf.c:603: error: implicit declaration of function 
 'pinmux_put'
 make[3]: *** [drivers/spi/spi-sirf.o] Error 1

 Signed-off-by: Barry Song baohua.s...@csr.com
 Cc: Guennadi Liakhovetski g.liakhovet...@gmx.de
 Cc: Linus Walleij linus.wall...@linaro.org

Acked-by: Linus Walleij linus.wall...@linaro.org

Counting on Grant to pick this up...

Yours,
Linus Walleij

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Re: [PATCH 1/2] MIPS: OCTEON: Add register definitions for SPI host hardware.

2012-05-14 Thread Linus Walleij
On Fri, May 11, 2012 at 11:34 PM, David Daney ddaney.c...@gmail.com wrote:

 From: David Daney david.da...@cavium.com

 Needed by SPI driver.

That's not very verbose, plese tell atleast tell which SPI driver it's for.

 +union cvmx_mpi_cfg {
 +       uint64_t u64;

The kernel already has a type (in linux/kernel.h) used in many places in the
kernel, called u64 so this gets very confusing.

Can you call it something else?

BTW: you could then s/uint64_t/u64 and use that u64.
(Some don't like the three-letter types so no big deal.)

 +       struct cvmx_mpi_cfg_s {
 +#ifdef __BIG_ENDIAN_BITFIELD
 +               uint64_t reserved_29_63:35;
 +               uint64_t clkdiv:13;
 +               uint64_t csena3:1;
 +               uint64_t csena2:1;
 +               uint64_t csena1:1;
 +               uint64_t csena0:1;
 +               uint64_t cslate:1;
 +               uint64_t tritx:1;
 +               uint64_t idleclks:2;
 +               uint64_t cshi:1;
 +               uint64_t csena:1;
 +               uint64_t int_ena:1;
 +               uint64_t lsbfirst:1;
 +               uint64_t wireor:1;
 +               uint64_t clk_cont:1;
 +               uint64_t idlelo:1;
 +               uint64_t enable:1;
 +#else
 +               uint64_t enable:1;
 +               uint64_t idlelo:1;
 +               uint64_t clk_cont:1;
 +               uint64_t wireor:1;
 +               uint64_t lsbfirst:1;
 +               uint64_t int_ena:1;
 +               uint64_t csena:1;
 +               uint64_t cshi:1;
 +               uint64_t idleclks:2;
 +               uint64_t tritx:1;
 +               uint64_t cslate:1;
 +               uint64_t csena0:1;
 +               uint64_t csena1:1;
 +               uint64_t csena2:1;
 +               uint64_t csena3:1;
 +               uint64_t clkdiv:13;
 +               uint64_t reserved_29_63:35;
 +#endif

This boggles my mind, but I see there are many drivers doing this,
but using uint64_t looks overly scary.

Can't you break it apart using a set of u32's like in
drivers/net/ethernet/micrel/ksz884x.c?

Yours,
Linus Walleij

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Re: [PATCH RFC] spi: Dont call prepare/unprepare transfer if not populated

2012-05-10 Thread Linus Walleij
On Thu, May 10, 2012 at 3:50 PM, Shubhrajyoti D shubhrajy...@ti.com wrote:

 Currently the prepare/unprepare transfer are called unconditionally.
 The assumption is that every driver using the spi core queue infrastructure
 has to populate the prepare and unprepare functions. This encourages
 drivers to populate empty functions to prevent crashing.
 This patch prevents the call to prepare/unprepare if not populated.

 Cc: Linus Walleij linus.wall...@linaro.org
 Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com

Great!
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH] spi: pl022: Allow request for higher frequency than maximum possible

2012-04-19 Thread Linus Walleij
On Thu, Apr 19, 2012 at 8:18 AM, Viresh Kumar viresh.ku...@st.com wrote:

 Currently, if we request for frequency greater than maximum possible, spi 
 driver
 returns error.

 For example, if the spi block src frequency is 333/4 MHz, i.e. 83.33.. MHz,
 maximum frequency programmable would be src/2. Which would come around 41.6...

 It is difficult to pass frequency in these figures. We normally try to program
 in round figures, like 42 MHz and it should get programmed to =
 requested_frequency, i.e. 41.6...

 For this to happen, we must not return error even if requested freq is higher
 than max possible. But should program it to max possible.

 Reported-by: Vinit Kamalaksha Shenoy vinit.she...@st.com
 Signed-off-by: Viresh Kumar viresh.ku...@st.com

Looks reasonable and mostly harmless :-)
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH] spi: bitbang: convert to using core message queue

2012-04-18 Thread Linus Walleij
On Wed, Apr 11, 2012 at 10:56 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
 Hi Grant
 On Tue, 20 Mar 2012, Grant Likely wrote:

 On Mon, 19 Mar 2012 00:33:14 +0100, Linus Walleij linus.wall...@linaro.org 
 wrote:
  On Sat, Mar 17, 2012 at 12:39 AM, Guennadi Liakhovetski
  g.liakhovet...@gmx.de wrote:
 
   The SPI subsystem core now manages message queues internally. Remove the
   local message queue implementation from the spi-bitbang driver and
   migrate to the common one.
  
   Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
 
  This is great stuff!
  Acked-by: Linus Walleij linus.wall...@linaro.org
 
  (Since I've never really used the bitbang driver I wouldn't trust me to
  do any deeper review.)

 In hindsite; I should have asked you to make the pl driver use bitbang
 queueing since that was already used for generic queuing by a number
 of drivers; and then refactored that to perform better.  Doing that
 would have been refactoring better tested code, but oh well.

 I'm going to ignore this series for the moment; please remind me to
 look at it after the merge window has closed.

 Seems to be time:-)

Yeah lets ping Grant on this :)

Yours,
Linus Walleij

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Re: [PATCH V2] spi/pl022: Fix range checking for bits per word

2012-04-17 Thread Linus Walleij
On Tue, Apr 17, 2012 at 9:10 AM, Vinit Shenoy vinit.she...@st.com wrote:

 pl022 ssp controller supports word lengths from 4 to 16 (or 32) bits.
 Currently implemented checks were incorrect. It has following check

 if (pl022-vendor-max_bpw = 32)

 which must be checking for =.

 Also error print message is incorrect, that prints range is from 1 to
 16.

 Fix both these issues.

 Signed-off-by: Vinit Shenoy vinit.she...@st.com
 ---
 V1-V2:
 - Fixed the check:
        if (pl022-vendor-max_bpw = 32)
 - Re-written complete range check logic.

Looks correct to me:
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH/RFC v2] ARM: amba: Remove AMBA level regulator support

2012-04-02 Thread Linus Walleij
On Mon, Apr 2, 2012 at 12:43 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
 On Mon, Apr 02, 2012 at 11:14:28AM +0100, Mark Brown wrote:
 On Mon, Apr 02, 2012 at 12:39:11AM +0200, Linus Walleij wrote:

  Mark: as Rabin says the v1 patch is probably fine, are you pushing this
  to ARM SoC or into Russell's patch tracker?

 I was waiting for some pronouncement from Russell - looking at the git
 logs it seems the patch tracker is the normal way to merge things.

 Well, this stuff was invented by Linus, so its Linus' decision about
 how to deal with the power control.

This falls into the seemed like a good idea at the time category,
I was wrong, we implemented power domains instead, so let's just
kill it before someone else hurts him/herself on it...

Yours,
Linus Walleij

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Re: [PATCH/RFC] ARM: amba: Remove AMBA level regulator support

2012-04-01 Thread Linus Walleij
On Sun, Apr 1, 2012 at 5:29 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:

 The AMBA bus regulator support is being used to model on/off switches
 for power domains which isn't terribly idiomatic for modern kernels with
 the generic power domain code and creates integration problems on platforms
 which don't use regulators for their power domains as it's hard to tell
 the difference between a regulator that is needed but failed to be provided
 and one that isn't supposed to be there (though DT does make that easier).

 Platforms that wish to use the regulator API to manage their power domains
 can indirect via the power domain interface.

I don't see how this solves the problem of AMBA PrimeCell probing.

If you look at the code in bus.c, you can see that it acquires and
enables the regulator - as it does with the clock.

The reason is that is does this *before* the device can probe,
since it needs to map up the memory to read out some magic
values at the end to figure out what device it is in the first place.

We need the current code replaced with something that
enables a power domain before probe instead, then implement
these power domains for the in-kernel AMBA devices that need it.

Is the default behaviour of power domains such that they will
be enabled as soon as devices are registered but before
any buses probe()? Because that is what is needed in this case.

(AMBA devices are special in this way: no other ARM things
support auto-detection of devices using magic numbers,
basically the DT stuff came about because noone was using
a thing like this.)

 The impact should be minimal since currently there are no mainline
 systems which actually provide a vcore regulator so none need updating.

Oh yes there are:
drivers/mfd/db8500-prcmu.c

This driver registers a number of voltage domain regulators,
among those:

static struct regulator_consumer_supply db8500_vape_consumers[] = {
   (...)
REGULATOR_SUPPLY(vcore, sdi0),
REGULATOR_SUPPLY(vcore, sdi1),
REGULATOR_SUPPLY(vcore, sdi2),
REGULATOR_SUPPLY(vcore, sdi3),
REGULATOR_SUPPLY(vcore, sdi4),
(...)
REGULATOR_SUPPLY(vcore, uart0),
REGULATOR_SUPPLY(vcore, uart1),
REGULATOR_SUPPLY(vcore, uart2),

(I know the supplies should probably be moved up to the
platform but there they are.) The first array is MMC controllers
and the second is a number of UARTs.

IIRC the machine will not boot (i.e. these drivers cannot even
probe) without these regulators in place, so they get enabled by
the AMBA bus code.

So we need something that not just removes stuff from the
AMBA bus, but also adds a better power domain mechanism
and fixes up taking the above regulators.

That said I'm all for replacing it - but I'd need to figure out the
details on how to do that.

We do have code for ux500 power domains. If it will will be
enough to handle this I can try to hack it up and submit it.

Yours,
Linus Walleij

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Re: [PATCH/RFC v2] ARM: amba: Remove AMBA level regulator support

2012-04-01 Thread Linus Walleij
On Sun, Apr 1, 2012 at 8:58 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:

 diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
 index ebc1e86..5be3248 100644
 --- a/drivers/mfd/db8500-prcmu.c
 +++ b/drivers/mfd/db8500-prcmu.c
 @@ -2788,6 +2788,7 @@ static struct regulator_init_data 
 db8500_regulators[DB8500_NUM_REGULATORS] = {
                .constraints = {
                        .name = db8500-vape,
                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +                       .always_on = true,
                },
                .consumer_supplies = db8500_vape_consumers,
                .num_consumer_supplies = ARRAY_SIZE(db8500_vape_consumers),

Combined with the PL022 patch this causes a power regression since
the PL022 is hereafter always on.

But I guess if I fix a power domain patch to accomplish much the
same things then nothing is really lost...

And I do like the change, if for nothing else so for the fact that it
eventually pushes to power domains what belongs there, so:
Acked-by: Linus Walleij linus.wall...@linaro.org

But to the defence: power domain code was not in the kernel
when the AMBA vcore regulator was introduced so how else
could we do it... except for inventing power domains...

Yours,
Linus Walleij

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Re: [PATCH/RFC v2] ARM: amba: Remove AMBA level regulator support

2012-04-01 Thread Linus Walleij
On Sun, Apr 1, 2012 at 9:39 PM, Rabin Vincent ra...@rab.in wrote:
 On Mon, Apr 2, 2012 at 00:52, Linus Walleij linus.wall...@linaro.org wrote:
 Combined with the PL022 patch this causes a power regression since
 the PL022 is hereafter always on.

 How can there be a power regression here?  This is the only user of
 the vcore regulator, and, apart from the fact that its disable routine
 only decrements an essentialy write-only variable, it is shared which
 several devices which already never disable it.

Yes true... Hm I hope something else in mainline will increase refcount
to vape so it's not disabled at regulator_has_full_constraints()? Better
test it, then I'll see.

Mark: as Rabin says the v1 patch is probably fine, are you pushing this
to ARM SoC or into Russell's patch tracker?

Yours,
Linus Walleij

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Re: [PATCH/RFC v2] ARM: amba: Remove AMBA level regulator support

2012-04-01 Thread Linus Walleij
On Sun, Apr 1, 2012 at 11:27 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
 On Sun, Apr 01, 2012 at 09:22:50PM +0200, Linus Walleij wrote:

 Combined with the PL022 patch this causes a power regression since
 the PL022 is hereafter always on.

 I guess this code isn't in mainline, though?  In that case you can
 always add a revert of this commit to your out of tree patches if you
 need to.

No, we can sure live with it... Out-of-mainline we do use power domains
so that's what we should do instead. It currently looks like this:
http://www.igloocommunity.org/gitweb/?p=kernel/igloo-kernel.git;a=blob;f=arch/arm/mach-ux500/pm/runtime.c;hb=HEAD

It's a really nice piece of code but uses some out-of-tree features,
the most obvious one is atomic regulators (which are exactly
that).

 But to the defence: power domain code was not in the kernel
 when the AMBA vcore regulator was introduced so how else
 could we do it... except for inventing power domains...

 Which might've happened sooner if we'd noticed :)  There were some other
 platforms doing similar things but they mostly used the clock API since
 it was always entirely platform code until 3.4 so they're less intrusive
 into the generic code.

Yeah ... but this sounds familiar, (searching searching) Yes! We did ask on
the lists if regulators were proper for modeling power domains in 2008:
http://marc.info/?l=linux-arm-kernelm=121580531500758w=2

But I should've pushed for a proper answer ...

Yours,
Linus Walleij

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Re: [PATCH] SPI/Pl022: Include types.h to remove compilation warnings

2012-03-23 Thread Linus Walleij
On Fri, Mar 23, 2012 at 8:35 AM, Viresh Kumar viresh.ku...@st.com wrote:

 linux/pl022.h uses definitions like, u8, u16, etc, which have dependency of
 types.h file, which isn't included in it. So, we get compilation warnings.

 This patch includes types.h there to fix these warnings.

 Signed-off-by: Viresh Kumar viresh.ku...@st.com

Looks reasonable!
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij

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Re: [PATCH] spi: bitbang: convert to using core message queue

2012-03-18 Thread Linus Walleij
On Sat, Mar 17, 2012 at 12:39 AM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:

 The SPI subsystem core now manages message queues internally. Remove the
 local message queue implementation from the spi-bitbang driver and
 migrate to the common one.

 Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de

This is great stuff!
Acked-by: Linus Walleij linus.wall...@linaro.org

(Since I've never really used the bitbang driver I wouldn't trust me to
do any deeper review.)

Quick thought:

 +static int spi_bitbang_dummy_prepare(struct spi_master *master)
 +{
 +       return 0;
(...)
 +       master-prepare_transfer_hardware = spi_bitbang_dummy_prepare;
 +       master-unprepare_transfer_hardware = spi_bitbang_dummy_prepare;

Maybe we should think about making these two hooks optional if this
pattern turns up a lot. I'll try to fix some refactoring further down the
road if nobody beats me to it.

Yours,
Linus Walleij

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Re: [PATCH v3] spi: create a message queueing infrastructure

2012-03-06 Thread Linus Walleij
On Wed, Feb 22, 2012 at 10:05 AM, Linus Walleij
linus.wall...@stericsson.com wrote:

 From: Linus Walleij linus.wall...@linaro.org

 This rips the message queue in the PL022 driver out and pushes
 it into (optional) common infrastructure. Drivers that want to
 use the message pumping thread will need to define the new
 per-messags transfer methods and leave the deprecated transfer()
 method as NULL.

 Most of the design is described in the documentation changes that
 are included in this patch.

 Since there is a queue that need to be stopped when the system
 is suspending/resuming, two new calls are implemented for the
 device drivers to call in their suspend()/resume() functions:
 spi_master_suspend() and spi_master_resume().

 ChangeLog v1-v2:
 - Remove Kconfig entry and do not make the queue support optional
  at all, instead be more agressive and have it as part of the
  compulsory infrastructure.
 - If the .transfer() method is implemented, delete print a small
  deprecation notice and do not start the transfer pump.
 - Fix a bitrotted comment.
 ChangeLog v2-v3:
 - Fix up a problematic sequence courtesy of Chris Blair.
 - Stop rather than destroy the queue on suspend() courtesy of
  Chris Blair.

Ping on this! Would be nice to see in linux-next if we go for this.

 Cc: Mark Brown broo...@opensource.wolfsonmicro.com

Mark can we have your explicit ACK?

Yours,
Linus Walleij

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[PATCH v3] spi: create a message queueing infrastructure

2012-02-22 Thread Linus Walleij
From: Linus Walleij linus.wall...@linaro.org

This rips the message queue in the PL022 driver out and pushes
it into (optional) common infrastructure. Drivers that want to
use the message pumping thread will need to define the new
per-messags transfer methods and leave the deprecated transfer()
method as NULL.

Most of the design is described in the documentation changes that
are included in this patch.

Since there is a queue that need to be stopped when the system
is suspending/resuming, two new calls are implemented for the
device drivers to call in their suspend()/resume() functions:
spi_master_suspend() and spi_master_resume().

ChangeLog v1-v2:
- Remove Kconfig entry and do not make the queue support optional
  at all, instead be more agressive and have it as part of the
  compulsory infrastructure.
- If the .transfer() method is implemented, delete print a small
  deprecation notice and do not start the transfer pump.
- Fix a bitrotted comment.
ChangeLog v2-v3:
- Fix up a problematic sequence courtesy of Chris Blair.
- Stop rather than destroy the queue on suspend() courtesy of
  Chris Blair.

Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Signed-off-by: Chris Blair chris.bl...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 Documentation/spi/spi-summary |   58 ++--
 drivers/spi/spi-pl022.c   |  303 +++--
 drivers/spi/spi.c |  339 -
 include/linux/spi/spi.h   |   51 ++
 4 files changed, 487 insertions(+), 264 deletions(-)

diff --git a/Documentation/spi/spi-summary b/Documentation/spi/spi-summary
index 4884cb3..7312ec1 100644
--- a/Documentation/spi/spi-summary
+++ b/Documentation/spi/spi-summary
@@ -1,7 +1,7 @@
 Overview of Linux kernel SPI support
 
 
-21-May-2007
+02-Feb-2012
 
 What is SPI?
 
@@ -483,9 +483,9 @@ also initialize its own internal state.  (See below about 
bus numbering
 and those methods.)
 
 After you initialize the spi_master, then use spi_register_master() to
-publish it to the rest of the system.  At that time, device nodes for
-the controller and any predeclared spi devices will be made available,
-and the driver model core will take care of binding them to drivers.
+publish it to the rest of the system. At that time, device nodes for the
+controller and any predeclared spi devices will be made available, and
+the driver model core will take care of binding them to drivers.
 
 If you need to remove your SPI controller driver, spi_unregister_master()
 will reverse the effect of spi_register_master().
@@ -521,21 +521,53 @@ SPI MASTER METHODS
** When you code setup(), ASSUME that the controller
** is actively processing transfers for another device.
 
-master-transfer(struct spi_device *spi, struct spi_message *message)
-   This must not sleep.  Its responsibility is arrange that the
-   transfer happens and its complete() callback is issued.  The two
-   will normally happen later, after other transfers complete, and
-   if the controller is idle it will need to be kickstarted.
-
 master-cleanup(struct spi_device *spi)
Your controller driver may use spi_device.controller_state to hold
state it dynamically associates with that device.  If you do that,
be sure to provide the cleanup() method to free that state.
 
+master-prepare_transfer_hardware(struct spi_master *master)
+   This will be called by the queue mechanism to signal to the driver
+   that a message is coming in soon, so the subsystem requests the
+   driver to prepare the transfer hardware by issuing this call.
+   This may sleep.
+
+master-unprepare_transfer_hardware(struct spi_master *master)
+   This will be called by the queue mechanism to signal to the driver
+   that there are no more messages pending in the queue and it may
+   relax the hardware (e.g. by power management calls). This may sleep.
+
+master-transfer_one_message(struct spi_master *master,
+struct spi_message *mesg)
+   The subsystem calls the driver to transfer a single message while
+   queuing transfers that arrive in the meantime. When the driver is
+   finished with this message, it must call
+   spi_finalize_current_message() so the subsystem can issue the next
+   transfer. This may sleep.
+
+DEPRECATED METHODS
+
+master-transfer(struct spi_device *spi, struct spi_message *message)
+   This must not sleep. Its responsibility is arrange that the
+   transfer happens and its complete() callback is issued. The two
+   will normally happen later, after other transfers complete, and
+   if the controller is idle it will need to be kickstarted. This
+   method is not used on queued controllers and must be NULL if
+   transfer_one_message() and (un

Re: [PATCH] spi/s3c64xx: Convert to using core message queue

2012-02-22 Thread Linus Walleij
On Wed, Feb 15, 2012 at 11:48 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:

 Convert the s3c64xx driver to using the new message queue factored out of
 the pl022 driver by Linus Walleij, saving us a nice block of code and
 getting the benefits of improvements implemented in the core.

 Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com

Hi Mark,

I tried to include this patch for my patch series but it seems it might be
dependent on other stuff already applied in the SPI tree so I couldn't
get it to apply.

However I guess if Grant picks up the latest (v3) version of the
core patch it should apply just as fine on top of that one.

Yours,
Linus Walleij

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