Author: mav
Date: Tue Jan 19 13:21:25 2010
New Revision: 202618
URL: http://svn.freebsd.org/changeset/base/202618
Log:
MFC r200753:
Fairly set master/slave shared PIO/WDMA timings on ITE 821x controllers.
Previous implementation could only limit mode, but not rise it back.
Modified:
stable/8/sys/dev/ata/chipsets/ata-ite.c
Directory Properties:
stable/8/sys/ (props changed)
stable/8/sys/amd64/include/xen/ (props changed)
stable/8/sys/cddl/contrib/opensolaris/ (props changed)
stable/8/sys/contrib/dev/acpica/ (props changed)
stable/8/sys/contrib/pf/ (props changed)
stable/8/sys/dev/xen/xenpci/ (props changed)
Modified: stable/8/sys/dev/ata/chipsets/ata-ite.c
==============================================================================
--- stable/8/sys/dev/ata/chipsets/ata-ite.c Tue Jan 19 13:07:25 2010
(r202617)
+++ stable/8/sys/dev/ata/chipsets/ata-ite.c Tue Jan 19 13:21:25 2010
(r202618)
@@ -105,6 +105,8 @@ ata_ite_chipinit(device_t dev)
pci_write_config(dev, 0x56, 0x31, 1);
ctlr->setmode = ata_ite_821x_setmode;
+ /* No timing restrictions initally. */
+ ctlr->chipset_data = (void *)0;
}
ctlr->ch_attach = ata_ite_ch_attach;
return 0;
@@ -129,6 +131,7 @@ ata_ite_821x_setmode(device_t dev, int t
struct ata_channel *ch = device_get_softc(dev);
int devno = (ch->unit << 1) + target;
int piomode;
+ uint8_t *timings = (uint8_t*)(&ctlr->chipset_data);
u_int8_t udmatiming[] =
{ 0x44, 0x42, 0x31, 0x21, 0x11, 0xa2, 0x91 };
u_int8_t chtiming[] =
@@ -158,11 +161,10 @@ ata_ite_821x_setmode(device_t dev, int t
(1 << (devno + 3)), 1);
piomode = mode;
}
+ timings[devno] = chtiming[ata_mode2idx(piomode)];
/* set active and recover timing (shared between master & slave) */
- if (pci_read_config(parent, 0x54 + (ch->unit << 2), 1) <
- chtiming[ata_mode2idx(piomode)])
- pci_write_config(parent, 0x54 + (ch->unit << 2),
- chtiming[ata_mode2idx(piomode)], 1);
+ pci_write_config(parent, 0x54 + (ch->unit << 2),
+ max(timings[ch->unit << 1], timings[(ch->unit << 1) + 1]), 1);
return (mode);
}
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