Author: jhibbits
Date: Sat Apr 21 04:18:17 2018
New Revision: 332854
URL: https://svnweb.freebsd.org/changeset/base/332854

Log:
  Sync powerpc feature flags with Linux
  
  Not all feature flags are synced.  Those for processors we don't currently
  support are ignored currently.  Those that are supported are synced best I
  can tell.  One flag was renamed to match the Linux flag name
  (PPC_FEATURE2_VCRYPTO -> PPC_FEATURE2_VEC_CRYPTO).

Modified:
  head/sys/powerpc/include/cpu.h
  head/sys/powerpc/powerpc/cpu.c

Modified: head/sys/powerpc/include/cpu.h
==============================================================================
--- head/sys/powerpc/include/cpu.h      Sat Apr 21 02:08:56 2018        
(r332853)
+++ head/sys/powerpc/include/cpu.h      Sat Apr 21 04:18:17 2018        
(r332854)
@@ -54,6 +54,7 @@ extern int cpu_features2;
 
 #define        PPC_FEATURE_32          0x80000000      /* Always true */
 #define        PPC_FEATURE_64          0x40000000      /* Defined on a 64-bit 
CPU */
+#define        PPC_FEATURE_601_INSTR   0x20000000      /* Defined on a 64-bit 
CPU */
 #define        PPC_FEATURE_HAS_ALTIVEC 0x10000000      
 #define        PPC_FEATURE_HAS_FPU     0x08000000
 #define        PPC_FEATURE_HAS_MMU     0x04000000
@@ -61,26 +62,45 @@ extern int cpu_features2;
 #define        PPC_FEATURE_HAS_SPE     0x00800000
 #define        PPC_FEATURE_HAS_EFP_SINGLE      0x00400000
 #define        PPC_FEATURE_HAS_EFP_DOUBLE      0x00200000
+#define        PPC_FEATURE_NO_TB       0x00100000
+#define        PPC_FEATURE_POWER4      0x00080000
+#define        PPC_FEATURE_POWER5      0x00040000
+#define        PPC_FEATURE_POWER5_PLUS 0x00020000
+#define        PPC_FEATURE_CELL        0x00010000
 #define        PPC_FEATURE_BOOKE       0x00008000
 #define        PPC_FEATURE_SMT         0x00004000
+#define        PPC_FEATURE_ICACHE_SNOOP        0x00002000
 #define        PPC_FEATURE_ARCH_2_05   0x00001000
 #define        PPC_FEATURE_HAS_DFP     0x00000400
+#define        PPC_FEATURE_POWER6_EXT  0x00000200
 #define        PPC_FEATURE_ARCH_2_06   0x00000100
 #define        PPC_FEATURE_HAS_VSX     0x00000080
+#define        PPC_FEATURE_TRUE_LE     0x00000002
+#define        PPC_FEATURE_PPC_LE      0x00000001
 
 #define        PPC_FEATURE2_ARCH_2_07  0x80000000
-#define        PPC_FEATURE2_HAS_HTM    0x40000000
+#define        PPC_FEATURE2_HTM        0x40000000
+#define        PPC_FEATURE2_DSCR       0x20000000
 #define        PPC_FEATURE2_ISEL       0x08000000
-#define        PPC_FEATURE2_HAS_VCRYPTO 0x02000000
+#define        PPC_FEATURE2_TAR        0x04000000
+#define        PPC_FEATURE2_HAS_VEC_CRYPTO     0x02000000
+#define        PPC_FEATURE2_HTM_NOSC   0x01000000
+#define        PPC_FEATURE2_ARCH_3_00  0x00800000
+#define        PPC_FEATURE2_HAS_IEEE128        0x00400000
+#define        PPC_FEATURE2_DARN       0x00200000
+#define        PPC_FEATURE2_SCV        0x00100000
+#define        PPC_FEATURE2_HTM_NOSUSPEND      0x01000000
 
 #define        PPC_FEATURE_BITMASK                                             
\
        "\20"                                                           \
-       "\040PPC32\037PPC64\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE"   \
-       "\030SPE\027SPESFP\026DPESFP\020BOOKE\017SMT\015ARCH205\013DFP" \
-       "\011ARCH206\010VSX"
+       "\040PPC32\037PPC64\036PPC601\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE" 
\
+       
"\030SPE\027SPESFP\026DPESFP\025NOTB\024POWER4\023POWER5\022P5PLUS\021CELL"\
+       "\020BOOKE\017SMT\016ISNOOP\015ARCH205\013DFP\011ARCH206\010VSX"\
+       "\002TRUELE\001PPCLE"
 #define        PPC_FEATURE2_BITMASK                                            
\
        "\20"                                                           \
-       "\040ARCH207\037HTM\034ISEL\032VCRYPTO"
+       "\040ARCH207\037HTM\036DSCR\034ISEL\033TAR\032VCRYPTO\031HTMNOSC" \
+       "\030ARCH300\027IEEE128\026DARN\025SCV\024HTMNOSUSP"
 
 #define        TRAPF_USERMODE(frame)   (((frame)->srr1 & PSL_PR) != 0)
 #define        TRAPF_PC(frame)         ((frame)->srr0)

Modified: head/sys/powerpc/powerpc/cpu.c
==============================================================================
--- head/sys/powerpc/powerpc/cpu.c      Sat Apr 21 02:08:56 2018        
(r332853)
+++ head/sys/powerpc/powerpc/cpu.c      Sat Apr 21 04:18:17 2018        
(r332854)
@@ -139,42 +139,49 @@ static const struct cputab models[] = {
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU,
           0, cpu_970_setup },
         { "IBM POWER4",                IBMPOWER4,      REVFMT_MAJMIN,
-          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU, 0, NULL },
+          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER4, 0, NULL },
         { "IBM POWER4+",       IBMPOWER4PLUS,  REVFMT_MAJMIN,
-          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU, 0, NULL },
+          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER4, 0, NULL },
         { "IBM POWER5",                IBMPOWER5,      REVFMT_MAJMIN,
-          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_SMT, 0, NULL },
+          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER4 |
+          PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP, 0, NULL },
         { "IBM POWER5+",       IBMPOWER5PLUS,  REVFMT_MAJMIN,
-          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_SMT, 0, NULL },
+          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER5_PLUS |
+          PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP, 0, NULL },
         { "IBM POWER6",                IBMPOWER6,      REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
-          PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05, 0, NULL },
+          PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
+          PPC_FEATURE_TRUE_LE, 0, NULL },
         { "IBM POWER7",                IBMPOWER7,      REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
           PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 |
-          PPC_FEATURE_HAS_VSX, 0, NULL },
+          PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE, PPC_FEATURE2_DSCR, NULL },
         { "IBM POWER7+",       IBMPOWER7PLUS,  REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
           PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 |
-          PPC_FEATURE_HAS_VSX, 0, NULL },
+          PPC_FEATURE_HAS_VSX, PPC_FEATURE2_DSCR, NULL },
         { "IBM POWER8E",       IBMPOWER8E,     REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
-          PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 |
-          PPC_FEATURE_HAS_VSX,
-          PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL |
-          PPC_FEATURE2_HAS_VCRYPTO, cpu_powerx_setup },
+          PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
+          PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
+          PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR | 
+          PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
+          PPC_FEATURE2_HTM_NOSC, cpu_powerx_setup },
         { "IBM POWER8",                IBMPOWER8,      REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
-          PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 |
-          PPC_FEATURE_HAS_VSX,
-          PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL |
-          PPC_FEATURE2_HAS_VCRYPTO, cpu_powerx_setup },
+          PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
+          PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
+          PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR | 
+          PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
+          PPC_FEATURE2_HTM_NOSC, cpu_powerx_setup },
         { "IBM POWER9",                IBMPOWER9,      REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
-          PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 |
-          PPC_FEATURE_HAS_VSX,
-          PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL |
-          PPC_FEATURE2_HAS_VCRYPTO, NULL },
+          PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
+          PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
+          PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR |
+          PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
+          PPC_FEATURE2_ARCH_3_00 | PPC_FEATURE2_HAS_IEEE128 |
+          PPC_FEATURE2_DARN, NULL },
         { "Motorola PowerPC 7400",     MPC7400,        REVFMT_MAJMIN,
           PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup },
         { "Motorola PowerPC 7410",     MPC7410,        REVFMT_MAJMIN,
@@ -194,24 +201,27 @@ static const struct cputab models[] = {
         { "Motorola PowerPC 8245",     MPC8245,        REVFMT_MAJMIN,
           PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup },
         { "Freescale e500v1 core",     FSL_E500v1,     REVFMT_MAJMIN,
-          PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_SPE | PPC_FEATURE_HAS_EFP_SINGLE,
+          PPC_FEATURE_HAS_SPE | PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_BOOKE,
           PPC_FEATURE2_ISEL, cpu_booke_setup },
         { "Freescale e500v2 core",     FSL_E500v2,     REVFMT_MAJMIN,
-          PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_SPE |
+          PPC_FEATURE_HAS_SPE | PPC_FEATURE_BOOKE |
           PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
           PPC_FEATURE2_ISEL, cpu_booke_setup },
        { "Freescale e500mc core",      FSL_E500mc,     REVFMT_MAJMIN,
-          PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_FPU, PPC_FEATURE2_ISEL,
+          PPC_FEATURE_HAS_FPU | PPC_FEATURE_BOOKE | PPC_FEATURE_ARCH_2_05 |
+          PPC_FEATURE_ARCH_2_06, PPC_FEATURE2_ISEL,
           cpu_booke_setup },
        { "Freescale e5500 core",       FSL_E5500,      REVFMT_MAJMIN,
-          PPC_FEATURE_BOOKE | PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU,
+          PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_BOOKE |
+          PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06,
           PPC_FEATURE2_ISEL, cpu_booke_setup },
        { "Freescale e6500 core",       FSL_E6500,      REVFMT_MAJMIN,
-          PPC_FEATURE_BOOKE | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC |
-          PPC_FEATURE_HAS_FPU, PPC_FEATURE2_ISEL, cpu_booke_setup },
+          PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
+          PPC_FEATURE_BOOKE | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06,
+          PPC_FEATURE2_ISEL, cpu_booke_setup },
         { "IBM Cell Broadband Engine", IBMCELLBE,      REVFMT_MAJMIN,
           PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
-          PPC_FEATURE_SMT, 0, NULL},
+          PPC_FEATURE_CELL | PPC_FEATURE_SMT, 0, NULL},
         { "Unknown PowerPC CPU",       0,              REVFMT_HEX, 0, 0, NULL 
},
 };
 
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