Author: dim
Date: Mon Jan 27 07:03:57 2020
New Revision: 357168
URL: https://svnweb.freebsd.org/changeset/base/357168

Log:
  MFC r356929:
  
  Merge commit bc4bc5aa0 from llvm git (by Justin Hibbits):
  
    Add 8548 CPU definition and attributes
  
    8548 CPU is GCC's name for the e500v2, so accept this in clang.  The
    e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as
    well, as GCC does.
  
    Differential Revision:  https://reviews.llvm.org/D67787
  
  Merge commit ff0311c4b from llvm git (by Justin Hibbits):
  
    [PowerPC]: Add powerpcspe target triple subarch component
  
    Summary:
    This allows the use of '-target powerpcspe-unknown-linux-gnu' or
    'powerpcspe-unknown-freebsd' to be used, instead of '-target
    powerpc-unknown-linux-gnu -mspe'.
  
    Reviewed By: dim
    Differential Revision: https://reviews.llvm.org/D72014
  
  Merge commit ba91dffaf from llvm git (by Fangrui Song):
  
    [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver
  
    Follow-up of D72014. It is more appropriate to use a target feature
    instead of a SubTypeArch to express the difference.
  
    Reviewed By: #powerpc, jhibbits
  
    Differential Revision: https://reviews.llvm.org/D72433
  
  commit 36eedfcb3 from llvm git (by Justin Hibbits):
  
    [PowerPC] Fix powerpcspe subtarget enablement in llvm backend
  
    Summary:
  
    As currently written, -target powerpcspe will enable SPE regardless
    of disabling the feature later on in the command line.  Instead,
    change this to just set a default CPU to 'e500' instead of a generic
    CPU.
  
    As part of this, add FeatureSPE to the e500 definition.
  
    Reviewed By: MaskRay
    Differential Revision: https://reviews.llvm.org/D72673
  
  These are needed to unbreak the build for powerpcspe.
  
  Requested by: jhibbits

Modified:
  stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.cpp
  stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h
  stable/12/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/PPC.cpp
  stable/12/contrib/llvm-project/llvm/include/llvm/ADT/Triple.h
  stable/12/contrib/llvm-project/llvm/lib/Support/Triple.cpp
  stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td
  stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
Directory Properties:
  stable/12/   (props changed)
  stable/12/contrib/llvm-project/clang/   (props changed)
  stable/12/contrib/llvm-project/llvm/   (props changed)

Modified: stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.cpp
==============================================================================
--- stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.cpp      Mon Jan 
27 07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.cpp      Mon Jan 
27 07:03:57 2020        (r357168)
@@ -157,6 +157,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions
     Builder.defineMacro("_ARCH_A2Q");
     Builder.defineMacro("_ARCH_QP");
   }
+  if (ArchDefs & ArchDefineE500)
+    Builder.defineMacro("__NO_LWSYNC__");
 
   if (getTriple().getVendor() == llvm::Triple::BGQ) {
     Builder.defineMacro("__bg__");
@@ -312,6 +314,11 @@ bool PPCTargetInfo::initFeatureMap(
                         .Case("pwr8", true)
                         .Default(false);
 
+  Features["spe"] = llvm::StringSwitch<bool>(CPU)
+                        .Case("8548", true)
+                        .Case("e500", true)
+                        .Default(false);
+
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
     return false;
 
@@ -449,16 +456,16 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGC
 }
 
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
-    {"generic"}, {"440"},         {"450"},     {"601"},    {"602"},
-    {"603"},     {"603e"},        {"603ev"},   {"604"},    {"604e"},
-    {"620"},     {"630"},         {"g3"},      {"7400"},   {"g4"},
-    {"7450"},    {"g4+"},         {"750"},     {"970"},    {"g5"},
-    {"a2"},      {"a2q"},         {"e500mc"},  {"e5500"},  {"power3"},
-    {"pwr3"},    {"power4"},      {"pwr4"},    {"power5"}, {"pwr5"},
-    {"power5x"}, {"pwr5x"},       {"power6"},  {"pwr6"},   {"power6x"},
-    {"pwr6x"},   {"power7"},      {"pwr7"},    {"power8"}, {"pwr8"},
-    {"power9"},  {"pwr9"},        {"powerpc"}, {"ppc"},    {"powerpc64"},
-    {"ppc64"},   {"powerpc64le"}, {"ppc64le"},
+    {"generic"},   {"440"},       {"450"},         {"601"},         {"602"},
+    {"603"},       {"603e"},      {"603ev"},       {"604"},         {"604e"},
+    {"620"},       {"630"},       {"g3"},          {"7400"},        {"g4"},
+    {"7450"},      {"g4+"},       {"750"},         {"8548"},        {"970"},
+    {"g5"},        {"a2"},        {"a2q"},         {"e500"},        {"e500mc"},
+    {"e5500"},     {"power3"},    {"pwr3"},        {"power4"},      {"pwr4"},
+    {"power5"},    {"pwr5"},      {"power5x"},     {"pwr5x"},       {"power6"},
+    {"pwr6"},      {"power6x"},   {"pwr6x"},       {"power7"},      {"pwr7"},
+    {"power8"},    {"pwr8"},      {"power9"},      {"pwr9"},        
{"powerpc"},
+    {"ppc"},       {"powerpc64"}, {"ppc64"},       {"powerpc64le"}, 
{"ppc64le"},
 };
 
 bool PPCTargetInfo::isValidCPUName(StringRef Name) const {

Modified: stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h
==============================================================================
--- stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h        Mon Jan 
27 07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h        Mon Jan 
27 07:03:57 2020        (r357168)
@@ -44,7 +44,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public T
     ArchDefinePwr8 = 1 << 12,
     ArchDefinePwr9 = 1 << 13,
     ArchDefineA2 = 1 << 14,
-    ArchDefineA2q = 1 << 15
+    ArchDefineA2q = 1 << 15,
+    ArchDefineE500 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -85,8 +86,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public T
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
-  //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
-  //  titan, rs64.
+  //  821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
 
@@ -145,6 +145,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public T
                      ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
                          ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
                          ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+              .Cases("8548", "e500", ArchDefineE500)
               .Default(ArchDefineNone);
     }
     return CPUKnown;

Modified: 
stable/12/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/PPC.cpp
==============================================================================
--- stable/12/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/PPC.cpp     
Mon Jan 27 07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/PPC.cpp     
Mon Jan 27 07:03:57 2020        (r357168)
@@ -52,10 +52,12 @@ std::string ppc::getPPCTargetCPU(const ArgList &Args) 
         .Case("7450", "7450")
         .Case("G4+", "g4+")
         .Case("750", "750")
+        .Case("8548", "e500")
         .Case("970", "970")
         .Case("G5", "g5")
         .Case("a2", "a2")
         .Case("a2q", "a2q")
+        .Case("e500", "e500")
         .Case("e500mc", "e500mc")
         .Case("e5500", "e5500")
         .Case("power3", "pwr3")
@@ -100,6 +102,9 @@ const char *ppc::getPPCAsmModeForCPU(StringRef Name) {
 void ppc::getPPCTargetFeatures(const Driver &D, const llvm::Triple &Triple,
                                const ArgList &Args,
                                std::vector<StringRef> &Features) {
+  if (Triple.getSubArch() == llvm::Triple::PPCSubArch_spe)
+    Features.push_back("+spe");
+
   handleTargetFeaturesGroup(Args, Features, options::OPT_m_ppc_Features_Group);
 
   ppc::FloatABI FloatABI = ppc::getPPCFloatABI(D, Args);

Modified: stable/12/contrib/llvm-project/llvm/include/llvm/ADT/Triple.h
==============================================================================
--- stable/12/contrib/llvm-project/llvm/include/llvm/ADT/Triple.h       Mon Jan 
27 07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/llvm/include/llvm/ADT/Triple.h       Mon Jan 
27 07:03:57 2020        (r357168)
@@ -128,7 +128,9 @@ class Triple { (public)
     KalimbaSubArch_v4,
     KalimbaSubArch_v5,
 
-    MipsSubArch_r6
+    MipsSubArch_r6,
+
+    PPCSubArch_spe
   };
   enum VendorType {
     UnknownVendor,

Modified: stable/12/contrib/llvm-project/llvm/lib/Support/Triple.cpp
==============================================================================
--- stable/12/contrib/llvm-project/llvm/lib/Support/Triple.cpp  Mon Jan 27 
07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/llvm/lib/Support/Triple.cpp  Mon Jan 27 
07:03:57 2020        (r357168)
@@ -389,7 +389,7 @@ static Triple::ArchType parseArch(StringRef ArchName) 
     // FIXME: Do we need to support these?
     .Cases("i786", "i886", "i986", Triple::x86)
     .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
-    .Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+    .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
     .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
     .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
     .Case("xscale", Triple::arm)
@@ -562,6 +562,9 @@ static Triple::SubArchType parseSubArch(StringRef SubA
   if (SubArchName.startswith("mips") &&
       (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
     return Triple::MipsSubArch_r6;
+
+  if (SubArchName == "powerpcspe")
+    return Triple::PPCSubArch_spe;
 
   StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
 

Modified: stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td
==============================================================================
--- stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td       Mon Jan 
27 07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td       Mon Jan 
27 07:03:57 2020        (r357168)
@@ -378,7 +378,7 @@ def : ProcessorModel<"g5", G5Model,
 def : ProcessorModel<"e500", PPCE500Model,
                   [DirectiveE500,
                    FeatureICBT, FeatureBookE,
-                   FeatureISEL, FeatureMFTB]>;
+                   FeatureISEL, FeatureMFTB, FeatureSPE]>;
 def : ProcessorModel<"e500mc", PPCE500mcModel,
                   [DirectiveE500mc,
                    FeatureSTFIWX, FeatureICBT, FeatureBookE,

Modified: 
stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
==============================================================================
--- stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.cpp     
Mon Jan 27 07:02:52 2020        (r357167)
+++ stable/12/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.cpp     
Mon Jan 27 07:03:57 2020        (r357168)
@@ -126,6 +126,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU
     // If cross-compiling with -march=ppc64le without -mcpu
     if (TargetTriple.getArch() == Triple::ppc64le)
       CPUName = "ppc64le";
+    else if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+      CPUName = "e500";
     else
       CPUName = "generic";
   }
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