Author: mhorne Date: Sat Oct 24 20:57:13 2020 New Revision: 367020 URL: https://svnweb.freebsd.org/changeset/base/367020
Log: riscv: improve exception code naming The existing names were inherited from arm64, but we should prefer RISC-V terminology. Change the prefix to SCAUSE, and further change the names to better match the RISC-V spec and be more consistent with one another. Also, remove two codes that are not defined for S-mode (machine and hypervisor ecall). While here, apply style(9) to some condition checks. Reviewed by: kp Discussed with: jrtc27 Differential Revision: https://reviews.freebsd.org/D26918 Modified: head/sys/riscv/include/db_machdep.h head/sys/riscv/include/riscvreg.h head/sys/riscv/riscv/db_trace.c head/sys/riscv/riscv/intr_machdep.c head/sys/riscv/riscv/trap.c Modified: head/sys/riscv/include/db_machdep.h ============================================================================== --- head/sys/riscv/include/db_machdep.h Sat Oct 24 20:52:05 2020 (r367019) +++ head/sys/riscv/include/db_machdep.h Sat Oct 24 20:57:13 2020 (r367020) @@ -41,7 +41,7 @@ #include <machine/frame.h> #include <machine/trap.h> -#define T_BREAKPOINT (EXCP_BREAKPOINT) +#define T_BREAKPOINT (SCAUSE_BREAKPOINT) #define T_WATCHPOINT (0) typedef vm_offset_t db_addr_t; Modified: head/sys/riscv/include/riscvreg.h ============================================================================== --- head/sys/riscv/include/riscvreg.h Sat Oct 24 20:52:05 2020 (r367019) +++ head/sys/riscv/include/riscvreg.h Sat Oct 24 20:57:13 2020 (r367020) @@ -37,23 +37,21 @@ #ifndef _MACHINE_RISCVREG_H_ #define _MACHINE_RISCVREG_H_ -#define EXCP_MASK (~EXCP_INTR) -#define EXCP_MISALIGNED_FETCH 0 -#define EXCP_FAULT_FETCH 1 -#define EXCP_ILLEGAL_INSTRUCTION 2 -#define EXCP_BREAKPOINT 3 -#define EXCP_MISALIGNED_LOAD 4 -#define EXCP_FAULT_LOAD 5 -#define EXCP_MISALIGNED_STORE 6 -#define EXCP_FAULT_STORE 7 -#define EXCP_USER_ECALL 8 -#define EXCP_SUPERVISOR_ECALL 9 -#define EXCP_HYPERVISOR_ECALL 10 -#define EXCP_MACHINE_ECALL 11 -#define EXCP_INST_PAGE_FAULT 12 -#define EXCP_LOAD_PAGE_FAULT 13 -#define EXCP_STORE_PAGE_FAULT 15 -#define EXCP_INTR (1ul << 63) +#define SCAUSE_INTR (1ul << 63) +#define SCAUSE_CODE (~SCAUSE_INTR) +#define SCAUSE_INST_MISALIGNED 0 +#define SCAUSE_INST_ACCESS_FAULT 1 +#define SCAUSE_ILLEGAL_INSTRUCTION 2 +#define SCAUSE_BREAKPOINT 3 +#define SCAUSE_LOAD_MISALIGNED 4 +#define SCAUSE_LOAD_ACCESS_FAULT 5 +#define SCAUSE_STORE_MISALIGNED 6 +#define SCAUSE_STORE_ACCESS_FAULT 7 +#define SCAUSE_ECALL_USER 8 +#define SCAUSE_ECALL_SUPERVISOR 9 +#define SCAUSE_INST_PAGE_FAULT 12 +#define SCAUSE_LOAD_PAGE_FAULT 13 +#define SCAUSE_STORE_PAGE_FAULT 15 #define SSTATUS_UIE (1 << 0) #define SSTATUS_SIE (1 << 1) Modified: head/sys/riscv/riscv/db_trace.c ============================================================================== --- head/sys/riscv/riscv/db_trace.c Sat Oct 24 20:52:05 2020 (r367019) +++ head/sys/riscv/riscv/db_trace.c Sat Oct 24 20:57:13 2020 (r367020) @@ -101,12 +101,12 @@ db_stack_trace_cmd(struct unwind_state *frame) tf = (struct trapframe *)(uintptr_t)frame->sp; - if (tf->tf_scause & EXCP_INTR) + if ((tf->tf_scause & SCAUSE_INTR) != 0) db_printf("--- interrupt %ld\n", - tf->tf_scause & EXCP_MASK); + tf->tf_scause & SCAUSE_CODE); else db_printf("--- exception %ld, tval = %#lx\n", - tf->tf_scause & EXCP_MASK, + tf->tf_scause & SCAUSE_CODE, tf->tf_stval); frame->sp = tf->tf_sp; frame->fp = tf->tf_s[0]; Modified: head/sys/riscv/riscv/intr_machdep.c ============================================================================== --- head/sys/riscv/riscv/intr_machdep.c Sat Oct 24 20:52:05 2020 (r367019) +++ head/sys/riscv/riscv/intr_machdep.c Sat Oct 24 20:57:13 2020 (r367020) @@ -158,10 +158,10 @@ riscv_cpu_intr(struct trapframe *frame) struct intr_irqsrc *isrc; int active_irq; - KASSERT(frame->tf_scause & EXCP_INTR, + KASSERT((frame->tf_scause & SCAUSE_INTR) != 0, ("riscv_cpu_intr: wrong frame passed")); - active_irq = frame->tf_scause & EXCP_MASK; + active_irq = frame->tf_scause & SCAUSE_CODE; switch (active_irq) { case IRQ_SOFTWARE_USER: Modified: head/sys/riscv/riscv/trap.c ============================================================================== --- head/sys/riscv/riscv/trap.c Sat Oct 24 20:52:05 2020 (r367019) +++ head/sys/riscv/riscv/trap.c Sat Oct 24 20:57:13 2020 (r367020) @@ -217,9 +217,9 @@ page_fault_handler(struct trapframe *frame, int usermo va = trunc_page(stval); - if (frame->tf_scause == EXCP_STORE_PAGE_FAULT) { + if (frame->tf_scause == SCAUSE_STORE_PAGE_FAULT) { ftype = VM_PROT_WRITE; - } else if (frame->tf_scause == EXCP_INST_PAGE_FAULT) { + } else if (frame->tf_scause == SCAUSE_INST_PAGE_FAULT) { ftype = VM_PROT_EXECUTE; } else { ftype = VM_PROT_READ; @@ -232,7 +232,7 @@ page_fault_handler(struct trapframe *frame, int usermo if (error != KERN_SUCCESS) { if (usermode) { call_trapsignal(td, sig, ucode, (void *)stval, - frame->tf_scause & EXCP_MASK); + frame->tf_scause & SCAUSE_CODE); } else { if (pcb->pcb_onfault != 0) { frame->tf_a[0] = error; @@ -262,8 +262,8 @@ do_trap_supervisor(struct trapframe *frame) KASSERT((csr_read(sstatus) & (SSTATUS_SPP | SSTATUS_SIE)) == SSTATUS_SPP, ("Came from S mode with interrupts enabled")); - exception = frame->tf_scause & EXCP_MASK; - if (frame->tf_scause & EXCP_INTR) { + exception = frame->tf_scause & SCAUSE_CODE; + if ((frame->tf_scause & SCAUSE_INTR) != 0) { /* Interrupt */ riscv_cpu_intr(frame); return; @@ -278,18 +278,18 @@ do_trap_supervisor(struct trapframe *frame) curthread, frame->tf_sepc, frame); switch (exception) { - case EXCP_FAULT_LOAD: - case EXCP_FAULT_STORE: - case EXCP_FAULT_FETCH: + case SCAUSE_LOAD_ACCESS_FAULT: + case SCAUSE_STORE_ACCESS_FAULT: + case SCAUSE_INST_ACCESS_FAULT: dump_regs(frame); panic("Memory access exception at 0x%016lx\n", frame->tf_sepc); break; - case EXCP_STORE_PAGE_FAULT: - case EXCP_LOAD_PAGE_FAULT: - case EXCP_INST_PAGE_FAULT: + case SCAUSE_STORE_PAGE_FAULT: + case SCAUSE_LOAD_PAGE_FAULT: + case SCAUSE_INST_PAGE_FAULT: page_fault_handler(frame, 0); break; - case EXCP_BREAKPOINT: + case SCAUSE_BREAKPOINT: #ifdef KDTRACE_HOOKS if (dtrace_invop_jump_addr != NULL && dtrace_invop_jump_addr(frame) == 0) @@ -302,7 +302,7 @@ do_trap_supervisor(struct trapframe *frame) panic("No debugger in kernel.\n"); #endif break; - case EXCP_ILLEGAL_INSTRUCTION: + case SCAUSE_ILLEGAL_INSTRUCTION: dump_regs(frame); panic("Illegal instruction at 0x%016lx\n", frame->tf_sepc); break; @@ -330,8 +330,8 @@ do_trap_user(struct trapframe *frame) KASSERT((csr_read(sstatus) & (SSTATUS_SPP | SSTATUS_SIE)) == 0, ("Came from U mode with interrupts enabled")); - exception = frame->tf_scause & EXCP_MASK; - if (frame->tf_scause & EXCP_INTR) { + exception = frame->tf_scause & SCAUSE_CODE; + if ((frame->tf_scause & SCAUSE_INTR) != 0) { /* Interrupt */ riscv_cpu_intr(frame); return; @@ -342,23 +342,23 @@ do_trap_user(struct trapframe *frame) curthread, frame->tf_sepc, frame); switch (exception) { - case EXCP_FAULT_LOAD: - case EXCP_FAULT_STORE: - case EXCP_FAULT_FETCH: + case SCAUSE_LOAD_ACCESS_FAULT: + case SCAUSE_STORE_ACCESS_FAULT: + case SCAUSE_INST_ACCESS_FAULT: call_trapsignal(td, SIGBUS, BUS_ADRERR, (void *)frame->tf_sepc, exception); userret(td, frame); break; - case EXCP_STORE_PAGE_FAULT: - case EXCP_LOAD_PAGE_FAULT: - case EXCP_INST_PAGE_FAULT: + case SCAUSE_STORE_PAGE_FAULT: + case SCAUSE_LOAD_PAGE_FAULT: + case SCAUSE_INST_PAGE_FAULT: page_fault_handler(frame, 1); break; - case EXCP_USER_ECALL: + case SCAUSE_ECALL_USER: frame->tf_sepc += 4; /* Next instruction */ ecall_handler(); break; - case EXCP_ILLEGAL_INSTRUCTION: + case SCAUSE_ILLEGAL_INSTRUCTION: #ifdef FPE if ((pcb->pcb_fpflags & PCB_FP_STARTED) == 0) { /* @@ -376,7 +376,7 @@ do_trap_user(struct trapframe *frame) exception); userret(td, frame); break; - case EXCP_BREAKPOINT: + case SCAUSE_BREAKPOINT: call_trapsignal(td, SIGTRAP, TRAP_BRKPT, (void *)frame->tf_sepc, exception); userret(td, frame); _______________________________________________ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
