Re: svn commit: r347477 - head/sys/kern

2019-05-12 Thread Enji Cooper

> On May 12, 2019, at 10:12 PM, Enji Cooper  wrote:
> 
> 
>> On May 12, 2019, at 10:11 PM, Doug Moore  wrote:
>> 
>> I refer you to the discussion that began with that question from Cy
>> Schubert on Friday night.
>> 
>> I apologize again for the brevity of my commit message.
> 
> It’s quite all right. Unfortunately Cy’s mail client reads threading, so it’s 
> sometimes difficult for me to track a conversation.

*reads -> breaks

I need to get some sleep.
-Enji
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Re: svn commit: r347477 - head/sys/kern

2019-05-12 Thread Enji Cooper

> On May 12, 2019, at 10:11 PM, Doug Moore  wrote:
> 
> I refer you to the discussion that began with that question from Cy
> Schubert on Friday night.
> 
> I apologize again for the brevity of my commit message.

It’s quite all right. Unfortunately Cy’s mail client reads threading, so it’s 
sometimes difficult for me to track a conversation.

I appreciate your reaching out and for answering the question there.

Thank you!
-Enji

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Re: svn commit: r347477 - head/sys/kern

2019-05-12 Thread Doug Moore
I refer you to the discussion that began with that question from Cy
Schubert on Friday night.

I apologize again for the brevity of my commit message.

Doug Moore

On 5/13/19 12:06 AM, Enji Cooper wrote:
> Hi Doug,
>
>> On May 10, 2019, at 7:13 PM, Doug Moore  wrote:
>>
>> Author: dougm
>> Date: Sat May 11 02:13:52 2019
>> New Revision: 347477
>> URL: https://svnweb.freebsd.org/changeset/base/347477
>>
>> Log:
>>  Revert r347469.
> Why was the commit reverted?
>
> Thank you!
> -Enji
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Re: svn commit: r347477 - head/sys/kern

2019-05-12 Thread Enji Cooper
Hi Doug,

> On May 10, 2019, at 7:13 PM, Doug Moore  wrote:
> 
> Author: dougm
> Date: Sat May 11 02:13:52 2019
> New Revision: 347477
> URL: https://svnweb.freebsd.org/changeset/base/347477
> 
> Log:
>  Revert r347469.

Why was the commit reverted?

Thank you!
-Enji
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svn commit: r347515 - head/sys/mips/conf

2019-05-12 Thread Mark Johnston
Author: markj
Date: Mon May 13 01:18:17 2019
New Revision: 347515
URL: https://svnweb.freebsd.org/changeset/base/347515

Log:
  Catch up with r347241.
  
  MFC with: r347241

Modified:
  head/sys/mips/conf/std.AR_MIPS_BASE

Modified: head/sys/mips/conf/std.AR_MIPS_BASE
==
--- head/sys/mips/conf/std.AR_MIPS_BASE Sun May 12 16:17:05 2019
(r347514)
+++ head/sys/mips/conf/std.AR_MIPS_BASE Mon May 13 01:18:17 2019
(r347515)
@@ -21,8 +21,8 @@ options   SCSI_NO_OP_STRINGS
 # .. And no sysctl strings
 optionsNO_SYSCTL_DESCR
 
-makeoptionsMODULES_OVERRIDE+="gpio ar71xx if_gif if_vlan if_gre if_tap"
-makeoptionsMODULES_OVERRIDE+="if_tun if_bridge bridgestp usb"
+makeoptionsMODULES_OVERRIDE+="gpio ar71xx if_gif if_vlan if_gre if_tuntap"
+makeoptionsMODULES_OVERRIDE+="if_bridge bridgestp usb"
 makeoptionsMODULES_OVERRIDE+="alq"
 
 # Random - required during early boot!
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svn commit: r347514 - in head/sys/riscv: include riscv

2019-05-12 Thread Ruslan Bukin
Author: br
Date: Sun May 12 16:17:05 2019
New Revision: 347514
URL: https://svnweb.freebsd.org/changeset/base/347514

Log:
  Add support for HiFive Unleashed -- the board with a multi-core RISC-V SoC
  from SiFive, Inc.
  
  The first core on this SoC (hart 0) is a 64-bit microcontroller.
  
  o Pick a hart to run boot process using hart lottery.
This allows to exclude hart 0 from running the boot process.
(BBL releases hart 0 after the main harts, so it never wins the lottery).
  o Renumber CPUs early on boot.
Exclude non-MMU cores. Store the original hart ID in struct pcpu. This
allows to find out the correct destination for IPIs and remote sfence
calls.
  
  Thanks to SiFive, Inc for the board provided.
  
  Reviewed by:  markj
  Sponsored by: DARPA, AFRL
  Differential Revision:https://reviews.freebsd.org/D20225

Modified:
  head/sys/riscv/include/pcpu.h
  head/sys/riscv/riscv/intr_machdep.c
  head/sys/riscv/riscv/locore.S
  head/sys/riscv/riscv/machdep.c
  head/sys/riscv/riscv/mp_machdep.c
  head/sys/riscv/riscv/pmap.c

Modified: head/sys/riscv/include/pcpu.h
==
--- head/sys/riscv/include/pcpu.h   Sun May 12 15:27:18 2019
(r347513)
+++ head/sys/riscv/include/pcpu.h   Sun May 12 16:17:05 2019
(r347514)
@@ -47,7 +47,8 @@
 #definePCPU_MD_FIELDS  
\
struct pmap *pc_curpmap;/* Currently active pmap */ \
uint32_t pc_pending_ipis;   /* IPIs pending to this CPU */  \
-   char __pad[61]
+   uint32_t pc_hart;   /* Hart ID */   \
+   char __pad[57]
 
 #ifdef _KERNEL
 

Modified: head/sys/riscv/riscv/intr_machdep.c
==
--- head/sys/riscv/riscv/intr_machdep.c Sun May 12 15:27:18 2019
(r347513)
+++ head/sys/riscv/riscv/intr_machdep.c Sun May 12 16:17:05 2019
(r347514)
@@ -207,7 +207,7 @@ ipi_send(struct pcpu *pc, int ipi)
CTR3(KTR_SMP, "%s: cpu=%d, ipi=%x", __func__, pc->pc_cpuid, ipi);
 
atomic_set_32(>pc_pending_ipis, ipi);
-   mask = (1 << (pc->pc_cpuid));
+   mask = (1 << pc->pc_hart);
 
sbi_send_ipi();
 
@@ -252,7 +252,7 @@ ipi_selected(cpuset_t cpus, u_int ipi)
CTR3(KTR_SMP, "%s: pc: %p, ipi: %x\n", __func__, pc,
ipi);
atomic_set_32(>pc_pending_ipis, ipi);
-   mask |= (1 << (pc->pc_cpuid));
+   mask |= (1 << pc->pc_hart);
}
}
sbi_send_ipi();

Modified: head/sys/riscv/riscv/locore.S
==
--- head/sys/riscv/riscv/locore.S   Sun May 12 15:27:18 2019
(r347513)
+++ head/sys/riscv/riscv/locore.S   Sun May 12 16:17:05 2019
(r347514)
@@ -59,12 +59,18 @@ _start:
sub t1, t1, t0
li  t2, KERNBASE
sub s9, t2, t1  /* s9 = physmem base */
-   mv  s10, a0 /* s10 = hart id */
-   mv  s11, a1 /* s11 = dtbp */
 
-   /* Direct secondary cores to mpentry */
-   bnezs10, mpentry
+   /*
+* a0 = hart id
+* a1 = dtbp
+*/
 
+   /* Pick a hart to run the boot process. */
+   la  t0, hart_lottery
+   li  t1, 1
+   amoadd.w t0, t1, 0(t0)
+   bnezt0, mpentry
+
/*
 * Page tables
 */
@@ -123,7 +129,7 @@ _start:
 
/* Create an L2 page superpage for DTB */
la  s1, pagetable_l2_devmap
-   mv  s2, s11
+   mv  s2, a1
srlis2, s2, PAGE_SHIFT
 
li  t0, (PTE_KERN)
@@ -171,13 +177,19 @@ va:
addisp, sp, -PCB_SIZE
 
/* Clear BSS  */
-   la  a0, _C_LABEL(__bss_start)
+   la  s0, _C_LABEL(__bss_start)
la  s1, _C_LABEL(_end)
 1:
-   sd  zero, 0(a0)
-   addia0, a0, 8
-   bltua0, s1, 1b
+   sd  zero, 0(s0)
+   addis0, s0, 8
+   bltus0, s1, 1b
 
+#ifdef SMP
+   /* Store boot hart id. */
+   la  t0, boot_hart
+   sw  a0, 0(t0)
+#endif
+
/* Fill riscv_bootparams */
addisp, sp, -40
 
@@ -190,7 +202,7 @@ va:
 
li  t0, (VM_MAX_KERNEL_ADDRESS - 2 * L2_SIZE)
sd  t0, 24(sp) /* dtbp_virt */
-   sd  s11, 32(sp) /* dtbp_phys */
+   sd  a1, 32(sp) /* dtbp_phys */
 
mv  a0, sp
call_C_LABEL(initriscv) /* Off we go */
@@ -233,9 +245,11 @@ pagetable_l2:
 pagetable_l2_devmap:
.space  PAGE_SIZE
 
-.align 3
+   .align 3
 virt_map:
-.quad   virt_map
+   .quad   virt_map
+hart_lottery:
+   .space  4
 
/* Not in use, but required for linking. */
.align 3
@@ -278,7 +292,8 @@ ENTRY(mpentry)
   

svn commit: r347512 - head/sys/arm/allwinner/clkng

2019-05-12 Thread Emmanuel Vadot
Author: manu
Date: Sun May 12 15:27:01 2019
New Revision: 347512
URL: https://svnweb.freebsd.org/changeset/base/347512

Log:
  arm: allwinner: aw_clk_nm: Don't reparent the clock if we didn't ask
  
  When looking for the best frequency don't change the clock parent if the
  clock wasn't configured to do that.

Modified:
  head/sys/arm/allwinner/clkng/aw_clk_nm.c

Modified: head/sys/arm/allwinner/clkng/aw_clk_nm.c
==
--- head/sys/arm/allwinner/clkng/aw_clk_nm.cSun May 12 12:30:45 2019
(r347511)
+++ head/sys/arm/allwinner/clkng/aw_clk_nm.cSun May 12 15:27:01 2019
(r347512)
@@ -236,7 +236,7 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fpare
return (ERANGE);
}
 
-   if (p_idx != best_parent)
+   if ((sc->flags & AW_CLK_REPARENT) != 0 && p_idx != best_parent)
clknode_set_parent_by_idx(clk, best_parent);
 
DEVICE_LOCK(clk);
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svn commit: r347511 - in stable: 11/sys/dev/iwi 11/sys/dev/otus 11/sys/dev/usb/wlan 12/sys/dev/iwi 12/sys/dev/otus 12/sys/dev/usb/wlan

2019-05-12 Thread Andriy Voskoboinyk
Author: avos
Date: Sun May 12 12:30:45 2019
New Revision: 347511
URL: https://svnweb.freebsd.org/changeset/base/347511

Log:
  MFC r346073:
  urtw(4), otus(4), iwi(4): allow to set non-default MAC address via ifconfig(8)
  
  Was tested with Netgear WG111 v3 (RTL8187B, urtw(4)), STA mode.

Modified:
  stable/12/sys/dev/iwi/if_iwi.c
  stable/12/sys/dev/otus/if_otus.c
  stable/12/sys/dev/usb/wlan/if_urtw.c
Directory Properties:
  stable/12/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/11/sys/dev/iwi/if_iwi.c
  stable/11/sys/dev/otus/if_otus.c
  stable/11/sys/dev/usb/wlan/if_urtw.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/12/sys/dev/iwi/if_iwi.c
==
--- stable/12/sys/dev/iwi/if_iwi.c  Sun May 12 07:56:01 2019
(r347510)
+++ stable/12/sys/dev/iwi/if_iwi.c  Sun May 12 12:30:45 2019
(r347511)
@@ -2576,15 +2576,18 @@ static int
 iwi_config(struct iwi_softc *sc)
 {
struct ieee80211com *ic = >sc_ic;
+   struct ieee80211vap *vap = TAILQ_FIRST(>ic_vaps);
struct iwi_configuration config;
struct iwi_txpower power;
+   uint8_t *macaddr;
uint32_t data;
int error, i;
 
IWI_LOCK_ASSERT(sc);
 
-   DPRINTF(("Setting MAC address to %6D\n", ic->ic_macaddr, ":"));
-   error = iwi_cmd(sc, IWI_CMD_SET_MAC_ADDRESS, ic->ic_macaddr,
+   macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
+   DPRINTF(("Setting MAC address to %6D\n", macaddr, ":"));
+   error = iwi_cmd(sc, IWI_CMD_SET_MAC_ADDRESS, macaddr,
IEEE80211_ADDR_LEN);
if (error != 0)
return error;

Modified: stable/12/sys/dev/otus/if_otus.c
==
--- stable/12/sys/dev/otus/if_otus.cSun May 12 07:56:01 2019
(r347510)
+++ stable/12/sys/dev/otus/if_otus.cSun May 12 12:30:45 2019
(r347511)
@@ -3108,7 +3108,7 @@ otus_set_operating_mode(struct otus_softc *sc)
 */
IEEE80211_ADDR_COPY(bssid, zero_macaddr);
vap = TAILQ_FIRST(>ic_vaps);
-   macaddr = ic->ic_macaddr;
+   macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
 
switch (ic->ic_opmode) {
case IEEE80211_M_STA:

Modified: stable/12/sys/dev/usb/wlan/if_urtw.c
==
--- stable/12/sys/dev/usb/wlan/if_urtw.cSun May 12 07:56:01 2019
(r347510)
+++ stable/12/sys/dev/usb/wlan/if_urtw.cSun May 12 12:30:45 2019
(r347511)
@@ -752,6 +752,7 @@ static void urtw_free_tx_data_list(struct 
urtw_softc 
 static voidurtw_free_rx_data_list(struct urtw_softc *);
 static voidurtw_free_data_list(struct urtw_softc *,
struct urtw_data data[], int, int);
+static usb_error_t urtw_set_macaddr(struct urtw_softc *, const uint8_t *);
 static usb_error_t urtw_adapter_start(struct urtw_softc *);
 static usb_error_t urtw_adapter_start_b(struct urtw_softc *);
 static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t);
@@ -1187,9 +1188,23 @@ fail:
 }
 
 static usb_error_t
+urtw_set_macaddr(struct urtw_softc *sc, const uint8_t *macaddr)
+{
+   usb_error_t error;
+
+   urtw_write32_m(sc, URTW_MAC0, ((const uint32_t *)macaddr)[0]);
+   urtw_write16_m(sc, URTW_MAC4, ((const uint32_t *)macaddr)[1] & 0x);
+
+fail:
+   return (error);
+}
+
+static usb_error_t
 urtw_adapter_start(struct urtw_softc *sc)
 {
struct ieee80211com *ic = >sc_ic;
+   struct ieee80211vap *vap = TAILQ_FIRST(>ic_vaps);
+   const uint8_t *macaddr;
usb_error_t error;
 
error = urtw_reset(sc);
@@ -1209,8 +1224,11 @@ urtw_adapter_start(struct urtw_softc *sc)
if (error)
goto fail;
/* applying MAC address again.  */
-   urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]);
-   urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0x);
+   macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
+   urtw_set_macaddr(sc, macaddr);
+   if (error)
+   goto fail;
+
error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
if (error)
goto fail;
@@ -3180,6 +3198,8 @@ static usb_error_t
 urtw_8225v2b_rf_init(struct urtw_softc *sc)
 {
struct ieee80211com *ic = >sc_ic;
+   struct ieee80211vap *vap = TAILQ_FIRST(>ic_vaps);
+   const uint8_t *macaddr;
unsigned int i;
uint8_t data8;
usb_error_t error;
@@ -3227,8 +3247,10 @@ urtw_8225v2b_rf_init(struct urtw_softc *sc)
urtw_write8_m(sc, URTW_CONFIG1, data8);
 
/* applying MAC address again.  */
-   urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]);
-   urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0x);
+   macaddr = vap ? 

svn commit: r347511 - in stable: 11/sys/dev/iwi 11/sys/dev/otus 11/sys/dev/usb/wlan 12/sys/dev/iwi 12/sys/dev/otus 12/sys/dev/usb/wlan

2019-05-12 Thread Andriy Voskoboinyk
Author: avos
Date: Sun May 12 12:30:45 2019
New Revision: 347511
URL: https://svnweb.freebsd.org/changeset/base/347511

Log:
  MFC r346073:
  urtw(4), otus(4), iwi(4): allow to set non-default MAC address via ifconfig(8)
  
  Was tested with Netgear WG111 v3 (RTL8187B, urtw(4)), STA mode.

Modified:
  stable/11/sys/dev/iwi/if_iwi.c
  stable/11/sys/dev/otus/if_otus.c
  stable/11/sys/dev/usb/wlan/if_urtw.c
Directory Properties:
  stable/11/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/12/sys/dev/iwi/if_iwi.c
  stable/12/sys/dev/otus/if_otus.c
  stable/12/sys/dev/usb/wlan/if_urtw.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/11/sys/dev/iwi/if_iwi.c
==
--- stable/11/sys/dev/iwi/if_iwi.c  Sun May 12 07:56:01 2019
(r347510)
+++ stable/11/sys/dev/iwi/if_iwi.c  Sun May 12 12:30:45 2019
(r347511)
@@ -2549,16 +2549,19 @@ static int
 iwi_config(struct iwi_softc *sc)
 {
struct ieee80211com *ic = >sc_ic;
+   struct ieee80211vap *vap = TAILQ_FIRST(>ic_vaps);
struct iwi_configuration config;
struct iwi_rateset rs;
struct iwi_txpower power;
+   uint8_t *macaddr;
uint32_t data;
int error, i;
 
IWI_LOCK_ASSERT(sc);
 
-   DPRINTF(("Setting MAC address to %6D\n", ic->ic_macaddr, ":"));
-   error = iwi_cmd(sc, IWI_CMD_SET_MAC_ADDRESS, ic->ic_macaddr,
+   macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
+   DPRINTF(("Setting MAC address to %6D\n", macaddr, ":"));
+   error = iwi_cmd(sc, IWI_CMD_SET_MAC_ADDRESS, macaddr,
IEEE80211_ADDR_LEN);
if (error != 0)
return error;

Modified: stable/11/sys/dev/otus/if_otus.c
==
--- stable/11/sys/dev/otus/if_otus.cSun May 12 07:56:01 2019
(r347510)
+++ stable/11/sys/dev/otus/if_otus.cSun May 12 12:30:45 2019
(r347511)
@@ -3095,7 +3095,7 @@ otus_set_operating_mode(struct otus_softc *sc)
 */
IEEE80211_ADDR_COPY(bssid, zero_macaddr);
vap = TAILQ_FIRST(>ic_vaps);
-   macaddr = ic->ic_macaddr;
+   macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
 
switch (ic->ic_opmode) {
case IEEE80211_M_STA:

Modified: stable/11/sys/dev/usb/wlan/if_urtw.c
==
--- stable/11/sys/dev/usb/wlan/if_urtw.cSun May 12 07:56:01 2019
(r347510)
+++ stable/11/sys/dev/usb/wlan/if_urtw.cSun May 12 12:30:45 2019
(r347511)
@@ -744,6 +744,7 @@ static void urtw_free_tx_data_list(struct 
urtw_softc 
 static voidurtw_free_rx_data_list(struct urtw_softc *);
 static voidurtw_free_data_list(struct urtw_softc *,
struct urtw_data data[], int, int);
+static usb_error_t urtw_set_macaddr(struct urtw_softc *, const uint8_t *);
 static usb_error_t urtw_adapter_start(struct urtw_softc *);
 static usb_error_t urtw_adapter_start_b(struct urtw_softc *);
 static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t);
@@ -1179,9 +1180,23 @@ fail:
 }
 
 static usb_error_t
+urtw_set_macaddr(struct urtw_softc *sc, const uint8_t *macaddr)
+{
+   usb_error_t error;
+
+   urtw_write32_m(sc, URTW_MAC0, ((const uint32_t *)macaddr)[0]);
+   urtw_write16_m(sc, URTW_MAC4, ((const uint32_t *)macaddr)[1] & 0x);
+
+fail:
+   return (error);
+}
+
+static usb_error_t
 urtw_adapter_start(struct urtw_softc *sc)
 {
struct ieee80211com *ic = >sc_ic;
+   struct ieee80211vap *vap = TAILQ_FIRST(>ic_vaps);
+   const uint8_t *macaddr;
usb_error_t error;
 
error = urtw_reset(sc);
@@ -1201,8 +1216,11 @@ urtw_adapter_start(struct urtw_softc *sc)
if (error)
goto fail;
/* applying MAC address again.  */
-   urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]);
-   urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0x);
+   macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
+   urtw_set_macaddr(sc, macaddr);
+   if (error)
+   goto fail;
+
error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
if (error)
goto fail;
@@ -3185,6 +3203,8 @@ static usb_error_t
 urtw_8225v2b_rf_init(struct urtw_softc *sc)
 {
struct ieee80211com *ic = >sc_ic;
+   struct ieee80211vap *vap = TAILQ_FIRST(>ic_vaps);
+   const uint8_t *macaddr;
unsigned int i;
uint8_t data8;
usb_error_t error;
@@ -3232,8 +3252,10 @@ urtw_8225v2b_rf_init(struct urtw_softc *sc)
urtw_write8_m(sc, URTW_CONFIG1, data8);
 
/* applying MAC address again.  */
-   urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]);
-   urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 

Re: svn commit: r347484 - head/sys/kern

2019-05-12 Thread Bruce Evans

On Sat, 11 May 2019, Doug Moore wrote:


On 5/11/19 5:52 AM, Bruce Evans wrote:

On Sat, 11 May 2019, Doug Moore wrote:

+#ifdef HAVE_INLINE_FFS
+?? case sizeof(int):
+?? return (ffs(mask) - 1);
+#endif


This is unreachable, since sizeof(int) is 4 on all supported arches, and
sizeof(mask) is 8 on all arches.


Another FreeBSD developer has expressed to me that sizeof(mask) ought to
become 4 on some 32-bit arches before too long, and I added this case in
anticipation of that.?? I see now that I should have waited.


I also don't like the use of unsigned long for __fd_mask and bitstr_t.
This asks for a a pessimal type that is twice as wide as a machine
register, but is not so pessimal in practice since longs are rarely
implemented correctly except on systems with 16-bit machine registers.

The mask type u_daddr_t is both logically wrong (masks have nothing to
do with daddr_t's) and gives a pessimal bitstring type more often in
practice:
- in FreeBSD-4, [u_]daddr_t was 32 bits, so misusing it for bitstrings
  was pessimal on 64-bit arches
- expanding [u_]daddr_t to 64 bits in FreeBSD-5 (r96572-96851 only 17
  years ago) made it pessimal for bitstrings on 32-bit arches.

The pessimization would be smaller if ffs64() exists and is inlined to
32-bit ffs()'s.

Using the long long abomination asks for double the pessimizations and
machine dependencies as using long.  In practice, expanding long long
to larger than 64 bits would break ABIs so it is not much worse than
a spelling error for int64_t.

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svn commit: r347510 - head/sys/kern

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 07:56:01 2019
New Revision: 347510
URL: https://svnweb.freebsd.org/changeset/base/347510

Log:
  cache: fix a brainfart in r347505
  
  If bumping over the counter goes over the limit we have to decrement it back.
  
  Previous code would only bump the counter after adding the entry (thus 
allowing
  the cache to go over the limit).
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/kern/vfs_cache.c

Modified: head/sys/kern/vfs_cache.c
==
--- head/sys/kern/vfs_cache.c   Sun May 12 07:55:25 2019(r347509)
+++ head/sys/kern/vfs_cache.c   Sun May 12 07:56:01 2019(r347510)
@@ -1647,8 +1647,10 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, 
 * Avoid blowout in namecache entries.
 */
lnumcache = atomic_fetchadd_long(, 1) + 1;
-   if (__predict_false(lnumcache >= desiredvnodes * ncsizefactor))
+   if (__predict_false(lnumcache >= desiredvnodes * ncsizefactor)) {
+   atomic_add_long(, -1);
return;
+   }
 
cache_celockstate_init();
ndd = NULL;
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svn commit: r347509 - stable/11/sys/vm

2019-05-12 Thread Konstantin Belousov
Author: kib
Date: Sun May 12 07:55:25 2019
New Revision: 347509
URL: https://svnweb.freebsd.org/changeset/base/347509

Log:
  MFC r347150, r347180:
  Do not collapse objects with OBJ_NOSPLIT backing swap or default object.

Modified:
  stable/11/sys/vm/vm_object.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/vm/vm_object.c
==
--- stable/11/sys/vm/vm_object.cSun May 12 07:53:24 2019
(r347508)
+++ stable/11/sys/vm/vm_object.cSun May 12 07:55:25 2019
(r347509)
@@ -1777,8 +1777,8 @@ vm_object_collapse(vm_object_t object)
VM_OBJECT_WLOCK(backing_object);
if (backing_object->handle != NULL ||
(backing_object->type != OBJT_DEFAULT &&
-backing_object->type != OBJT_SWAP) ||
-   (backing_object->flags & OBJ_DEAD) ||
+   backing_object->type != OBJT_SWAP) ||
+   (backing_object->flags & (OBJ_DEAD | OBJ_NOSPLIT)) != 0 ||
object->handle != NULL ||
(object->type != OBJT_DEFAULT &&
 object->type != OBJT_SWAP) ||
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svn commit: r347508 - stable/12/sys/vm

2019-05-12 Thread Konstantin Belousov
Author: kib
Date: Sun May 12 07:53:24 2019
New Revision: 347508
URL: https://svnweb.freebsd.org/changeset/base/347508

Log:
  MFC r347150, r347180:
  Do not collapse objects with OBJ_NOSPLIT backing swap or default object.

Modified:
  stable/12/sys/vm/vm_object.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/vm/vm_object.c
==
--- stable/12/sys/vm/vm_object.cSun May 12 07:13:25 2019
(r347507)
+++ stable/12/sys/vm/vm_object.cSun May 12 07:53:24 2019
(r347508)
@@ -1748,8 +1748,8 @@ vm_object_collapse(vm_object_t object)
VM_OBJECT_WLOCK(backing_object);
if (backing_object->handle != NULL ||
(backing_object->type != OBJT_DEFAULT &&
-backing_object->type != OBJT_SWAP) ||
-   (backing_object->flags & OBJ_DEAD) ||
+   backing_object->type != OBJT_SWAP) ||
+   (backing_object->flags & (OBJ_DEAD | OBJ_NOSPLIT)) != 0 ||
object->handle != NULL ||
(object->type != OBJT_DEFAULT &&
 object->type != OBJT_SWAP) ||
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svn commit: r347507 - head/sys/sys

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 07:13:25 2019
New Revision: 347507
URL: https://svnweb.freebsd.org/changeset/base/347507

Log:
  seqc: fix sed-introduced typos (seqcuence -> sequence)
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/sys/seqc.h

Modified: head/sys/sys/seqc.h
==
--- head/sys/sys/seqc.h Sun May 12 07:11:44 2019(r347506)
+++ head/sys/sys/seqc.h Sun May 12 07:13:25 2019(r347507)
@@ -44,9 +44,9 @@ typedef uint32_t seqc_t;
  * seqc allows readers and writers to work with a consistent snapshot. 
Modifying
  * operations must be enclosed within a transaction delineated by
  * seqc_write_beg/seqc_write_end. The trick works by having the writer 
increment
- * the seqcuence number twice, at the beginning and end of the transaction.
- * The reader detects that the seqcuence number has not changed between its 
start
- * and end, and that the seqcuence number is even, to validate consistency.
+ * the sequence number twice, at the beginning and end of the transaction.
+ * The reader detects that the sequence number has not changed between its 
start
+ * and end, and that the sequence number is even, to validate consistency.
  *
  * Some fencing (both hard fencing and compiler barriers) may be needed,
  * depending on the cpu. Modern AMD cpus provide strong enough guarantees to 
not
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svn commit: r347506 - head/sys/amd64/amd64

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 07:11:44 2019
New Revision: 347506
URL: https://svnweb.freebsd.org/changeset/base/347506

Log:
  amd64: tidy up pagezero*/pagecopy (movq -> movl)
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/amd64/amd64/support.S

Modified: head/sys/amd64/amd64/support.S
==
--- head/sys/amd64/amd64/support.S  Sun May 12 06:59:22 2019
(r347505)
+++ head/sys/amd64/amd64/support.S  Sun May 12 07:11:44 2019
(r347506)
@@ -43,7 +43,7 @@
 /* Address: %rdi */
 ENTRY(pagezero_std)
PUSH_FRAME_POINTER
-   movq$PAGE_SIZE/8,%rcx
+   movl$PAGE_SIZE/8,%ecx
xorl%eax,%eax
rep
stosq
@@ -53,7 +53,7 @@ END(pagezero_std)
 
 ENTRY(pagezero_erms)
PUSH_FRAME_POINTER
-   movq$PAGE_SIZE,%rcx
+   movl$PAGE_SIZE,%ecx
xorl%eax,%eax
rep
stosb
@@ -66,7 +66,7 @@ END(pagezero_erms)
  */
 ENTRY(pagecopy)
PUSH_FRAME_POINTER
-   movq$PAGE_SIZE/8,%rcx
+   movl$PAGE_SIZE/8,%ecx
movq%rdi,%r9
movq%rsi,%rdi
movq%r9,%rsi
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svn commit: r347505 - head/sys/kern

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 06:59:22 2019
New Revision: 347505
URL: https://svnweb.freebsd.org/changeset/base/347505

Log:
  cache: bump numcache on entry, while here fix lnumcache type
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/kern/vfs_cache.c

Modified: head/sys/kern/vfs_cache.c
==
--- head/sys/kern/vfs_cache.c   Sun May 12 06:42:17 2019(r347504)
+++ head/sys/kern/vfs_cache.c   Sun May 12 06:59:22 2019(r347505)
@@ -1632,7 +1632,7 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, 
int flag;
int len;
bool neg_locked;
-   int lnumcache;
+   u_long lnumcache;
 
CTR3(KTR_VFS, "cache_enter(%p, %p, %s)", dvp, vp, cnp->cn_nameptr);
VNASSERT(vp == NULL || (vp->v_iflag & VI_DOOMED) == 0, vp,
@@ -1646,7 +1646,8 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, 
/*
 * Avoid blowout in namecache entries.
 */
-   if (__predict_false(numcache >= desiredvnodes * ncsizefactor))
+   lnumcache = atomic_fetchadd_long(, 1) + 1;
+   if (__predict_false(lnumcache >= desiredvnodes * ncsizefactor))
return;
 
cache_celockstate_init();
@@ -1825,7 +1826,6 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, 
ncp->nc_name);
}
cache_enter_unlock();
-   lnumcache = atomic_fetchadd_long(, 1) + 1;
if (numneg * ncnegfactor > lnumcache)
cache_negative_zap_one();
cache_free(ndd);
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svn commit: r347504 - head/sys/amd64/amd64

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 06:42:17 2019
New Revision: 347504
URL: https://svnweb.freebsd.org/changeset/base/347504

Log:
  amd64: fixup MEMMOVE comment (10 -> r10)
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/amd64/amd64/support.S

Modified: head/sys/amd64/amd64/support.S
==
--- head/sys/amd64/amd64/support.S  Sun May 12 06:39:30 2019
(r347503)
+++ head/sys/amd64/amd64/support.S  Sun May 12 06:42:17 2019
(r347504)
@@ -205,7 +205,7 @@ END(memcmp)
  * rsi - source
  * rdx - count
  *
- * The macro possibly clobbers the above and: rcx, r8, r9, 10
+ * The macro possibly clobbers the above and: rcx, r8, r9, r10
  * It does not clobber rax nor r11.
  */
 .macro MEMMOVE erms overlap begin end
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svn commit: r347503 - head/sys/kern

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 06:39:30 2019
New Revision: 347503
URL: https://svnweb.freebsd.org/changeset/base/347503

Log:
  cache: push sdt probes in cache_zap_locked to code doing the work
  
  Avoids branching to check which probe to evaluate. Very same check was
  being done later to do the actual work.
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/kern/vfs_cache.c

Modified: head/sys/kern/vfs_cache.c
==
--- head/sys/kern/vfs_cache.c   Sun May 12 06:36:54 2019(r347502)
+++ head/sys/kern/vfs_cache.c   Sun May 12 06:39:30 2019(r347503)
@@ -851,19 +851,16 @@ cache_zap_locked(struct namecache *ncp, bool neg_locke
 
CTR2(KTR_VFS, "cache_zap(%p) vp %p", ncp,
(ncp->nc_flag & NCF_NEGATIVE) ? NULL : ncp->nc_vp);
+   LIST_REMOVE(ncp, nc_hash);
if (!(ncp->nc_flag & NCF_NEGATIVE)) {
SDT_PROBE3(vfs, namecache, zap, done, ncp->nc_dvp,
ncp->nc_name, ncp->nc_vp);
-   } else {
-   SDT_PROBE3(vfs, namecache, zap_negative, done, ncp->nc_dvp,
-   ncp->nc_name, ncp->nc_neghits);
-   }
-   LIST_REMOVE(ncp, nc_hash);
-   if (!(ncp->nc_flag & NCF_NEGATIVE)) {
TAILQ_REMOVE(>nc_vp->v_cache_dst, ncp, nc_dst);
if (ncp == ncp->nc_vp->v_cache_dd)
ncp->nc_vp->v_cache_dd = NULL;
} else {
+   SDT_PROBE3(vfs, namecache, zap_negative, done, ncp->nc_dvp,
+   ncp->nc_name, ncp->nc_neghits);
cache_negative_remove(ncp, neg_locked);
}
if (ncp->nc_flag & NCF_ISDOTDOT) {
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svn commit: r347502 - in head/sys: amd64/amd64 amd64/include i386/i386 i386/include x86/include x86/x86

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 06:36:54 2019
New Revision: 347502
URL: https://svnweb.freebsd.org/changeset/base/347502

Log:
  x86: store pending bitmapped IPIs in per-cpu areas
  
  This gets rid of the global cpu_ipi_pending array.
  
  While replace cmpset with fcmpset in the delivery code and opportunistically
  check if given IPI is already pending.
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/amd64/amd64/mp_machdep.c
  head/sys/amd64/include/pcpu.h
  head/sys/i386/i386/mp_machdep.c
  head/sys/i386/include/pcpu.h
  head/sys/x86/include/x86_smp.h
  head/sys/x86/x86/mp_x86.c

Modified: head/sys/amd64/amd64/mp_machdep.c
==
--- head/sys/amd64/amd64/mp_machdep.c   Sun May 12 06:34:58 2019
(r347501)
+++ head/sys/amd64/amd64/mp_machdep.c   Sun May 12 06:36:54 2019
(r347502)
@@ -193,7 +193,6 @@ cpu_mp_start(void)
/* Initialize the logical ID to APIC ID table. */
for (i = 0; i < MAXCPU; i++) {
cpu_apic_ids[i] = -1;
-   cpu_ipi_pending[i] = 0;
}
 
/* Install an inter-CPU IPI for TLB invalidation */

Modified: head/sys/amd64/include/pcpu.h
==
--- head/sys/amd64/include/pcpu.h   Sun May 12 06:34:58 2019
(r347501)
+++ head/sys/amd64/include/pcpu.h   Sun May 12 06:36:54 2019
(r347502)
@@ -84,7 +84,8 @@ _Static_assert(sizeof(struct monitorbuf) == 128, "2x c
uint32_t pc_pcid_gen;   \
uint32_t pc_smp_tlb_done;   /* TLB op acknowledgement */\
uint32_t pc_ibpb_set;   \
-   char__pad[3288] /* pad to UMA_PCPU_ALLOC_SIZE */
+   u_int   pc_ipi_bitmap;  \
+   char__pad[3284] /* pad to UMA_PCPU_ALLOC_SIZE */
 
 #definePC_DBREG_CMD_NONE   0
 #definePC_DBREG_CMD_LOAD   1

Modified: head/sys/i386/i386/mp_machdep.c
==
--- head/sys/i386/i386/mp_machdep.c Sun May 12 06:34:58 2019
(r347501)
+++ head/sys/i386/i386/mp_machdep.c Sun May 12 06:36:54 2019
(r347502)
@@ -153,7 +153,6 @@ cpu_mp_start(void)
/* Initialize the logical ID to APIC ID table. */
for (i = 0; i < MAXCPU; i++) {
cpu_apic_ids[i] = -1;
-   cpu_ipi_pending[i] = 0;
}
 
/* Install an inter-CPU IPI for TLB invalidation */

Modified: head/sys/i386/include/pcpu.h
==
--- head/sys/i386/include/pcpu.hSun May 12 06:34:58 2019
(r347501)
+++ head/sys/i386/include/pcpu.hSun May 12 06:36:54 2019
(r347502)
@@ -87,7 +87,8 @@ _Static_assert(sizeof(struct monitorbuf) == 128, "2x c
caddr_t pc_pmap_eh_ptep;
\
uint32_t pc_smp_tlb_done;   /* TLB op acknowledgement */\
uint32_t pc_ibpb_set;   \
-   char__pad[3610]
+   u_int   pc_ipi_bitmap;  \
+   char__pad[3606]
 
 #ifdef _KERNEL
 

Modified: head/sys/x86/include/x86_smp.h
==
--- head/sys/x86/include/x86_smp.h  Sun May 12 06:34:58 2019
(r347501)
+++ head/sys/x86/include/x86_smp.h  Sun May 12 06:36:54 2019
(r347502)
@@ -34,7 +34,6 @@ extern char *bootSTK;
 extern void *bootstacks[];
 extern unsigned int boot_address;
 extern unsigned int bootMP_size;
-extern volatile u_int cpu_ipi_pending[];
 extern volatile int aps_ready;
 extern struct mtx ap_boot_mtx;
 extern int cpu_logical;

Modified: head/sys/x86/x86/mp_x86.c
==
--- head/sys/x86/x86/mp_x86.c   Sun May 12 06:34:58 2019(r347501)
+++ head/sys/x86/x86/mp_x86.c   Sun May 12 06:36:54 2019(r347502)
@@ -137,9 +137,6 @@ _Static_assert(MAXCPU <= MAX_APIC_ID,
 _Static_assert(xAPIC_MAX_APIC_ID <= MAX_APIC_ID,
 "xAPIC_MAX_APIC_ID cannot be larger that MAX_APIC_ID");
 
-/* Holds pending bitmap based IPIs per CPU */
-volatile u_int cpu_ipi_pending[MAXCPU];
-
 static voidrelease_aps(void *dummy);
 static voidcpustop_handler_post(u_int cpu);
 
@@ -1224,19 +1221,24 @@ ipi_startup(int apic_id, int vector)
 void
 ipi_send_cpu(int cpu, u_int ipi)
 {
-   u_int bitmap, old_pending, new_pending;
+   u_int bitmap, old, new;
+   u_int *cpu_bitmap;
 
KASSERT(cpu_apic_ids[cpu] != -1, ("IPI to non-existent CPU %d", cpu));
 
if (IPI_IS_BITMAPED(ipi)) {
bitmap = 1 << ipi;
ipi = IPI_BITMAP_VECTOR;
-   do {
-   

svn commit: r347501 - head/sys/amd64/amd64

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 06:34:58 2019
New Revision: 347501
URL: https://svnweb.freebsd.org/changeset/base/347501

Log:
  amd64: stop re-reading curpc in suword
  
  Plugs re-reads missed in r341719
  
  Sponsored by: The FreeBSD Foundation

Modified:
  head/sys/amd64/amd64/support.S

Modified: head/sys/amd64/amd64/support.S
==
--- head/sys/amd64/amd64/support.S  Sun May 12 06:32:46 2019
(r347500)
+++ head/sys/amd64/amd64/support.S  Sun May 12 06:34:58 2019
(r347501)
@@ -1083,7 +1083,6 @@ ENTRY(suword_nosmap)
 
movq%rsi,(%rdi)
xorl%eax,%eax
-   movqPCPU(CURPCB),%rcx
movq%rax,PCB_ONFAULT(%rcx)
POP_FRAME_POINTER
ret
@@ -1102,7 +1101,6 @@ ENTRY(suword_smap)
movq%rsi,(%rdi)
clac
xorl%eax,%eax
-   movqPCPU(CURPCB),%rcx
movq%rax,PCB_ONFAULT(%rcx)
POP_FRAME_POINTER
ret
@@ -1119,7 +1117,6 @@ ENTRY(suword32_nosmap)
 
movl%esi,(%rdi)
xorl%eax,%eax
-   movqPCPU(CURPCB),%rcx
movq%rax,PCB_ONFAULT(%rcx)
POP_FRAME_POINTER
ret
@@ -1138,7 +1135,6 @@ ENTRY(suword32_smap)
movl%esi,(%rdi)
clac
xorl%eax,%eax
-   movqPCPU(CURPCB),%rcx
movq%rax,PCB_ONFAULT(%rcx)
POP_FRAME_POINTER
ret
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svn commit: r347500 - head/sys/libkern

2019-05-12 Thread Mateusz Guzik
Author: mjg
Date: Sun May 12 06:32:46 2019
New Revision: 347500
URL: https://svnweb.freebsd.org/changeset/base/347500

Log:
  random(4): depessimize arc4random
  
  - __predict_false reseeding on entry as it is almost never true.
  - don't blindly atomic_cmpset as on x86 it ends up dirtying the cacheline.
  it almost ever succeeds per above
  - fetch the timestamp prior to getting the cpu number
  
  Reviewed by:  cem
  Approved by:  secteam (delphij)
  Sponsored by: The FreeBSD Foundation
  Differential Revision:https://reviews.freebsd.org/D20242

Modified:
  head/sys/libkern/arc4random.c

Modified: head/sys/libkern/arc4random.c
==
--- head/sys/libkern/arc4random.c   Sat May 11 22:58:25 2019
(r347499)
+++ head/sys/libkern/arc4random.c   Sun May 12 06:32:46 2019
(r347500)
@@ -173,18 +173,20 @@ arc4rand(void *ptr, u_int len, int reseed)
u_int length;
u_int8_t *p;
 
-   if (reseed || atomic_cmpset_int(_iniseed_state, 
ARC4_ENTR_HAVE, ARC4_ENTR_SEED))
+   if (__predict_false(reseed ||
+   (arc4rand_iniseed_state == ARC4_ENTR_HAVE &&
+   atomic_cmpset_int(_iniseed_state, ARC4_ENTR_HAVE, 
ARC4_ENTR_SEED
CHACHA20_FOREACH(chacha20)
chacha20_randomstir(chacha20);
 
-   chacha20 = [curcpu];
getmicrouptime();
+   chacha20 = [curcpu];
/* We may get unlucky and be migrated off this CPU, but that is 
expected to be infrequent */
if ((chacha20->numbytes > CHACHA20_RESEED_BYTES) || (tv.tv_sec > 
chacha20->t_reseed))
chacha20_randomstir(chacha20);
 
-   mtx_lock(>mtx);
p = ptr;
+   mtx_lock(>mtx);
while (len) {
length = MIN(CHACHA20_BUFFER_SIZE, len);
chacha_encrypt_bytes(>ctx, chacha20->m_buffer, p, 
length);
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