svn commit: r368113 - in head/sys: amd64/conf i386/conf
Author: br Date: Fri Nov 27 21:37:48 2020 New Revision: 368113 URL: https://svnweb.freebsd.org/changeset/base/368113 Log: o Move options IOMMU from Debugging section back to the Bus section where it originally was. The bug introduced in r366267. o Remove options IOMMU from i386/MINIMAL as we don't have it in i386/GENERIC. Reported by: Harry Schmalzbauer Reviewed by: kib Sponsored by: Innovate DSbD Differential Revision:https://reviews.freebsd.org/D27399 Modified: head/sys/amd64/conf/GENERIC head/sys/amd64/conf/MINIMAL head/sys/i386/conf/MINIMAL Modified: head/sys/amd64/conf/GENERIC == --- head/sys/amd64/conf/GENERIC Fri Nov 27 20:46:02 2020(r368112) +++ head/sys/amd64/conf/GENERIC Fri Nov 27 21:37:48 2020(r368113) @@ -102,7 +102,6 @@ options WITNESS # Enable checks to detect deadlocks optionsWITNESS_SKIPSPIN# Don't run witness on spinlocks for speed optionsMALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones optionsVERBOSE_SYSINIT=0 # Support debug.verbose_sysinit, off by default -optionsIOMMU # Kernel Sanitizers #options COVERAGE# Generic kernel coverage. Used by KCOV @@ -128,6 +127,7 @@ device cpufreq # Bus support. device acpi +optionsIOMMU device pci optionsPCI_HP # PCI-Express native HotPlug optionsPCI_IOV # PCI SR-IOV support Modified: head/sys/amd64/conf/MINIMAL == --- head/sys/amd64/conf/MINIMAL Fri Nov 27 20:46:02 2020(r368112) +++ head/sys/amd64/conf/MINIMAL Fri Nov 27 21:37:48 2020(r368113) @@ -93,7 +93,6 @@ options WITNESS # Enable checks to detect deadlocks optionsWITNESS_SKIPSPIN# Don't run witness on spinlocks for speed optionsMALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones optionsVERBOSE_SYSINIT=0 # Support debug.verbose_sysinit, off by default -optionsIOMMU # Make an SMP-capable kernel by default optionsSMP # Symmetric MultiProcessor Kernel @@ -104,6 +103,7 @@ device cpufreq # Bus support. device acpi +optionsIOMMU device pci # atkbdc0 controls both the keyboard and the PS/2 mouse Modified: head/sys/i386/conf/MINIMAL == --- head/sys/i386/conf/MINIMAL Fri Nov 27 20:46:02 2020(r368112) +++ head/sys/i386/conf/MINIMAL Fri Nov 27 21:37:48 2020(r368113) @@ -93,7 +93,6 @@ options WITNESS # Enable checks to detect deadlocks optionsWITNESS_SKIPSPIN# Don't run witness on spinlocks for speed optionsMALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones optionsVERBOSE_SYSINIT=0 # Support debug.verbose_sysinit, off by default -optionsIOMMU # Make an SMP-capable kernel by default optionsSMP # Symmetric MultiProcessor Kernel ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r367736 - in head/sys: arm64/include arm64/iommu conf
Author: br
Date: Mon Nov 16 21:55:52 2020
New Revision: 367736
URL: https://svnweb.freebsd.org/changeset/base/367736
Log:
Introduce IOMMU support for arm64 platform.
This adds an arm64 iommu interface and a driver for Arm System Memory
Management Unit version 3.2 (ARM SMMU v3.2) specified in ARM IHI 0070C
document.
Hardware overview is provided in the header of smmu.c file.
The support is disabled by default. To enable add 'options IOMMU' to your
kernel configuration file.
The support was developed on Arm Neoverse N1 System Development Platform
(ARM N1SDP), kindly provided by ARM Ltd.
Currently, PCI-based devices and ACPI platforms are supported only.
The support was tested on IOMMU-enabled Marvell SATA controller,
Realtek Ethernet controller and a TI xHCI USB controller with a low to
medium load only.
Many thanks to Konstantin Belousov for help forming the generic IOMMU
framework that is vital for this project; to Andrew Turner for adding
IOMMU support to MSI interrupt code; to Mark Johnston for help with SMMU
page management; to John Baldwin for explaining various IOMMU bits.
Reviewed by: mmel
Relnotes: yes
Sponsored by: DARPA / AFRL
Sponsored by: Innovate UK (Digital Security by Design programme)
Differential Revision:https://reviews.freebsd.org/D24618
Added:
head/sys/arm64/include/iommu.h (contents, props changed)
head/sys/arm64/iommu/
head/sys/arm64/iommu/iommu.c (contents, props changed)
head/sys/arm64/iommu/iommu.h (contents, props changed)
head/sys/arm64/iommu/iommu_if.m (contents, props changed)
head/sys/arm64/iommu/smmu.c (contents, props changed)
head/sys/arm64/iommu/smmu_acpi.c (contents, props changed)
head/sys/arm64/iommu/smmu_quirks.c (contents, props changed)
head/sys/arm64/iommu/smmureg.h (contents, props changed)
head/sys/arm64/iommu/smmuvar.h (contents, props changed)
Modified:
head/sys/conf/files.arm64
Added: head/sys/arm64/include/iommu.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/include/iommu.h Mon Nov 16 21:55:52 2020
(r367736)
@@ -0,0 +1,11 @@
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD$ */
+
+#ifndef_MACHINE_IOMMU_H_
+#define_MACHINE_IOMMU_H_
+
+#include
+
+#endif /* !_MACHINE_IOMMU_H_ */
Added: head/sys/arm64/iommu/iommu.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/iommu/iommu.cMon Nov 16 21:55:52 2020
(r367736)
@@ -0,0 +1,397 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Portions of this work was supported by Innovate UK project 105694,
+ * "Digital Security by Design (DSbD) Technology Platform Prototype".
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_platform.h"
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "iommu.h"
+#include "iommu_if.h"
+
+static MALLOC_DEFINE(M_IOMMU, "IOMMU", "IOMMU framework");
+
+#define
svn commit: r367726 - head/sys/dev/iommu
Author: br
Date: Mon Nov 16 15:37:09 2020
New Revision: 367726
URL: https://svnweb.freebsd.org/changeset/base/367726
Log:
Fix a bug in assertion: entry flags also includes IOMMU_MAP_ENTRY_UNMAPPED.
The entry->flags field is initialized in iommu_gas_init_domain().
Reviewed by: kib
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D27235
Modified:
head/sys/dev/iommu/iommu_gas.c
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Mon Nov 16 15:29:52 2020
(r367725)
+++ head/sys/dev/iommu/iommu_gas.c Mon Nov 16 15:37:09 2020
(r367726)
@@ -258,7 +258,8 @@ iommu_gas_fini_domain(struct iommu_domain *domain)
entry = RB_MIN(iommu_gas_entries_tree, >rb_root);
KASSERT(entry->start == 0, ("start entry start %p", domain));
KASSERT(entry->end == IOMMU_PAGE_SIZE, ("start entry end %p", domain));
- KASSERT(entry->flags == IOMMU_MAP_ENTRY_PLACE,
+ KASSERT(entry->flags ==
+ (IOMMU_MAP_ENTRY_PLACE | IOMMU_MAP_ENTRY_UNMAPPED),
("start entry flags %p", domain));
RB_REMOVE(iommu_gas_entries_tree, >rb_root, entry);
iommu_gas_free_entry(domain, entry);
@@ -266,7 +267,8 @@ iommu_gas_fini_domain(struct iommu_domain *domain)
entry = RB_MAX(iommu_gas_entries_tree, >rb_root);
KASSERT(entry->start == domain->end, ("end entry start %p", domain));
KASSERT(entry->end == domain->end, ("end entry end %p", domain));
- KASSERT(entry->flags == IOMMU_MAP_ENTRY_PLACE,
+ KASSERT(entry->flags ==
+ (IOMMU_MAP_ENTRY_PLACE | IOMMU_MAP_ENTRY_UNMAPPED),
("end entry flags %p", domain));
RB_REMOVE(iommu_gas_entries_tree, >rb_root, entry);
iommu_gas_free_entry(domain, entry);
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svn commit: r367725 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Mon Nov 16 15:29:52 2020
New Revision: 367725
URL: https://svnweb.freebsd.org/changeset/base/367725
Log:
Add device_t member to struct iommu.
This is needed on arm64 for the interface between iommu framework
and iommu controller drivers.
Reviewed by: kib
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D27229
Modified:
head/sys/dev/iommu/iommu.h
head/sys/x86/iommu/intel_drv.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Mon Nov 16 11:58:22 2020(r367724)
+++ head/sys/dev/iommu/iommu.h Mon Nov 16 15:29:52 2020(r367725)
@@ -67,6 +67,7 @@ struct iommu_map_entry {
struct iommu_unit {
struct mtx lock;
+ device_t dev;
int unit;
int dma_enabled;
Modified: head/sys/x86/iommu/intel_drv.c
==
--- head/sys/x86/iommu/intel_drv.c Mon Nov 16 11:58:22 2020
(r367724)
+++ head/sys/x86/iommu/intel_drv.c Mon Nov 16 15:29:52 2020
(r367725)
@@ -411,6 +411,7 @@ dmar_attach(device_t dev)
unit = device_get_softc(dev);
unit->dev = dev;
unit->iommu.unit = device_get_unit(dev);
+ unit->iommu.dev = dev;
dmaru = dmar_find_by_index(unit->iommu.unit);
if (dmaru == NULL)
return (EINVAL);
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svn commit: r367282 - in head/sys/arm64: arm64 include
Author: br
Date: Mon Nov 2 19:56:15 2020
New Revision: 367282
URL: https://svnweb.freebsd.org/changeset/base/367282
Log:
Add routines for ARM System MMU (SMMU) pmap management.
Reviewed by: markj
Discussed with: kib
Sponsored by: DARPA, Innovate UK
Differential Revision:https://reviews.freebsd.org/D26877
Modified:
head/sys/arm64/arm64/pmap.c
head/sys/arm64/include/pmap.h
Modified: head/sys/arm64/arm64/pmap.c
==
--- head/sys/arm64/arm64/pmap.c Mon Nov 2 19:20:06 2020(r367281)
+++ head/sys/arm64/arm64/pmap.c Mon Nov 2 19:56:15 2020(r367282)
@@ -3605,6 +3605,184 @@ restart:
}
/*
+ * Add a single SMMU entry. This function does not sleep.
+ */
+int
+pmap_senter(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
+vm_prot_t prot, u_int flags)
+{
+ pd_entry_t *pde;
+ pt_entry_t new_l3, orig_l3;
+ pt_entry_t *l3;
+ vm_page_t mpte;
+ int lvl;
+ int rv;
+
+ PMAP_ASSERT_STAGE1(pmap);
+ KASSERT(va < VM_MAXUSER_ADDRESS, ("wrong address space"));
+
+ va = trunc_page(va);
+ new_l3 = (pt_entry_t)(pa | ATTR_DEFAULT |
+ ATTR_S1_IDX(VM_MEMATTR_DEVICE) | L3_PAGE);
+ if ((prot & VM_PROT_WRITE) == 0)
+ new_l3 |= ATTR_S1_AP(ATTR_S1_AP_RO);
+ new_l3 |= ATTR_S1_XN; /* Execute never. */
+ new_l3 |= ATTR_S1_AP(ATTR_S1_AP_USER);
+ new_l3 |= ATTR_S1_nG; /* Non global. */
+
+ CTR2(KTR_PMAP, "pmap_senter: %.16lx -> %.16lx", va, pa);
+
+ PMAP_LOCK(pmap);
+
+ /*
+* In the case that a page table page is not
+* resident, we are creating it here.
+*/
+retry:
+ pde = pmap_pde(pmap, va, );
+ if (pde != NULL && lvl == 2) {
+ l3 = pmap_l2_to_l3(pde, va);
+ } else {
+ mpte = _pmap_alloc_l3(pmap, pmap_l2_pindex(va), NULL);
+ if (mpte == NULL) {
+ CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
+ rv = KERN_RESOURCE_SHORTAGE;
+ goto out;
+ }
+ goto retry;
+ }
+
+ orig_l3 = pmap_load(l3);
+ KASSERT(!pmap_l3_valid(orig_l3), ("l3 is valid"));
+
+ /* New mapping */
+ pmap_store(l3, new_l3);
+ pmap_resident_count_inc(pmap, 1);
+ dsb(ishst);
+
+ rv = KERN_SUCCESS;
+out:
+ PMAP_UNLOCK(pmap);
+
+ return (rv);
+}
+
+/*
+ * Remove a single SMMU entry.
+ */
+int
+pmap_sremove(pmap_t pmap, vm_offset_t va)
+{
+ pt_entry_t *pte;
+ int lvl;
+ int rc;
+
+ PMAP_LOCK(pmap);
+
+ pte = pmap_pte(pmap, va, );
+ KASSERT(lvl == 3,
+ ("Invalid SMMU pagetable level: %d != 3", lvl));
+
+ if (pte != NULL) {
+ pmap_resident_count_dec(pmap, 1);
+ pmap_clear(pte);
+ rc = KERN_SUCCESS;
+ } else
+ rc = KERN_FAILURE;
+
+ PMAP_UNLOCK(pmap);
+
+ return (rc);
+}
+
+/*
+ * Remove all the allocated L1, L2 pages from SMMU pmap.
+ * All the L3 entires must be cleared in advance, otherwise
+ * this function panics.
+ */
+void
+pmap_sremove_pages(pmap_t pmap)
+{
+ pd_entry_t l0e, *l1, l1e, *l2, l2e;
+ pt_entry_t *l3, l3e;
+ vm_page_t m, m0, m1;
+ vm_offset_t sva;
+ vm_paddr_t pa;
+ vm_paddr_t pa0;
+ vm_paddr_t pa1;
+ int i, j, k, l;
+
+ PMAP_LOCK(pmap);
+
+ for (sva = VM_MINUSER_ADDRESS, i = pmap_l0_index(sva);
+ (i < Ln_ENTRIES && sva < VM_MAXUSER_ADDRESS); i++) {
+ l0e = pmap->pm_l0[i];
+ if ((l0e & ATTR_DESCR_VALID) == 0) {
+ sva += L0_SIZE;
+ continue;
+ }
+ pa0 = l0e & ~ATTR_MASK;
+ m0 = PHYS_TO_VM_PAGE(pa0);
+ l1 = (pd_entry_t *)PHYS_TO_DMAP(pa0);
+
+ for (j = pmap_l1_index(sva); j < Ln_ENTRIES; j++) {
+ l1e = l1[j];
+ if ((l1e & ATTR_DESCR_VALID) == 0) {
+ sva += L1_SIZE;
+ continue;
+ }
+ if ((l1e & ATTR_DESCR_MASK) == L1_BLOCK) {
+ sva += L1_SIZE;
+ continue;
+ }
+ pa1 = l1e & ~ATTR_MASK;
+ m1 = PHYS_TO_VM_PAGE(pa1);
+ l2 = (pd_entry_t *)PHYS_TO_DMAP(pa1);
+
+ for (k = pmap_l2_index(sva); k < Ln_ENTRIES; k++) {
+ l2e = l2[k];
+ if ((l2e & ATTR_DESCR_VALID) == 0) {
+ sva += L2_SIZE;
+ continue;
+ }
+ pa = l2e & ~ATTR_MASK;
+ m =
svn commit: r367084 - head/sys/arm64/arm64
Author: br Date: Tue Oct 27 15:18:10 2020 New Revision: 367084 URL: https://svnweb.freebsd.org/changeset/base/367084 Log: Take the ITS device lock around gicv3_its_release_irqsrc() since that function checks that the mutex lock is owned. This fixes 'devctl disable re0' operation. Sponsored by: Innovate DSbD Differential Revision:https://reviews.freebsd.org/D26904 Modified: head/sys/arm64/arm64/gicv3_its.c Modified: head/sys/arm64/arm64/gicv3_its.c == --- head/sys/arm64/arm64/gicv3_its.cTue Oct 27 15:10:50 2020 (r367083) +++ head/sys/arm64/arm64/gicv3_its.cTue Oct 27 15:18:10 2020 (r367084) @@ -1418,7 +1418,9 @@ gicv3_its_release_msix(device_t dev, device_t child, s sc = device_get_softc(dev); girq = (struct gicv3_its_irqsrc *)isrc; + mtx_lock_spin(>sc_its_dev_lock); gicv3_its_release_irqsrc(sc, girq); + mtx_unlock_spin(>sc_its_dev_lock); its_dev->lpis.lpi_busy--; if (its_dev->lpis.lpi_busy == 0) ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r367085 - head/sys/arm64/include
Author: br
Date: Tue Oct 27 15:29:53 2020
New Revision: 367085
URL: https://svnweb.freebsd.org/changeset/base/367085
Log:
o Add the domain member to the struct bus_dma_tag_common as required by
busdma_iommu.c.
o Add tag_set_domain() pointer to the struct bus_dma_impl as well.
Sponsored by: Innovate DSbD
Modified:
head/sys/arm64/include/bus_dma_impl.h
Modified: head/sys/arm64/include/bus_dma_impl.h
==
--- head/sys/arm64/include/bus_dma_impl.h Tue Oct 27 15:18:10 2020
(r367084)
+++ head/sys/arm64/include/bus_dma_impl.h Tue Oct 27 15:29:53 2020
(r367085)
@@ -48,6 +48,7 @@ struct bus_dma_tag_common {
bus_dma_lock_t *lockfunc;
void *lockfuncarg;
int ref_count;
+ int domain;
};
struct bus_dma_impl {
@@ -58,6 +59,7 @@ struct bus_dma_impl {
bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
void *lockfuncarg, bus_dma_tag_t *dmat);
int (*tag_destroy)(bus_dma_tag_t dmat);
+ int (*tag_set_domain)(bus_dma_tag_t);
bool (*id_mapped)(bus_dma_tag_t, vm_paddr_t, bus_size_t);
int (*map_create)(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp);
int (*map_destroy)(bus_dma_tag_t dmat, bus_dmamap_t map);
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svn commit: r367037 - head/sys/arm64/arm64
Author: br
Date: Sun Oct 25 10:08:46 2020
New Revision: 367037
URL: https://svnweb.freebsd.org/changeset/base/367037
Log:
Add IOMMU support to GICv3 Interrupt Translation Service (ITS) driver.
Submitted by: andrew
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D26878
Modified:
head/sys/arm64/arm64/gicv3_its.c
Modified: head/sys/arm64/arm64/gicv3_its.c
==
--- head/sys/arm64/arm64/gicv3_its.cSun Oct 25 07:48:07 2020
(r367036)
+++ head/sys/arm64/arm64/gicv3_its.cSun Oct 25 10:08:46 2020
(r367037)
@@ -32,6 +32,7 @@
#include "opt_acpi.h"
#include "opt_platform.h"
+#include "opt_iommu.h"
#include
__FBSDID("$FreeBSD$");
@@ -47,6 +48,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -56,6 +59,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
#include
@@ -72,6 +76,11 @@ __FBSDID("$FreeBSD$");
#include
#include
+#ifdef IOMMU
+#include
+#include
+#endif
+
#include "pcib_if.h"
#include "pic_if.h"
#include "msi_if.h"
@@ -269,6 +278,7 @@ struct gicv3_its_softc {
#defineITS_FLAGS_ERRATA_CAVIUM_22375 0x0004
u_int sc_its_flags;
booltrace_enable;
+ vm_page_t ma; /* fake msi page */
};
static void *conf_base;
@@ -321,6 +331,10 @@ static msi_release_msi_t gicv3_its_release_msi;
static msi_alloc_msix_t gicv3_its_alloc_msix;
static msi_release_msix_t gicv3_its_release_msix;
static msi_map_msi_t gicv3_its_map_msi;
+#ifdef IOMMU
+static msi_iommu_init_t gicv3_iommu_init;
+static msi_iommu_deinit_t gicv3_iommu_deinit;
+#endif
static void its_cmd_movi(device_t, struct gicv3_its_irqsrc *);
static void its_cmd_mapc(device_t, struct its_col *, uint8_t);
@@ -352,6 +366,10 @@ static device_method_t gicv3_its_methods[] = {
DEVMETHOD(msi_alloc_msix, gicv3_its_alloc_msix),
DEVMETHOD(msi_release_msix, gicv3_its_release_msix),
DEVMETHOD(msi_map_msi, gicv3_its_map_msi),
+#ifdef IOMMU
+ DEVMETHOD(msi_iommu_init, gicv3_iommu_init),
+ DEVMETHOD(msi_iommu_deinit, gicv3_iommu_deinit),
+#endif
/* End */
DEVMETHOD_END
@@ -803,8 +821,9 @@ static int
gicv3_its_attach(device_t dev)
{
struct gicv3_its_softc *sc;
- uint32_t iidr;
int domain, err, i, rid;
+ uint64_t phys;
+ uint32_t iidr;
sc = device_get_softc(dev);
@@ -820,6 +839,11 @@ gicv3_its_attach(device_t dev)
return (ENXIO);
}
+ phys = rounddown2(vtophys(rman_get_virtual(sc->sc_its_res)) +
+ GITS_TRANSLATER, PAGE_SIZE);
+ sc->ma = malloc(sizeof(struct vm_page), M_DEVBUF, M_WAITOK | M_ZERO);
+ vm_page_initfake(sc->ma, phys, VM_MEMATTR_DEFAULT);
+
iidr = gic_its_read_4(sc, GITS_IIDR);
for (i = 0; i < nitems(its_quirks); i++) {
if ((iidr & its_quirks[i].iidr_mask) == its_quirks[i].iidr) {
@@ -1418,6 +1442,33 @@ gicv3_its_map_msi(device_t dev, device_t child, struct
return (0);
}
+
+#ifdef IOMMU
+static int
+gicv3_iommu_init(device_t dev, device_t child, struct iommu_domain **domain)
+{
+ struct gicv3_its_softc *sc;
+ struct iommu_ctx *ctx;
+ int error;
+
+ sc = device_get_softc(dev);
+ ctx = iommu_get_dev_ctx(child);
+ error = iommu_map_msi(ctx, PAGE_SIZE, GITS_TRANSLATER,
+ IOMMU_MAP_ENTRY_WRITE, IOMMU_MF_CANWAIT, >ma);
+ *domain = iommu_get_ctx_domain(ctx);
+
+ return (error);
+}
+
+static void
+gicv3_iommu_deinit(device_t dev, device_t child)
+{
+ struct iommu_ctx *ctx;
+
+ ctx = iommu_get_dev_ctx(child);
+ iommu_unmap_msi(ctx);
+}
+#endif
/*
* Commands handling.
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svn commit: r367016 - in head/sys: dev/iommu kern
Author: br
Date: Sat Oct 24 20:09:27 2020
New Revision: 367016
URL: https://svnweb.freebsd.org/changeset/base/367016
Log:
o Add iommu de-initialization method for MSI interface.
o Add iommu_unmap_msi() to release the msi GAS entry.
o Provide default implementations for iommu init/deinit methods.
Reviewed by: kib
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D26906
Modified:
head/sys/dev/iommu/iommu_gas.c
head/sys/dev/iommu/iommu_msi.h
head/sys/kern/msi_if.m
head/sys/kern/subr_intr.c
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Sat Oct 24 17:47:43 2020
(r367015)
+++ head/sys/dev/iommu/iommu_gas.c Sat Oct 24 20:09:27 2020
(r367016)
@@ -727,6 +727,31 @@ iommu_map(struct iommu_domain *domain,
return (error);
}
+void
+iommu_unmap_msi(struct iommu_ctx *ctx)
+{
+ struct iommu_map_entry *entry;
+ struct iommu_domain *domain;
+
+ domain = ctx->domain;
+ entry = domain->msi_entry;
+ if (entry == NULL)
+ return;
+
+ domain->ops->unmap(domain, entry->start, entry->end -
+ entry->start, IOMMU_PGF_WAITOK);
+
+ IOMMU_DOMAIN_LOCK(domain);
+ iommu_gas_free_space(domain, entry);
+ IOMMU_DOMAIN_UNLOCK(domain);
+
+ iommu_gas_free_entry(domain, entry);
+
+ domain->msi_entry = NULL;
+ domain->msi_base = 0;
+ domain->msi_phys = 0;
+}
+
int
iommu_map_msi(struct iommu_ctx *ctx, iommu_gaddr_t size, int offset,
u_int eflags, u_int flags, vm_page_t *ma)
Modified: head/sys/dev/iommu/iommu_msi.h
==
--- head/sys/dev/iommu/iommu_msi.h Sat Oct 24 17:47:43 2020
(r367015)
+++ head/sys/dev/iommu/iommu_msi.h Sat Oct 24 20:09:27 2020
(r367016)
@@ -42,5 +42,6 @@ struct iommu_ctx;
void iommu_translate_msi(struct iommu_domain *domain, uint64_t *addr);
int iommu_map_msi(struct iommu_ctx *ctx, iommu_gaddr_t size, int offset,
u_int eflags, u_int flags, vm_page_t *ma);
+void iommu_unmap_msi(struct iommu_ctx *ctx);
#endif /* !_DEV_IOMMU_IOMMU_MSI_H_ */
Modified: head/sys/kern/msi_if.m
==
--- head/sys/kern/msi_if.m Sat Oct 24 17:47:43 2020(r367015)
+++ head/sys/kern/msi_if.m Sat Oct 24 20:09:27 2020(r367016)
@@ -38,6 +38,22 @@ HEADER {
struct intr_irqsrc;
};
+#
+# Default implementations of some methods.
+#
+CODE {
+ static int
+ iommu_init(device_t dev, device_t child, struct iommu_domain **domain)
+ {
+ *domain = NULL;
+ return (0);
+ }
+ static void
+ iommu_deinit(device_t dev, device_t child)
+ {
+ }
+};
+
METHOD int alloc_msi {
device_tdev;
device_tchild;
@@ -79,4 +95,9 @@ METHOD int iommu_init {
device_tdev;
device_tchild;
struct iommu_domain **domain;
-};
+} DEFAULT iommu_init;
+
+METHOD void iommu_deinit {
+ device_tdev;
+ device_tchild;
+} DEFAULT iommu_deinit;
Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c Sat Oct 24 17:47:43 2020(r367015)
+++ head/sys/kern/subr_intr.c Sat Oct 24 20:09:27 2020(r367016)
@@ -1297,9 +1297,7 @@ int
intr_alloc_msi(device_t pci, device_t child, intptr_t xref, int count,
int maxcount, int *irqs)
{
-#ifdef IOMMU
struct iommu_domain *domain;
-#endif
struct intr_irqsrc **isrc;
struct intr_pic *pic;
device_t pdev;
@@ -1314,7 +1312,6 @@ intr_alloc_msi(device_t pci, device_t child, intptr_t
("%s: Found a non-MSI controller: %s", __func__,
device_get_name(pic->pic_dev)));
-#ifdef IOMMU
/*
* If this is the first time we have used this context ask the
* interrupt controller to map memory the msi source will need.
@@ -1322,7 +1319,6 @@ intr_alloc_msi(device_t pci, device_t child, intptr_t
err = MSI_IOMMU_INIT(pic->pic_dev, child, );
if (err != 0)
return (err);
-#endif
isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
err = MSI_ALLOC_MSI(pic->pic_dev, child, count, maxcount, , isrc);
@@ -1332,9 +1328,7 @@ intr_alloc_msi(device_t pci, device_t child, intptr_t
}
for (i = 0; i < count; i++) {
-#ifdef IOMMU
isrc[i]->isrc_iommu = domain;
-#endif
msi = (struct intr_map_data_msi *)intr_alloc_map_data(
INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
msi-> isrc = isrc[i];
@@ -1375,6 +1369,8 @@ intr_release_msi(device_t pci, device_t child, intptr_
svn commit: r366980 - in head/sys: dev/ahci kern x86/x86
Author: br
Date: Fri Oct 23 21:27:48 2020
New Revision: 366980
URL: https://svnweb.freebsd.org/changeset/base/366980
Log:
Move the iommu stubs to a generic place, so they are available on all the
platforms.
This allows to not depend on the IOMMU macro in AHCI driver.
Requested by: kib
Suggested by: andrew
Reviewed by: kib
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D26887
Modified:
head/sys/dev/ahci/ahci_pci.c
head/sys/kern/subr_bus_dma.c
head/sys/x86/x86/busdma_machdep.c
Modified: head/sys/dev/ahci/ahci_pci.c
==
--- head/sys/dev/ahci/ahci_pci.cFri Oct 23 18:29:36 2020
(r366979)
+++ head/sys/dev/ahci/ahci_pci.cFri Oct 23 21:27:48 2020
(r366980)
@@ -27,8 +27,6 @@
#include
__FBSDID("$FreeBSD$");
-#include "opt_iommu.h"
-
#include
#include
#include
@@ -501,7 +499,6 @@ ahci_pci_attach(device_t dev)
i++;
ctlr->quirks = ahci_ids[i].quirks;
-#ifdef IOMMU
if (ctlr->quirks & AHCI_Q_IOMMU_BUSWIDE) {
/*
* The controller issues DMA requests from PCI function 1,
@@ -510,7 +507,6 @@ ahci_pci_attach(device_t dev)
*/
bus_dma_iommu_set_buswide(dev);
}
-#endif
/* Limit speed for my onboard JMicron external port.
* It is not eSATA really, limit to SATA 1 */
Modified: head/sys/kern/subr_bus_dma.c
==
--- head/sys/kern/subr_bus_dma.cFri Oct 23 18:29:36 2020
(r366979)
+++ head/sys/kern/subr_bus_dma.cFri Oct 23 21:27:48 2020
(r366980)
@@ -33,6 +33,7 @@
__FBSDID("$FreeBSD$");
#include "opt_bus.h"
+#include "opt_iommu.h"
#include
#include
@@ -785,3 +786,21 @@ bus_dma_template_fill(bus_dma_template_t *t, bus_dma_p
return;
}
+#ifndef IOMMU
+bool bus_dma_iommu_set_buswide(device_t dev);
+int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
+vm_paddr_t start, vm_size_t length, int flags);
+
+bool
+bus_dma_iommu_set_buswide(device_t dev)
+{
+ return (false);
+}
+
+int
+bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
+vm_paddr_t start, vm_size_t length, int flags)
+{
+ return (0);
+}
+#endif
Modified: head/sys/x86/x86/busdma_machdep.c
==
--- head/sys/x86/x86/busdma_machdep.c Fri Oct 23 18:29:36 2020
(r366979)
+++ head/sys/x86/x86/busdma_machdep.c Fri Oct 23 21:27:48 2020
(r366980)
@@ -34,7 +34,6 @@
__FBSDID("$FreeBSD$");
#include "opt_acpi.h"
-#include "opt_iommu.h"
#include
#include
@@ -268,22 +267,3 @@ bus_dma_tag_destroy(bus_dma_tag_t dmat)
tc = (struct bus_dma_tag_common *)dmat;
return (tc->impl->tag_destroy(dmat));
}
-
-#ifndef IOMMU
-bool bus_dma_iommu_set_buswide(device_t dev);
-int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
-vm_paddr_t start, vm_size_t length, int flags);
-
-bool
-bus_dma_iommu_set_buswide(device_t dev)
-{
- return (false);
-}
-
-int
-bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
-vm_paddr_t start, vm_size_t length, int flags)
-{
- return (0);
-}
-#endif
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svn commit: r366865 - head/sys/dev/ahci
Author: br
Date: Mon Oct 19 22:32:36 2020
New Revision: 366865
URL: https://svnweb.freebsd.org/changeset/base/366865
Log:
Fix build: only set iommu buswide flag if IOMMU code is included.
Sponsored by: Innovate DSbD
Modified:
head/sys/dev/ahci/ahci_pci.c
Modified: head/sys/dev/ahci/ahci_pci.c
==
--- head/sys/dev/ahci/ahci_pci.cMon Oct 19 22:27:21 2020
(r366864)
+++ head/sys/dev/ahci/ahci_pci.cMon Oct 19 22:32:36 2020
(r366865)
@@ -27,6 +27,8 @@
#include
__FBSDID("$FreeBSD$");
+#include "opt_iommu.h"
+
#include
#include
#include
@@ -499,6 +501,7 @@ ahci_pci_attach(device_t dev)
i++;
ctlr->quirks = ahci_ids[i].quirks;
+#ifdef IOMMU
if (ctlr->quirks & AHCI_Q_IOMMU_BUSWIDE) {
/*
* The controller issues DMA requests from PCI function 1,
@@ -507,6 +510,7 @@ ahci_pci_attach(device_t dev)
*/
bus_dma_iommu_set_buswide(dev);
}
+#endif
/* Limit speed for my onboard JMicron external port.
* It is not eSATA really, limit to SATA 1 */
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Re: svn commit: r366833 - in head/sys: dev/iommu kern sys
On Mon, Oct 19, 2020 at 03:08:32PM +0100, Jessica Clarke wrote: > On 19 Oct 2020, at 14:10, Ruslan Bukin wrote: > > > > +#ifndef _DEV_IOMMU_IOMMU_MSI_H_ > > +#define _DEV_IOMMU_IOMMU_MSI_H_ > > + > > +#include > > + > > +struct iommu_unit; > > This seems unused, perhaps left from a previous patch version? > The forward declaration is not needed here, indeed. Thanks. Ruslan ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366863 - head/sys/dev/ahci
Author: br
Date: Mon Oct 19 21:27:27 2020
New Revision: 366863
URL: https://svnweb.freebsd.org/changeset/base/366863
Log:
Add IOMMU_BUSWIDE ahci quirk.
Some controllers use PCI function 1 as the requester ID for DMA transfers,
but the controllers are not PCI multifunction.
Set the iommu buswide flag for them. This should instruct an IOMMU driver
to use the same translation rule for all the devices and functions of
a bus.
This was discovered on the ARM Neoverse N1 System Development Platform
(ARM N1SDP).
Bug reference: https://bugzilla.kernel.org/show_bug.cgi?id=42679
Reported by: andrew
Reviewed by: kib, mav
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D26857
Modified:
head/sys/dev/ahci/ahci.h
head/sys/dev/ahci/ahci_pci.c
Modified: head/sys/dev/ahci/ahci.h
==
--- head/sys/dev/ahci/ahci.hMon Oct 19 21:11:49 2020(r366862)
+++ head/sys/dev/ahci/ahci.hMon Oct 19 21:27:27 2020(r366863)
@@ -624,6 +624,7 @@ enum ahci_err_type {
#define AHCI_Q_MRVL_SR_DEL 0x0020
#define AHCI_Q_NOCCS 0x0040
#define AHCI_Q_NOAUX 0x0080
+#define AHCI_Q_IOMMU_BUSWIDE 0x0100
#define AHCI_Q_BIT_STRING \
"\020" \
@@ -650,7 +651,8 @@ enum ahci_err_type {
"\025NOMSIX"\
"\026MRVL_SR_DEL" \
"\027NOCCS" \
- "\030NOAUX"
+ "\030NOAUX" \
+ "\031IOMMU_BUSWIDE"
int ahci_attach(device_t dev);
int ahci_detach(device_t dev);
Modified: head/sys/dev/ahci/ahci_pci.c
==
--- head/sys/dev/ahci/ahci_pci.cMon Oct 19 21:11:49 2020
(r366862)
+++ head/sys/dev/ahci/ahci_pci.cMon Oct 19 21:27:27 2020
(r366863)
@@ -37,12 +37,16 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
#include
#include
#include
+#include
#include "ahci.h"
static int force_ahci = 1;
@@ -248,7 +252,10 @@ static const struct {
{0x2365197b, 0x00, "JMicron JMB365",AHCI_Q_NOFORCE},
{0x2366197b, 0x00, "JMicron JMB366",AHCI_Q_NOFORCE},
{0x2368197b, 0x00, "JMicron JMB368",AHCI_Q_NOFORCE},
+ {0x2392197b, 0x00, "JMicron JMB388",AHCI_Q_IOMMU_BUSWIDE},
{0x0585197b, 0x00, "JMicron JMB58x",0},
+ {0x01221c28, 0x00, "Lite-On Plextor M6E (Marvell 88SS9183)",
+ AHCI_Q_IOMMU_BUSWIDE},
{0x61ab, 0x00, "Marvell 88SE6111", AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
AHCI_Q_1CH | AHCI_Q_EDGEIS},
{0x612111ab, 0x00, "Marvell 88SE6121", AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
@@ -257,19 +264,28 @@ static const struct {
AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT},
{0x614511ab, 0x00, "Marvell 88SE6145", AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT},
- {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS},
- {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_ALTSIG},
- {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2},
+ {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS |
+ AHCI_Q_IOMMU_BUSWIDE},
+ {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_ALTSIG |
+ AHCI_Q_IOMMU_BUSWIDE},
+ {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS | AHCI_Q_SATA2 |
+ AHCI_Q_IOMMU_BUSWIDE},
{0x91251b4b, 0x00, "Marvell 88SE9125", 0},
- {0x91281b4b, 0x00, "Marvell 88SE9128", AHCI_Q_ALTSIG},
- {0x91301b4b, 0x00, "Marvell 88SE9130", AHCI_Q_ALTSIG},
- {0x91721b4b, 0x00, "Marvell 88SE9172", 0},
- {0x91821b4b, 0x00, "Marvell 88SE9182", 0},
- {0x91831b4b, 0x00, "Marvell 88SS9183", 0},
- {0x91a01b4b, 0x00, "Marvell 88SE91Ax", 0},
+ {0x91281b4b, 0x00, "Marvell 88SE9128", AHCI_Q_ALTSIG |
+ AHCI_Q_IOMMU_BUSWIDE},
+ {0x91301b4b, 0x00, "Marvell 88SE9130", AHCI_Q_ALTSIG |
+ AHCI_Q_IOMMU_BUSWIDE},
+ {0x91701b4b, 0x00, "Marvell 88SE9170", AHCI_Q_IOMMU_BUSWIDE},
+ {0x91721b4b, 0x00, "Marvell 88SE9172", AHCI_Q_IOMMU_BUSWIDE},
+ {0x917a1b4b, 0x00, "Marvell 88SE917A", AHCI_Q_IOMMU_BUSWIDE},
+ {0x91821b4b, 0x00, "Marvell 88SE9182", AHCI_Q_IOMMU_BUSWIDE},
+ {0x91831b4b, 0x00, "Marvell 88SS9183", AHCI_Q_IOMMU_BUSWIDE},
+ {0x91a01b4b, 0x00, "Marvell 88SE91Ax", AHCI_Q_IOMMU_BUSWIDE},
{0x92151b4b, 0x00, "Marvell 88SE9215", 0},
- {0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_ALTSIG},
- {0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_ALTSIG},
+ {0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_ALTSIG |
+ AHCI_Q_IOMMU_BUSWIDE},
+ {0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_ALTSIG |
+
svn commit: r366835 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Mon Oct 19 15:50:58 2020
New Revision: 366835
URL: https://svnweb.freebsd.org/changeset/base/366835
Log:
Assign the reserved apic region (GAS entry) to the iommu domain msi_entry.
Requested by: kib
Reviewed by: kib
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D26859
Modified:
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
head/sys/x86/iommu/intel_ctx.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Mon Oct 19 15:24:35 2020(r366834)
+++ head/sys/dev/iommu/iommu.h Mon Oct 19 15:50:58 2020(r366835)
@@ -197,7 +197,7 @@ void iommu_gas_free_region(struct iommu_domain *domain
int iommu_gas_map_region(struct iommu_domain *domain,
struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma);
int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
-iommu_gaddr_t end);
+iommu_gaddr_t end, struct iommu_map_entry **entry0);
void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Mon Oct 19 15:24:35 2020
(r366834)
+++ head/sys/dev/iommu/iommu_gas.c Mon Oct 19 15:50:58 2020
(r366835)
@@ -677,7 +677,7 @@ iommu_gas_map_region(struct iommu_domain *domain, stru
int
iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
-iommu_gaddr_t end)
+iommu_gaddr_t end, struct iommu_map_entry **entry0)
{
struct iommu_map_entry *entry;
int error;
@@ -692,6 +692,8 @@ iommu_gas_reserve_region(struct iommu_domain *domain,
IOMMU_DOMAIN_UNLOCK(domain);
if (error != 0)
iommu_gas_free_entry(domain, entry);
+ else if (entry0 != NULL)
+ *entry0 = entry;
return (error);
}
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Mon Oct 19 15:24:35 2020
(r366834)
+++ head/sys/x86/iommu/intel_ctx.c Mon Oct 19 15:50:58 2020
(r366835)
@@ -366,7 +366,7 @@ dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapp
goto fail;
/* Disable local apic region access */
error = iommu_gas_reserve_region(iodom, 0xfee0,
- 0xfeef + 1);
+ 0xfeef + 1, >msi_entry);
if (error != 0)
goto fail;
}
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svn commit: r366833 - in head/sys: dev/iommu kern sys
Author: br
Date: Mon Oct 19 13:10:21 2020
New Revision: 366833
URL: https://svnweb.freebsd.org/changeset/base/366833
Log:
Manage MSI iommu pages.
This allows the interrupt controller driver only need a small change to
create a map for the page the device will write to raise an interrupt.
Submitted by: andrew
Reviewed by: kib
Sponsored by: Innovate DSbD
Differential Revision:https://reviews.freebsd.org/D26705
Added:
head/sys/dev/iommu/iommu_msi.h (contents, props changed)
Modified:
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
head/sys/kern/msi_if.m
head/sys/kern/subr_intr.c
head/sys/sys/intr.h
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Mon Oct 19 12:46:03 2020(r366832)
+++ head/sys/dev/iommu/iommu.h Mon Oct 19 13:10:21 2020(r366833)
@@ -111,6 +111,9 @@ struct iommu_domain {
iommu_gaddr_t end; /* (c) Highest address + 1 in
the guest AS */
struct iommu_map_entry *first_place, *last_place; /* (d) */
+ struct iommu_map_entry *msi_entry; /* (d) Arch-specific */
+ iommu_gaddr_t msi_base; /* (d) Arch-specific */
+ vm_paddr_t msi_phys;/* (d) Arch-specific */
u_int flags;/* (u) */
};
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Mon Oct 19 12:46:03 2020
(r366832)
+++ head/sys/dev/iommu/iommu_gas.c Mon Oct 19 13:10:21 2020
(r366833)
@@ -63,6 +63,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -722,6 +723,69 @@ iommu_map(struct iommu_domain *domain,
ma, res);
return (error);
+}
+
+int
+iommu_map_msi(struct iommu_ctx *ctx, iommu_gaddr_t size, int offset,
+u_int eflags, u_int flags, vm_page_t *ma)
+{
+ struct iommu_domain *domain;
+ struct iommu_map_entry *entry;
+ int error;
+
+ error = 0;
+ domain = ctx->domain;
+
+ /* Check if there is already an MSI page allocated */
+ IOMMU_DOMAIN_LOCK(domain);
+ entry = domain->msi_entry;
+ IOMMU_DOMAIN_UNLOCK(domain);
+
+ if (entry == NULL) {
+ error = iommu_gas_map(domain, >tag->common, size, offset,
+ eflags, flags, ma, );
+ IOMMU_DOMAIN_LOCK(domain);
+ if (error == 0) {
+ if (domain->msi_entry == NULL) {
+ MPASS(domain->msi_base == 0);
+ MPASS(domain->msi_phys == 0);
+
+ domain->msi_entry = entry;
+ domain->msi_base = entry->start;
+ domain->msi_phys = VM_PAGE_TO_PHYS(ma[0]);
+ } else {
+ /*
+* We lost the race and already have an
+* MSI page allocated. Free the unneeded entry.
+*/
+ iommu_gas_free_entry(domain, entry);
+ }
+ } else if (domain->msi_entry != NULL) {
+ /*
+* The allocation failed, but another succeeded.
+* Return success as there is a valid MSI page.
+*/
+ error = 0;
+ }
+ IOMMU_DOMAIN_UNLOCK(domain);
+ }
+
+ return (error);
+}
+
+void
+iommu_translate_msi(struct iommu_domain *domain, uint64_t *addr)
+{
+
+ *addr = (*addr - domain->msi_phys) + domain->msi_base;
+
+ KASSERT(*addr >= domain->msi_entry->start,
+ ("%s: Address is below the MSI entry start address (%jx < %jx)",
+ __func__, (uintmax_t)*addr, (uintmax_t)domain->msi_entry->start));
+
+ KASSERT(*addr + sizeof(*addr) <= domain->msi_entry->end,
+ ("%s: Address is above the MSI entry end address (%jx < %jx)",
+ __func__, (uintmax_t)*addr, (uintmax_t)domain->msi_entry->end));
}
int
Added: head/sys/dev/iommu/iommu_msi.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/iommu/iommu_msi.h Mon Oct 19 13:10:21 2020
(r366833)
@@ -0,0 +1,46 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Andrew Turner
+ *
+ * This work was supported by Innovate UK project 105694, "Digital Security
+ * by Design (DSbD) Technology Platform Prototype".
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of
svn commit: r366724 - head/sys/dev/iommu
Author: br
Date: Thu Oct 15 13:47:52 2020
New Revision: 366724
URL: https://svnweb.freebsd.org/changeset/base/366724
Log:
Split-out Guest Address Space (GAS) macroses to a separate header.
Sponsored by: Innovate DSbD
Added:
head/sys/dev/iommu/iommu_gas.h (contents, props changed)
Modified:
head/sys/dev/iommu/busdma_iommu.h
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
Modified: head/sys/dev/iommu/busdma_iommu.h
==
--- head/sys/dev/iommu/busdma_iommu.h Thu Oct 15 13:43:43 2020
(r366723)
+++ head/sys/dev/iommu/busdma_iommu.h Thu Oct 15 13:47:52 2020
(r366724)
@@ -35,6 +35,7 @@
#define __X86_IOMMU_BUSDMA_DMAR_H
#include
+#include
struct bus_dma_tag_iommu {
struct bus_dma_tag_common common;
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Thu Oct 15 13:43:43 2020(r366723)
+++ head/sys/dev/iommu/iommu.h Thu Oct 15 13:47:52 2020(r366724)
@@ -65,18 +65,6 @@ struct iommu_map_entry {
struct iommu_qi_genseq gseq;
};
-#defineIOMMU_MAP_ENTRY_PLACE 0x0001 /* Fake entry */
-#defineIOMMU_MAP_ENTRY_RMRR0x0002 /* Permanent, not linked by
- dmamap_link */
-#defineIOMMU_MAP_ENTRY_MAP 0x0004 /* Busdma created, linked by
- dmamap_link */
-#defineIOMMU_MAP_ENTRY_UNMAPPED0x0010 /* No backing pages */
-#defineIOMMU_MAP_ENTRY_QI_NF 0x0020 /* qi task, do not free entry */
-#defineIOMMU_MAP_ENTRY_READ0x1000 /* Read permitted */
-#defineIOMMU_MAP_ENTRY_WRITE 0x2000 /* Write permitted */
-#defineIOMMU_MAP_ENTRY_SNOOP 0x4000 /* Snoop */
-#defineIOMMU_MAP_ENTRY_TM 0x8000 /* Transient */
-
struct iommu_unit {
struct mtx lock;
int unit;
@@ -148,17 +136,6 @@ struct iommu_ctx {
page table */
#defineIOMMU_DOMAIN_RMRR 0x0020 /* Domain contains RMRR
entry,
cannot be turned off */
-
-/* Map flags */
-#defineIOMMU_MF_CANWAIT0x0001
-#defineIOMMU_MF_CANSPLIT 0x0002
-#defineIOMMU_MF_RMRR 0x0004
-
-#defineIOMMU_PGF_WAITOK0x0001
-#defineIOMMU_PGF_ZERO 0x0002
-#defineIOMMU_PGF_ALLOC 0x0004
-#defineIOMMU_PGF_NOALLOC 0x0008
-#defineIOMMU_PGF_OBJL 0x0010
#defineIOMMU_LOCK(unit)mtx_lock(&(unit)->lock)
#defineIOMMU_UNLOCK(unit) mtx_unlock(&(unit)->lock)
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Thu Oct 15 13:43:43 2020
(r366723)
+++ head/sys/dev/iommu/iommu_gas.c Thu Oct 15 13:47:52 2020
(r366724)
@@ -62,6 +62,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
Added: head/sys/dev/iommu/iommu_gas.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/iommu/iommu_gas.h Thu Oct 15 13:47:52 2020
(r366724)
@@ -0,0 +1,60 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Konstantin Belousov
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF
svn commit: r366710 - head/sys/dev/iommu
Author: br Date: Wed Oct 14 21:22:23 2020 New Revision: 366710 URL: https://svnweb.freebsd.org/changeset/base/366710 Log: Split-out iommu type definitions to a separate header. Reviewed by: kib Sponsored by: Innovate DSbD Differential Revision:https://reviews.freebsd.org/D26780 Added: head/sys/dev/iommu/iommu_types.h (contents, props changed) Modified: head/sys/dev/iommu/iommu.h Modified: head/sys/dev/iommu/iommu.h == --- head/sys/dev/iommu/iommu.h Wed Oct 14 20:55:31 2020(r366709) +++ head/sys/dev/iommu/iommu.h Wed Oct 14 21:22:23 2020(r366710) @@ -34,10 +34,7 @@ #ifndef _DEV_IOMMU_IOMMU_H_ #define _DEV_IOMMU_IOMMU_H_ -/* Host or physical memory address, after translation. */ -typedef uint64_t iommu_haddr_t; -/* Guest or bus address, before translation. */ -typedef uint64_t iommu_gaddr_t; +#include struct bus_dma_tag_common; struct iommu_map_entry; Added: head/sys/dev/iommu/iommu_types.h == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/iommu/iommu_types.hWed Oct 14 21:22:23 2020 (r366710) @@ -0,0 +1,42 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2013 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Konstantin Belousov + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_IOMMU_IOMMU_TYPES_H_ +#define _DEV_IOMMU_IOMMU_TYPES_H_ + +/* Host or physical memory address, after translation. */ +typedef uint64_t iommu_haddr_t; +/* Guest or bus address, before translation. */ +typedef uint64_t iommu_gaddr_t; + +#endif /* !_DEV_IOMMU_IOMMU_TYPES_H_ */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366704 - in head/sys: dev/iommu i386/include
Author: br Date: Wed Oct 14 14:51:11 2020 New Revision: 366704 URL: https://svnweb.freebsd.org/changeset/base/366704 Log: Add a per-each macro IOMMU_DOMAIN_UNLOAD_SLEEP which allows to sleep during iommu guest address space entries unload. Suggested by: kib Sponsored by: Innovate DSbD Differential Revision:https://reviews.freebsd.org/D26722 Modified: head/sys/dev/iommu/busdma_iommu.c head/sys/i386/include/iommu.h Modified: head/sys/dev/iommu/busdma_iommu.c == --- head/sys/dev/iommu/busdma_iommu.c Wed Oct 14 14:29:56 2020 (r366703) +++ head/sys/dev/iommu/busdma_iommu.c Wed Oct 14 14:51:11 2020 (r366704) @@ -888,7 +888,7 @@ iommu_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap struct bus_dmamap_iommu *map; struct iommu_ctx *ctx; struct iommu_domain *domain; -#if defined(__amd64__) +#ifndef IOMMU_DOMAIN_UNLOAD_SLEEP struct iommu_map_entries_tailq entries; #endif @@ -898,13 +898,13 @@ iommu_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap domain = ctx->domain; atomic_add_long(>unloads, 1); -#if defined(__i386__) +#if defined(IOMMU_DOMAIN_UNLOAD_SLEEP) IOMMU_DOMAIN_LOCK(domain); TAILQ_CONCAT(>unload_entries, >map_entries, dmamap_link); IOMMU_DOMAIN_UNLOCK(domain); taskqueue_enqueue(domain->iommu->delayed_taskqueue, >unload_task); -#else /* defined(__amd64__) */ +#else TAILQ_INIT(); IOMMU_DOMAIN_LOCK(domain); TAILQ_CONCAT(, >map_entries, dmamap_link); Modified: head/sys/i386/include/iommu.h == --- head/sys/i386/include/iommu.h Wed Oct 14 14:29:56 2020 (r366703) +++ head/sys/i386/include/iommu.h Wed Oct 14 14:51:11 2020 (r366704) @@ -4,3 +4,5 @@ /* $FreeBSD$ */ #include + +#defineIOMMU_DOMAIN_UNLOAD_SLEEP ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366702 - head/sys/dev/iommu
Author: br
Date: Wed Oct 14 14:12:15 2020
New Revision: 366702
URL: https://svnweb.freebsd.org/changeset/base/366702
Log:
Add iommu_get_ctx_domain() that allows to get iommu domain for a given
iommu context.
Submitted by: andrew
Sponsored by: Innovate DSbD
Modified:
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Wed Oct 14 13:39:50 2020(r366701)
+++ head/sys/dev/iommu/iommu.h Wed Oct 14 14:12:15 2020(r366702)
@@ -234,6 +234,7 @@ int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_d
bus_dma_tag_t iommu_get_dma_tag(device_t dev, device_t child);
struct iommu_ctx *iommu_get_dev_ctx(device_t dev);
+struct iommu_domain *iommu_get_ctx_domain(struct iommu_ctx *ctx);
SYSCTL_DECL(_hw_iommu);
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Wed Oct 14 13:39:50 2020
(r366701)
+++ head/sys/dev/iommu/iommu_gas.c Wed Oct 14 14:12:15 2020
(r366702)
@@ -208,6 +208,13 @@ iommu_gas_rb_remove(struct iommu_domain *domain, struc
RB_REMOVE(iommu_gas_entries_tree, >rb_root, entry);
}
+struct iommu_domain *
+iommu_get_ctx_domain(struct iommu_ctx *ctx)
+{
+
+ return (ctx->domain);
+}
+
void
iommu_gas_init_domain(struct iommu_domain *domain)
{
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svn commit: r366701 - head/sys/dev/iommu
Author: br Date: Wed Oct 14 13:39:50 2020 New Revision: 366701 URL: https://svnweb.freebsd.org/changeset/base/366701 Log: Rename a header protection macro. Sponsored by: DARPA, AFRL Modified: head/sys/dev/iommu/iommu.h Modified: head/sys/dev/iommu/iommu.h == --- head/sys/dev/iommu/iommu.h Wed Oct 14 13:13:14 2020(r366700) +++ head/sys/dev/iommu/iommu.h Wed Oct 14 13:39:50 2020(r366701) @@ -31,8 +31,8 @@ * $FreeBSD$ */ -#ifndef _SYS_IOMMU_H_ -#define _SYS_IOMMU_H_ +#ifndef _DEV_IOMMU_IOMMU_H_ +#define _DEV_IOMMU_IOMMU_H_ /* Host or physical memory address, after translation. */ typedef uint64_t iommu_haddr_t; @@ -237,4 +237,4 @@ struct iommu_ctx *iommu_get_dev_ctx(device_t dev); SYSCTL_DECL(_hw_iommu); -#endif /* !_SYS_IOMMU_H_ */ +#endif /* !_DEV_IOMMU_IOMMU_H_ */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366571 - head/sys/dev/iommu
Author: br
Date: Fri Oct 9 13:11:14 2020
New Revision: 366571
URL: https://svnweb.freebsd.org/changeset/base/366571
Log:
Add iommu_get_dev_ctx() helper that allows to instantiate an iommu context
for a given device_t.
Submitted by: andrew
Reviewed by: kib
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/iommu.h
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Fri Oct 9 12:44:56 2020
(r366570)
+++ head/sys/dev/iommu/busdma_iommu.c Fri Oct 9 13:11:14 2020
(r366571)
@@ -269,14 +269,12 @@ iommu_instantiate_ctx(struct iommu_unit *unit, device_
return (ctx);
}
-bus_dma_tag_t
-iommu_get_dma_tag(device_t dev, device_t child)
+struct iommu_ctx *
+iommu_get_dev_ctx(device_t dev)
{
struct iommu_unit *unit;
- struct iommu_ctx *ctx;
- bus_dma_tag_t res;
- unit = iommu_find(child, bootverbose);
+ unit = iommu_find(dev, bootverbose);
/* Not in scope of any IOMMU ? */
if (unit == NULL)
return (NULL);
@@ -288,8 +286,20 @@ iommu_get_dma_tag(device_t dev, device_t child)
dmar_instantiate_rmrr_ctxs(unit);
#endif
- ctx = iommu_instantiate_ctx(unit, child, false);
- res = ctx == NULL ? NULL : (bus_dma_tag_t)ctx->tag;
+ return (iommu_instantiate_ctx(unit, dev, false));
+}
+
+bus_dma_tag_t
+iommu_get_dma_tag(device_t dev, device_t child)
+{
+ struct iommu_ctx *ctx;
+ bus_dma_tag_t res;
+
+ ctx = iommu_get_dev_ctx(child);
+ if (ctx == NULL)
+ return (NULL);
+
+ res = (bus_dma_tag_t)ctx->tag;
return (res);
}
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Fri Oct 9 12:44:56 2020(r366570)
+++ head/sys/dev/iommu/iommu.h Fri Oct 9 13:11:14 2020(r366571)
@@ -233,6 +233,7 @@ int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_d
vm_paddr_t start, vm_size_t length, int flags);
bus_dma_tag_t iommu_get_dma_tag(device_t dev, device_t child);
+struct iommu_ctx *iommu_get_dev_ctx(device_t dev);
SYSCTL_DECL(_hw_iommu);
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svn commit: r366267 - in head/sys: amd64/conf conf dev/acpica dev/pci i386/conf x86/x86
Author: br Date: Tue Sep 29 20:29:07 2020 New Revision: 366267 URL: https://svnweb.freebsd.org/changeset/base/366267 Log: Rename kernel option ACPI_DMAR to IOMMU. This is mostly needed for a common arm64/amd64 iommu code. Reviewed by: kib Sponsored by: DARPA, AFRL Differential Revision:https://reviews.freebsd.org/D26587 Modified: head/sys/amd64/conf/GENERIC head/sys/amd64/conf/MINIMAL head/sys/conf/files.x86 head/sys/conf/options head/sys/dev/acpica/acpi_pci.c head/sys/dev/pci/pci.c head/sys/i386/conf/MINIMAL head/sys/i386/conf/NOTES head/sys/x86/x86/busdma_machdep.c head/sys/x86/x86/io_apic.c head/sys/x86/x86/msi.c Modified: head/sys/amd64/conf/GENERIC == --- head/sys/amd64/conf/GENERIC Tue Sep 29 18:13:54 2020(r366266) +++ head/sys/amd64/conf/GENERIC Tue Sep 29 20:29:07 2020(r366267) @@ -102,6 +102,7 @@ options WITNESS # Enable checks to detect deadlocks optionsWITNESS_SKIPSPIN# Don't run witness on spinlocks for speed optionsMALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones optionsVERBOSE_SYSINIT=0 # Support debug.verbose_sysinit, off by default +optionsIOMMU # Kernel Sanitizers #options COVERAGE# Generic kernel coverage. Used by KCOV @@ -127,7 +128,6 @@ device cpufreq # Bus support. device acpi -optionsACPI_DMAR device pci optionsPCI_HP # PCI-Express native HotPlug optionsPCI_IOV # PCI SR-IOV support Modified: head/sys/amd64/conf/MINIMAL == --- head/sys/amd64/conf/MINIMAL Tue Sep 29 18:13:54 2020(r366266) +++ head/sys/amd64/conf/MINIMAL Tue Sep 29 20:29:07 2020(r366267) @@ -93,6 +93,7 @@ options WITNESS # Enable checks to detect deadlocks optionsWITNESS_SKIPSPIN# Don't run witness on spinlocks for speed optionsMALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones optionsVERBOSE_SYSINIT=0 # Support debug.verbose_sysinit, off by default +optionsIOMMU # Make an SMP-capable kernel by default optionsSMP # Symmetric MultiProcessor Kernel @@ -103,7 +104,6 @@ device cpufreq # Bus support. device acpi -optionsACPI_DMAR device pci # atkbdc0 controls both the keyboard and the PS/2 mouse Modified: head/sys/conf/files.x86 == --- head/sys/conf/files.x86 Tue Sep 29 18:13:54 2020(r366266) +++ head/sys/conf/files.x86 Tue Sep 29 20:29:07 2020(r366267) @@ -165,8 +165,8 @@ dev/imcsmb/imcsmb.c optionalimcsmb dev/imcsmb/imcsmb_pci.coptionalimcsmb pci dev/intel/spi.coptionalintelspi dev/io/iodev.c optionalio -dev/iommu/busdma_iommu.c optionalacpi acpi_dmar pci -dev/iommu/iommu_gas.c optionalacpi acpi_dmar pci +dev/iommu/busdma_iommu.c optionalacpi iommu pci +dev/iommu/iommu_gas.c optionalacpi iommu pci dev/ipmi/ipmi.coptionalipmi dev/ipmi/ipmi_acpi.c optionalipmi acpi dev/ipmi/ipmi_isa.coptionalipmi isa @@ -302,14 +302,14 @@ x86/cpufreq/hwpstate_amd.coptionalcpufreq x86/cpufreq/hwpstate_intel.c optionalcpufreq x86/cpufreq/p4tcc.coptionalcpufreq x86/cpufreq/powernow.c optionalcpufreq -x86/iommu/intel_ctx.c optionalacpi acpi_dmar pci -x86/iommu/intel_drv.c optionalacpi acpi_dmar pci -x86/iommu/intel_fault.coptionalacpi acpi_dmar pci -x86/iommu/intel_idpgtbl.c optionalacpi acpi_dmar pci -x86/iommu/intel_intrmap.c optionalacpi acpi_dmar pci -x86/iommu/intel_qi.c optionalacpi acpi_dmar pci -x86/iommu/intel_quirks.c optionalacpi acpi_dmar pci -x86/iommu/intel_utils.coptionalacpi acpi_dmar pci +x86/iommu/intel_ctx.c optionalacpi iommu pci +x86/iommu/intel_drv.c optionalacpi iommu pci +x86/iommu/intel_fault.coptionalacpi iommu pci +x86/iommu/intel_idpgtbl.c optionalacpi iommu pci +x86/iommu/intel_intrmap.c optionalacpi iommu pci +x86/iommu/intel_qi.c optionalacpi iommu pci +x86/iommu/intel_quirks.c optionalacpi iommu pci +x86/iommu/intel_utils.coptionalacpi iommu pci x86/isa/atrtc.cstandard x86/isa/clock.cstandard x86/isa/isa.c
svn commit: r366257 - in head/sys/dev: acpica iommu pci
Author: br
Date: Tue Sep 29 15:10:56 2020
New Revision: 366257
URL: https://svnweb.freebsd.org/changeset/base/366257
Log:
o Rename acpi_iommu_get_dma_tag() -> iommu_get_dma_tag().
This function isn't ACPI dependent and we may use it on FDT systems
as well.
o Don't repeat the function declaration, include iommu.h instead.
Reviewed by: andrew, kib
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D26584
Modified:
head/sys/dev/acpica/acpi_pci.c
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/busdma_iommu.h
head/sys/dev/iommu/iommu.h
head/sys/dev/pci/pci.c
Modified: head/sys/dev/acpica/acpi_pci.c
==
--- head/sys/dev/acpica/acpi_pci.c Tue Sep 29 15:09:38 2020
(r366256)
+++ head/sys/dev/acpica/acpi_pci.c Tue Sep 29 15:10:56 2020
(r366257)
@@ -37,6 +37,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
#include
#include
@@ -49,6 +51,8 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
+
#include "pcib_if.h"
#include "pci_if.h"
@@ -456,7 +460,6 @@ acpi_pci_detach(device_t dev)
}
#ifdef ACPI_DMAR
-bus_dma_tag_t acpi_iommu_get_dma_tag(device_t dev, device_t child);
static bus_dma_tag_t
acpi_pci_get_dma_tag(device_t bus, device_t child)
{
@@ -464,7 +467,7 @@ acpi_pci_get_dma_tag(device_t bus, device_t child)
if (device_get_parent(child) == bus) {
/* try iommu and return if it works */
- tag = acpi_iommu_get_dma_tag(bus, child);
+ tag = iommu_get_dma_tag(bus, child);
} else
tag = NULL;
if (tag == NULL)
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Tue Sep 29 15:09:38 2020
(r366256)
+++ head/sys/dev/iommu/busdma_iommu.c Tue Sep 29 15:10:56 2020
(r366257)
@@ -270,7 +270,7 @@ iommu_instantiate_ctx(struct iommu_unit *unit, device_
}
bus_dma_tag_t
-acpi_iommu_get_dma_tag(device_t dev, device_t child)
+iommu_get_dma_tag(device_t dev, device_t child)
{
struct iommu_unit *unit;
struct iommu_ctx *ctx;
Modified: head/sys/dev/iommu/busdma_iommu.h
==
--- head/sys/dev/iommu/busdma_iommu.h Tue Sep 29 15:09:38 2020
(r366256)
+++ head/sys/dev/iommu/busdma_iommu.h Tue Sep 29 15:10:56 2020
(r366257)
@@ -61,6 +61,4 @@ struct bus_dmamap_iommu {
extern struct bus_dma_impl bus_dma_iommu_impl;
-bus_dma_tag_t acpi_iommu_get_dma_tag(device_t dev, device_t child);
-
#endif
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Tue Sep 29 15:09:38 2020(r366256)
+++ head/sys/dev/iommu/iommu.h Tue Sep 29 15:10:56 2020(r366257)
@@ -232,6 +232,8 @@ bool bus_dma_iommu_set_buswide(device_t dev);
int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
vm_paddr_t start, vm_size_t length, int flags);
+bus_dma_tag_t iommu_get_dma_tag(device_t dev, device_t child);
+
SYSCTL_DECL(_hw_iommu);
#endif /* !_SYS_IOMMU_H_ */
Modified: head/sys/dev/pci/pci.c
==
--- head/sys/dev/pci/pci.c Tue Sep 29 15:09:38 2020(r366256)
+++ head/sys/dev/pci/pci.c Tue Sep 29 15:10:56 2020(r366257)
@@ -47,6 +47,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
#include
#include
@@ -77,6 +79,8 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
+
#include "pcib_if.h"
#include "pci_if.h"
@@ -5680,7 +5684,6 @@ pci_get_resource_list (device_t dev, device_t child)
}
#ifdef ACPI_DMAR
-bus_dma_tag_t acpi_iommu_get_dma_tag(device_t dev, device_t child);
bus_dma_tag_t
pci_get_dma_tag(device_t bus, device_t dev)
{
@@ -5689,7 +5692,7 @@ pci_get_dma_tag(device_t bus, device_t dev)
if (device_get_parent(dev) == bus) {
/* try iommu and return if it works */
- tag = acpi_iommu_get_dma_tag(bus, dev);
+ tag = iommu_get_dma_tag(bus, dev);
} else
tag = NULL;
if (tag == NULL) {
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svn commit: r365577 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Thu Sep 10 14:12:25 2020
New Revision: 365577
URL: https://svnweb.freebsd.org/changeset/base/365577
Log:
Move the rid variable to the generic iommu context.
It could be used in various IOMMU platforms, not only DMAR.
Reviewed by: kib
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D26373
Modified:
head/sys/dev/iommu/iommu.h
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Thu Sep 10 14:11:29 2020(r365576)
+++ head/sys/dev/iommu/iommu.h Thu Sep 10 14:12:25 2020(r365577)
@@ -135,6 +135,7 @@ struct iommu_ctx {
u_long loads; /* atomic updates, for stat only */
u_long unloads; /* same */
u_int flags;/* (u) */
+ uint16_t rid; /* (c) pci RID */
};
/* struct iommu_ctx flags */
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Thu Sep 10 14:11:29 2020
(r365576)
+++ head/sys/x86/iommu/intel_ctx.c Thu Sep 10 14:12:25 2020
(r365577)
@@ -118,9 +118,9 @@ dmar_map_ctx_entry(struct dmar_ctx *ctx, struct sf_buf
dmar = CTX2DMAR(ctx);
- ctxp = dmar_map_pgtbl(dmar->ctx_obj, 1 +
- PCI_RID2BUS(ctx->rid), IOMMU_PGF_NOALLOC | IOMMU_PGF_WAITOK, sfp);
- ctxp += ctx->rid & 0xff;
+ ctxp = dmar_map_pgtbl(dmar->ctx_obj, 1 + PCI_RID2BUS(ctx->context.rid),
+ IOMMU_PGF_NOALLOC | IOMMU_PGF_WAITOK, sfp);
+ ctxp += ctx->context.rid & 0xff;
return (ctxp);
}
@@ -386,7 +386,7 @@ dmar_ctx_alloc(struct dmar_domain *domain, uint16_t ri
ctx->context.domain = DOM2IODOM(domain);
ctx->context.tag = malloc(sizeof(struct bus_dma_tag_iommu),
M_DMAR_CTX, M_WAITOK | M_ZERO);
- ctx->rid = rid;
+ ctx->context.rid = rid;
ctx->refs = 1;
return (ctx);
}
@@ -643,8 +643,9 @@ dmar_move_ctx_to_domain(struct dmar_domain *domain, st
error = dmar_flush_for_ctx_entry(dmar, true);
/* If flush failed, rolling back would not work as well. */
printf("dmar%d rid %x domain %d->%d %s-mapped\n",
- dmar->iommu.unit, ctx->rid, old_domain->domain, domain->domain,
- (domain->iodom.flags & IOMMU_DOMAIN_IDMAP) != 0 ? "id" : "re");
+ dmar->iommu.unit, ctx->context.rid, old_domain->domain,
+ domain->domain, (domain->iodom.flags & IOMMU_DOMAIN_IDMAP) != 0 ?
+ "id" : "re");
dmar_unref_domain_locked(dmar, old_domain);
TD_PINNED_ASSERT;
return (error);
@@ -776,7 +777,7 @@ dmar_find_ctx_locked(struct dmar_unit *dmar, uint16_t
LIST_FOREACH(domain, >domains, link) {
LIST_FOREACH(ctx, >contexts, link) {
- if (ctx->rid == rid)
+ if (ctx->context.rid == rid)
return (ctx);
}
}
Modified: head/sys/x86/iommu/intel_dmar.h
==
--- head/sys/x86/iommu/intel_dmar.h Thu Sep 10 14:11:29 2020
(r365576)
+++ head/sys/x86/iommu/intel_dmar.h Thu Sep 10 14:12:25 2020
(r365577)
@@ -75,7 +75,6 @@ struct dmar_domain {
struct dmar_ctx {
struct iommu_ctx context;
- uint16_t rid; /* (c) pci RID */
uint64_t last_fault_rec[2]; /* Last fault reported */
LIST_ENTRY(dmar_ctx) link; /* (u) Member in the domain list */
u_int refs; /* (u) References from tags */
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svn commit: r363949 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Thu Aug 6 12:49:25 2020
New Revision: 363949
URL: https://svnweb.freebsd.org/changeset/base/363949
Log:
Move dmar_domain_unload_task to busdma_iommu.c.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25972
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/x86/iommu/intel_ctx.c
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Thu Aug 6 11:18:06 2020
(r363948)
+++ head/sys/dev/iommu/busdma_iommu.c Thu Aug 6 12:49:25 2020
(r363949)
@@ -1064,6 +1064,26 @@ bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmama
return (error);
}
+static void
+iommu_domain_unload_task(void *arg, int pending)
+{
+ struct iommu_domain *domain;
+ struct iommu_map_entries_tailq entries;
+
+ domain = arg;
+ TAILQ_INIT();
+
+ for (;;) {
+ IOMMU_DOMAIN_LOCK(domain);
+ TAILQ_SWAP(>unload_entries, ,
+ iommu_map_entry, dmamap_link);
+ IOMMU_DOMAIN_UNLOCK(domain);
+ if (TAILQ_EMPTY())
+ break;
+ iommu_domain_unload(domain, , true);
+ }
+}
+
void
iommu_domain_init(struct iommu_unit *unit, struct iommu_domain *domain,
const struct iommu_domain_map_ops *ops)
@@ -1072,6 +1092,7 @@ iommu_domain_init(struct iommu_unit *unit, struct iomm
domain->ops = ops;
domain->iommu = unit;
+ TASK_INIT(>unload_task, 0, iommu_domain_unload_task, domain);
RB_INIT(>rb_root);
TAILQ_INIT(>unload_entries);
mtx_init(>lock, "iodom", NULL, MTX_DEF);
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Thu Aug 6 11:18:06 2020
(r363948)
+++ head/sys/x86/iommu/intel_ctx.c Thu Aug 6 12:49:25 2020
(r363949)
@@ -74,7 +74,6 @@ __FBSDID("$FreeBSD$");
static MALLOC_DEFINE(M_DMAR_CTX, "dmar_ctx", "Intel DMAR Context");
static MALLOC_DEFINE(M_DMAR_DOMAIN, "dmar_dom", "Intel DMAR Domain");
-static void dmar_domain_unload_task(void *arg, int pending);
static void dmar_unref_domain_locked(struct dmar_unit *dmar,
struct dmar_domain *domain);
static void dmar_domain_destroy(struct dmar_domain *domain);
@@ -334,8 +333,6 @@ dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapp
unit = DMAR2IOMMU(dmar);
domain->domain = id;
LIST_INIT(>contexts);
- TASK_INIT(>iodom.unload_task, 0, dmar_domain_unload_task,
- domain);
iommu_domain_init(unit, iodom, _domain_map_ops);
domain->dmar = dmar;
@@ -875,26 +872,6 @@ dmar_domain_unload(struct dmar_domain *domain,
}
TAILQ_CONCAT(>tlb_flush_entries, entries, dmamap_link);
DMAR_UNLOCK(unit);
-}
-
-static void
-dmar_domain_unload_task(void *arg, int pending)
-{
- struct dmar_domain *domain;
- struct iommu_map_entries_tailq entries;
-
- domain = arg;
- TAILQ_INIT();
-
- for (;;) {
- DMAR_DOMAIN_LOCK(domain);
- TAILQ_SWAP(>iodom.unload_entries, ,
- iommu_map_entry, dmamap_link);
- DMAR_DOMAIN_UNLOCK(domain);
- if (TAILQ_EMPTY())
- break;
- dmar_domain_unload(domain, , true);
- }
}
struct iommu_ctx *
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svn commit: r363946 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Thu Aug 6 08:48:23 2020
New Revision: 363946
URL: https://svnweb.freebsd.org/changeset/base/363946
Log:
Add iommu_domain constructor and destructor.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25956
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/iommu.h
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_idpgtbl.c
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Thu Aug 6 08:21:33 2020
(r363945)
+++ head/sys/dev/iommu/busdma_iommu.c Thu Aug 6 08:48:23 2020
(r363946)
@@ -1063,3 +1063,23 @@ bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmama
free(ma, M_TEMP);
return (error);
}
+
+void
+iommu_domain_init(struct iommu_unit *unit, struct iommu_domain *domain,
+const struct iommu_domain_map_ops *ops)
+{
+
+ domain->ops = ops;
+ domain->iommu = unit;
+
+ RB_INIT(>rb_root);
+ TAILQ_INIT(>unload_entries);
+ mtx_init(>lock, "iodom", NULL, MTX_DEF);
+}
+
+void
+iommu_domain_fini(struct iommu_domain *domain)
+{
+
+ mtx_destroy(>lock);
+}
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Thu Aug 6 08:21:33 2020(r363945)
+++ head/sys/dev/iommu/iommu.h Thu Aug 6 08:48:23 2020(r363946)
@@ -223,6 +223,9 @@ int iommu_gas_reserve_region(struct iommu_domain *doma
void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
+void iommu_domain_init(struct iommu_unit *unit, struct iommu_domain *domain,
+const struct iommu_domain_map_ops *ops);
+void iommu_domain_fini(struct iommu_domain *domain);
bool bus_dma_iommu_set_buswide(device_t dev);
int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Thu Aug 6 08:21:33 2020
(r363945)
+++ head/sys/x86/iommu/intel_ctx.c Thu Aug 6 08:48:23 2020
(r363946)
@@ -322,6 +322,7 @@ static struct dmar_domain *
dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapped)
{
struct iommu_domain *iodom;
+ struct iommu_unit *unit;
struct dmar_domain *domain;
int error, id, mgaw;
@@ -330,16 +331,14 @@ dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapp
return (NULL);
domain = malloc(sizeof(*domain), M_DMAR_DOMAIN, M_WAITOK | M_ZERO);
iodom = DOM2IODOM(domain);
+ unit = DMAR2IOMMU(dmar);
domain->domain = id;
LIST_INIT(>contexts);
- RB_INIT(>iodom.rb_root);
- TAILQ_INIT(>iodom.unload_entries);
TASK_INIT(>iodom.unload_task, 0, dmar_domain_unload_task,
domain);
- mtx_init(>iodom.lock, "dmardom", NULL, MTX_DEF);
+ iommu_domain_init(unit, iodom, _domain_map_ops);
+
domain->dmar = dmar;
- domain->iodom.iommu = >iommu;
- domain_pgtbl_init(domain);
/*
* For now, use the maximal usable physical address of the
@@ -430,8 +429,11 @@ dmar_ctx_unlink(struct dmar_ctx *ctx)
static void
dmar_domain_destroy(struct dmar_domain *domain)
{
+ struct iommu_domain *iodom;
struct dmar_unit *dmar;
+ iodom = DOM2IODOM(domain);
+
KASSERT(TAILQ_EMPTY(>iodom.unload_entries),
("unfinished unloads %p", domain));
KASSERT(LIST_EMPTY(>contexts),
@@ -442,7 +444,7 @@ dmar_domain_destroy(struct dmar_domain *domain)
("destroying dom %p with refs %d", domain, domain->refs));
if ((domain->iodom.flags & IOMMU_DOMAIN_GAS_INITED) != 0) {
DMAR_DOMAIN_LOCK(domain);
- iommu_gas_fini_domain(DOM2IODOM(domain));
+ iommu_gas_fini_domain(iodom);
DMAR_DOMAIN_UNLOCK(domain);
}
if ((domain->iodom.flags & IOMMU_DOMAIN_PGTBL_INITED) != 0) {
@@ -450,7 +452,7 @@ dmar_domain_destroy(struct dmar_domain *domain)
DMAR_DOMAIN_PGLOCK(domain);
domain_free_pgtbl(domain);
}
- mtx_destroy(>iodom.lock);
+ iommu_domain_fini(iodom);
dmar = DOM2DMAR(domain);
free_unr(dmar->domids, domain->domain);
free(domain, M_DMAR_DOMAIN);
Modified: head/sys/x86/iommu/intel_dmar.h
==
--- head/sys/x86/iommu/intel_dmar.h Thu Aug 6 08:21:33 2020
(r363945)
+++ head/sys/x86/iommu/intel_dmar.h Thu Aug 6 08:48:23 2020
(r363946)
@@ -264,7 +264,7 @@ void domain_flush_iotlb_sync(struct dmar_domain *domai
iommu_gaddr_t size);
int domain_alloc_pgtbl(struct dmar_domain
svn commit: r363929 - in head/sys: amd64/include dev/iommu i386/include x86/include
Author: br
Date: Wed Aug 5 19:11:31 2020
New Revision: 363929
URL: https://svnweb.freebsd.org/changeset/base/363929
Log:
o Add machine/iommu.h and include MD iommu headers from it,
so we don't ifdef for every arch in busdma_iommu.c;
o No need to include specialreg.h for x86, remove it.
Requested by: andrew
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25957
Added:
head/sys/amd64/include/iommu.h (contents, props changed)
head/sys/i386/include/iommu.h (contents, props changed)
head/sys/x86/include/iommu.h (contents, props changed)
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/iommu_gas.c
Added: head/sys/amd64/include/iommu.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/amd64/include/iommu.h Wed Aug 5 19:11:31 2020
(r363929)
@@ -0,0 +1,6 @@
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD$ */
+
+#include
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Wed Aug 5 19:05:49 2020
(r363928)
+++ head/sys/dev/iommu/busdma_iommu.c Wed Aug 5 19:11:31 2020
(r363929)
@@ -59,17 +59,12 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
-#if defined(__amd64__) || defined(__i386__)
-#include
-#include
-#include
+#include
#include
-#include
-#include
-#endif
/*
* busdma_iommu.c, the implementation of the busdma(9) interface using
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Wed Aug 5 19:05:49 2020
(r363928)
+++ head/sys/dev/iommu/iommu_gas.c Wed Aug 5 19:11:31 2020
(r363929)
@@ -65,9 +65,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#if defined(__amd64__) || defined(__i386__)
-#include
-#endif
+#include
#include
/*
Added: head/sys/i386/include/iommu.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/i386/include/iommu.h Wed Aug 5 19:11:31 2020
(r363929)
@@ -0,0 +1,6 @@
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD$ */
+
+#include
Added: head/sys/x86/include/iommu.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/x86/include/iommu.hWed Aug 5 19:11:31 2020
(r363929)
@@ -0,0 +1,13 @@
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD$ */
+
+#ifndef_MACHINE_IOMMU_H_
+#define_MACHINE_IOMMU_H_
+
+#include
+#include
+#include
+
+#endif /* !_MACHINE_IOMMU_H_ */
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svn commit: r363865 - head/sys/dev/iommu
Author: br
Date: Tue Aug 4 20:54:12 2020
New Revision: 363865
URL: https://svnweb.freebsd.org/changeset/base/363865
Log:
Remove unneeded cast to struct iommu_domain *.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/iommu/iommu_gas.c
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Tue Aug 4 20:51:05 2020
(r363864)
+++ head/sys/dev/iommu/iommu_gas.c Tue Aug 4 20:54:12 2020
(r363865)
@@ -111,7 +111,7 @@ void
iommu_gas_free_entry(struct iommu_domain *domain, struct iommu_map_entry
*entry)
{
- KASSERT(domain == (struct iommu_domain *)entry->domain,
+ KASSERT(domain == entry->domain,
("mismatched free domain %p entry %p entry->domain %p", domain,
entry, entry->domain));
atomic_subtract_int(>entries_cnt, 1);
@@ -174,7 +174,7 @@ iommu_gas_check_free(struct iommu_domain *domain)
iommu_gaddr_t v;
RB_FOREACH(entry, iommu_gas_entries_tree, >rb_root) {
- KASSERT(domain == (struct iommu_domain *)entry->domain,
+ KASSERT(domain == entry->domain,
("mismatched free domain %p entry %p entry->domain %p",
domain, entry, entry->domain));
l = RB_LEFT(entry, rb_entry);
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svn commit: r363864 - head/sys/x86/iommu
Author: br
Date: Tue Aug 4 20:51:05 2020
New Revision: 363864
URL: https://svnweb.freebsd.org/changeset/base/363864
Log:
Add a few macroses for conversion between DMAR unit, domain, ctx
and IOMMU unit, domain, ctx.
Reviewed by: kib
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D25926
Modified:
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_idpgtbl.c
head/sys/x86/iommu/intel_quirks.c
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Tue Aug 4 20:31:03 2020
(r363863)
+++ head/sys/x86/iommu/intel_ctx.c Tue Aug 4 20:51:05 2020
(r363864)
@@ -117,7 +117,7 @@ dmar_map_ctx_entry(struct dmar_ctx *ctx, struct sf_buf
struct dmar_unit *dmar;
dmar_ctx_entry_t *ctxp;
- dmar = (struct dmar_unit *)ctx->context.domain->iommu;
+ dmar = CTX2DMAR(ctx);
ctxp = dmar_map_pgtbl(dmar->ctx_obj, 1 +
PCI_RID2BUS(ctx->rid), IOMMU_PGF_NOALLOC | IOMMU_PGF_WAITOK, sfp);
@@ -131,7 +131,7 @@ device_tag_init(struct dmar_ctx *ctx, device_t dev)
struct dmar_domain *domain;
bus_addr_t maxaddr;
- domain = (struct dmar_domain *)ctx->context.domain;
+ domain = CTX2DOM(ctx);
maxaddr = MIN(domain->iodom.end, BUS_SPACE_MAXADDR);
ctx->context.tag->common.ref_count = 1; /* Prevent free */
ctx->context.tag->common.impl = _dma_iommu_impl;
@@ -141,7 +141,7 @@ device_tag_init(struct dmar_ctx *ctx, device_t dev)
ctx->context.tag->common.maxsize = maxaddr;
ctx->context.tag->common.nsegments = BUS_SPACE_UNRESTRICTED;
ctx->context.tag->common.maxsegsz = maxaddr;
- ctx->context.tag->ctx = (struct iommu_ctx *)ctx;
+ ctx->context.tag->ctx = CTX2IOCTX(ctx);
ctx->context.tag->owner = dev;
}
@@ -178,8 +178,8 @@ ctx_id_entry_init(struct dmar_ctx *ctx, dmar_ctx_entry
vm_page_t ctx_root;
int i;
- domain = (struct dmar_domain *)ctx->context.domain;
- unit = (struct dmar_unit *)domain->iodom.iommu;
+ domain = CTX2DOM(ctx);
+ unit = DOM2DMAR(domain);
KASSERT(move || (ctxp->ctx1 == 0 && ctxp->ctx2 == 0),
("dmar%d: initialized ctx entry %d:%d:%d 0x%jx 0x%jx",
unit->iommu.unit, busno, pci_get_slot(ctx->context.tag->owner),
@@ -196,7 +196,7 @@ ctx_id_entry_init(struct dmar_ctx *ctx, dmar_ctx_entry
IOMMU_PGF_NOALLOC);
}
- if (iommu_is_buswide_ctx((struct iommu_unit *)unit, busno)) {
+ if (iommu_is_buswide_ctx(DMAR2IOMMU(unit), busno)) {
MPASS(!move);
for (i = 0; i <= PCI_BUSMAX; i++) {
ctx_id_entry_init_one([i], domain, ctx_root);
@@ -283,8 +283,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
ma[i] = vm_page_getfake(entry->start + PAGE_SIZE * i,
VM_MEMATTR_DEFAULT);
}
- error1 = iommu_gas_map_region((struct iommu_domain *)domain,
- entry,
+ error1 = iommu_gas_map_region(DOM2IODOM(domain), entry,
IOMMU_MAP_ENTRY_READ | IOMMU_MAP_ENTRY_WRITE,
IOMMU_MF_CANWAIT | IOMMU_MF_RMRR, ma);
/*
@@ -310,8 +309,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
error = error1;
}
TAILQ_REMOVE(_entries, entry, unroll_link);
- iommu_gas_free_entry((struct iommu_domain *)domain,
- entry);
+ iommu_gas_free_entry(DOM2IODOM(domain), entry);
}
for (i = 0; i < size; i++)
vm_page_putfake(ma[i]);
@@ -331,7 +329,7 @@ dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapp
if (id == -1)
return (NULL);
domain = malloc(sizeof(*domain), M_DMAR_DOMAIN, M_WAITOK | M_ZERO);
- iodom = (struct iommu_domain *)domain;
+ iodom = DOM2IODOM(domain);
domain->domain = id;
LIST_INIT(>contexts);
RB_INIT(>iodom.rb_root);
@@ -358,7 +356,7 @@ dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapp
/* Use all supported address space for remapping. */
domain->iodom.end = 1ULL << (domain->agaw - 1);
- iommu_gas_init_domain((struct iommu_domain *)domain);
+ iommu_gas_init_domain(DOM2IODOM(domain));
if (id_mapped) {
if ((dmar->hw_ecap & DMAR_ECAP_PT) == 0) {
@@ -389,7 +387,7 @@ dmar_ctx_alloc(struct dmar_domain *domain, uint16_t ri
struct dmar_ctx *ctx;
ctx = malloc(sizeof(*ctx), M_DMAR_CTX, M_WAITOK | M_ZERO);
- ctx->context.domain = (struct iommu_domain *)domain;
+ ctx->context.domain =
svn commit: r363747 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Fri Jul 31 23:02:17 2020
New Revision: 363747
URL: https://svnweb.freebsd.org/changeset/base/363747
Log:
Add iommu_domain_map_ops virtual table with map/unmap methods
so x86 can support Intel DMAR and AMD IOMMU simultaneously.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25894
Modified:
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_idpgtbl.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Fri Jul 31 22:23:32 2020(r363746)
+++ head/sys/dev/iommu/iommu.h Fri Jul 31 23:02:17 2020(r363747)
@@ -100,6 +100,13 @@ struct iommu_unit {
uint32_t buswide_ctxs[(PCI_BUSMAX + 1) / NBBY / sizeof(uint32_t)];
};
+struct iommu_domain_map_ops {
+ int (*map)(struct iommu_domain *domain, iommu_gaddr_t base,
+ iommu_gaddr_t size, vm_page_t *ma, uint64_t pflags, int flags);
+ int (*unmap)(struct iommu_domain *domain, iommu_gaddr_t base,
+ iommu_gaddr_t size, int flags);
+};
+
/*
* Locking annotations:
* (u) - Protected by iommu unit lock
@@ -109,6 +116,7 @@ struct iommu_unit {
struct iommu_domain {
struct iommu_unit *iommu; /* (c) */
+ const struct iommu_domain_map_ops *ops;
struct mtx lock;/* (c) */
struct task unload_task;/* (c) */
u_int entries_cnt; /* (d) */
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Fri Jul 31 22:23:32 2020
(r363746)
+++ head/sys/dev/iommu/iommu_gas.c Fri Jul 31 23:02:17 2020
(r363747)
@@ -66,10 +66,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#if defined(__amd64__) || defined(__i386__)
-#include
-#include
#include
-#include
#endif
#include
@@ -620,9 +617,9 @@ iommu_gas_map(struct iommu_domain *domain,
entry->flags |= eflags;
IOMMU_DOMAIN_UNLOCK(domain);
- error = domain_map_buf(domain, entry->start, entry->end - entry->start,
- ma, eflags,
- ((flags & IOMMU_MF_CANWAIT) != 0 ? IOMMU_PGF_WAITOK : 0));
+ error = domain->ops->map(domain, entry->start,
+ entry->end - entry->start, ma, eflags,
+ ((flags & IOMMU_MF_CANWAIT) != 0 ? IOMMU_PGF_WAITOK : 0));
if (error == ENOMEM) {
iommu_domain_unload_entry(entry, true);
return (error);
@@ -658,9 +655,9 @@ iommu_gas_map_region(struct iommu_domain *domain, stru
if (entry->end == entry->start)
return (0);
- error = domain_map_buf(domain, entry->start, entry->end - entry->start,
- ma + OFF_TO_IDX(start - entry->start), eflags,
- ((flags & IOMMU_MF_CANWAIT) != 0 ? IOMMU_PGF_WAITOK : 0));
+ error = domain->ops->map(domain, entry->start,
+ entry->end - entry->start, ma + OFF_TO_IDX(start - entry->start),
+ eflags, ((flags & IOMMU_MF_CANWAIT) != 0 ? IOMMU_PGF_WAITOK : 0));
if (error == ENOMEM) {
iommu_domain_unload_entry(entry, false);
return (error);
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Fri Jul 31 22:23:32 2020
(r363746)
+++ head/sys/x86/iommu/intel_ctx.c Fri Jul 31 23:02:17 2020
(r363747)
@@ -341,6 +341,7 @@ dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapp
mtx_init(>iodom.lock, "dmardom", NULL, MTX_DEF);
domain->dmar = dmar;
domain->iodom.iommu = >iommu;
+ domain_pgtbl_init(domain);
/*
* For now, use the maximal usable physical address of the
@@ -842,15 +843,17 @@ dmar_domain_unload(struct dmar_domain *domain,
struct iommu_map_entries_tailq *entries, bool cansleep)
{
struct dmar_unit *unit;
+ struct iommu_domain *iodom;
struct iommu_map_entry *entry, *entry1;
int error;
+ iodom = (struct iommu_domain *)domain;
unit = (struct dmar_unit *)domain->iodom.iommu;
TAILQ_FOREACH_SAFE(entry, entries, dmamap_link, entry1) {
KASSERT((entry->flags & IOMMU_MAP_ENTRY_MAP) != 0,
("not mapped entry %p %p", domain, entry));
- error = domain_unmap_buf(domain, entry->start, entry->end -
+ error = iodom->ops->unmap(iodom, entry->start, entry->end -
entry->start, cansleep ? IOMMU_PGF_WAITOK : 0);
KASSERT(error == 0, ("unmap %p error %d", domain, error));
if (!unit->qi_enabled) {
Modified: head/sys/x86/iommu/intel_dmar.h
==
---
svn commit: r363675 - in head/sys: dev/iommu dev/ntb/ntb_hw x86/iommu
Author: br
Date: Wed Jul 29 22:08:54 2020
New Revision: 363675
URL: https://svnweb.freebsd.org/changeset/base/363675
Log:
o Don't include headers from iommu.h, include them from the header
consumers instead;
o Order includes properly.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25878
Modified:
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c
head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_idpgtbl.c
head/sys/x86/iommu/intel_intrmap.c
head/sys/x86/iommu/intel_qi.c
head/sys/x86/iommu/intel_quirks.c
head/sys/x86/iommu/intel_utils.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Wed Jul 29 21:15:06 2020(r363674)
+++ head/sys/dev/iommu/iommu.h Wed Jul 29 22:08:54 2020(r363675)
@@ -34,14 +34,6 @@
#ifndef _SYS_IOMMU_H_
#define _SYS_IOMMU_H_
-#include
-#include
-#include
-#include
-#include
-
-#include
-
/* Host or physical memory address, after translation. */
typedef uint64_t iommu_haddr_t;
/* Guest or bus address, before translation. */
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Wed Jul 29 21:15:06 2020
(r363674)
+++ head/sys/dev/iommu/iommu_gas.c Wed Jul 29 22:08:54 2020
(r363675)
@@ -52,7 +52,6 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
#include
#include
@@ -60,6 +59,9 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
@@ -67,11 +69,9 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
-#include
-#include
#include
#endif
+#include
/*
* Guest Address Space management.
Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c
==
--- head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Wed Jul 29 21:15:06 2020
(r363674)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Wed Jul 29 22:08:54 2020
(r363675)
@@ -50,6 +50,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
#include
#include
#include
Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
==
--- head/sys/dev/ntb/ntb_hw/ntb_hw_plx.cWed Jul 29 21:15:06 2020
(r363674)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw_plx.cWed Jul 29 22:08:54 2020
(r363675)
@@ -42,6 +42,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
#include
#include
#include
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Wed Jul 29 21:15:06 2020
(r363674)
+++ head/sys/x86/iommu/intel_ctx.c Wed Jul 29 22:08:54 2020
(r363675)
@@ -58,18 +58,18 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
+#include
+#include
#include
#include
#include
#include
-#include
-#include
#include
-#include
#include
-#include
+#include
#include
-#include
static MALLOC_DEFINE(M_DMAR_CTX, "dmar_ctx", "Intel DMAR Context");
static MALLOC_DEFINE(M_DMAR_DOMAIN, "dmar_dom", "Intel DMAR Domain");
Modified: head/sys/x86/iommu/intel_drv.c
==
--- head/sys/x86/iommu/intel_drv.c Wed Jul 29 21:15:06 2020
(r363674)
+++ head/sys/x86/iommu/intel_drv.c Wed Jul 29 22:08:54 2020
(r363675)
@@ -54,11 +54,6 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
-#include
-#include
-#include
-#include
#include
#include
#include
@@ -66,11 +61,16 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
-#include
-#include
+#include
+#include
+#include
#include
#include
+#include
+#include
+#include
+#include
+#include
#include
#ifdef DEV_APIC
Modified: head/sys/x86/iommu/intel_idpgtbl.c
==
--- head/sys/x86/iommu/intel_idpgtbl.c Wed Jul 29 21:15:06 2020
(r363674)
+++ head/sys/x86/iommu/intel_idpgtbl.c Wed Jul 29 22:08:54 2020
(r363675)
@@ -58,15 +58,15 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
#include
#include
#include
-#include
#include
-#include
+#include
#include
static int domain_unmap_buf_locked(struct dmar_domain *domain,
Modified: head/sys/x86/iommu/intel_intrmap.c
==
---
svn commit: r363669 - head/sys/x86/x86
Author: br
Date: Wed Jul 29 19:22:50 2020
New Revision: 363669
URL: https://svnweb.freebsd.org/changeset/base/363669
Log:
Fix !ACPI_DMAR build.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25882
Modified:
head/sys/x86/x86/busdma_machdep.c
Modified: head/sys/x86/x86/busdma_machdep.c
==
--- head/sys/x86/x86/busdma_machdep.c Wed Jul 29 17:05:31 2020
(r363668)
+++ head/sys/x86/x86/busdma_machdep.c Wed Jul 29 19:22:50 2020
(r363669)
@@ -300,6 +300,10 @@ bus_dma_tag_destroy(bus_dma_tag_t dmat)
}
#ifndef ACPI_DMAR
+bool bus_dma_iommu_set_buswide(device_t dev);
+int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
+vm_paddr_t start, vm_size_t length, int flags);
+
bool
bus_dma_iommu_set_buswide(device_t dev)
{
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svn commit: r363666 - head/sys/dev/ntb/ntb_hw
Author: br
Date: Wed Jul 29 15:46:17 2020
New Revision: 363666
URL: https://svnweb.freebsd.org/changeset/base/363666
Log:
Fix build.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25879
Modified:
head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c
head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c
==
--- head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Wed Jul 29 14:33:31 2020
(r363665)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Wed Jul 29 15:46:17 2020
(r363666)
@@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include "ntb_hw_intel.h"
#include "../ntb.h"
Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
==
--- head/sys/dev/ntb/ntb_hw/ntb_hw_plx.cWed Jul 29 14:33:31 2020
(r363665)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw_plx.cWed Jul 29 15:46:17 2020
(r363666)
@@ -49,6 +49,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include "../ntb.h"
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svn commit: r363663 - in head/sys: dev/iommu x86/include x86/iommu
Author: br
Date: Wed Jul 29 13:23:27 2020
New Revision: 363663
URL: https://svnweb.freebsd.org/changeset/base/363663
Log:
o Move iommu_set_buswide_ctx, iommu_is_buswide_ctx to
the generic iommu busdma backend;
o Move bus_dma_iommu_set_buswide, bus_dma_iommu_load_ident
prototypes to iommu.h.
Reviewed by: kib
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D25866
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/iommu.h
head/sys/x86/include/bus_dma.h
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Wed Jul 29 11:19:57 2020
(r363662)
+++ head/sys/dev/iommu/busdma_iommu.c Wed Jul 29 13:23:27 2020
(r363663)
@@ -326,6 +326,26 @@ bus_dma_iommu_set_buswide(device_t dev)
return (true);
}
+void
+iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno)
+{
+
+ MPASS(busno <= PCI_BUSMAX);
+ IOMMU_LOCK(unit);
+ unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |=
+ 1 << (busno % (NBBY * sizeof(uint32_t)));
+ IOMMU_UNLOCK(unit);
+}
+
+bool
+iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno)
+{
+
+ MPASS(busno <= PCI_BUSMAX);
+ return ((unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] &
+ (1U << (busno % (NBBY * sizeof(uint32_t) != 0);
+}
+
static MALLOC_DEFINE(M_IOMMU_DMAMAP, "iommu_dmamap", "IOMMU DMA Map");
static void iommu_bus_schedule_dmamap(struct iommu_unit *unit,
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Wed Jul 29 11:19:57 2020(r363662)
+++ head/sys/dev/iommu/iommu.h Wed Jul 29 13:23:27 2020(r363663)
@@ -221,6 +221,13 @@ int iommu_gas_map_region(struct iommu_domain *domain,
int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
iommu_gaddr_t end);
+void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
+bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
+
+bool bus_dma_iommu_set_buswide(device_t dev);
+int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
+vm_paddr_t start, vm_size_t length, int flags);
+
SYSCTL_DECL(_hw_iommu);
#endif /* !_SYS_IOMMU_H_ */
Modified: head/sys/x86/include/bus_dma.h
==
--- head/sys/x86/include/bus_dma.h Wed Jul 29 11:19:57 2020
(r363662)
+++ head/sys/x86/include/bus_dma.h Wed Jul 29 13:23:27 2020
(r363663)
@@ -191,11 +191,5 @@ _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t
return (tc->impl->map_complete(dmat, map, segs, nsegs, error));
}
-#ifdef _KERNEL
-bool bus_dma_iommu_set_buswide(device_t dev);
-int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
-vm_paddr_t start, vm_size_t length, int flags);
-#endif
-
#endif /* !_X86_BUS_DMA_H_ */
Modified: head/sys/x86/iommu/intel_dmar.h
==
--- head/sys/x86/iommu/intel_dmar.h Wed Jul 29 11:19:57 2020
(r363662)
+++ head/sys/x86/iommu/intel_dmar.h Wed Jul 29 13:23:27 2020
(r363663)
@@ -281,9 +281,6 @@ void dmar_quirks_pre_use(struct iommu_unit *dmar);
int dmar_init_irt(struct dmar_unit *unit);
void dmar_fini_irt(struct dmar_unit *unit);
-void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
-bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
-
extern iommu_haddr_t dmar_high;
extern int haw;
extern int dmar_tbl_pagecnt;
Modified: head/sys/x86/iommu/intel_drv.c
==
--- head/sys/x86/iommu/intel_drv.c Wed Jul 29 11:19:57 2020
(r363662)
+++ head/sys/x86/iommu/intel_drv.c Wed Jul 29 13:23:27 2020
(r363663)
@@ -592,26 +592,6 @@ static driver_tdmar_driver = {
DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
MODULE_DEPEND(dmar, acpi, 1, 1, 1);
-void
-iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno)
-{
-
- MPASS(busno <= PCI_BUSMAX);
- IOMMU_LOCK(unit);
- unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |=
- 1 << (busno % (NBBY * sizeof(uint32_t)));
- IOMMU_UNLOCK(unit);
-}
-
-bool
-iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno)
-{
-
- MPASS(busno <= PCI_BUSMAX);
- return ((unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] &
- (1U << (busno % (NBBY * sizeof(uint32_t) != 0);
-}
-
static void
dmar_print_path(int busno, int depth, const ACPI_DMAR_PCI_PATH *path)
{
___
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To
svn commit: r363650 - in head/sys: dev/iommu dev/ntb/ntb_hw x86/include x86/iommu x86/x86
Author: br
Date: Tue Jul 28 16:08:14 2020
New Revision: 363650
URL: https://svnweb.freebsd.org/changeset/base/363650
Log:
o Move the buswide_ctxs bitmap to iommu_unit and rename related functions.
o Rename bus_dma_dmar_load_ident() as well.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25852
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/iommu.h
head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c
head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
head/sys/x86/include/bus_dma.h
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
head/sys/x86/x86/busdma_machdep.c
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Tue Jul 28 15:26:19 2020
(r363649)
+++ head/sys/dev/iommu/busdma_iommu.c Tue Jul 28 16:08:14 2020
(r363650)
@@ -299,7 +299,7 @@ acpi_iommu_get_dma_tag(device_t dev, device_t child)
}
bool
-bus_dma_dmar_set_buswide(device_t dev)
+bus_dma_iommu_set_buswide(device_t dev)
{
struct iommu_unit *unit;
device_t parent;
@@ -317,12 +317,12 @@ bus_dma_dmar_set_buswide(device_t dev)
if (slot != 0 || func != 0) {
if (bootverbose) {
device_printf(dev,
- "dmar%d pci%d:%d:%d requested buswide busdma\n",
+ "iommu%d pci%d:%d:%d requested buswide busdma\n",
unit->unit, busno, slot, func);
}
return (false);
}
- dmar_set_buswide_ctx(unit, busno);
+ iommu_set_buswide_ctx(unit, busno);
return (true);
}
@@ -987,7 +987,7 @@ iommu_fini_busdma(struct iommu_unit *unit)
}
int
-bus_dma_dmar_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map1,
+bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map1,
vm_paddr_t start, vm_size_t length, int flags)
{
struct bus_dma_tag_common *tc;
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Tue Jul 28 15:26:19 2020(r363649)
+++ head/sys/dev/iommu/iommu.h Tue Jul 28 16:08:14 2020(r363650)
@@ -34,12 +34,14 @@
#ifndef _SYS_IOMMU_H_
#define _SYS_IOMMU_H_
+#include
#include
#include
#include
#include
-#include
+#include
+
/* Host or physical memory address, after translation. */
typedef uint64_t iommu_haddr_t;
/* Guest or bus address, before translation. */
@@ -96,6 +98,14 @@ struct iommu_unit {
struct task dmamap_load_task;
TAILQ_HEAD(, bus_dmamap_iommu) delayed_maps;
struct taskqueue *delayed_taskqueue;
+
+ /*
+* Bitmap of buses for which context must ignore slot:func,
+* duplicating the page table pointer into all context table
+* entries. This is a client-controlled quirk to support some
+* NTBs.
+*/
+ uint32_t buswide_ctxs[(PCI_BUSMAX + 1) / NBBY / sizeof(uint32_t)];
};
/*
Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c
==
--- head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Tue Jul 28 15:26:19 2020
(r363649)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Tue Jul 28 16:08:14 2020
(r363650)
@@ -811,7 +811,7 @@ intel_ntb_map_pci_bars(struct ntb_softc *ntb)
device_printf(ntb->device, "Unable to create BAR0 map\n");
return (ENOMEM);
}
- if (bus_dma_dmar_load_ident(ntb->bar0_dma_tag, ntb->bar0_dma_map,
+ if (bus_dma_iommu_load_ident(ntb->bar0_dma_tag, ntb->bar0_dma_map,
bar->pbase, bar->size, 0)) {
device_printf(ntb->device, "Unable to load BAR0 map\n");
return (ENOMEM);
Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
==
--- head/sys/dev/ntb/ntb_hw/ntb_hw_plx.cTue Jul 28 15:26:19 2020
(r363649)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw_plx.cTue Jul 28 16:08:14 2020
(r363650)
@@ -343,7 +343,7 @@ ntb_plx_attach(device_t dev)
* The device occupies whole bus. In translated TLP slot field
* keeps LUT index (original bus/slot), function is passed through.
*/
- bus_dma_dmar_set_buswide(dev);
+ bus_dma_iommu_set_buswide(dev);
/* Identify chip port we are connected to. */
val = bus_read_4(sc->conf_res, 0x360);
Modified: head/sys/x86/include/bus_dma.h
==
--- head/sys/x86/include/bus_dma.h Tue Jul 28 15:26:19 2020
(r363649)
+++ head/sys/x86/include/bus_dma.h Tue Jul 28 16:08:14 2020
(r363650)
@@ -192,8 +192,8 @@ _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t
}
#ifdef
svn commit: r363560 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Sun Jul 26 12:29:22 2020
New Revision: 363560
URL: https://svnweb.freebsd.org/changeset/base/363560
Log:
Rename DMAR flags:
o DMAR_DOMAIN_* -> IOMMU_DOMAIN_*
o DMAR_PGF_* -> IOMMU_PGF_*
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25812
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_idpgtbl.c
head/sys/x86/iommu/intel_utils.c
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Sun Jul 26 11:16:43 2020
(r363559)
+++ head/sys/dev/iommu/busdma_iommu.c Sun Jul 26 12:29:22 2020
(r363560)
@@ -1017,7 +1017,7 @@ bus_dma_dmar_load_ident(bus_dma_tag_t dmat, bus_dmamap
map = (struct bus_dmamap_iommu *)map1;
waitok = (flags & BUS_DMA_NOWAIT) != 0;
- entry = iommu_map_alloc_entry(domain, waitok ? 0 : DMAR_PGF_WAITOK);
+ entry = iommu_map_alloc_entry(domain, waitok ? 0 : IOMMU_PGF_WAITOK);
if (entry == NULL)
return (ENOMEM);
entry->start = start;
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Sun Jul 26 11:16:43 2020(r363559)
+++ head/sys/dev/iommu/iommu.h Sun Jul 26 12:29:22 2020(r363560)
@@ -134,11 +134,11 @@ struct iommu_ctx {
ephemeral reference is kept
to prevent context destruction */
-#defineDMAR_DOMAIN_GAS_INITED 0x0001
-#defineDMAR_DOMAIN_PGTBL_INITED0x0002
-#defineDMAR_DOMAIN_IDMAP 0x0010 /* Domain uses identity
+#defineIOMMU_DOMAIN_GAS_INITED 0x0001
+#defineIOMMU_DOMAIN_PGTBL_INITED 0x0002
+#defineIOMMU_DOMAIN_IDMAP 0x0010 /* Domain uses identity
page table */
-#defineDMAR_DOMAIN_RMRR0x0020 /* Domain contains RMRR
entry,
+#defineIOMMU_DOMAIN_RMRR 0x0020 /* Domain contains RMRR
entry,
cannot be turned off */
/* Map flags */
@@ -146,11 +146,11 @@ struct iommu_ctx {
#defineIOMMU_MF_CANSPLIT 0x0002
#defineIOMMU_MF_RMRR 0x0004
-#defineDMAR_PGF_WAITOK 0x0001
-#defineDMAR_PGF_ZERO 0x0002
-#defineDMAR_PGF_ALLOC 0x0004
-#defineDMAR_PGF_NOALLOC0x0008
-#defineDMAR_PGF_OBJL 0x0010
+#defineIOMMU_PGF_WAITOK0x0001
+#defineIOMMU_PGF_ZERO 0x0002
+#defineIOMMU_PGF_ALLOC 0x0004
+#defineIOMMU_PGF_NOALLOC 0x0008
+#defineIOMMU_PGF_OBJL 0x0010
#defineIOMMU_LOCK(unit)mtx_lock(&(unit)->lock)
#defineIOMMU_UNLOCK(unit) mtx_unlock(&(unit)->lock)
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Sun Jul 26 11:16:43 2020
(r363559)
+++ head/sys/dev/iommu/iommu_gas.c Sun Jul 26 12:29:22 2020
(r363560)
@@ -98,10 +98,10 @@ iommu_gas_alloc_entry(struct iommu_domain *domain, u_i
{
struct iommu_map_entry *res;
- KASSERT((flags & ~(DMAR_PGF_WAITOK)) == 0,
+ KASSERT((flags & ~(IOMMU_PGF_WAITOK)) == 0,
("unsupported flags %x", flags));
- res = uma_zalloc(iommu_map_entry_zone, ((flags & DMAR_PGF_WAITOK) !=
+ res = uma_zalloc(iommu_map_entry_zone, ((flags & IOMMU_PGF_WAITOK) !=
0 ? M_WAITOK : M_NOWAIT) | M_ZERO);
if (res != NULL) {
res->domain = domain;
@@ -218,8 +218,8 @@ iommu_gas_init_domain(struct iommu_domain *domain)
{
struct iommu_map_entry *begin, *end;
- begin = iommu_gas_alloc_entry(domain, DMAR_PGF_WAITOK);
- end = iommu_gas_alloc_entry(domain, DMAR_PGF_WAITOK);
+ begin = iommu_gas_alloc_entry(domain, IOMMU_PGF_WAITOK);
+ end = iommu_gas_alloc_entry(domain, IOMMU_PGF_WAITOK);
IOMMU_DOMAIN_LOCK(domain);
KASSERT(domain->entries_cnt == 2, ("dirty domain %p", domain));
@@ -238,7 +238,7 @@ iommu_gas_init_domain(struct iommu_domain *domain)
domain->first_place = begin;
domain->last_place = end;
- domain->flags |= DMAR_DOMAIN_GAS_INITED;
+ domain->flags |= IOMMU_DOMAIN_GAS_INITED;
IOMMU_DOMAIN_UNLOCK(domain);
}
@@ -598,7 +598,7 @@ iommu_gas_map(struct iommu_domain *domain,
("invalid flags 0x%x", flags));
entry = iommu_gas_alloc_entry(domain,
- (flags & IOMMU_MF_CANWAIT) !=
svn commit: r363534 - in head/sys: dev/iommu x86/iommu
Author: br Date: Sat Jul 25 21:37:07 2020 New Revision: 363534 URL: https://svnweb.freebsd.org/changeset/base/363534 Log: o Make the _hw_iommu sysctl node non-static; o Move the dmar sysctl knobs to _hw_iommu_dmar. Reviewed by: kib Sponsored by: DARPA/AFRL Differential Revision:https://reviews.freebsd.org/D25807 Modified: head/sys/dev/iommu/iommu.h head/sys/dev/iommu/iommu_gas.c head/sys/x86/iommu/intel_utils.c Modified: head/sys/dev/iommu/iommu.h == --- head/sys/dev/iommu/iommu.h Sat Jul 25 19:07:12 2020(r363533) +++ head/sys/dev/iommu/iommu.h Sat Jul 25 21:37:07 2020(r363534) @@ -35,6 +35,7 @@ #define _SYS_IOMMU_H_ #include +#include #include #include #include @@ -209,5 +210,7 @@ int iommu_gas_map_region(struct iommu_domain *domain, struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma); int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start, iommu_gaddr_t end); + +SYSCTL_DECL(_hw_iommu); #endif /* !_SYS_IOMMU_H_ */ Modified: head/sys/dev/iommu/iommu_gas.c == --- head/sys/dev/iommu/iommu_gas.c Sat Jul 25 19:07:12 2020 (r363533) +++ head/sys/dev/iommu/iommu_gas.c Sat Jul 25 21:37:07 2020 (r363534) @@ -732,9 +732,9 @@ iommu_map_region(struct iommu_domain *domain, struct i return (error); } +SYSCTL_NODE(_hw, OID_AUTO, iommu, CTLFLAG_RW | CTLFLAG_MPSAFE, NULL, ""); + #ifdef INVARIANTS -static SYSCTL_NODE(_hw, OID_AUTO, iommu, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, -""); SYSCTL_INT(_hw_iommu, OID_AUTO, check_free, CTLFLAG_RWTUN, _check_free, 0, "Check the GPA RBtree for free_down and free_after validity"); Modified: head/sys/x86/iommu/intel_utils.c == --- head/sys/x86/iommu/intel_utils.cSat Jul 25 19:07:12 2020 (r363533) +++ head/sys/x86/iommu/intel_utils.cSat Jul 25 21:37:07 2020 (r363534) @@ -655,15 +655,15 @@ dmar_timeout_sysctl(SYSCTL_HANDLER_ARGS) return (error); } -static SYSCTL_NODE(_hw, OID_AUTO, dmar, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, -""); -SYSCTL_INT(_hw_dmar, OID_AUTO, tbl_pagecnt, CTLFLAG_RD, +static SYSCTL_NODE(_hw_iommu, OID_AUTO, dmar, CTLFLAG_RD | CTLFLAG_MPSAFE, +NULL, ""); +SYSCTL_INT(_hw_iommu_dmar, OID_AUTO, tbl_pagecnt, CTLFLAG_RD, _tbl_pagecnt, 0, "Count of pages used for DMAR pagetables"); -SYSCTL_INT(_hw_dmar, OID_AUTO, batch_coalesce, CTLFLAG_RWTUN, +SYSCTL_INT(_hw_iommu_dmar, OID_AUTO, batch_coalesce, CTLFLAG_RWTUN, _batch_coalesce, 0, "Number of qi batches between interrupt"); -SYSCTL_PROC(_hw_dmar, OID_AUTO, timeout, +SYSCTL_PROC(_hw_iommu_dmar, OID_AUTO, timeout, CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 0, dmar_timeout_sysctl, "QU", "Timeout for command wait, in nanoseconds"); ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r363533 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Sat Jul 25 19:07:12 2020
New Revision: 363533
URL: https://svnweb.freebsd.org/changeset/base/363533
Log:
o Move iommu gas prototypes, DMAR flags to iommu.h;
o Move hw.dmar sysctl node to iommu_gas.c.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25802
Modified:
head/sys/dev/iommu/iommu.h
head/sys/dev/iommu/iommu_gas.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_utils.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Sat Jul 25 18:29:10 2020(r363532)
+++ head/sys/dev/iommu/iommu.h Sat Jul 25 19:07:12 2020(r363533)
@@ -133,6 +133,24 @@ struct iommu_ctx {
ephemeral reference is kept
to prevent context destruction */
+#defineDMAR_DOMAIN_GAS_INITED 0x0001
+#defineDMAR_DOMAIN_PGTBL_INITED0x0002
+#defineDMAR_DOMAIN_IDMAP 0x0010 /* Domain uses identity
+ page table */
+#defineDMAR_DOMAIN_RMRR0x0020 /* Domain contains RMRR
entry,
+ cannot be turned off */
+
+/* Map flags */
+#defineIOMMU_MF_CANWAIT0x0001
+#defineIOMMU_MF_CANSPLIT 0x0002
+#defineIOMMU_MF_RMRR 0x0004
+
+#defineDMAR_PGF_WAITOK 0x0001
+#defineDMAR_PGF_ZERO 0x0002
+#defineDMAR_PGF_ALLOC 0x0004
+#defineDMAR_PGF_NOALLOC0x0008
+#defineDMAR_PGF_OBJL 0x0010
+
#defineIOMMU_LOCK(unit)mtx_lock(&(unit)->lock)
#defineIOMMU_UNLOCK(unit) mtx_unlock(&(unit)->lock)
#defineIOMMU_ASSERT_LOCKED(unit) mtx_assert(&(unit)->lock,
MA_OWNED)
@@ -173,5 +191,23 @@ int iommu_map(struct iommu_domain *iodom,
u_int eflags, u_int flags, vm_page_t *ma, struct iommu_map_entry **res);
int iommu_map_region(struct iommu_domain *domain,
struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma);
+
+void iommu_gas_init_domain(struct iommu_domain *domain);
+void iommu_gas_fini_domain(struct iommu_domain *domain);
+struct iommu_map_entry *iommu_gas_alloc_entry(struct iommu_domain *domain,
+u_int flags);
+void iommu_gas_free_entry(struct iommu_domain *domain,
+struct iommu_map_entry *entry);
+void iommu_gas_free_space(struct iommu_domain *domain,
+struct iommu_map_entry *entry);
+int iommu_gas_map(struct iommu_domain *domain,
+const struct bus_dma_tag_common *common, iommu_gaddr_t size, int offset,
+u_int eflags, u_int flags, vm_page_t *ma, struct iommu_map_entry **res);
+void iommu_gas_free_region(struct iommu_domain *domain,
+struct iommu_map_entry *entry);
+int iommu_gas_map_region(struct iommu_domain *domain,
+struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma);
+int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
+iommu_gaddr_t end);
#endif /* !_SYS_IOMMU_H_ */
Modified: head/sys/dev/iommu/iommu_gas.c
==
--- head/sys/dev/iommu/iommu_gas.c Sat Jul 25 18:29:10 2020
(r363532)
+++ head/sys/dev/iommu/iommu_gas.c Sat Jul 25 19:07:12 2020
(r363533)
@@ -79,6 +79,10 @@ __FBSDID("$FreeBSD$");
static uma_zone_t iommu_map_entry_zone;
+#ifdef INVARIANTS
+static int iommu_check_free;
+#endif
+
static void
intel_gas_init(void)
{
@@ -727,3 +731,11 @@ iommu_map_region(struct iommu_domain *domain, struct i
return (error);
}
+
+#ifdef INVARIANTS
+static SYSCTL_NODE(_hw, OID_AUTO, iommu, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
+"");
+SYSCTL_INT(_hw_iommu, OID_AUTO, check_free, CTLFLAG_RWTUN,
+_check_free, 0,
+"Check the GPA RBtree for free_down and free_after validity");
+#endif
Modified: head/sys/x86/iommu/intel_dmar.h
==
--- head/sys/x86/iommu/intel_dmar.h Sat Jul 25 18:29:10 2020
(r363532)
+++ head/sys/x86/iommu/intel_dmar.h Sat Jul 25 19:07:12 2020
(r363533)
@@ -81,13 +81,6 @@ struct dmar_ctx {
u_int refs; /* (u) References from tags */
};
-#defineDMAR_DOMAIN_GAS_INITED 0x0001
-#defineDMAR_DOMAIN_PGTBL_INITED0x0002
-#defineDMAR_DOMAIN_IDMAP 0x0010 /* Domain uses identity
- page table */
-#defineDMAR_DOMAIN_RMRR0x0020 /* Domain contains RMRR
entry,
- cannot be turned off */
-
#defineDMAR_DOMAIN_PGLOCK(dom)
svn commit: r363524 - in head/sys: conf dev/iommu x86/iommu
Author: br
Date: Sat Jul 25 11:34:50 2020
New Revision: 363524
URL: https://svnweb.freebsd.org/changeset/base/363524
Log:
Move Intel GAS to dev/iommu/ as now a part of generic iommu framework.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25799
Added:
head/sys/dev/iommu/iommu_gas.c
- copied unchanged from r363523, head/sys/x86/iommu/intel_gas.c
Deleted:
head/sys/x86/iommu/intel_gas.c
Modified:
head/sys/conf/files.x86
Modified: head/sys/conf/files.x86
==
--- head/sys/conf/files.x86 Sat Jul 25 10:40:38 2020(r363523)
+++ head/sys/conf/files.x86 Sat Jul 25 11:34:50 2020(r363524)
@@ -166,6 +166,7 @@ dev/imcsmb/imcsmb_pci.c optionalimcsmb
pci
dev/intel/spi.coptionalintelspi
dev/io/iodev.c optionalio
dev/iommu/busdma_iommu.c optionalacpi acpi_dmar pci
+dev/iommu/iommu_gas.c optionalacpi acpi_dmar pci
dev/ipmi/ipmi.coptionalipmi
dev/ipmi/ipmi_acpi.c optionalipmi acpi
dev/ipmi/ipmi_isa.coptionalipmi isa
@@ -304,7 +305,6 @@ x86/cpufreq/powernow.c optionalcpufreq
x86/iommu/intel_ctx.c optionalacpi acpi_dmar pci
x86/iommu/intel_drv.c optionalacpi acpi_dmar pci
x86/iommu/intel_fault.coptionalacpi acpi_dmar pci
-x86/iommu/intel_gas.c optionalacpi acpi_dmar pci
x86/iommu/intel_idpgtbl.c optionalacpi acpi_dmar pci
x86/iommu/intel_intrmap.c optionalacpi acpi_dmar pci
x86/iommu/intel_qi.c optionalacpi acpi_dmar pci
Copied: head/sys/dev/iommu/iommu_gas.c (from r363523,
head/sys/x86/iommu/intel_gas.c)
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/iommu/iommu_gas.c Sat Jul 25 11:34:50 2020
(r363524, copy of r363523, head/sys/x86/iommu/intel_gas.c)
@@ -0,0 +1,729 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Konstantin Belousov
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#defineRB_AUGMENT(entry) iommu_gas_augment_entry(entry)
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#if defined(__amd64__) || defined(__i386__)
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#endif
+
+/*
+ * Guest Address Space management.
+ */
+
+static uma_zone_t iommu_map_entry_zone;
+
+static void
+intel_gas_init(void)
+{
+
+ iommu_map_entry_zone = uma_zcreate("IOMMU_MAP_ENTRY",
+ sizeof(struct iommu_map_entry), NULL, NULL,
+ NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_NODUMP);
+}
+SYSINIT(intel_gas, SI_SUB_DRIVERS, SI_ORDER_FIRST, intel_gas_init, NULL);
+
+struct iommu_map_entry *
+iommu_gas_alloc_entry(struct iommu_domain *domain, u_int flags)
+{
+ struct iommu_map_entry *res;
+
+ KASSERT((flags & ~(DMAR_PGF_WAITOK)) == 0,
+ ("unsupported flags %x", flags));
+
+ res = uma_zalloc(iommu_map_entry_zone, ((flags
svn commit: r363515 - in head/sys: dev/iommu x86/iommu
Author: br
Date: Sat Jul 25 09:28:38 2020
New Revision: 363515
URL: https://svnweb.freebsd.org/changeset/base/363515
Log:
Split-out the Intel GAS (Guest Address Space) management component
from Intel DMAR support, so it can be used on other IOMMU systems.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25743
Modified:
head/sys/dev/iommu/iommu.h
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_gas.c
head/sys/x86/iommu/intel_idpgtbl.c
head/sys/x86/iommu/intel_utils.c
Modified: head/sys/dev/iommu/iommu.h
==
--- head/sys/dev/iommu/iommu.h Sat Jul 25 07:48:20 2020(r363514)
+++ head/sys/dev/iommu/iommu.h Sat Jul 25 09:28:38 2020(r363515)
@@ -48,6 +48,10 @@ struct bus_dma_tag_common;
struct iommu_map_entry;
TAILQ_HEAD(iommu_map_entries_tailq, iommu_map_entry);
+RB_HEAD(iommu_gas_entries_tree, iommu_map_entry);
+RB_PROTOTYPE(iommu_gas_entries_tree, iommu_map_entry, rb_entry,
+iommu_gas_cmp_entries);
+
struct iommu_qi_genseq {
u_int gen;
uint32_t seq;
@@ -107,6 +111,11 @@ struct iommu_domain {
u_int entries_cnt; /* (d) */
struct iommu_map_entries_tailq unload_entries; /* (d) Entries to
unload */
+ struct iommu_gas_entries_tree rb_root; /* (d) */
+ iommu_gaddr_t end; /* (c) Highest address + 1 in
+ the guest AS */
+ struct iommu_map_entry *first_place, *last_place; /* (d) */
+ u_int flags;/* (u) */
};
struct iommu_ctx {
Modified: head/sys/x86/iommu/intel_ctx.c
==
--- head/sys/x86/iommu/intel_ctx.c Sat Jul 25 07:48:20 2020
(r363514)
+++ head/sys/x86/iommu/intel_ctx.c Sat Jul 25 09:28:38 2020
(r363515)
@@ -132,7 +132,7 @@ device_tag_init(struct dmar_ctx *ctx, device_t dev)
bus_addr_t maxaddr;
domain = (struct dmar_domain *)ctx->context.domain;
- maxaddr = MIN(domain->end, BUS_SPACE_MAXADDR);
+ maxaddr = MIN(domain->iodom.end, BUS_SPACE_MAXADDR);
ctx->context.tag->common.ref_count = 1; /* Prevent free */
ctx->context.tag->common.impl = _dma_iommu_impl;
ctx->context.tag->common.boundary = 0;
@@ -186,7 +186,7 @@ ctx_id_entry_init(struct dmar_ctx *ctx, dmar_ctx_entry
pci_get_function(ctx->context.tag->owner),
ctxp->ctx1, ctxp->ctx2));
- if ((domain->flags & DMAR_DOMAIN_IDMAP) != 0 &&
+ if ((domain->iodom.flags & DMAR_DOMAIN_IDMAP) != 0 &&
(unit->hw_ecap & DMAR_ECAP_PT) != 0) {
KASSERT(domain->pgtbl_obj == NULL,
("ctx %p non-null pgtbl_obj", ctx));
@@ -254,7 +254,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
* and round as neccesary.
*
* We also allow the overlapping RMRR entries, see
-* dmar_gas_alloc_region().
+* iommu_gas_alloc_region().
*/
start = entry->start;
end = entry->end;
@@ -282,7 +282,8 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
ma[i] = vm_page_getfake(entry->start + PAGE_SIZE * i,
VM_MEMATTR_DEFAULT);
}
- error1 = dmar_gas_map_region(domain, entry,
+ error1 = iommu_gas_map_region((struct iommu_domain *)domain,
+ entry,
IOMMU_MAP_ENTRY_READ | IOMMU_MAP_ENTRY_WRITE,
IOMMU_MF_CANWAIT | IOMMU_MF_RMRR, ma);
/*
@@ -294,7 +295,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
if (error1 == 0 && entry->end != entry->start) {
IOMMU_LOCK(domain->iodom.iommu);
domain->refs++; /* XXXKIB prevent free */
- domain->flags |= DMAR_DOMAIN_RMRR;
+ domain->iodom.flags |= DMAR_DOMAIN_RMRR;
IOMMU_UNLOCK(domain->iodom.iommu);
} else {
if (error1 != 0) {
@@ -308,7 +309,8 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
error = error1;
}
TAILQ_REMOVE(_entries, entry, unroll_link);
- dmar_gas_free_entry(domain, entry);
+ iommu_gas_free_entry((struct iommu_domain *)domain,
+ entry);
}
for (i = 0; i < size; i++)
vm_page_putfake(ma[i]);
@@ -320,6 +322,7 @@ domain_init_rmrr(struct dmar_domain *domain, device_t
static struct
svn commit: r363388 - in head/sys: dev/iommu sys x86/iommu
Author: br
Date: Tue Jul 21 13:50:10 2020
New Revision: 363388
URL: https://svnweb.freebsd.org/changeset/base/363388
Log:
Move sys/iommu.h to dev/iommu/ as a part of generic IOMMU busdma backend.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25750
Added:
head/sys/dev/iommu/iommu.h
- copied unchanged from r363387, head/sys/sys/iommu.h
Deleted:
head/sys/sys/iommu.h
Modified:
head/sys/dev/iommu/busdma_iommu.c
head/sys/dev/iommu/busdma_iommu.h
head/sys/x86/iommu/intel_dmar.h
Modified: head/sys/dev/iommu/busdma_iommu.c
==
--- head/sys/dev/iommu/busdma_iommu.c Tue Jul 21 10:38:51 2020
(r363387)
+++ head/sys/dev/iommu/busdma_iommu.c Tue Jul 21 13:50:10 2020
(r363388)
@@ -39,7 +39,6 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
#include
#include
@@ -68,6 +67,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#endif
Modified: head/sys/dev/iommu/busdma_iommu.h
==
--- head/sys/dev/iommu/busdma_iommu.h Tue Jul 21 10:38:51 2020
(r363387)
+++ head/sys/dev/iommu/busdma_iommu.h Tue Jul 21 13:50:10 2020
(r363388)
@@ -34,7 +34,7 @@
#ifndef __X86_IOMMU_BUSDMA_DMAR_H
#define __X86_IOMMU_BUSDMA_DMAR_H
-#include
+#include
struct bus_dma_tag_iommu {
struct bus_dma_tag_common common;
Copied: head/sys/dev/iommu/iommu.h (from r363387, head/sys/sys/iommu.h)
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/iommu/iommu.h Tue Jul 21 13:50:10 2020(r363388, copy
of r363387, head/sys/sys/iommu.h)
@@ -0,0 +1,168 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Konstantin Belousov
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _SYS_IOMMU_H_
+#define _SYS_IOMMU_H_
+
+#include
+#include
+#include
+#include
+
+/* Host or physical memory address, after translation. */
+typedef uint64_t iommu_haddr_t;
+/* Guest or bus address, before translation. */
+typedef uint64_t iommu_gaddr_t;
+
+struct bus_dma_tag_common;
+struct iommu_map_entry;
+TAILQ_HEAD(iommu_map_entries_tailq, iommu_map_entry);
+
+struct iommu_qi_genseq {
+ u_int gen;
+ uint32_t seq;
+};
+
+struct iommu_map_entry {
+ iommu_gaddr_t start;
+ iommu_gaddr_t end;
+ iommu_gaddr_t first;/* Least start in subtree */
+ iommu_gaddr_t last; /* Greatest end in subtree */
+ iommu_gaddr_t free_down;/* Max free space below the
+ current R/B tree node */
+ u_int flags;
+ TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* Link for dmamap entries */
+ RB_ENTRY(iommu_map_entry) rb_entry; /* Links for domain entries */
+ TAILQ_ENTRY(iommu_map_entry) unroll_link; /* Link for unroll after
+ dmamap_load failure */
+ struct iommu_domain *domain;
+ struct iommu_qi_genseq gseq;
+};
+
+#defineIOMMU_MAP_ENTRY_PLACE 0x0001 /* Fake entry */
+#defineIOMMU_MAP_ENTRY_RMRR0x0002 /* Permanent, not linked by
+ dmamap_link */
+#defineIOMMU_MAP_ENTRY_MAP 0x0004 /* Busdma created, linked by
+
svn commit: r363387 - in head/sys: conf dev/iommu x86/iommu
Author: br
Date: Tue Jul 21 10:38:51 2020
New Revision: 363387
URL: https://svnweb.freebsd.org/changeset/base/363387
Log:
Move the Intel DMAR busdma backend to a generic place so
it can be used on other IOMMU systems.
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25720
Added:
head/sys/dev/iommu/
head/sys/dev/iommu/busdma_iommu.c
- copied, changed from r363386, head/sys/x86/iommu/busdma_dmar.c
head/sys/dev/iommu/busdma_iommu.h
- copied unchanged from r363386, head/sys/x86/iommu/busdma_dmar.h
Deleted:
head/sys/x86/iommu/busdma_dmar.c
head/sys/x86/iommu/busdma_dmar.h
Modified:
head/sys/conf/files.x86
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_fault.c
head/sys/x86/iommu/intel_gas.c
head/sys/x86/iommu/intel_idpgtbl.c
head/sys/x86/iommu/intel_intrmap.c
head/sys/x86/iommu/intel_qi.c
head/sys/x86/iommu/intel_quirks.c
head/sys/x86/iommu/intel_utils.c
Modified: head/sys/conf/files.x86
==
--- head/sys/conf/files.x86 Tue Jul 21 08:13:35 2020(r363386)
+++ head/sys/conf/files.x86 Tue Jul 21 10:38:51 2020(r363387)
@@ -165,6 +165,7 @@ dev/imcsmb/imcsmb.c optionalimcsmb
dev/imcsmb/imcsmb_pci.coptionalimcsmb pci
dev/intel/spi.coptionalintelspi
dev/io/iodev.c optionalio
+dev/iommu/busdma_iommu.c optionalacpi acpi_dmar pci
dev/ipmi/ipmi.coptionalipmi
dev/ipmi/ipmi_acpi.c optionalipmi acpi
dev/ipmi/ipmi_isa.coptionalipmi isa
@@ -300,7 +301,6 @@ x86/cpufreq/hwpstate_amd.c optionalcpufreq
x86/cpufreq/hwpstate_intel.c optionalcpufreq
x86/cpufreq/p4tcc.coptionalcpufreq
x86/cpufreq/powernow.c optionalcpufreq
-x86/iommu/busdma_dmar.coptionalacpi acpi_dmar pci
x86/iommu/intel_ctx.c optionalacpi acpi_dmar pci
x86/iommu/intel_drv.c optionalacpi acpi_dmar pci
x86/iommu/intel_fault.coptionalacpi acpi_dmar pci
Copied and modified: head/sys/dev/iommu/busdma_iommu.c (from r363386,
head/sys/x86/iommu/busdma_dmar.c)
==
--- head/sys/x86/iommu/busdma_dmar.cTue Jul 21 08:13:35 2020
(r363386, copy source)
+++ head/sys/dev/iommu/busdma_iommu.c Tue Jul 21 10:38:51 2020
(r363387)
@@ -67,13 +67,13 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
+#include
#include
#endif
/*
- * busdma_dmar.c, the implementation of the busdma(9) interface using
- * DMAR units from Intel VT-d.
+ * busdma_iommu.c, the implementation of the busdma(9) interface using
+ * IOMMU units from Intel VT-d.
*/
static bool
Copied: head/sys/dev/iommu/busdma_iommu.h (from r363386,
head/sys/x86/iommu/busdma_dmar.h)
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/iommu/busdma_iommu.h Tue Jul 21 10:38:51 2020
(r363387, copy of r363386, head/sys/x86/iommu/busdma_dmar.h)
@@ -0,0 +1,66 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Konstantin Belousov
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef
svn commit: r363310 - in head/sys: sys x86/iommu
Author: br
Date: Sat Jul 18 13:10:31 2020
New Revision: 363310
URL: https://svnweb.freebsd.org/changeset/base/363310
Log:
o Move iommu_test_boundary() to sys/iommu.h
o Rename DMAR -> IOMMU in comments
o Add IOMMU_PAGE_SIZE / IOMMU_PAGE_MASK macroses
o x86 only: dmar_quirks_pre_use() / dmar_instantiate_rmrr_ctxs()
Reviewed by: kib
Sponsored by: DARPA/AFRL
Differential Revision:https://reviews.freebsd.org/D25665
Modified:
head/sys/sys/iommu.h
head/sys/x86/iommu/busdma_dmar.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_gas.c
head/sys/x86/iommu/intel_reg.h
Modified: head/sys/sys/iommu.h
==
--- head/sys/sys/iommu.hSat Jul 18 13:10:02 2020(r363309)
+++ head/sys/sys/iommu.hSat Jul 18 13:10:31 2020(r363310)
@@ -35,6 +35,7 @@
#define _SYS_IOMMU_H_
#include
+#include
#include
#include
@@ -43,6 +44,7 @@ typedef uint64_t iommu_haddr_t;
/* Guest or bus address, before translation. */
typedef uint64_t iommu_gaddr_t;
+struct bus_dma_tag_common;
struct iommu_map_entry;
TAILQ_HEAD(iommu_map_entries_tailq, iommu_map_entry);
@@ -102,6 +104,7 @@ struct iommu_domain {
struct iommu_unit *iommu; /* (c) */
struct mtx lock;/* (c) */
struct task unload_task;/* (c) */
+ u_int entries_cnt; /* (d) */
struct iommu_map_entries_tailq unload_entries; /* (d) Entries to
unload */
};
@@ -128,6 +131,16 @@ struct iommu_ctx {
#defineIOMMU_DOMAIN_LOCK(dom) mtx_lock(&(dom)->lock)
#defineIOMMU_DOMAIN_UNLOCK(dom)mtx_unlock(&(dom)->lock)
#defineIOMMU_DOMAIN_ASSERT_LOCKED(dom) mtx_assert(&(dom)->lock,
MA_OWNED)
+
+static inline bool
+iommu_test_boundary(iommu_gaddr_t start, iommu_gaddr_t size,
+iommu_gaddr_t boundary)
+{
+
+ if (boundary == 0)
+ return (true);
+ return (start + size <= ((start + boundary) & ~(boundary - 1)));
+}
void iommu_free_ctx(struct iommu_ctx *ctx);
void iommu_free_ctx_locked(struct iommu_unit *iommu, struct iommu_ctx *ctx);
Modified: head/sys/x86/iommu/busdma_dmar.c
==
--- head/sys/x86/iommu/busdma_dmar.cSat Jul 18 13:10:02 2020
(r363309)
+++ head/sys/x86/iommu/busdma_dmar.cSat Jul 18 13:10:31 2020
(r363310)
@@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -62,11 +63,13 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#if defined(__amd64__) || defined(__i386__)
#include
#include
#include
#include
#include
+#endif
/*
* busdma_dmar.c, the implementation of the busdma(9) interface using
@@ -112,11 +115,11 @@ iommu_bus_dma_is_dev_disabled(int domain, int bus, int
/*
* Given original device, find the requester ID that will be seen by
- * the DMAR unit and used for page table lookup. PCI bridges may take
+ * the IOMMU unit and used for page table lookup. PCI bridges may take
* ownership of transactions from downstream devices, so it may not be
* the same as the BSF of the target device. In those cases, all
* devices downstream of the bridge must share a single mapping
- * domain, and must collectively be assigned to use either DMAR or
+ * domain, and must collectively be assigned to use either IOMMU or
* bounce mapping.
*/
device_t
@@ -135,7 +138,7 @@ iommu_get_requester(device_t dev, uint16_t *rid)
/*
* Walk the bridge hierarchy from the target device to the
-* host port to find the translating bridge nearest the DMAR
+* host port to find the translating bridge nearest the IOMMU
* unit.
*/
for (;;) {
@@ -173,7 +176,7 @@ iommu_get_requester(device_t dev, uint16_t *rid)
} else {
/*
* Device is not PCIe, it cannot be seen as a
-* requester by DMAR unit. Check whether the
+* requester by IOMMU unit. Check whether the
* bridge is PCIe.
*/
bridge_is_pcie = pci_find_cap(pcib, PCIY_EXPRESS,
@@ -243,8 +246,8 @@ iommu_instantiate_ctx(struct iommu_unit *unit, device_
/*
* If the user requested the IOMMU disabled for the device, we
-* cannot disable the DMAR, due to possibility of other
-* devices on the same DMAR still requiring translation.
+* cannot disable the IOMMU unit, due to possibility of other
+* devices on the same IOMMU unit still requiring translation.
* Instead provide the identity mapping for the device
* context.
*/
@@ -279,13 +282,16 @@ acpi_iommu_get_dma_tag(device_t
svn commit: r363274 - in head/sys: arm64/acpica dev/acpica
Author: br
Date: Fri Jul 17 14:51:51 2020
New Revision: 363274
URL: https://svnweb.freebsd.org/changeset/base/363274
Log:
Add acpi_iort_map_pci_smmuv3().
This new function allows us to find the SMMU instance assigned
for a particular PCI RID.
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D25687
Modified:
head/sys/arm64/acpica/acpi_iort.c
head/sys/dev/acpica/acpivar.h
Modified: head/sys/arm64/acpica/acpi_iort.c
==
--- head/sys/arm64/acpica/acpi_iort.c Fri Jul 17 14:45:16 2020
(r363273)
+++ head/sys/arm64/acpica/acpi_iort.c Fri Jul 17 14:51:51 2020
(r363274)
@@ -160,7 +160,7 @@ iort_entry_lookup(struct iort_node *node, u_int id, u_
if (i == node->nentries)
return (NULL);
if ((entry->flags & ACPI_IORT_ID_SINGLE_MAPPING) == 0)
- *outid = entry->outbase + (id - entry->base);
+ *outid = entry->outbase + (id - entry->base);
else
*outid = entry->outbase;
return (entry->out_node);
@@ -562,5 +562,24 @@ acpi_iort_map_pci_msi(u_int seg, u_int rid, u_int *xre
/* return first node, we don't handle more than that now. */
*xref = node->entries.its[0].xref;
+ return (0);
+}
+
+int
+acpi_iort_map_pci_smmuv3(u_int seg, u_int rid, u_int *xref, u_int *sid)
+{
+ ACPI_IORT_SMMU_V3 *smmu;
+ struct iort_node *node;
+
+ node = iort_pci_rc_map(seg, rid, ACPI_IORT_NODE_SMMU_V3, sid);
+ if (node == NULL)
+ return (ENOENT);
+
+ /* This should be an SMMU node. */
+ KASSERT(node->type == ACPI_IORT_NODE_SMMU_V3, ("bad node"));
+
+ smmu = (ACPI_IORT_SMMU_V3 *)>data.smmu_v3;
+ *xref = smmu->BaseAddress;
+
return (0);
}
Modified: head/sys/dev/acpica/acpivar.h
==
--- head/sys/dev/acpica/acpivar.h Fri Jul 17 14:45:16 2020
(r363273)
+++ head/sys/dev/acpica/acpivar.h Fri Jul 17 14:51:51 2020
(r363274)
@@ -556,6 +556,7 @@ int acpi_get_domain(device_t dev, device_t child,
int
* ARM specific ACPI interfaces, relating to IORT table.
*/
intacpi_iort_map_pci_msi(u_int seg, u_int rid, u_int *xref, u_int *devid);
+intacpi_iort_map_pci_smmuv3(u_int seg, u_int rid, u_int *xref, u_int
*devid);
intacpi_iort_its_lookup(u_int its_id, u_int *xref, int *pxm);
#endif
#endif /* _KERNEL */
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svn commit: r363177 - in head/sys: sys x86/iommu
Author: br
Date: Tue Jul 14 10:55:19 2020
New Revision: 363177
URL: https://svnweb.freebsd.org/changeset/base/363177
Log:
Start splitting-out the Intel DMAR busdma backend to a generic place,
so it can be used on other IOMMU systems.
Provide MI iommu_unit, iommu_domain and iommu_ctx structs in sys/iommu.h;
use them as a first member of MD dmar_unit, dmar_domain and dmar_ctx.
Change the namespace in DMAR backend: use iommu_ prefix instead of dmar_.
Move some macroses and function prototypes to sys/iommu.h.
Reviewed by: kib
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D25574
Added:
head/sys/sys/iommu.h (contents, props changed)
Modified:
head/sys/x86/iommu/busdma_dmar.c
head/sys/x86/iommu/busdma_dmar.h
head/sys/x86/iommu/intel_ctx.c
head/sys/x86/iommu/intel_dmar.h
head/sys/x86/iommu/intel_drv.c
head/sys/x86/iommu/intel_fault.c
head/sys/x86/iommu/intel_gas.c
head/sys/x86/iommu/intel_idpgtbl.c
head/sys/x86/iommu/intel_intrmap.c
head/sys/x86/iommu/intel_qi.c
head/sys/x86/iommu/intel_quirks.c
head/sys/x86/iommu/intel_utils.c
Added: head/sys/sys/iommu.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/sys/iommu.hTue Jul 14 10:55:19 2020(r363177)
@@ -0,0 +1,155 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Konstantin Belousov
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _SYS_IOMMU_H_
+#define _SYS_IOMMU_H_
+
+#include
+#include
+#include
+
+/* Host or physical memory address, after translation. */
+typedef uint64_t iommu_haddr_t;
+/* Guest or bus address, before translation. */
+typedef uint64_t iommu_gaddr_t;
+
+struct iommu_map_entry;
+TAILQ_HEAD(iommu_map_entries_tailq, iommu_map_entry);
+
+struct iommu_qi_genseq {
+ u_int gen;
+ uint32_t seq;
+};
+
+struct iommu_map_entry {
+ iommu_gaddr_t start;
+ iommu_gaddr_t end;
+ iommu_gaddr_t first;/* Least start in subtree */
+ iommu_gaddr_t last; /* Greatest end in subtree */
+ iommu_gaddr_t free_down;/* Max free space below the
+ current R/B tree node */
+ u_int flags;
+ TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* Link for dmamap entries */
+ RB_ENTRY(iommu_map_entry) rb_entry; /* Links for domain entries */
+ TAILQ_ENTRY(iommu_map_entry) unroll_link; /* Link for unroll after
+ dmamap_load failure */
+ struct iommu_domain *domain;
+ struct iommu_qi_genseq gseq;
+};
+
+#defineIOMMU_MAP_ENTRY_PLACE 0x0001 /* Fake entry */
+#defineIOMMU_MAP_ENTRY_RMRR0x0002 /* Permanent, not linked by
+ dmamap_link */
+#defineIOMMU_MAP_ENTRY_MAP 0x0004 /* Busdma created, linked by
+ dmamap_link */
+#defineIOMMU_MAP_ENTRY_UNMAPPED0x0010 /* No backing pages */
+#defineIOMMU_MAP_ENTRY_QI_NF 0x0020 /* qi task, do not free entry */
+#defineIOMMU_MAP_ENTRY_READ0x1000 /* Read permitted */
+#defineIOMMU_MAP_ENTRY_WRITE 0x2000 /* Write permitted */
+#defineIOMMU_MAP_ENTRY_SNOOP 0x4000 /* Snoop */
+#defineIOMMU_MAP_ENTRY_TM 0x8000 /* Transient */
+
+struct iommu_unit {
+ struct mtx lock;
+ int unit;
+
+ int
svn commit: r362780 - head/sys/arm64/coresight
Author: br
Date: Mon Jun 29 12:59:09 2020
New Revision: 362780
URL: https://svnweb.freebsd.org/changeset/base/362780
Log:
Coresight: provide device_attach method for FDT bus.
Sponsored by: DARPA, AFRL
Modified:
head/sys/arm64/coresight/coresight_funnel_fdt.c
head/sys/arm64/coresight/coresight_replicator_fdt.c
Modified: head/sys/arm64/coresight/coresight_funnel_fdt.c
==
--- head/sys/arm64/coresight/coresight_funnel_fdt.c Mon Jun 29 10:30:43
2020(r362779)
+++ head/sys/arm64/coresight/coresight_funnel_fdt.c Mon Jun 29 12:59:09
2020(r362780)
@@ -93,6 +93,7 @@ funnel_fdt_attach(device_t dev)
static device_method_t funnel_fdt_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, funnel_fdt_probe),
+ DEVMETHOD(device_attach,funnel_fdt_attach),
DEVMETHOD_END
};
Modified: head/sys/arm64/coresight/coresight_replicator_fdt.c
==
--- head/sys/arm64/coresight/coresight_replicator_fdt.c Mon Jun 29 10:30:43
2020(r362779)
+++ head/sys/arm64/coresight/coresight_replicator_fdt.c Mon Jun 29 12:59:09
2020(r362780)
@@ -68,7 +68,7 @@ replicator_fdt_probe(device_t dev)
}
static int
-replicator_acpi_attach(device_t dev)
+replicator_fdt_attach(device_t dev)
{
struct replicator_softc *sc;
@@ -81,6 +81,7 @@ replicator_acpi_attach(device_t dev)
static device_method_t replicator_fdt_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, replicator_fdt_probe),
+ DEVMETHOD(device_attach,replicator_fdt_attach),
DEVMETHOD_END
};
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svn commit: r362278 - in head/sys: arm64/coresight conf
Author: br
Date: Wed Jun 17 15:54:51 2020
New Revision: 362278
URL: https://svnweb.freebsd.org/changeset/base/362278
Log:
Complete the ACPI support for ARM Coresight:
o Parse the ACPI DSD (Device Specific Data) graph property and record
device connections.
o Split-out FDT support to a separate file.
o Get the corresponding (FDT/ACPI) Coresight platform data in
the device drivers.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_acpi.c (contents, props changed)
head/sys/arm64/coresight/coresight_fdt.c (contents, props changed)
Modified:
head/sys/arm64/coresight/coresight.c
head/sys/arm64/coresight/coresight.h
head/sys/arm64/coresight/coresight_cmd.c
head/sys/arm64/coresight/coresight_cpu_debug.c
head/sys/arm64/coresight/coresight_etm4x.c
head/sys/arm64/coresight/coresight_etm4x.h
head/sys/arm64/coresight/coresight_etm4x_acpi.c
head/sys/arm64/coresight/coresight_etm4x_fdt.c
head/sys/arm64/coresight/coresight_funnel.c
head/sys/arm64/coresight/coresight_funnel.h
head/sys/arm64/coresight/coresight_funnel_acpi.c
head/sys/arm64/coresight/coresight_funnel_fdt.c
head/sys/arm64/coresight/coresight_replicator.c
head/sys/arm64/coresight/coresight_replicator.h
head/sys/arm64/coresight/coresight_replicator_acpi.c
head/sys/arm64/coresight/coresight_replicator_fdt.c
head/sys/arm64/coresight/coresight_tmc.c
head/sys/arm64/coresight/coresight_tmc.h
head/sys/arm64/coresight/coresight_tmc_acpi.c
head/sys/arm64/coresight/coresight_tmc_fdt.c
head/sys/conf/files.arm64
Modified: head/sys/arm64/coresight/coresight.c
==
--- head/sys/arm64/coresight/coresight.cWed Jun 17 15:27:45 2020
(r362277)
+++ head/sys/arm64/coresight/coresight.cWed Jun 17 15:54:51 2020
(r362278)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2018 Ruslan Bukin
+ * Copyright (c) 2018-2020 Ruslan Bukin
* All rights reserved.
*
* This software was developed by SRI International and the University of
@@ -41,78 +41,11 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
-#include
-
#include
-MALLOC_DEFINE(M_CORESIGHT, "coresight", "ARM Coresight");
static struct mtx cs_mtx;
-
struct coresight_device_list cs_devs;
-static int
-coresight_get_ports(phandle_t dev_node,
-struct coresight_platform_data *pdata)
-{
- phandle_t node, child;
- pcell_t port_reg;
- phandle_t xref;
- char *name;
- int ret;
- phandle_t endpoint_child;
- struct endpoint *endp;
-
- child = ofw_bus_find_child(dev_node, "ports");
- if (child)
- node = child;
- else
- node = dev_node;
-
- for (child = OF_child(node); child != 0; child = OF_peer(child)) {
- ret = OF_getprop_alloc(child, "name", (void **));
- if (ret == -1)
- continue;
-
- if (strcasecmp(name, "port") ||
- strncasecmp(name, "port@", 6)) {
-
- port_reg = -1;
- OF_getencprop(child, "reg", (void *)_reg,
- sizeof(port_reg));
-
- endpoint_child = ofw_bus_find_child(child, "endpoint");
- if (endpoint_child) {
- if (OF_getencprop(endpoint_child,
- "remote-endpoint", ,
- sizeof(xref)) == -1) {
- printf("failed\n");
- continue;
- }
- endp = malloc(sizeof(struct endpoint),
- M_CORESIGHT, M_WAITOK | M_ZERO);
- endp->my_node = endpoint_child;
- endp->their_node = OF_node_from_xref(xref);
- endp->dev_node = dev_node;
- endp->reg = port_reg;
- if (OF_getproplen(endpoint_child,
- "slave-mode") >= 0) {
- pdata->in_ports++;
- endp->slave = 1;
- } else
- pdata->out_ports++;
-
- mtx_lock(>mtx_lock);
- TAILQ_INSERT_TAIL(>endpoints,
- endp, link);
- mtx_unlock(>mtx_lock);
- }
- }
- }
-
- return (0);
-}
-
int
coresight_register(struct coresight_desc *desc)
{
@@ -121,7 +54,6 @@ coresight_register(struct coresight_desc *desc)
cs_dev = mall
svn commit: r362109 - in head/sys: arm64/coresight conf
Author: br
Date: Fri Jun 12 17:31:38 2020
New Revision: 362109
URL: https://svnweb.freebsd.org/changeset/base/362109
Log:
Coresight replicator:
o Add a header file;
o Split-out FDT attachment to a separate file;
o Add ACPI attachment.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_replicator.h (contents, props changed)
head/sys/arm64/coresight/coresight_replicator_acpi.c (contents, props
changed)
head/sys/arm64/coresight/coresight_replicator_fdt.c (contents, props
changed)
Modified:
head/sys/arm64/coresight/coresight_replicator.c
head/sys/conf/files.arm64
Modified: head/sys/arm64/coresight/coresight_replicator.c
==
--- head/sys/arm64/coresight/coresight_replicator.c Fri Jun 12 16:51:55
2020(r362108)
+++ head/sys/arm64/coresight/coresight_replicator.c Fri Jun 12 17:31:38
2020(r362109)
@@ -41,25 +41,10 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
-#include
-#include
-
#include "coresight_if.h"
-#defineREPLICATOR_IDFILTER00x00
-#defineREPLICATOR_IDFILTER10x04
-
-static struct ofw_compat_data compat_data[] = {
- { "arm,coresight-dynamic-replicator", 1 },
- { NULL, 0 }
-};
-
-struct replicator_softc {
- struct resource *res;
- struct coresight_platform_data *pdata;
-};
-
static struct resource_spec replicator_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ -1, 0 }
@@ -111,21 +96,6 @@ replicator_disable(device_t dev, struct endpoint *endp
}
static int
-replicator_probe(device_t dev)
-{
-
- if (!ofw_bus_status_okay(dev))
- return (ENXIO);
-
- if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
- return (ENXIO);
-
- device_set_desc(dev, "Coresight Dynamic Replicator");
-
- return (BUS_PROBE_DEFAULT);
-}
-
-static int
replicator_attach(device_t dev)
{
struct replicator_softc *sc;
@@ -149,7 +119,6 @@ replicator_attach(device_t dev)
static device_method_t replicator_methods[] = {
/* Device interface */
- DEVMETHOD(device_probe, replicator_probe),
DEVMETHOD(device_attach,replicator_attach),
/* Coresight interface */
@@ -159,14 +128,5 @@ static device_method_t replicator_methods[] = {
DEVMETHOD_END
};
-static driver_t replicator_driver = {
- "replicator",
- replicator_methods,
- sizeof(struct replicator_softc),
-};
-
-static devclass_t replicator_devclass;
-
-DRIVER_MODULE(replicator, simplebus, replicator_driver, replicator_devclass,
-0, 0);
-MODULE_VERSION(replicator, 1);
+DEFINE_CLASS_0(replicator, replicator_driver, replicator_methods,
+sizeof(struct replicator_softc));
Added: head/sys/arm64/coresight/coresight_replicator.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/coresight/coresight_replicator.h Fri Jun 12 17:31:38
2020(r362109)
@@ -0,0 +1,46 @@
+/*-
+ * Copyright (c) 2020 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef_ARM64_CORESIGHT_CORESIGHT_REPLICATOR_H_
+#define_ARM64_CORESIGHT_CORESIGHT_REPLIC
svn commit: r362099 - in head/sys: arm64/coresight conf
Author: br
Date: Fri Jun 12 13:59:58 2020
New Revision: 362099
URL: https://svnweb.freebsd.org/changeset/base/362099
Log:
ARM Coresight Trace Memory Controller (TMC):
o Split-out FDT attachment to a separate file;
o Add ACPI attachment.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_tmc_acpi.c (contents, props changed)
head/sys/arm64/coresight/coresight_tmc_fdt.c (contents, props changed)
Modified:
head/sys/arm64/coresight/coresight_tmc.c
head/sys/arm64/coresight/coresight_tmc.h
head/sys/conf/files.arm64
Modified: head/sys/arm64/coresight/coresight_tmc.c
==
--- head/sys/arm64/coresight/coresight_tmc.cFri Jun 12 13:54:41 2020
(r362098)
+++ head/sys/arm64/coresight/coresight_tmc.cFri Jun 12 13:59:58 2020
(r362099)
@@ -42,9 +42,6 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
-#include
-
#include "coresight_if.h"
#defineTMC_DEBUG
@@ -56,25 +53,6 @@ __FBSDID("$FreeBSD$");
#definedprintf(fmt, ...)
#endif
-static struct ofw_compat_data compat_data[] = {
- { "arm,coresight-tmc", 1 },
- { NULL, 0 }
-};
-
-struct tmc_softc {
- struct resource *res;
- device_tdev;
- uint64_tcycle;
- struct coresight_platform_data *pdata;
- uint32_tdev_type;
-#defineCORESIGHT_UNKNOWN 0
-#defineCORESIGHT_ETR 1
-#defineCORESIGHT_ETF 2
- uint32_tnev;
- struct coresight_event *event;
- boolean_t etf_configured;
-};
-
static struct resource_spec tmc_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ -1, 0 }
@@ -335,21 +313,6 @@ tmc_read(device_t dev, struct endpoint *endp,
}
static int
-tmc_probe(device_t dev)
-{
-
- if (!ofw_bus_status_okay(dev))
- return (ENXIO);
-
- if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
- return (ENXIO);
-
- device_set_desc(dev, "Coresight Trace Memory Controller (TMC)");
-
- return (BUS_PROBE_DEFAULT);
-}
-
-static int
tmc_attach(device_t dev)
{
struct coresight_desc desc;
@@ -375,7 +338,6 @@ tmc_attach(device_t dev)
static device_method_t tmc_methods[] = {
/* Device interface */
- DEVMETHOD(device_probe, tmc_probe),
DEVMETHOD(device_attach,tmc_attach),
/* Coresight interface */
@@ -386,13 +348,4 @@ static device_method_t tmc_methods[] = {
DEVMETHOD_END
};
-static driver_t tmc_driver = {
- "tmc",
- tmc_methods,
- sizeof(struct tmc_softc),
-};
-
-static devclass_t tmc_devclass;
-
-DRIVER_MODULE(tmc, simplebus, tmc_driver, tmc_devclass, 0, 0);
-MODULE_VERSION(tmc, 1);
+DEFINE_CLASS_0(tmc, tmc_driver, tmc_methods, sizeof(struct tmc_softc));
Modified: head/sys/arm64/coresight/coresight_tmc.h
==
--- head/sys/arm64/coresight/coresight_tmc.hFri Jun 12 13:54:41 2020
(r362098)
+++ head/sys/arm64/coresight/coresight_tmc.hFri Jun 12 13:59:58 2020
(r362099)
@@ -116,4 +116,20 @@
#defineTMC_COMPID2 0xFF8 /* Component ID2 Register */
#defineTMC_COMPID3 0xFFC /* Component ID3 Register */
+DECLARE_CLASS(tmc_driver);
+
+struct tmc_softc {
+ struct resource *res;
+ device_tdev;
+ uint64_tcycle;
+ struct coresight_platform_data *pdata;
+ uint32_tdev_type;
+#defineCORESIGHT_UNKNOWN 0
+#defineCORESIGHT_ETR 1
+#defineCORESIGHT_ETF 2
+ uint32_tnev;
+ struct coresight_event *event;
+ boolean_t etf_configured;
+};
+
#endif /* !_ARM64_CORESIGHT_CORESIGHT_TMC_H_ */
Added: head/sys/arm64/coresight/coresight_tmc_acpi.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/coresight/coresight_tmc_acpi.c Fri Jun 12 13:59:58
2020(r362099)
@@ -0,0 +1,79 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, wi
svn commit: r362077 - in head/sys: arm64/coresight conf
Author: br
Date: Thu Jun 11 21:52:06 2020
New Revision: 362077
URL: https://svnweb.freebsd.org/changeset/base/362077
Log:
Shorten the filename of the coresight replicator driver.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_replicator.c
- copied unchanged from r362076,
head/sys/arm64/coresight/coresight_dynamic_replicator.c
Deleted:
head/sys/arm64/coresight/coresight_dynamic_replicator.c
Modified:
head/sys/conf/files.arm64
Copied: head/sys/arm64/coresight/coresight_replicator.c (from r362076,
head/sys/arm64/coresight/coresight_dynamic_replicator.c)
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/coresight/coresight_replicator.c Thu Jun 11 21:52:06
2020(r362077, copy of r362076,
head/sys/arm64/coresight/coresight_dynamic_replicator.c)
@@ -0,0 +1,172 @@
+/*-
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by BAE Systems, the University of Cambridge
+ * Computer Laboratory, and Memorial University under DARPA/AFRL contract
+ * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
+ * (TC) research program.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include
+#include
+
+#include "coresight_if.h"
+
+#defineREPLICATOR_IDFILTER00x00
+#defineREPLICATOR_IDFILTER10x04
+
+static struct ofw_compat_data compat_data[] = {
+ { "arm,coresight-dynamic-replicator", 1 },
+ { NULL, 0 }
+};
+
+struct replicator_softc {
+ struct resource *res;
+ struct coresight_platform_data *pdata;
+};
+
+static struct resource_spec replicator_spec[] = {
+ { SYS_RES_MEMORY, 0, RF_ACTIVE },
+ { -1, 0 }
+};
+
+static int
+replicator_init(device_t dev)
+{
+ struct replicator_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ /* Unlock Coresight */
+ bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK);
+
+ return (0);
+}
+
+static int
+replicator_enable(device_t dev, struct endpoint *endp,
+struct coresight_event *event)
+{
+ struct replicator_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ /* Enable the port. Keep the other port disabled */
+ if (endp->reg == 0) {
+ bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0x00);
+ bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0xff);
+ } else {
+ bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0xff);
+ bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0x00);
+ }
+
+ return (0);
+}
+
+static void
+replicator_disable(device_t dev, struct endpoint *endp,
+struct coresight_event *event)
+{
+ struct replicator_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0xff);
+ bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0xff);
+}
+
+static int
+replicator_probe(device_t dev)
+{
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "Coresight Dynamic Replicator");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+replicator_attach(device_t dev)
+{
+ struct replicator_softc *sc;
+ struct coresight_desc desc;
+
+ sc = device_get_s
svn commit: r362012 - head/sys/dev/acpica
Author: br Date: Wed Jun 10 14:39:54 2020 New Revision: 362012 URL: https://svnweb.freebsd.org/changeset/base/362012 Log: All the ARM Coresight interconnect devices set ResourceProducer on memory resources, ignore it. The devices found in the ARM Neoverse N1 System Development Platform (N1SDP). Sponsored by: DARPA, AFRL Modified: head/sys/dev/acpica/acpi_resource.c Modified: head/sys/dev/acpica/acpi_resource.c == --- head/sys/dev/acpica/acpi_resource.c Wed Jun 10 14:28:36 2020 (r362011) +++ head/sys/dev/acpica/acpi_resource.c Wed Jun 10 14:39:54 2020 (r362012) @@ -484,8 +484,16 @@ acpi_parse_resources(device_t dev, ACPI_HANDLE handle, if (acpi_MatchHid(handle, "ARMH0011") != ACPI_MATCHHID_NOMATCH) arc.ignore_producer_flag = true; -/* ARM Coresight on N1SDP set ResourceProducer on memory resources. */ -if (acpi_MatchHid(handle, "ARMHC500") != ACPI_MATCHHID_NOMATCH) +/* + * ARM Coresight on N1SDP set ResourceProducer on memory resources. + * Coresight devices: ETM, STM, TPIU, ETF/ETR, REP, FUN. + */ +if (acpi_MatchHid(handle, "ARMHC500") != ACPI_MATCHHID_NOMATCH || +acpi_MatchHid(handle, "ARMHC502") != ACPI_MATCHHID_NOMATCH || +acpi_MatchHid(handle, "ARMHC979") != ACPI_MATCHHID_NOMATCH || +acpi_MatchHid(handle, "ARMHC97C") != ACPI_MATCHHID_NOMATCH || +acpi_MatchHid(handle, "ARMHC98D") != ACPI_MATCHHID_NOMATCH || +acpi_MatchHid(handle, "ARMHC9FF") != ACPI_MATCHHID_NOMATCH) arc.ignore_producer_flag = true; status = AcpiWalkResources(handle, "_CRS", acpi_parse_resource, ); ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r362011 - in head/sys: arm64/coresight conf
Author: br
Date: Wed Jun 10 14:28:36 2020
New Revision: 362011
URL: https://svnweb.freebsd.org/changeset/base/362011
Log:
ARM Coresight Funnel device:
o Split-out FDT attachment to a separate file;
o Add ACPI attachment;
o Add support for the Static Funnel device.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_funnel_acpi.c (contents, props changed)
head/sys/arm64/coresight/coresight_funnel_fdt.c (contents, props changed)
Modified:
head/sys/arm64/coresight/coresight_funnel.c
head/sys/arm64/coresight/coresight_funnel.h
head/sys/conf/files.arm64
Modified: head/sys/arm64/coresight/coresight_funnel.c
==
--- head/sys/arm64/coresight/coresight_funnel.c Wed Jun 10 14:10:48 2020
(r362010)
+++ head/sys/arm64/coresight/coresight_funnel.c Wed Jun 10 14:28:36 2020
(r362011)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2018 Ruslan Bukin
+ * Copyright (c) 2018-2020 Ruslan Bukin
* All rights reserved.
*
* This software was developed by BAE Systems, the University of Cambridge
@@ -43,9 +43,6 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
-#include
-
#include "coresight_if.h"
#defineFUNNEL_DEBUG
@@ -57,16 +54,6 @@ __FBSDID("$FreeBSD$");
#definedprintf(fmt, ...)
#endif
-static struct ofw_compat_data compat_data[] = {
- { "arm,coresight-funnel", 1 },
- { NULL, 0 }
-};
-
-struct funnel_softc {
- struct resource *res;
- struct coresight_platform_data *pdata;
-};
-
static struct resource_spec funnel_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ -1, 0 }
@@ -78,10 +65,11 @@ funnel_init(device_t dev)
struct funnel_softc *sc;
sc = device_get_softc(dev);
+ if (sc->hwtype == HWTYPE_STATIC_FUNNEL)
+ return (0);
/* Unlock Coresight */
bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK);
-
dprintf("Device ID: %x\n", bus_read_4(sc->res, FUNNEL_DEVICEID));
return (0);
@@ -95,6 +83,8 @@ funnel_enable(device_t dev, struct endpoint *endp,
uint32_t reg;
sc = device_get_softc(dev);
+ if (sc->hwtype == HWTYPE_STATIC_FUNNEL)
+ return (0);
reg = bus_read_4(sc->res, FUNNEL_FUNCTL);
reg &= ~(FUNCTL_HOLDTIME_MASK);
@@ -113,6 +103,8 @@ funnel_disable(device_t dev, struct endpoint *endp,
uint32_t reg;
sc = device_get_softc(dev);
+ if (sc->hwtype == HWTYPE_STATIC_FUNNEL)
+ return;
reg = bus_read_4(sc->res, FUNNEL_FUNCTL);
reg &= ~(1 << endp->reg);
@@ -120,29 +112,14 @@ funnel_disable(device_t dev, struct endpoint *endp,
}
static int
-funnel_probe(device_t dev)
-{
-
- if (!ofw_bus_status_okay(dev))
- return (ENXIO);
-
- if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
- return (ENXIO);
-
- device_set_desc(dev, "Coresight Funnel");
-
- return (BUS_PROBE_DEFAULT);
-}
-
-static int
funnel_attach(device_t dev)
{
struct coresight_desc desc;
struct funnel_softc *sc;
sc = device_get_softc(dev);
-
- if (bus_alloc_resources(dev, funnel_spec, >res) != 0) {
+ if (sc->hwtype == HWTYPE_FUNNEL &&
+ bus_alloc_resources(dev, funnel_spec, >res) != 0) {
device_printf(dev, "cannot allocate resources for device\n");
return (ENXIO);
}
@@ -158,7 +135,6 @@ funnel_attach(device_t dev)
static device_method_t funnel_methods[] = {
/* Device interface */
- DEVMETHOD(device_probe, funnel_probe),
DEVMETHOD(device_attach,funnel_attach),
/* Coresight interface */
@@ -168,13 +144,5 @@ static device_method_t funnel_methods[] = {
DEVMETHOD_END
};
-static driver_t funnel_driver = {
- "funnel",
- funnel_methods,
- sizeof(struct funnel_softc),
-};
-
-static devclass_t funnel_devclass;
-
-DRIVER_MODULE(funnel, simplebus, funnel_driver, funnel_devclass, 0, 0);
-MODULE_VERSION(funnel, 1);
+DEFINE_CLASS_0(funnel, funnel_driver, funnel_methods,
+sizeof(struct funnel_softc));
Modified: head/sys/arm64/coresight/coresight_funnel.h
==
--- head/sys/arm64/coresight/coresight_funnel.h Wed Jun 10 14:10:48 2020
(r362010)
+++ head/sys/arm64/coresight/coresight_funnel.h Wed Jun 10 14:28:36 2020
(r362011)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2018 Ruslan Bukin
+ * Copyright (c) 2018-2020 Ruslan Bukin
* All rights reserved.
*
* This software was developed by BAE Systems, the University of Cambridge
@@ -62,5 +62,17 @@
#defineFUNNEL
svn commit: r361976 - head/sys/dev/acpica
Author: br
Date: Tue Jun 9 17:07:42 2020
New Revision: 361976
URL: https://svnweb.freebsd.org/changeset/base/361976
Log:
Similar to UART on ThunderX2, the ARM Coresight (ETM component)
set ResourceProducer on memory resources: ignore it.
Tested on ARM N1SDP board.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/acpica/acpi_resource.c
Modified: head/sys/dev/acpica/acpi_resource.c
==
--- head/sys/dev/acpica/acpi_resource.c Tue Jun 9 16:43:23 2020
(r361975)
+++ head/sys/dev/acpica/acpi_resource.c Tue Jun 9 17:07:42 2020
(r361976)
@@ -484,6 +484,10 @@ acpi_parse_resources(device_t dev, ACPI_HANDLE handle,
if (acpi_MatchHid(handle, "ARMH0011") != ACPI_MATCHHID_NOMATCH)
arc.ignore_producer_flag = true;
+/* ARM Coresight on N1SDP set ResourceProducer on memory resources. */
+if (acpi_MatchHid(handle, "ARMHC500") != ACPI_MATCHHID_NOMATCH)
+ arc.ignore_producer_flag = true;
+
status = AcpiWalkResources(handle, "_CRS", acpi_parse_resource, );
if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
printf("can't fetch resources for %s - %s\n",
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svn commit: r361974 - in head/sys: arm64/coresight conf
Author: br
Date: Tue Jun 9 16:43:16 2020
New Revision: 361974
URL: https://svnweb.freebsd.org/changeset/base/361974
Log:
ARM Embedded Trace Macrocell v4.x driver:
o Split-out FDT attachment to a separate file;
o Add ACPI attachment.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_etm4x_acpi.c (contents, props changed)
head/sys/arm64/coresight/coresight_etm4x_fdt.c (contents, props changed)
Modified:
head/sys/arm64/coresight/coresight_etm4x.c
head/sys/arm64/coresight/coresight_etm4x.h
head/sys/conf/files.arm64
Modified: head/sys/arm64/coresight/coresight_etm4x.c
==
--- head/sys/arm64/coresight/coresight_etm4x.c Tue Jun 9 16:15:07 2020
(r361973)
+++ head/sys/arm64/coresight/coresight_etm4x.c Tue Jun 9 16:43:16 2020
(r361974)
@@ -40,9 +40,6 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
-#include
-
#include
#include
@@ -66,16 +63,6 @@ __FBSDID("$FreeBSD$");
* CPU3 -> ETM3 -> funnel1 -^
*/
-static struct ofw_compat_data compat_data[] = {
- { "arm,coresight-etm4x",1 },
- { NULL, 0 }
-};
-
-struct etm_softc {
- struct resource *res;
- struct coresight_platform_data *pdata;
-};
-
static struct resource_spec etm_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ -1, 0 }
@@ -248,20 +235,6 @@ etm_disable(device_t dev, struct endpoint *endp,
}
static int
-etm_probe(device_t dev)
-{
- if (!ofw_bus_status_okay(dev))
- return (ENXIO);
-
- if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
- return (ENXIO);
-
- device_set_desc(dev, "AArch64 Embedded Trace Macrocell");
-
- return (BUS_PROBE_DEFAULT);
-}
-
-static int
etm_attach(device_t dev)
{
struct coresight_desc desc;
@@ -285,7 +258,6 @@ etm_attach(device_t dev)
static device_method_t etm_methods[] = {
/* Device interface */
- DEVMETHOD(device_probe, etm_probe),
DEVMETHOD(device_attach,etm_attach),
/* Coresight interface */
@@ -295,13 +267,4 @@ static device_method_t etm_methods[] = {
DEVMETHOD_END
};
-static driver_t etm_driver = {
- "etm",
- etm_methods,
- sizeof(struct etm_softc),
-};
-
-static devclass_t etm_devclass;
-
-DRIVER_MODULE(etm, simplebus, etm_driver, etm_devclass, 0, 0);
-MODULE_VERSION(etm, 1);
+DEFINE_CLASS_0(etm, etm_driver, etm_methods, sizeof(struct etm_softc));
Modified: head/sys/arm64/coresight/coresight_etm4x.h
==
--- head/sys/arm64/coresight/coresight_etm4x.h Tue Jun 9 16:15:07 2020
(r361973)
+++ head/sys/arm64/coresight/coresight_etm4x.h Tue Jun 9 16:43:16 2020
(r361974)
@@ -34,6 +34,13 @@
#ifndef_ARM64_CORESIGHT_ETM4X_H_
#define_ARM64_CORESIGHT_ETM4X_H_
+DECLARE_CLASS(etm_driver);
+
+struct etm_softc {
+ struct resource *res;
+ struct coresight_platform_data *pdata;
+};
+
#defineTRCPRGCTLR 0x004 /* Trace Programming Control
Register */
#define TRCPRGCTLR_EN (1 << 0) /* Trace unit enable bit */
#defineTRCPROCSELR 0x008 /* Trace PE Select Control
Register */
Added: head/sys/arm64/coresight/coresight_etm4x_acpi.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/coresight/coresight_etm4x_acpi.c Tue Jun 9 16:43:16
2020(r361974)
@@ -0,0 +1,79 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBU
svn commit: r361969 - head/sys/arm64/coresight
Author: br
Date: Tue Jun 9 16:06:10 2020
New Revision: 361969
URL: https://svnweb.freebsd.org/changeset/base/361969
Log:
Fix style: wrap long lines.
Sponsored by: DARPA, AFRL
Modified:
head/sys/arm64/coresight/coresight.c
Modified: head/sys/arm64/coresight/coresight.c
==
--- head/sys/arm64/coresight/coresight.cTue Jun 9 15:56:41 2020
(r361968)
+++ head/sys/arm64/coresight/coresight.cTue Jun 9 16:06:10 2020
(r361969)
@@ -78,30 +78,33 @@ coresight_get_ports(phandle_t dev_node,
strncasecmp(name, "port@", 6)) {
port_reg = -1;
- OF_getencprop(child, "reg", (void *)_reg,
sizeof(port_reg));
+ OF_getencprop(child, "reg", (void *)_reg,
+ sizeof(port_reg));
endpoint_child = ofw_bus_find_child(child, "endpoint");
if (endpoint_child) {
- if (OF_getencprop(endpoint_child,
"remote-endpoint", ,
+ if (OF_getencprop(endpoint_child,
+ "remote-endpoint", ,
sizeof(xref)) == -1) {
printf("failed\n");
continue;
}
- endp = malloc(sizeof(struct endpoint),
M_CORESIGHT,
- M_WAITOK | M_ZERO);
+ endp = malloc(sizeof(struct endpoint),
+ M_CORESIGHT, M_WAITOK | M_ZERO);
endp->my_node = endpoint_child;
endp->their_node = OF_node_from_xref(xref);
endp->dev_node = dev_node;
endp->reg = port_reg;
- if (OF_getproplen(endpoint_child, "slave-mode")
>= 0) {
+ if (OF_getproplen(endpoint_child,
+ "slave-mode") >= 0) {
pdata->in_ports++;
endp->slave = 1;
- } else {
+ } else
pdata->out_ports++;
- }
mtx_lock(>mtx_lock);
- TAILQ_INSERT_TAIL(>endpoints, endp,
link);
+ TAILQ_INSERT_TAIL(>endpoints,
+ endp, link);
mtx_unlock(>mtx_lock);
}
}
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svn commit: r361968 - in head/sys: arm64/coresight conf
Author: br
Date: Tue Jun 9 15:56:41 2020
New Revision: 361968
URL: https://svnweb.freebsd.org/changeset/base/361968
Log:
Rename coresight drivers: use underscores in filenames.
Sponsored by: DARPA, AFRL
Added:
head/sys/arm64/coresight/coresight_cmd.c
- copied unchanged from r361967, head/sys/arm64/coresight/coresight-cmd.c
head/sys/arm64/coresight/coresight_cpu_debug.c
- copied unchanged from r361967,
head/sys/arm64/coresight/coresight-cpu-debug.c
head/sys/arm64/coresight/coresight_dynamic_replicator.c
- copied unchanged from r361967,
head/sys/arm64/coresight/coresight-dynamic-replicator.c
head/sys/arm64/coresight/coresight_etm4x.c
- copied, changed from r361967, head/sys/arm64/coresight/coresight-etm4x.c
head/sys/arm64/coresight/coresight_etm4x.h
- copied unchanged from r361967, head/sys/arm64/coresight/coresight-etm4x.h
head/sys/arm64/coresight/coresight_funnel.c
- copied, changed from r361967, head/sys/arm64/coresight/coresight-funnel.c
head/sys/arm64/coresight/coresight_funnel.h
- copied unchanged from r361967,
head/sys/arm64/coresight/coresight-funnel.h
head/sys/arm64/coresight/coresight_tmc.c
- copied, changed from r361967, head/sys/arm64/coresight/coresight-tmc.c
head/sys/arm64/coresight/coresight_tmc.h
- copied unchanged from r361967, head/sys/arm64/coresight/coresight-tmc.h
Deleted:
head/sys/arm64/coresight/coresight-cmd.c
head/sys/arm64/coresight/coresight-cpu-debug.c
head/sys/arm64/coresight/coresight-dynamic-replicator.c
head/sys/arm64/coresight/coresight-etm4x.c
head/sys/arm64/coresight/coresight-etm4x.h
head/sys/arm64/coresight/coresight-funnel.c
head/sys/arm64/coresight/coresight-funnel.h
head/sys/arm64/coresight/coresight-tmc.c
head/sys/arm64/coresight/coresight-tmc.h
Modified:
head/sys/conf/files.arm64
Copied: head/sys/arm64/coresight/coresight_cmd.c (from r361967,
head/sys/arm64/coresight/coresight-cmd.c)
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/coresight/coresight_cmd.cTue Jun 9 15:56:41 2020
(r361968, copy of r361967, head/sys/arm64/coresight/coresight-cmd.c)
@@ -0,0 +1,156 @@
+/*-
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "coresight_if.h"
+
+extern struct coresight_device_list cs_devs;
+
+static struct coresight_device *
+coresight_next_device(struct coresight_device *cs_dev,
+struct coresight_event *event)
+{
+ struct coresight_device *out;
+ struct endpoint *out_endp;
+ struct endpoint *endp;
+
+ TAILQ_FOREACH(endp, _dev->pdata->endpoints, link) {
+ if (endp->slave != 0)
+ continue;
+
+ out = coresight_get_output_device(endp, _endp);
+ if (out != NULL) {
+ if (LIST_EMPTY(>endplist)) {
+ /* Add source device */
+ endp->cs_dev = cs_dev;
+ LIST_INSERT_HEAD(>endplist, endp,
+ endplink);
+ }
+
+ /* Add output device */
+ out_endp->cs_dev = out;
svn commit: r361533 - in head/sys: cddl/dev/dtrace/riscv riscv/riscv
Author: br
Date: Tue May 26 16:44:05 2020
New Revision: 361533
URL: https://svnweb.freebsd.org/changeset/base/361533
Log:
Fix entering KDB with dtrace-enabled kernel.
Reviewed by: markj, jhb
Differential Revision:https://reviews.freebsd.org/D24018
Modified:
head/sys/cddl/dev/dtrace/riscv/dtrace_subr.c
head/sys/riscv/riscv/trap.c
Modified: head/sys/cddl/dev/dtrace/riscv/dtrace_subr.c
==
--- head/sys/cddl/dev/dtrace/riscv/dtrace_subr.cTue May 26 16:40:40
2020(r361532)
+++ head/sys/cddl/dev/dtrace/riscv/dtrace_subr.cTue May 26 16:44:05
2020(r361533)
@@ -255,6 +255,8 @@ dtrace_invop_start(struct trapframe *frame)
int invop;
invop = dtrace_invop(frame->tf_sepc, frame, frame->tf_sepc);
+ if (invop == 0)
+ return (-1);
if (match_opcode(invop, (MATCH_SD | RS2_RA | RS1_SP),
(MASK_SD | RS2_MASK | RS1_MASK))) {
@@ -291,6 +293,10 @@ dtrace_invop_start(struct trapframe *frame)
frame->tf_sepc = frame->tf_ra;
return (0);
}
+
+#ifdef INVARIANTS
+ panic("Instruction %x doesn't match any opcode.", invop);
+#endif
return (-1);
}
Modified: head/sys/riscv/riscv/trap.c
==
--- head/sys/riscv/riscv/trap.c Tue May 26 16:40:40 2020(r361532)
+++ head/sys/riscv/riscv/trap.c Tue May 26 16:44:05 2020(r361533)
@@ -274,10 +274,9 @@ do_trap_supervisor(struct trapframe *frame)
break;
case EXCP_BREAKPOINT:
#ifdef KDTRACE_HOOKS
- if (dtrace_invop_jump_addr != 0) {
- dtrace_invop_jump_addr(frame);
- break;
- }
+ if (dtrace_invop_jump_addr != NULL &&
+ dtrace_invop_jump_addr(frame) == 0)
+ break;
#endif
#ifdef KDB
kdb_trap(exception, 0, frame);
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svn commit: r361532 - in head/sys: dev/acpica dev/pci x86/iommu
Author: br
Date: Tue May 26 16:40:40 2020
New Revision: 361532
URL: https://svnweb.freebsd.org/changeset/base/361532
Log:
Rename dmar_get_dma_tag() to acpi_iommu_get_dma_tag().
This is needed for a new IOMMU controller support.
Reviewed by: kib
Differential Revision:https://reviews.freebsd.org/D24943
Modified:
head/sys/dev/acpica/acpi_pci.c
head/sys/dev/pci/pci.c
head/sys/x86/iommu/busdma_dmar.c
head/sys/x86/iommu/busdma_dmar.h
Modified: head/sys/dev/acpica/acpi_pci.c
==
--- head/sys/dev/acpica/acpi_pci.c Tue May 26 16:14:21 2020
(r361531)
+++ head/sys/dev/acpica/acpi_pci.c Tue May 26 16:40:40 2020
(r361532)
@@ -456,15 +456,15 @@ acpi_pci_detach(device_t dev)
}
#ifdef ACPI_DMAR
-bus_dma_tag_t dmar_get_dma_tag(device_t dev, device_t child);
+bus_dma_tag_t acpi_iommu_get_dma_tag(device_t dev, device_t child);
static bus_dma_tag_t
acpi_pci_get_dma_tag(device_t bus, device_t child)
{
bus_dma_tag_t tag;
if (device_get_parent(child) == bus) {
- /* try dmar and return if it works */
- tag = dmar_get_dma_tag(bus, child);
+ /* try iommu and return if it works */
+ tag = acpi_iommu_get_dma_tag(bus, child);
} else
tag = NULL;
if (tag == NULL)
Modified: head/sys/dev/pci/pci.c
==
--- head/sys/dev/pci/pci.c Tue May 26 16:14:21 2020(r361531)
+++ head/sys/dev/pci/pci.c Tue May 26 16:40:40 2020(r361532)
@@ -5682,7 +5682,7 @@ pci_get_resource_list (device_t dev, device_t child)
}
#ifdef ACPI_DMAR
-bus_dma_tag_t dmar_get_dma_tag(device_t dev, device_t child);
+bus_dma_tag_t acpi_iommu_get_dma_tag(device_t dev, device_t child);
bus_dma_tag_t
pci_get_dma_tag(device_t bus, device_t dev)
{
@@ -5690,8 +5690,8 @@ pci_get_dma_tag(device_t bus, device_t dev)
struct pci_softc *sc;
if (device_get_parent(dev) == bus) {
- /* try dmar and return if it works */
- tag = dmar_get_dma_tag(bus, dev);
+ /* try iommu and return if it works */
+ tag = acpi_iommu_get_dma_tag(bus, dev);
} else
tag = NULL;
if (tag == NULL) {
Modified: head/sys/x86/iommu/busdma_dmar.c
==
--- head/sys/x86/iommu/busdma_dmar.cTue May 26 16:14:21 2020
(r361531)
+++ head/sys/x86/iommu/busdma_dmar.cTue May 26 16:40:40 2020
(r361532)
@@ -269,7 +269,7 @@ dmar_instantiate_ctx(struct dmar_unit *dmar, device_t
}
bus_dma_tag_t
-dmar_get_dma_tag(device_t dev, device_t child)
+acpi_iommu_get_dma_tag(device_t dev, device_t child)
{
struct dmar_unit *dmar;
struct dmar_ctx *ctx;
Modified: head/sys/x86/iommu/busdma_dmar.h
==
--- head/sys/x86/iommu/busdma_dmar.hTue May 26 16:14:21 2020
(r361531)
+++ head/sys/x86/iommu/busdma_dmar.hTue May 26 16:40:40 2020
(r361532)
@@ -62,6 +62,6 @@ struct bus_dmamap_dmar {
extern struct bus_dma_impl bus_dma_dmar_impl;
-bus_dma_tag_t dmar_get_dma_tag(device_t dev, device_t child);
+bus_dma_tag_t acpi_iommu_get_dma_tag(device_t dev, device_t child);
#endif
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svn commit: r357762 - in head/sys: arm64/conf conf dev/pci dev/pci/controller
Author: br
Date: Tue Feb 11 15:12:09 2020
New Revision: 357762
URL: https://svnweb.freebsd.org/changeset/base/357762
Log:
Add PCI Express driver for the ARM Neoverse N1 System Development
Platform (N1SDP).
Neoverse N1 is a high-performance ARM microarchitecture designed
by the ARM Holdings for the server market.
The PCI part on N1SDP was shipped untested and suffers from some
integration issues.
For instance accessing to not existing BDFs causes System Error
(SError) exception. To mitigate this, the firmware scans the bus,
catches SErrors and creates a table with valid BDFs. That allows
us to filter-out accesses to invalid BDFs in this driver.
Also the root complex config space (BDF == 0) has an unusual
location in memory map, so remapping accesses to it is required.
Finally, the config space is restricted to 32-bit accesses only.
This was tested on the ARM boxes kindly provided by the ARM Ltd
to the DARPA CHERI Project.
In collaboration with:andrew
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D23349
Added:
head/sys/dev/pci/controller/
head/sys/dev/pci/controller/pci_n1sdp.c (contents, props changed)
Modified:
head/sys/arm64/conf/GENERIC
head/sys/conf/files.arm64
head/sys/dev/pci/pci_host_generic_acpi.c
head/sys/dev/pci/pci_host_generic_acpi.h
Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Tue Feb 11 14:00:27 2020(r357761)
+++ head/sys/arm64/conf/GENERIC Tue Feb 11 15:12:09 2020(r357762)
@@ -147,6 +147,7 @@ device cpufreq
# Bus drivers
device pci
+device pci_n1sdp # ARM Neoverse N1 SDP PCI
device al_pci # Annapurna Alpine PCI-E
optionsPCI_HP # PCI-Express native HotPlug
optionsPCI_IOV # PCI SR-IOV support
Modified: head/sys/conf/files.arm64
==
--- head/sys/conf/files.arm64 Tue Feb 11 14:00:27 2020(r357761)
+++ head/sys/conf/files.arm64 Tue Feb 11 15:12:09 2020(r357762)
@@ -248,6 +248,7 @@ dev/neta/if_mvneta_fdt.coptionalneta fdt
dev/neta/if_mvneta.c optionalneta mdio mii
dev/ofw/ofw_cpu.c optionalfdt
dev/ofw/ofwpci.c optionalfdt pci
+dev/pci/controller/pci_n1sdp.c optionalpci_n1sdp acpi
dev/pci/pci_host_generic.c optionalpci
dev/pci/pci_host_generic_acpi.coptionalpci acpi
dev/pci/pci_host_generic_fdt.c optionalpci fdt
Added: head/sys/dev/pci/controller/pci_n1sdp.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/pci/controller/pci_n1sdp.c Tue Feb 11 15:12:09 2020
(r357762)
@@ -0,0 +1,350 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andrew Turner
+ * Copyright (c) 2019 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include
svn commit: r357686 - in head/sys: dev/altera/atse dev/flash dev/xdma dev/xilinx mips/ingenic
Author: br
Date: Sat Feb 8 23:07:29 2020
New Revision: 357686
URL: https://svnweb.freebsd.org/changeset/base/357686
Log:
Enter the network epoch in the xdma interrupt handler if required
by a peripheral device driver.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/altera/atse/if_atse.c
head/sys/dev/flash/cqspi.c
head/sys/dev/xdma/xdma.c
head/sys/dev/xdma/xdma.h
head/sys/dev/xdma/xdma_fdt_test.c
head/sys/dev/xilinx/if_xae.c
head/sys/mips/ingenic/jz4780_aic.c
Modified: head/sys/dev/altera/atse/if_atse.c
==
--- head/sys/dev/altera/atse/if_atse.c Sat Feb 8 21:59:46 2020
(r357685)
+++ head/sys/dev/altera/atse/if_atse.c Sat Feb 8 23:07:29 2020
(r357686)
@@ -1293,7 +1293,8 @@ atse_attach(device_t dev)
}
/* Setup interrupt handler. */
- error = xdma_setup_intr(sc->xchan_tx, atse_xdma_tx_intr, sc,
>ih_tx);
+ error = xdma_setup_intr(sc->xchan_tx, 0,
+ atse_xdma_tx_intr, sc, >ih_tx);
if (error) {
device_printf(sc->dev,
"Can't setup xDMA interrupt handler.\n");
@@ -1324,7 +1325,8 @@ atse_attach(device_t dev)
}
/* Setup interrupt handler. */
- error = xdma_setup_intr(sc->xchan_rx, atse_xdma_rx_intr, sc,
>ih_rx);
+ error = xdma_setup_intr(sc->xchan_rx, XDMA_INTR_NET,
+ atse_xdma_rx_intr, sc, >ih_rx);
if (error) {
device_printf(sc->dev,
"Can't setup xDMA interrupt handler.\n");
@@ -1381,8 +1383,7 @@ atse_attach(device_t dev)
}
ifp->if_softc = sc;
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
- ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
- IFF_NEEDSEPOCH;
+ ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_ioctl = atse_ioctl;
ifp->if_transmit = atse_transmit;
ifp->if_qflush = atse_qflush;
Modified: head/sys/dev/flash/cqspi.c
==
--- head/sys/dev/flash/cqspi.c Sat Feb 8 21:59:46 2020(r357685)
+++ head/sys/dev/flash/cqspi.c Sat Feb 8 23:07:29 2020(r357686)
@@ -705,7 +705,7 @@ cqspi_attach(device_t dev)
}
/* Setup xDMA interrupt handlers. */
- error = xdma_setup_intr(sc->xchan_tx, cqspi_xdma_tx_intr,
+ error = xdma_setup_intr(sc->xchan_tx, 0, cqspi_xdma_tx_intr,
sc, >ih_tx);
if (error) {
device_printf(sc->dev,
@@ -713,7 +713,7 @@ cqspi_attach(device_t dev)
return (ENXIO);
}
- error = xdma_setup_intr(sc->xchan_rx, cqspi_xdma_rx_intr,
+ error = xdma_setup_intr(sc->xchan_rx, 0, cqspi_xdma_rx_intr,
sc, >ih_rx);
if (error) {
device_printf(sc->dev,
Modified: head/sys/dev/xdma/xdma.c
==
--- head/sys/dev/xdma/xdma.cSat Feb 8 21:59:46 2020(r357685)
+++ head/sys/dev/xdma/xdma.cSat Feb 8 23:07:29 2020(r357686)
@@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -203,7 +204,7 @@ xdma_channel_free(xdma_channel_t *xchan)
}
int
-xdma_setup_intr(xdma_channel_t *xchan,
+xdma_setup_intr(xdma_channel_t *xchan, int flags,
int (*cb)(void *, xdma_transfer_status_t *),
void *arg, void **ihandler)
{
@@ -224,6 +225,7 @@ xdma_setup_intr(xdma_channel_t *xchan,
ih = malloc(sizeof(struct xdma_intr_handler),
M_XDMA, M_WAITOK | M_ZERO);
+ ih->flags = flags;
ih->cb = cb;
ih->cb_user = arg;
@@ -325,13 +327,20 @@ xdma_callback(xdma_channel_t *xchan, xdma_transfer_sta
struct xdma_intr_handler *ih_tmp;
struct xdma_intr_handler *ih;
xdma_controller_t *xdma;
+ struct epoch_tracker et;
xdma = xchan->xdma;
KASSERT(xdma != NULL, ("xdma is NULL"));
- TAILQ_FOREACH_SAFE(ih, >ie_handlers, ih_next, ih_tmp)
- if (ih->cb != NULL)
+ TAILQ_FOREACH_SAFE(ih, >ie_handlers, ih_next, ih_tmp) {
+ if (ih->cb != NULL) {
+ if (ih->flags & XDMA_INTR_NET)
+ NET_EPOCH_ENTER(et);
ih->cb(ih->cb_user, status);
+ if (ih->flags & XDMA_INTR_NET)
+ NET_EPOCH_EXIT(et);
+ }
+ }
if (xchan->flags & XCHAN_TYPE_SG)
xdma_queue_submit(xchan);
Modified: head/sys/dev/xdma/xdma.h
==
--- head/sys/dev/xdma/xdma.hSat Feb 8 21:59:46 2020(r357685)
+++ head/sys/dev/xdma/xdma.hSat Feb 8 23:07:29 2020(r357686)
@@ -195,6 +195,8 @@ typedef struct xdma_channel xdma_channel_t;
svn commit: r357682 - head/sys/dev/xdma
Author: br
Date: Sat Feb 8 21:02:20 2020
New Revision: 357682
URL: https://svnweb.freebsd.org/changeset/base/357682
Log:
Fix a KASSERT since chained mbufs are accepted by the xdma bounce
buffer loader. m_copydata() will copy entire chain to a single buffer.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/xdma/xdma_sg.c
Modified: head/sys/dev/xdma/xdma_sg.c
==
--- head/sys/dev/xdma/xdma_sg.c Sat Feb 8 20:56:38 2020(r357681)
+++ head/sys/dev/xdma/xdma_sg.c Sat Feb 8 21:02:20 2020(r357682)
@@ -498,7 +498,7 @@ _xdma_load_data(xdma_channel_t *xchan, struct xdma_req
m = xr->m;
- KASSERT(xchan->caps & XCHAN_CAP_NOSEG,
+ KASSERT(xchan->caps & (XCHAN_CAP_NOSEG | XCHAN_CAP_BOUNCE),
("Handling segmented data is not implemented here."));
nsegs = 1;
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svn commit: r357653 - in head/sys/dev: xdma xilinx
Author: br
Date: Fri Feb 7 14:36:28 2020
New Revision: 357653
URL: https://svnweb.freebsd.org/changeset/base/357653
Log:
Fix xae(4) driver attachement on the Government Furnished Equipment (GFE)
riscv cores.
GFE cores come with standard DTS file that lacks standard 'dmas ='
property, which means xae(4) could not find a DMA controller to use.
The 'dmas' property could not be added to the DTS file because the
ethernet controller and DMA engine parts in Linux are implemented
in a single driver.
Instead of 'dmas' property the standard Xilinx 'axistream-connected'
property is provided, so fallback to use it instead.
Suggested by: James Clarke
Reviewed by: James Clarke
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/xdma/xdma.c
head/sys/dev/xdma/xdma.h
head/sys/dev/xilinx/axidma.c
head/sys/dev/xilinx/axidma.h
head/sys/dev/xilinx/if_xae.c
Modified: head/sys/dev/xdma/xdma.c
==
--- head/sys/dev/xdma/xdma.cFri Feb 7 12:26:38 2020(r357652)
+++ head/sys/dev/xdma/xdma.cFri Feb 7 14:36:28 2020(r357653)
@@ -511,6 +511,24 @@ xdma_ofw_get(device_t dev, const char *prop)
#endif
/*
+ * Allocate xdma controller.
+ */
+xdma_controller_t *
+xdma_get(device_t dev, device_t dma_dev)
+{
+ xdma_controller_t *xdma;
+
+ xdma = malloc(sizeof(struct xdma_controller),
+ M_XDMA, M_WAITOK | M_ZERO);
+ xdma->dev = dev;
+ xdma->dma_dev = dma_dev;
+
+ TAILQ_INIT(>channels);
+
+ return (xdma);
+}
+
+/*
* Free xDMA controller object.
*/
int
Modified: head/sys/dev/xdma/xdma.h
==
--- head/sys/dev/xdma/xdma.hFri Feb 7 12:26:38 2020(r357652)
+++ head/sys/dev/xdma/xdma.hFri Feb 7 14:36:28 2020(r357653)
@@ -231,6 +231,7 @@ static MALLOC_DEFINE(M_XDMA, "xdma", "xDMA framework")
/* xDMA controller ops */
xdma_controller_t *xdma_ofw_get(device_t dev, const char *prop);
+xdma_controller_t *xdma_get(device_t dev, device_t dma_dev);
int xdma_put(xdma_controller_t *xdma);
vmem_t * xdma_get_memory(device_t dev);
void xdma_put_memory(vmem_t *vmem);
Modified: head/sys/dev/xilinx/axidma.c
==
--- head/sys/dev/xilinx/axidma.cFri Feb 7 12:26:38 2020
(r357652)
+++ head/sys/dev/xilinx/axidma.cFri Feb 7 14:36:28 2020
(r357653)
@@ -61,6 +61,15 @@ __FBSDID("$FreeBSD$");
#include "xdma_if.h"
+#defineREAD4(_sc, _reg)\
+ bus_space_read_4(_sc->bst, _sc->bsh, _reg)
+#defineWRITE4(_sc, _reg, _val) \
+ bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
+#defineREAD8(_sc, _reg)\
+ bus_space_read_8(_sc->bst, _sc->bsh, _reg)
+#defineWRITE8(_sc, _reg, _val) \
+ bus_space_write_8(_sc->bst, _sc->bsh, _reg, _val)
+
#define AXIDMA_DEBUG
#undef AXIDMA_DEBUG
@@ -70,16 +79,7 @@ __FBSDID("$FreeBSD$");
#define dprintf(fmt, ...)
#endif
-#defineAXIDMA_NCHANNELS2
-#defineAXIDMA_DESCS_NUM512
-#defineAXIDMA_TX_CHAN 0
-#defineAXIDMA_RX_CHAN 1
-
extern struct bus_space memmap_bus;
-
-struct axidma_fdt_data {
- int id;
-};
struct axidma_channel {
struct axidma_softc *sc;
Modified: head/sys/dev/xilinx/axidma.h
==
--- head/sys/dev/xilinx/axidma.hFri Feb 7 12:26:38 2020
(r357652)
+++ head/sys/dev/xilinx/axidma.hFri Feb 7 14:36:28 2020
(r357653)
@@ -60,14 +60,10 @@
#defineAXI_TAILDESC_MSB(n) (0x14 + 0x30 * (n)) /* Tail Descriptor
Pointer. Upper 32 bits of address. */
#defineAXI_SG_CTL 0x2C /* Scatter/Gather User and Cache */
-#defineREAD4(_sc, _reg)\
- bus_space_read_4(_sc->bst, _sc->bsh, _reg)
-#defineWRITE4(_sc, _reg, _val) \
- bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
-#defineREAD8(_sc, _reg)\
- bus_space_read_8(_sc->bst, _sc->bsh, _reg)
-#defineWRITE8(_sc, _reg, _val) \
- bus_space_write_8(_sc->bst, _sc->bsh, _reg, _val)
+#defineAXIDMA_NCHANNELS2
+#defineAXIDMA_DESCS_NUM512
+#defineAXIDMA_TX_CHAN 0
+#defineAXIDMA_RX_CHAN 1
struct axidma_desc {
uint32_t next;
@@ -91,6 +87,10 @@ struct axidma_desc {
uint32_t app3;
uint32_t app4;
uint32_t reserved[3];
+};
+
+struct axidma_fdt_data {
+ int id;
};
#endif /* !_DEV_XILINX_AXIDMA_H_ */
Modified: head/sys/dev/xilinx/if_xae.c
==
--- head/sys/dev/xilinx/if_xae.cFri Feb 7 12:26:38 2020
(r357652)
+++ head/sys/dev/xilinx/if_xae.cFri
svn commit: r357258 - in head/sys: conf dev/xilinx
Author: br
Date: Wed Jan 29 16:52:12 2020
New Revision: 357258
URL: https://svnweb.freebsd.org/changeset/base/357258
Log:
Add driver for Xilinx XDMA PCIe Bridge found in the U.S. Government
Furnished Equipment (GFE) riscv cores.
GFE cores are synthesized on the Xilinx Virtex UltraScale+ FPGA VCU118
Evaluation Kit.
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D23337
Added:
head/sys/dev/xilinx/xlnx_pcib.c (contents, props changed)
head/sys/dev/xilinx/xlnx_pcib.h (contents, props changed)
Modified:
head/sys/conf/files.riscv
Modified: head/sys/conf/files.riscv
==
--- head/sys/conf/files.riscv Wed Jan 29 16:24:16 2020(r357257)
+++ head/sys/conf/files.riscv Wed Jan 29 16:52:12 2020(r357258)
@@ -14,6 +14,7 @@ dev/uart/uart_dev_lowrisc.c optionaluart_lowrisc
dev/xilinx/axi_quad_spi.c optionalxilinx_spi
dev/xilinx/axidma.coptionalaxidma xdma
dev/xilinx/if_xae.coptionalxae
+dev/xilinx/xlnx_pcib.c optionalpci fdt xlnx_pcib
kern/kern_clocksource.cstandard
kern/msi_if.m standard
kern/pic_if.m standard
Added: head/sys/dev/xilinx/xlnx_pcib.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/xilinx/xlnx_pcib.c Wed Jan 29 16:52:12 2020
(r357258)
@@ -0,0 +1,794 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_platform.h"
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "xlnx_pcib.h"
+
+#include "ofw_bus_if.h"
+#include "msi_if.h"
+#include "pcib_if.h"
+#include "pic_if.h"
+
+#defineXLNX_PCIB_MAX_MSI 64
+
+static int xlnx_pcib_fdt_attach(device_t);
+static int xlnx_pcib_fdt_probe(device_t);
+static int xlnx_pcib_fdt_get_id(device_t, device_t, enum pci_id_type,
+uintptr_t *);
+static void xlnx_pcib_msi_mask(device_t dev, struct intr_irqsrc *isrc,
+bool mask);
+
+struct xlnx_pcib_softc {
+ struct generic_pcie_fdt_softc fdt_sc;
+ struct resource *res[4];
+ struct mtx mtx;
+ vm_offset_t msi_page;
+ struct xlnx_pcib_irqsrc *isrcs;
+ device_tdev;
+ void*intr_cookie[3];
+};
+
+static struct resource_spec xlnx_pcib_spec[] = {
+ { SYS_RES_MEMORY, 0, RF_ACTIVE },
+ { SYS_RES_IRQ, 0, RF_ACTIVE },
+ { SYS_RES_IRQ, 1, RF_ACTIVE },
+ { SYS_RES_IRQ, 2, RF_ACTIVE },
+ { -1, 0 }
+};
+
+struct xlnx_pcib_irqsrc {
+ struct intr_irqsrc isrc;
+ u_int irq;
+#defineXLNX_IRQ_FLAG_USED (1 << 0)
+ u_int fl
svn commit: r357087 - in head/sys: conf riscv/conf
Author: br Date: Fri Jan 24 17:10:21 2020 New Revision: 357087 URL: https://svnweb.freebsd.org/changeset/base/357087 Log: Include the PCI stack to the riscv GENERIC kernel. It will be used by an upcoming PCI root complex driver. Sponsored by: DARPA, AFRL Modified: head/sys/conf/files.riscv head/sys/riscv/conf/GENERIC Modified: head/sys/conf/files.riscv == --- head/sys/conf/files.riscv Fri Jan 24 16:50:51 2020(r357086) +++ head/sys/conf/files.riscv Fri Jan 24 17:10:21 2020(r357087) @@ -6,6 +6,9 @@ crypto/blowfish/bf_enc.coptionalcrypto | ipsec | ips crypto/des/des_enc.c optionalcrypto | ipsec | ipsec_support | netsmb dev/cadence/if_cgem.c optionalcgem dev/ofw/ofw_cpu.c optionalfdt +dev/ofw/ofwpci.c optionalpci fdt +dev/pci/pci_host_generic.c optionalpci +dev/pci/pci_host_generic_fdt.c optionalpci fdt dev/uart/uart_cpu_fdt.coptionaluart fdt dev/uart/uart_dev_lowrisc.coptionaluart_lowrisc dev/xilinx/axi_quad_spi.c optionalxilinx_spi Modified: head/sys/riscv/conf/GENERIC == --- head/sys/riscv/conf/GENERIC Fri Jan 24 16:50:51 2020(r357086) +++ head/sys/riscv/conf/GENERIC Fri Jan 24 17:10:21 2020(r357087) @@ -76,6 +76,9 @@ options INTRNG # RISC-V SBI console device rcons +# Bus drivers +device pci + # VirtIO support device virtio # Generic VirtIO bus (required) device virtio_pci # VirtIO PCI device ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r357086 - in head/sys/riscv: conf include
Author: br Date: Fri Jan 24 16:50:51 2020 New Revision: 357086 URL: https://svnweb.freebsd.org/changeset/base/357086 Log: Enable NEW_PCIB on riscv. Sponsored by: DARPA, AFRL Modified: head/sys/riscv/conf/DEFAULTS head/sys/riscv/include/resource.h Modified: head/sys/riscv/conf/DEFAULTS == --- head/sys/riscv/conf/DEFAULTSFri Jan 24 16:43:49 2020 (r357085) +++ head/sys/riscv/conf/DEFAULTSFri Jan 24 16:50:51 2020 (r357086) @@ -11,3 +11,5 @@ devicemem # Memory and kernel memory devices # Default partitioning schemes optionsGEOM_PART_BSD optionsGEOM_PART_MBR + +optionsNEW_PCIB Modified: head/sys/riscv/include/resource.h == --- head/sys/riscv/include/resource.h Fri Jan 24 16:43:49 2020 (r357085) +++ head/sys/riscv/include/resource.h Fri Jan 24 16:50:51 2020 (r357086) @@ -42,5 +42,8 @@ #defineSYS_RES_MEMORY 3 /* i/o memory */ #defineSYS_RES_IOPORT 4 /* i/o ports */ #defineSYS_RES_GPIO5 /* general purpose i/o */ +#ifdef NEW_PCIB +#definePCI_RES_BUS 6 /* PCI bus numbers */ +#endif #endif /* !_MACHINE_RESOURCE_H_ */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r357085 - head/sys/dev/pci
Author: br
Date: Fri Jan 24 16:43:49 2020
New Revision: 357085
URL: https://svnweb.freebsd.org/changeset/base/357085
Log:
o Move the software context struct to a header file.
o Make the pci_host_generic_acpi_attach() globally visible.
o Declare a new driver class.
These will be used by a new PCI root complex driver.
Sponsored by: DARPA, AFRL
Added:
head/sys/dev/pci/pci_host_generic_acpi.h (contents, props changed)
Modified:
head/sys/dev/pci/pci_host_generic_acpi.c
Modified: head/sys/dev/pci/pci_host_generic_acpi.c
==
--- head/sys/dev/pci/pci_host_generic_acpi.cFri Jan 24 16:43:02 2020
(r357084)
+++ head/sys/dev/pci/pci_host_generic_acpi.cFri Jan 24 16:43:49 2020
(r357085)
@@ -57,6 +57,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
@@ -88,11 +89,6 @@ __FBSDID("$FreeBSD$");
#definePROPS_CELL_SIZE 1
#definePCI_ADDR_CELL_SIZE 2
-struct generic_pcie_acpi_softc {
- struct generic_pcie_core_softc base;
- ACPI_BUFFER ap_prt; /* interrupt routing table */
-};
-
/* Forward prototypes */
static int generic_pcie_acpi_probe(device_t dev);
@@ -233,7 +229,7 @@ pci_host_acpi_get_ecam_resource(device_t dev)
return (0);
}
-static int
+int
pci_host_generic_acpi_attach(device_t dev)
{
struct generic_pcie_acpi_softc *sc;
Added: head/sys/dev/pci/pci_host_generic_acpi.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/pci/pci_host_generic_acpi.hFri Jan 24 16:43:49 2020
(r357085)
@@ -0,0 +1,47 @@
+/*-
+ * Copyright (C) 2018 Cavium Inc.
+ * Copyright (c) 2015 Ruslan Bukin
+ * Copyright (c) 2014 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Semihalf under
+ * the sponsorship of the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef_DEV_PCI_PCI_HOST_GENERIC_ACPI_H_
+#define_DEV_PCI_PCI_HOST_GENERIC_ACPI_H_
+
+struct generic_pcie_acpi_softc {
+ struct generic_pcie_core_softc base;
+ int segment;
+ ACPI_BUFFER ap_prt; /* interrupt routing table */
+};
+
+DECLARE_CLASS(generic_pcie_acpi_driver);
+
+int pci_host_generic_acpi_attach(device_t dev);
+
+#endif /* !_DEV_PCI_PCI_HOST_GENERIC_ACPI_H_ */
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svn commit: r357083 - head/sys/dev/pci
Author: br
Date: Fri Jan 24 16:08:06 2020
New Revision: 357083
URL: https://svnweb.freebsd.org/changeset/base/357083
Log:
Move the ECAM macroses to the header file.
These will be used by other PCI root complex drivers.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/pci/pci_host_generic.c
head/sys/dev/pci/pci_host_generic.h
Modified: head/sys/dev/pci/pci_host_generic.c
==
--- head/sys/dev/pci/pci_host_generic.c Fri Jan 24 15:29:33 2020
(r357082)
+++ head/sys/dev/pci/pci_host_generic.c Fri Jan 24 16:08:06 2020
(r357083)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2015 Ruslan Bukin
+ * Copyright (c) 2015, 2020 Ruslan Bukin
* Copyright (c) 2014 The FreeBSD Foundation
* All rights reserved.
*
@@ -53,21 +53,6 @@ __FBSDID("$FreeBSD$");
#include
#include "pcib_if.h"
-
-/* Assembling ECAM Configuration Address */
-#definePCIE_BUS_SHIFT 20
-#definePCIE_SLOT_SHIFT 15
-#definePCIE_FUNC_SHIFT 12
-#definePCIE_BUS_MASK 0xFF
-#definePCIE_SLOT_MASK 0x1F
-#definePCIE_FUNC_MASK 0x07
-#definePCIE_REG_MASK 0xFFF
-
-#definePCIE_ADDR_OFFSET(bus, slot, func, reg) \
- bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT)| \
- (((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT) | \
- (((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT) | \
- ((reg) & PCIE_REG_MASK))
/* Forward prototypes */
Modified: head/sys/dev/pci/pci_host_generic.h
==
--- head/sys/dev/pci/pci_host_generic.h Fri Jan 24 15:29:33 2020
(r357082)
+++ head/sys/dev/pci/pci_host_generic.h Fri Jan 24 16:08:06 2020
(r357083)
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015 Ruslan Bukin
+ * Copyright (c) 2015, 2020 Ruslan Bukin
* Copyright (c) 2015 The FreeBSD Foundation
* All rights reserved.
*
@@ -35,6 +35,21 @@
#define__PCI_HOST_GENERIC_H_
#include "pci_if.h"
+
+/* Assembling ECAM Configuration Address */
+#definePCIE_BUS_SHIFT 20
+#definePCIE_SLOT_SHIFT 15
+#definePCIE_FUNC_SHIFT 12
+#definePCIE_BUS_MASK 0xFF
+#definePCIE_SLOT_MASK 0x1F
+#definePCIE_FUNC_MASK 0x07
+#definePCIE_REG_MASK 0xFFF
+
+#definePCIE_ADDR_OFFSET(bus, slot, func, reg) \
+ bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT)| \
+ (((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT) | \
+ (((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT) | \
+ ((reg) & PCIE_REG_MASK))
#defineMAX_RANGES_TUPLES 16
#defineMIN_RANGES_TUPLES 2
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svn commit: r356834 - head/sys/riscv/riscv
Author: br
Date: Fri Jan 17 16:48:20 2020
New Revision: 356834
URL: https://svnweb.freebsd.org/changeset/base/356834
Log:
Use unsigned loads in fubyte, fuword16, generic_bs_r_1, generic_bs_r_2
as these functions should do zero-extend.
Discovered by running pci_read_cap(), and by hint from James Clarke.
Reviewed by: James Clarke
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D23236
Modified:
head/sys/riscv/riscv/bus_space_asm.S
head/sys/riscv/riscv/support.S
Modified: head/sys/riscv/riscv/bus_space_asm.S
==
--- head/sys/riscv/riscv/bus_space_asm.SFri Jan 17 15:55:14 2020
(r356833)
+++ head/sys/riscv/riscv/bus_space_asm.SFri Jan 17 16:48:20 2020
(r356834)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2016 Ruslan Bukin
+ * Copyright (c) 2016-2020 Ruslan Bukin
* All rights reserved.
*
* Portions of this software were developed by SRI International and the
@@ -38,13 +38,13 @@ __FBSDID("$FreeBSD$");
ENTRY(generic_bs_r_1)
add a3, a1, a2
- lb a0, 0(a3)
+ lbu a0, 0(a3)
ret
END(generic_bs_r_1)
ENTRY(generic_bs_r_2)
add a3, a1, a2
- lh a0, 0(a3)
+ lhu a0, 0(a3)
ret
END(generic_bs_r_2)
Modified: head/sys/riscv/riscv/support.S
==
--- head/sys/riscv/riscv/support.S Fri Jan 17 15:55:14 2020
(r356833)
+++ head/sys/riscv/riscv/support.S Fri Jan 17 16:48:20 2020
(r356834)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2015-2018 Ruslan Bukin
+ * Copyright (c) 2015-2020 Ruslan Bukin
* All rights reserved.
*
* Portions of this software were developed by SRI International and the
@@ -102,7 +102,7 @@ ENTRY(fubyte)
la a6, fsu_fault /* Load the fault handler */
SET_FAULT_HANDLER(a6, a1) /* And set it */
ENTER_USER_ACCESS(a1)
- lb a0, 0(a0) /* Try loading the data */
+ lbu a0, 0(a0) /* Try loading the data */
EXIT_USER_ACCESS(a1)
SET_FAULT_HANDLER(x0, a1) /* Reset the fault handler */
ret /* Return */
@@ -117,7 +117,7 @@ ENTRY(fuword16)
la a6, fsu_fault /* Load the fault handler */
SET_FAULT_HANDLER(a6, a1) /* And set it */
ENTER_USER_ACCESS(a1)
- lh a0, 0(a0) /* Try loading the data */
+ lhu a0, 0(a0) /* Try loading the data */
EXIT_USER_ACCESS(a1)
SET_FAULT_HANDLER(x0, a1) /* Reset the fault handler */
ret /* Return */
___
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Re: svn commit: r356438 - head/sys/riscv/sifive
On Tue, Jan 07, 2020 at 09:02:14AM +, Kristof Provost wrote:
> Author: kp
> Date: Tue Jan 7 09:02:14 2020
> New Revision: 356438
> URL: https://svnweb.freebsd.org/changeset/base/356438
>
> Log:
> sifive: Fix incorrect tx/rx ctrl defines
>
> Happily these were never used, but they should be correct anyway.
>
> Reported by:Nicholas O'Brien
> Sponsored by: Axiado
>
> Modified:
> head/sys/riscv/sifive/sifive_uart.c
>
> Modified: head/sys/riscv/sifive/sifive_uart.c
> ==
> --- head/sys/riscv/sifive/sifive_uart.c Tue Jan 7 05:33:33 2020
> (r356437)
> +++ head/sys/riscv/sifive/sifive_uart.c Tue Jan 7 09:02:14 2020
> (r356438)
> @@ -64,11 +64,11 @@ __FBSDID("$FreeBSD$");
> #define SFUART_TXCTRL 0x08
> #define SFUART_TXCTRL_ENABLE0x01
> #define SFUART_TXCTRL_NSTOP 0x02
> -#define SFUART_TXCTRL_TXCNT 0xb
> +#define SFUART_TXCTRL_TXCNT 0x7
> #define SFUART_TXCTRL_TXCNT_SHIFT 16
> #define SFUART_RXCTRL 0x0c
> #define SFUART_RXCTRL_ENABLE0x01
> -#define SFUART_RXCTRL_RXCNT 0xb
> +#define SFUART_RXCTRL_RXCNT 0x7
> #define SFUART_RXCTRL_RXCNT_SHIFT 16
> #define SFUART_IRQ_ENABLE 0x10
> #define SFUART_IRQ_ENABLE_TXWM 0x01
That could be
#define SFUART_RXCTRL_RXCNT_SHIFT 16
#define SFUART_RXCTRL_RXCNT_MASK (0x7 << SFUART_RXCTRL_RXCNT_SHIFT)
Ruslan
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svn commit: r356205 - head/sys/riscv/riscv
Author: br Date: Mon Dec 30 17:18:50 2019 New Revision: 356205 URL: https://svnweb.freebsd.org/changeset/base/356205 Log: Don't hard-code field offsets of struct riscv_bootparams. Submitted by: James Clarke Sponsored by: DARPA, AFRL Differential Revision:https://reviews.freebsd.org/D22970 Modified: head/sys/riscv/riscv/genassym.c head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/genassym.c == --- head/sys/riscv/riscv/genassym.c Mon Dec 30 15:54:36 2019 (r356204) +++ head/sys/riscv/riscv/genassym.c Mon Dec 30 17:18:50 2019 (r356205) @@ -101,3 +101,9 @@ ASSYM(TF_SCAUSE, offsetof(struct trapframe, tf_scause) ASSYM(TF_SSTATUS, offsetof(struct trapframe, tf_sstatus)); ASSYM(RISCV_BOOTPARAMS_SIZE, sizeof(struct riscv_bootparams)); +ASSYM(RISCV_BOOTPARAMS_KERN_L1PT, offsetof(struct riscv_bootparams, kern_l1pt)); +ASSYM(RISCV_BOOTPARAMS_KERN_PHYS, offsetof(struct riscv_bootparams, kern_phys)); +ASSYM(RISCV_BOOTPARAMS_KERN_STACK, offsetof(struct riscv_bootparams, +kern_stack)); +ASSYM(RISCV_BOOTPARAMS_DTBP_VIRT, offsetof(struct riscv_bootparams, dtbp_virt)); +ASSYM(RISCV_BOOTPARAMS_DTBP_PHYS, offsetof(struct riscv_bootparams, dtbp_phys)); Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Mon Dec 30 15:54:36 2019 (r356204) +++ head/sys/riscv/riscv/locore.S Mon Dec 30 17:18:50 2019 (r356205) @@ -206,15 +206,15 @@ va: /* Fill riscv_bootparams */ la t0, pagetable_l1 - sd t0, 0(sp) /* kern_l1pt */ - sd s9, 8(sp) /* kern_phys */ + sd t0, RISCV_BOOTPARAMS_KERN_L1PT(sp) + sd s9, RISCV_BOOTPARAMS_KERN_PHYS(sp) la t0, initstack - sd t0, 16(sp) /* kern_stack */ + sd t0, RISCV_BOOTPARAMS_KERN_STACK(sp) li t0, (VM_MAX_KERNEL_ADDRESS - 2 * L2_SIZE) - sd t0, 24(sp) /* dtbp_virt */ - sd a1, 32(sp) /* dtbp_phys */ + sd t0, RISCV_BOOTPARAMS_DTBP_VIRT(sp) + sd a1, RISCV_BOOTPARAMS_DTBP_PHYS(sp) mv a0, sp call_C_LABEL(initriscv) /* Off we go */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r356203 - head/sys/riscv/riscv
Author: br
Date: Mon Dec 30 14:38:06 2019
New Revision: 356203
URL: https://svnweb.freebsd.org/changeset/base/356203
Log:
Don't hard-code size of struct riscv_bootparams.
Submitted by: James Clarke
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D22968
Modified:
head/sys/riscv/riscv/genassym.c
head/sys/riscv/riscv/locore.S
Modified: head/sys/riscv/riscv/genassym.c
==
--- head/sys/riscv/riscv/genassym.c Mon Dec 30 13:29:30 2019
(r356202)
+++ head/sys/riscv/riscv/genassym.c Mon Dec 30 14:38:06 2019
(r356203)
@@ -55,6 +55,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
ASSYM(KERNBASE, KERNBASE);
ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS);
@@ -98,3 +99,5 @@ ASSYM(TF_SEPC, offsetof(struct trapframe, tf_sepc));
ASSYM(TF_STVAL, offsetof(struct trapframe, tf_stval));
ASSYM(TF_SCAUSE, offsetof(struct trapframe, tf_scause));
ASSYM(TF_SSTATUS, offsetof(struct trapframe, tf_sstatus));
+
+ASSYM(RISCV_BOOTPARAMS_SIZE, sizeof(struct riscv_bootparams));
Modified: head/sys/riscv/riscv/locore.S
==
--- head/sys/riscv/riscv/locore.S Mon Dec 30 13:29:30 2019
(r356202)
+++ head/sys/riscv/riscv/locore.S Mon Dec 30 14:38:06 2019
(r356203)
@@ -188,7 +188,7 @@ va:
mv sp, s3
/* Allocate space for thread0 PCB and riscv_bootparams */
- addisp, sp, -(PCB_SIZE + 40) & ~STACKALIGNBYTES
+ addisp, sp, -(PCB_SIZE + RISCV_BOOTPARAMS_SIZE) & ~STACKALIGNBYTES
/* Clear BSS */
la s0, _C_LABEL(__bss_start)
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svn commit: r356202 - head/sys/riscv/riscv
Author: br Date: Mon Dec 30 13:29:30 2019 New Revision: 356202 URL: https://svnweb.freebsd.org/changeset/base/356202 Log: Round the kernel stack allocation up as required. Submitted by: James Clarke Sponsored by: DARPA, AFRL Differential Revision:https://reviews.freebsd.org/D22961 Modified: head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Mon Dec 30 09:22:52 2019 (r356201) +++ head/sys/riscv/riscv/locore.S Mon Dec 30 13:29:30 2019 (r356202) @@ -186,8 +186,10 @@ va: /* Initialize stack pointer */ la s3, initstack_end mv sp, s3 - addisp, sp, -PCB_SIZE + /* Allocate space for thread0 PCB and riscv_bootparams */ + addisp, sp, -(PCB_SIZE + 40) & ~STACKALIGNBYTES + /* Clear BSS */ la s0, _C_LABEL(__bss_start) la s1, _C_LABEL(_end) @@ -203,8 +205,6 @@ va: #endif /* Fill riscv_bootparams */ - addisp, sp, -40 - la t0, pagetable_l1 sd t0, 0(sp) /* kern_l1pt */ sd s9, 8(sp) /* kern_phys */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r353493 - head/sys/dev/mmc/host
On Mon, Oct 14, 2019 at 06:45:26PM +0200, Emmanuel Vadot wrote:
> On Mon, 14 Oct 2019 17:27:51 +0100
> Ruslan Bukin wrote:
>
> > On Mon, Oct 14, 2019 at 06:10:51PM +0200, Emmanuel Vadot wrote:
> > >
> > > On Mon, 14 Oct 2019 15:53:00 + (UTC)
> > > Ruslan Bukin wrote:
> > >
> > > > Author: br
> > > > Date: Mon Oct 14 15:52:59 2019
> > > > New Revision: 353493
> > > > URL: https://svnweb.freebsd.org/changeset/base/353493
> > > >
> > > > Log:
> > > > Fix the driver attachment in cases when the external resource devices
> > > > (resets, regulators, clocks) are not available.
> > > >
> > > > Rely on a system initialization done by a bootloader in that cases.
> > > >
> > > > This fixes operation on Terasic DE10-Pro (an Intel Stratix 10
> > > > development kit).
> > > >
> > > > Sponsored by: DARPA, AFRL
> > > >
> > > > Modified:
> > > > head/sys/dev/mmc/host/dwmmc.c
> > > >
> > > > Modified: head/sys/dev/mmc/host/dwmmc.c
> > > > ======
> > > > --- head/sys/dev/mmc/host/dwmmc.c Mon Oct 14 15:33:53 2019
> > > > (r353492)
> > > > +++ head/sys/dev/mmc/host/dwmmc.c Mon Oct 14 15:52:59 2019
> > > > (r353493)
> > > > @@ -1,5 +1,5 @@
> > > > /*-
> > > > - * Copyright (c) 2014 Ruslan Bukin
> > > > + * Copyright (c) 2014-2019 Ruslan Bukin
> > > > * All rights reserved.
> > > > *
> > > > * This software was developed by SRI International and the University
> > > > of
> > > > @@ -457,26 +457,20 @@ parse_fdt(struct dwmmc_softc *sc)
> > > >
> > > > /* IP block reset is optional */
> > > > error = hwreset_get_by_ofw_name(sc->dev, 0, "reset",
> > > > >hwreset);
> > > > - if (error != 0 && error != ENOENT) {
> > > > + if (error != 0 && error != ENOENT)
> > > > device_printf(sc->dev, "Cannot get reset\n");
> > > > - goto fail;
> > > > - }
> > >
> > > This is not correct, on a system without reset/clock/regulator support
> > > you will get ENODEV as the phandle is present but no device is
> > > associated with it. This is the case that you want to test. Currently
> > > this hide all errors.
> >
> > The change means that the driver will be attached regardless of the return
> > value from ext resources.
>
> Yes and this is a problem.
>
> > Why it is not correct?
>
> Because if a reset/clock/regulator is present but we failed to parse
> the node (bad #clock-cell for example) this just assume that the
> resource isn't present which is not correct. Or worse the underlying
> gpio cannot be mapped, you now have a non functional driver because you
> cannot switch the regulator.
>
Could an error in DTS convert a device from being optional to become
mandatory? It is still not clear if any support present on a stage of
parsing.
Since the knowledge of registered support is at extres, then it should
be mandatory from a driver perspective (if enabled in kernel config).
And then the framework should make a decision based on any support present.
What do you think ?
Ruslan
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Re: svn commit: r353575 - head/sys/dev/mmc/host
On Tue, Oct 15, 2019 at 07:34:51PM +0200, Emmanuel Vadot wrote: > On Tue, 15 Oct 2019 17:24:22 + (UTC) > Ruslan Bukin wrote: > > > Author: br > > Date: Tue Oct 15 17:24:21 2019 > > New Revision: 353575 > > URL: https://svnweb.freebsd.org/changeset/base/353575 > > > > Log: > > Fix dwmmc(4) driver attachment when ext_resources are not present. > > > > Ignore only ENOENT (no DTS properties found) and ENODEV (driver not > > present) non-zero return values from ext_resources. > > > > Reviewed by: manu > > Sponsored by: DARPA, AFRL > > Differential Revision:https://reviews.freebsd.org/D22043 > > > > Modified: > > head/sys/dev/mmc/host/dwmmc.c > > I've just realized that you are probably using the SOCFPGA kernel > configuration and it doesn't have option EXT_RESOURCES so how did you > got those errors ? No, I'm using arm64 GENERIC kernel since Intel Stratix 10 is arm64/FPGA. Ruslan ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r353575 - head/sys/dev/mmc/host
Author: br
Date: Tue Oct 15 17:24:21 2019
New Revision: 353575
URL: https://svnweb.freebsd.org/changeset/base/353575
Log:
Fix dwmmc(4) driver attachment when ext_resources are not present.
Ignore only ENOENT (no DTS properties found) and ENODEV (driver not
present) non-zero return values from ext_resources.
Reviewed by: manu
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D22043
Modified:
head/sys/dev/mmc/host/dwmmc.c
Modified: head/sys/dev/mmc/host/dwmmc.c
==
--- head/sys/dev/mmc/host/dwmmc.c Tue Oct 15 17:17:16 2019
(r353574)
+++ head/sys/dev/mmc/host/dwmmc.c Tue Oct 15 17:24:21 2019
(r353575)
@@ -457,20 +457,32 @@ parse_fdt(struct dwmmc_softc *sc)
/* IP block reset is optional */
error = hwreset_get_by_ofw_name(sc->dev, 0, "reset", >hwreset);
- if (error != 0 && error != ENOENT)
+ if (error != 0 &&
+ error != ENOENT &&
+ error != ENODEV) {
device_printf(sc->dev, "Cannot get reset\n");
+ goto fail;
+ }
/* vmmc regulator is optional */
error = regulator_get_by_ofw_property(sc->dev, 0, "vmmc-supply",
>vmmc);
- if (error != 0 && error != ENOENT)
+ if (error != 0 &&
+ error != ENOENT &&
+ error != ENODEV) {
device_printf(sc->dev, "Cannot get regulator 'vmmc-supply'\n");
+ goto fail;
+ }
/* vqmmc regulator is optional */
error = regulator_get_by_ofw_property(sc->dev, 0, "vqmmc-supply",
>vqmmc);
- if (error != 0 && error != ENOENT)
+ if (error != 0 &&
+ error != ENOENT &&
+ error != ENODEV) {
device_printf(sc->dev, "Cannot get regulator 'vqmmc-supply'\n");
+ goto fail;
+ }
/* Assert reset first */
if (sc->hwreset != NULL) {
@@ -483,8 +495,12 @@ parse_fdt(struct dwmmc_softc *sc)
/* BIU (Bus Interface Unit clock) is optional */
error = clk_get_by_ofw_name(sc->dev, 0, "biu", >biu);
- if (error != 0 && error != ENOENT)
+ if (error != 0 &&
+ error != ENOENT &&
+ error != ENODEV) {
device_printf(sc->dev, "Cannot get 'biu' clock\n");
+ goto fail;
+ }
if (sc->biu) {
error = clk_enable(sc->biu);
@@ -499,8 +515,12 @@ parse_fdt(struct dwmmc_softc *sc)
* if no clock-frequency property is given
*/
error = clk_get_by_ofw_name(sc->dev, 0, "ciu", >ciu);
- if (error != 0 && error != ENOENT)
+ if (error != 0 &&
+ error != ENOENT &&
+ error != ENODEV) {
device_printf(sc->dev, "Cannot get 'ciu' clock\n");
+ goto fail;
+ }
if (sc->ciu) {
if (bus_hz != 0) {
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Re: svn commit: r353493 - head/sys/dev/mmc/host
On Mon, Oct 14, 2019 at 06:10:51PM +0200, Emmanuel Vadot wrote:
>
> On Mon, 14 Oct 2019 15:53:00 + (UTC)
> Ruslan Bukin wrote:
>
> > Author: br
> > Date: Mon Oct 14 15:52:59 2019
> > New Revision: 353493
> > URL: https://svnweb.freebsd.org/changeset/base/353493
> >
> > Log:
> > Fix the driver attachment in cases when the external resource devices
> > (resets, regulators, clocks) are not available.
> >
> > Rely on a system initialization done by a bootloader in that cases.
> >
> > This fixes operation on Terasic DE10-Pro (an Intel Stratix 10
> > development kit).
> >
> > Sponsored by: DARPA, AFRL
> >
> > Modified:
> > head/sys/dev/mmc/host/dwmmc.c
> >
> > Modified: head/sys/dev/mmc/host/dwmmc.c
> > ==
> > --- head/sys/dev/mmc/host/dwmmc.c Mon Oct 14 15:33:53 2019
> > (r353492)
> > +++ head/sys/dev/mmc/host/dwmmc.c Mon Oct 14 15:52:59 2019
> > (r353493)
> > @@ -1,5 +1,5 @@
> > /*-
> > - * Copyright (c) 2014 Ruslan Bukin
> > + * Copyright (c) 2014-2019 Ruslan Bukin
> > * All rights reserved.
> > *
> > * This software was developed by SRI International and the University of
> > @@ -457,26 +457,20 @@ parse_fdt(struct dwmmc_softc *sc)
> >
> > /* IP block reset is optional */
> > error = hwreset_get_by_ofw_name(sc->dev, 0, "reset", >hwreset);
> > - if (error != 0 && error != ENOENT) {
> > + if (error != 0 && error != ENOENT)
> > device_printf(sc->dev, "Cannot get reset\n");
> > - goto fail;
> > - }
>
> This is not correct, on a system without reset/clock/regulator support
> you will get ENODEV as the phandle is present but no device is
> associated with it. This is the case that you want to test. Currently
> this hide all errors.
The change means that the driver will be attached regardless of the return
value from ext resources. Why it is not correct?
It does not hide all errors, the printf will be called and a user will be
warned.
Ruslan
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svn commit: r353493 - head/sys/dev/mmc/host
Author: br
Date: Mon Oct 14 15:52:59 2019
New Revision: 353493
URL: https://svnweb.freebsd.org/changeset/base/353493
Log:
Fix the driver attachment in cases when the external resource devices
(resets, regulators, clocks) are not available.
Rely on a system initialization done by a bootloader in that cases.
This fixes operation on Terasic DE10-Pro (an Intel Stratix 10
development kit).
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/mmc/host/dwmmc.c
Modified: head/sys/dev/mmc/host/dwmmc.c
==
--- head/sys/dev/mmc/host/dwmmc.c Mon Oct 14 15:33:53 2019
(r353492)
+++ head/sys/dev/mmc/host/dwmmc.c Mon Oct 14 15:52:59 2019
(r353493)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2014 Ruslan Bukin
+ * Copyright (c) 2014-2019 Ruslan Bukin
* All rights reserved.
*
* This software was developed by SRI International and the University of
@@ -457,26 +457,20 @@ parse_fdt(struct dwmmc_softc *sc)
/* IP block reset is optional */
error = hwreset_get_by_ofw_name(sc->dev, 0, "reset", >hwreset);
- if (error != 0 && error != ENOENT) {
+ if (error != 0 && error != ENOENT)
device_printf(sc->dev, "Cannot get reset\n");
- goto fail;
- }
/* vmmc regulator is optional */
error = regulator_get_by_ofw_property(sc->dev, 0, "vmmc-supply",
>vmmc);
- if (error != 0 && error != ENOENT) {
+ if (error != 0 && error != ENOENT)
device_printf(sc->dev, "Cannot get regulator 'vmmc-supply'\n");
- goto fail;
- }
/* vqmmc regulator is optional */
error = regulator_get_by_ofw_property(sc->dev, 0, "vqmmc-supply",
>vqmmc);
- if (error != 0 && error != ENOENT) {
+ if (error != 0 && error != ENOENT)
device_printf(sc->dev, "Cannot get regulator 'vqmmc-supply'\n");
- goto fail;
- }
/* Assert reset first */
if (sc->hwreset != NULL) {
@@ -489,10 +483,9 @@ parse_fdt(struct dwmmc_softc *sc)
/* BIU (Bus Interface Unit clock) is optional */
error = clk_get_by_ofw_name(sc->dev, 0, "biu", >biu);
- if (error != 0 && error != ENOENT) {
+ if (error != 0 && error != ENOENT)
device_printf(sc->dev, "Cannot get 'biu' clock\n");
- goto fail;
- }
+
if (sc->biu) {
error = clk_enable(sc->biu);
if (error != 0) {
@@ -506,10 +499,9 @@ parse_fdt(struct dwmmc_softc *sc)
* if no clock-frequency property is given
*/
error = clk_get_by_ofw_name(sc->dev, 0, "ciu", >ciu);
- if (error != 0 && error != ENOENT) {
- device_printf(sc->dev, "Cannot get 'ciu'clock\n");
- goto fail;
- }
+ if (error != 0 && error != ENOENT)
+ device_printf(sc->dev, "Cannot get 'ciu' clock\n");
+
if (sc->ciu) {
if (bus_hz != 0) {
error = clk_set_freq(sc->ciu, bus_hz, 0);
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svn commit: r353431 - head/lib/libopencsd
Author: br Date: Fri Oct 11 09:18:45 2019 New Revision: 353431 URL: https://svnweb.freebsd.org/changeset/base/353431 Log: Install the libopencsd version header (other headers now depend on it). Sponsored by: DARPA, AFRL Modified: head/lib/libopencsd/Makefile Modified: head/lib/libopencsd/Makefile == --- head/lib/libopencsd/MakefileFri Oct 11 06:02:03 2019 (r353430) +++ head/lib/libopencsd/MakefileFri Oct 11 09:18:45 2019 (r353431) @@ -105,6 +105,7 @@ CFLAGS+=\ INCS= \ ocsd_if_types.h \ + ocsd_if_version.h \ trc_gen_elem_types.h\ trc_pkt_types.h ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r353390 - in head: contrib/processor-trace/include contrib/processor-trace/include/posix contrib/processor-trace/include/windows contrib/processor-trace/libipt contrib/processor-trace/l...
Author: br Date: Thu Oct 10 12:46:34 2019 New Revision: 353390 URL: https://svnweb.freebsd.org/changeset/base/353390 Log: Update Intel Processor Trace decoder library. Its latest version merged from: ^/vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b Sponsored by: DARPA, AFRL Added: head/contrib/processor-trace/include/pt_version.h (contents, props changed) head/contrib/processor-trace/libipt/internal/include/pti-disp_default.h (contents, props changed) head/contrib/processor-trace/libipt/internal/include/pti-sib.h (contents, props changed) head/contrib/processor-trace/libipt/test/src/ptunit-block_decoder.c (contents, props changed) head/contrib/processor-trace/libipt/test/src/ptunit-encoder.c (contents, props changed) head/contrib/processor-trace/libipt/test/src/ptunit-insn_decoder.c (contents, props changed) head/contrib/processor-trace/libipt/test/src/ptunit-packet_decoder.c (contents, props changed) Deleted: head/contrib/processor-trace/libipt/src/posix/init.c head/contrib/processor-trace/libipt/src/windows/init.c Modified: head/contrib/processor-trace/include/posix/threads.h head/contrib/processor-trace/include/pt_compiler.h head/contrib/processor-trace/include/windows/inttypes.h head/contrib/processor-trace/include/windows/threads.h head/contrib/processor-trace/libipt/CMakeLists.txt head/contrib/processor-trace/libipt/include/intel-pt.h head/contrib/processor-trace/libipt/include/intel-pt.h.in head/contrib/processor-trace/libipt/internal/include/posix/pt_section_posix.h head/contrib/processor-trace/libipt/internal/include/pt_asid.h head/contrib/processor-trace/libipt/internal/include/pt_block_cache.h head/contrib/processor-trace/libipt/internal/include/pt_block_decoder.h head/contrib/processor-trace/libipt/internal/include/pt_config.h head/contrib/processor-trace/libipt/internal/include/pt_cpu.h head/contrib/processor-trace/libipt/internal/include/pt_cpuid.h head/contrib/processor-trace/libipt/internal/include/pt_decoder_function.h head/contrib/processor-trace/libipt/internal/include/pt_encoder.h head/contrib/processor-trace/libipt/internal/include/pt_event_queue.h head/contrib/processor-trace/libipt/internal/include/pt_ild.h head/contrib/processor-trace/libipt/internal/include/pt_image.h head/contrib/processor-trace/libipt/internal/include/pt_image_section_cache.h head/contrib/processor-trace/libipt/internal/include/pt_insn.h head/contrib/processor-trace/libipt/internal/include/pt_insn_decoder.h head/contrib/processor-trace/libipt/internal/include/pt_last_ip.h head/contrib/processor-trace/libipt/internal/include/pt_mapped_section.h head/contrib/processor-trace/libipt/internal/include/pt_msec_cache.h head/contrib/processor-trace/libipt/internal/include/pt_opcodes.h head/contrib/processor-trace/libipt/internal/include/pt_packet.h head/contrib/processor-trace/libipt/internal/include/pt_packet_decoder.h head/contrib/processor-trace/libipt/internal/include/pt_query_decoder.h head/contrib/processor-trace/libipt/internal/include/pt_retstack.h head/contrib/processor-trace/libipt/internal/include/pt_section.h head/contrib/processor-trace/libipt/internal/include/pt_section_file.h head/contrib/processor-trace/libipt/internal/include/pt_sync.h head/contrib/processor-trace/libipt/internal/include/pt_time.h head/contrib/processor-trace/libipt/internal/include/pt_tnt_cache.h head/contrib/processor-trace/libipt/internal/include/pti-disp-defs.h head/contrib/processor-trace/libipt/internal/include/pti-disp.h head/contrib/processor-trace/libipt/internal/include/pti-imm-defs.h head/contrib/processor-trace/libipt/internal/include/pti-imm.h head/contrib/processor-trace/libipt/internal/include/pti-modrm-defs.h head/contrib/processor-trace/libipt/internal/include/pti-modrm.h head/contrib/processor-trace/libipt/internal/include/windows/pt_section_windows.h head/contrib/processor-trace/libipt/src/posix/pt_cpuid.c head/contrib/processor-trace/libipt/src/posix/pt_section_posix.c head/contrib/processor-trace/libipt/src/pt_asid.c head/contrib/processor-trace/libipt/src/pt_block_cache.c head/contrib/processor-trace/libipt/src/pt_block_decoder.c head/contrib/processor-trace/libipt/src/pt_config.c head/contrib/processor-trace/libipt/src/pt_cpu.c head/contrib/processor-trace/libipt/src/pt_decoder_function.c head/contrib/processor-trace/libipt/src/pt_encoder.c head/contrib/processor-trace/libipt/src/pt_error.c head/contrib/processor-trace/libipt/src/pt_event_queue.c head/contrib/processor-trace/libipt/src/pt_ild.c head/contrib/processor-trace/libipt/src/pt_image.c head/contrib/processor-trace/libipt/src/pt_image_section_cache.c head/contrib/processor-trace/libipt/src/pt_insn.c head/contrib/processor-trace/libipt/src/pt_insn_decoder.c head/contrib/processor-trace/libipt/src/pt_last_ip.c head/contrib/processor-trace/libipt/src/pt_msec_cache.c
svn commit: r353394 - head/contrib/opencsd/decoder/include
Author: br Date: Thu Oct 10 13:44:12 2019 New Revision: 353394 URL: https://svnweb.freebsd.org/changeset/base/353394 Log: Remove a stale file left after merging. Sponsored by: DARPA, AFRL Deleted: head/contrib/opencsd/decoder/include/ocsd_if_version.h ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r353391 - in vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca: . decoder decoder/build decoder/build/linux decoder/build/linux/rctdl_c_api_lib decoder/build/linux/ref_trace_decod...
Author: br Date: Thu Oct 10 13:19:21 2019 New Revision: 353391 URL: https://svnweb.freebsd.org/changeset/base/353391 Log: Import OpenCSD -- an ARM CoreSight Trace Decode library. Git ID a1961c91b02a92f3c6ed8b145c636ac4c5565aca Sponsored by: DARPA, AFRL Added: vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/.gitignore vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/HOWTO.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/LICENSE vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/README.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/TODO vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/makefile (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/makefile.dev (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/rctdl_c_api_lib/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/rctdl_c_api_lib/makefile (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/ref_trace_decode_lib/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/linux/ref_trace_decode_lib/makefile (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/opencsd.props vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/rctdl_c_api_lib/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj.filters vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/ref_trace_decode_lib/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.sln vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/build_libs.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/doxygen_config.dox vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/external_custom.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/cs_trace_hw.jpg (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/decode_data_path_resp.jpg (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/dt_components.jpg (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/lib_usage.jpg (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/memacc_objs.jpg (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/prog_guide_generic_pkts.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/prog_guide/prog_guide_main.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/specs/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/specs/ARM Trace and Debug Snapshot file format 0v2.pdf (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/docs/test_progs.md vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/include/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/include/common/ vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/include/common/comp_attach_notifier_i.h (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/include/common/comp_attach_pt_t.h (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/include/common/ocsd_code_follower.h (contents, props changed) vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/decoder/include/common/ocsd_dcd_mngr.h (contents, props changed)
svn commit: r353393 - in head: contrib/opencsd/decoder/include/common contrib/opencsd/decoder/include/i_dec contrib/opencsd/decoder/include/interfaces contrib/opencsd/decoder/include/mem_acc contri...
Author: br
Date: Thu Oct 10 13:30:13 2019
New Revision: 353393
URL: https://svnweb.freebsd.org/changeset/base/353393
Log:
Update ARM CoreSight trace decoder library.
Its latest version merged from:
^/vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca
Sponsored by: DARPA, AFRL
Added:
head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_cache.h (contents,
props changed)
head/contrib/opencsd/decoder/include/opencsd/ocsd_if_version.h (contents,
props changed)
head/contrib/opencsd/decoder/source/mem_acc/trc_mem_acc_cache.cpp
(contents, props changed)
Modified:
head/contrib/opencsd/decoder/include/common/ocsd_code_follower.h
head/contrib/opencsd/decoder/include/common/ocsd_dcd_tree.h
head/contrib/opencsd/decoder/include/common/ocsd_error_logger.h
head/contrib/opencsd/decoder/include/common/ocsd_msg_logger.h
head/contrib/opencsd/decoder/include/common/trc_gen_elem.h
head/contrib/opencsd/decoder/include/i_dec/trc_i_decode.h
head/contrib/opencsd/decoder/include/i_dec/trc_idec_arminst.h
head/contrib/opencsd/decoder/include/interfaces/trc_error_log_i.h
head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_base.h
head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_bufptr.h
head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_cb.h
head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_file.h
head/contrib/opencsd/decoder/include/mem_acc/trc_mem_acc_mapper.h
head/contrib/opencsd/decoder/include/opencsd/c_api/ocsd_c_api_types.h
head/contrib/opencsd/decoder/include/opencsd/c_api/opencsd_c_api.h
head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_cmp_cfg_etmv4.h
head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h
head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h
head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h
head/contrib/opencsd/decoder/include/opencsd/etmv4/trc_pkt_types_etmv4.h
head/contrib/opencsd/decoder/include/opencsd/ocsd_if_types.h
head/contrib/opencsd/decoder/include/opencsd/trc_gen_elem_types.h
head/contrib/opencsd/decoder/include/pkt_printers/pkt_printer_t.h
head/contrib/opencsd/decoder/source/c_api/ocsd_c_api.cpp
head/contrib/opencsd/decoder/source/etmv3/trc_pkt_decode_etmv3.cpp
head/contrib/opencsd/decoder/source/etmv4/trc_cmp_cfg_etmv4.cpp
head/contrib/opencsd/decoder/source/etmv4/trc_etmv4_stack_elem.cpp
head/contrib/opencsd/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp
head/contrib/opencsd/decoder/source/etmv4/trc_pkt_elem_etmv4i.cpp
head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4i_impl.cpp
head/contrib/opencsd/decoder/source/etmv4/trc_pkt_proc_etmv4i_impl.h
head/contrib/opencsd/decoder/source/i_dec/trc_i_decode.cpp
head/contrib/opencsd/decoder/source/i_dec/trc_idec_arminst.cpp
head/contrib/opencsd/decoder/source/mem_acc/trc_mem_acc_bufptr.cpp
head/contrib/opencsd/decoder/source/mem_acc/trc_mem_acc_cb.cpp
head/contrib/opencsd/decoder/source/mem_acc/trc_mem_acc_file.cpp
head/contrib/opencsd/decoder/source/mem_acc/trc_mem_acc_mapper.cpp
head/contrib/opencsd/decoder/source/ocsd_code_follower.cpp
head/contrib/opencsd/decoder/source/ocsd_dcd_tree.cpp
head/contrib/opencsd/decoder/source/ocsd_error.cpp
head/contrib/opencsd/decoder/source/ocsd_error_logger.cpp
head/contrib/opencsd/decoder/source/ocsd_version.cpp
head/contrib/opencsd/decoder/source/ptm/trc_pkt_decode_ptm.cpp
head/contrib/opencsd/decoder/source/trc_core_arch_map.cpp
head/contrib/opencsd/decoder/source/trc_frame_deformatter.cpp
head/contrib/opencsd/decoder/source/trc_gen_elem.cpp
head/contrib/opencsd/decoder/source/trc_printable_elem.cpp
head/lib/libopencsd/Makefile
Modified: head/contrib/opencsd/decoder/include/common/ocsd_code_follower.h
==
--- head/contrib/opencsd/decoder/include/common/ocsd_code_follower.hThu Oct
10 13:23:23 2019(r353392)
+++ head/contrib/opencsd/decoder/include/common/ocsd_code_follower.hThu Oct
10 13:30:13 2019(r353393)
@@ -95,6 +95,7 @@ class OcsdCodeFollower (public)
const bool isLink() const; //!< is a link (branch
with link etc)
const bool ISAChanged() const; //!< next ISA
different from input ISA.
const ocsd_isa nextISA() const; //!< ISA for next
instruction
+const uint8_t getInstrSize() const; //!< Get the last
instruction size.
// information on error conditions
const bool isNacc() const; //!< true if Memory Not
Accessible (nacc) error occurred
@@ -190,6 +191,11 @@ inline const ocsd_instr_type OcsdCodeFollower::getInst
inline const ocsd_instr_subtype OcsdCodeFollower::getInstrSubType() const
{
return m_instr_info.sub_type;
+}
+
+inline const uint8_t OcsdCodeFollower::getInstrSize() const
+{
+return m_instr_info.instr_size;
}
inline
svn commit: r353389 - in vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b: . doc doc/man include include/posix include/windows libipt libipt/include libipt/internal libipt/internal/i...
Author: br Date: Thu Oct 10 12:20:25 2019 New Revision: 353389 URL: https://svnweb.freebsd.org/changeset/base/353389 Log: Import Intel Processor Trace library. Git ID 892e12c5a27bda5806d1e63269986bb4171b5a8b Sponsored by: DARPA, AFRL Added: vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/ vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/.gitignore vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/CMakeLists.txt (contents, props changed) vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/CONTRIBUTING vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/LICENSE vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/README vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/ vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/getting_started.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/howto_build.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/howto_capture.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/howto_libipt.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/howto_pttc.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/ vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/CMakeLists.txt (contents, props changed) vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_alloc_encoder.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_blk_alloc_decoder.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_blk_get_offset.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_blk_next.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_blk_sync_forward.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_config.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_enc_get_config.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_enc_get_offset.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_image_add_file.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_image_alloc.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_image_remove_by_filename.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_image_set_callback.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_insn_alloc_decoder.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_insn_get_image.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_insn_get_offset.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_insn_next.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_insn_sync_forward.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_iscache_add_file.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_iscache_alloc.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_iscache_read.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_iscache_set_limit.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_library_version.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_packet.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_pkt_alloc_decoder.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_pkt_get_offset.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_pkt_sync_forward.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_qry_alloc_decoder.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_qry_cond_branch.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_qry_event.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_qry_get_offset.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_qry_sync_forward.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/doc/man/pt_qry_time.3.md vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/include/ vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/include/posix/ vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/include/posix/threads.h (contents, props changed) vendor/processor-trace/892e12c5a27bda5806d1e63269986bb4171b5a8b/include/pt_compiler.h (contents, props changed)
svn commit: r353392 - vendor/opencsd/dist
Author: br Date: Thu Oct 10 13:23:23 2019 New Revision: 353392 URL: https://svnweb.freebsd.org/changeset/base/353392 Log: Update opencsd tag. Sponsored by: DARPA, AFRL Replaced: vendor/opencsd/dist/ - copied from r353391, vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca/ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r352487 - in head: lib/libpmc sys/conf sys/dev/hwpmc sys/sys
k.c optionalhwpmc_mips74k
Added: head/sys/dev/hwpmc/hwpmc_beri.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/hwpmc/hwpmc_beri.c Wed Sep 18 16:13:50 2019
(r352487)
@@ -0,0 +1,540 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_hwpmc_hooks.h"
+
+#include
+#include
+
+#include
+
+#defineBERI_NCOUNTERS 56
+#defineBERI_PMC_CAPS (PMC_CAP_USER | PMC_CAP_SYSTEM | \
+PMC_CAP_READ | PMC_CAP_WRITE )
+
+struct beri_event_code_map {
+ uint32_tpe_ev; /* enum value */
+ uint64_t(*get_func)(void);
+};
+
+const struct beri_event_code_map beri_event_codes[BERI_NCOUNTERS] = {
+ { PMC_EV_BERI_CYCLE,
+ statcounters_get_cycle_count },
+ { PMC_EV_BERI_INST,
+ statcounters_get_inst_count },
+ { PMC_EV_BERI_INST_USER,
+ statcounters_get_inst_user_count },
+ { PMC_EV_BERI_INST_KERNEL,
+ statcounters_get_inst_kernel_count },
+ { PMC_EV_BERI_IMPRECISE_SETBOUNDS,
+ statcounters_get_imprecise_setbounds_count },
+ { PMC_EV_BERI_UNREPRESENTABLE_CAPS,
+ statcounters_get_unrepresentable_caps_count },
+ { PMC_EV_BERI_ITLB_MISS,
+ statcounters_get_itlb_miss_count },
+ { PMC_EV_BERI_DTLB_MISS,
+ statcounters_get_dtlb_miss_count },
+ { PMC_EV_BERI_ICACHE_WRITE_HIT,
+ statcounters_get_icache_write_hit_count },
+ { PMC_EV_BERI_ICACHE_WRITE_MISS,
+ statcounters_get_icache_write_miss_count },
+ { PMC_EV_BERI_ICACHE_READ_HIT,
+ statcounters_get_icache_read_hit_count },
+ { PMC_EV_BERI_ICACHE_READ_MISS,
+ statcounters_get_icache_read_miss_count },
+ { PMC_EV_BERI_ICACHE_EVICT,
+ statcounters_get_icache_evict_count },
+ { PMC_EV_BERI_DCACHE_WRITE_HIT,
+ statcounters_get_dcache_write_hit_count },
+ { PMC_EV_BERI_DCACHE_WRITE_MISS,
+ statcounters_get_dcache_write_miss_count },
+ { PMC_EV_BERI_DCACHE_READ_HIT,
+ statcounters_get_dcache_read_hit_count },
+ { PMC_EV_BERI_DCACHE_READ_MISS,
+ statcounters_get_dcache_read_miss_count },
+ { PMC_EV_BERI_DCACHE_EVICT,
+ statcounters_get_dcache_evict_count },
+ { PMC_EV_BERI_DCACHE_SET_TAG_WRITE,
+ statcounters_get_dcache_set_tag_write_count },
+ { PMC_EV_BERI_DCACHE_SET_TAG_READ,
+ statcounters_get_dcache_set_tag_read_count },
+ { PMC_EV_BERI_L2CACHE_WRITE_HIT,
+ statcounters_get_l2cache_write_hit_count },
+ { PMC_EV_BERI_L2CACHE_WRITE_MISS,
+ statcounters_get_l2cache_write_miss_count },
+ { PMC_EV_BERI_L2CACHE_READ_HIT,
+ statcounters_get_l2cache_read_hit_count },
+ { PMC_EV_BERI_L2CACHE_READ_MISS,
+ statcounters_get_l2cache_read_miss_count },
+ { PMC_EV_BERI_L2CACHE_EVICT,
+ statcounters_get_l2cache_evict_count },
+ { PMC_EV_BERI_L2CACHE_SET_TAG_WRITE,
+ statcounters_get_l2cache_set_tag_write_count },
+ { PMC_EV_BERI_L2
svn commit: r352302 - in head/sys: arm64/conf arm64/intel conf
Author: br
Date: Fri Sep 13 16:50:57 2019
New Revision: 352302
URL: https://svnweb.freebsd.org/changeset/base/352302
Log:
Add support for Intel Stratix 10 platform.
Intel Stratix 10 SoC includes a quad-core arm64 cluster and FPGA fabric.
This adds support for reconfiguring FPGA.
Accessing FPGA core of this SoC require the level of privilege EL3,
while kernel runs in EL1 (lower) level of privilege.
This provides an Intel service layer interface that uses SMCCC to pass
queries to the secure-monitor (EL3).
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D21454
Added:
head/sys/arm64/intel/
head/sys/arm64/intel/firmware.c (contents, props changed)
head/sys/arm64/intel/intel-smc.h (contents, props changed)
head/sys/arm64/intel/stratix10-soc-fpga-mgr.c (contents, props changed)
head/sys/arm64/intel/stratix10-svc.c (contents, props changed)
head/sys/arm64/intel/stratix10-svc.h (contents, props changed)
Modified:
head/sys/arm64/conf/GENERIC
head/sys/conf/files.arm64
head/sys/conf/options.arm64
Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Fri Sep 13 15:56:33 2019(r352301)
+++ head/sys/arm64/conf/GENERIC Fri Sep 13 16:50:57 2019(r352302)
@@ -110,6 +110,7 @@ options SOC_ALLWINNER_A64
optionsSOC_ALLWINNER_H5
optionsSOC_CAVM_THUNDERX
optionsSOC_HISI_HI6220
+optionsSOC_INTEL_STRATIX10
optionsSOC_BRCM_BCM2837
optionsSOC_MARVELL_8K
optionsSOC_ROCKCHIP_RK3328
Added: head/sys/arm64/intel/firmware.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/intel/firmware.c Fri Sep 13 16:50:57 2019
(r352302)
@@ -0,0 +1,122 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Ruslan Bukin
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+struct firmware_softc {
+ struct simplebus_softc simplebus_sc;
+ device_tdev;
+};
+
+static int
+firmware_probe(device_t dev)
+{
+ phandle_t node;
+
+ node = ofw_bus_get_node(dev);
+
+ /*
+* The firmware node has no property compatible.
+* Look for a known child.
+*/
+ if (!fdt_depth_search_compatible(node, "intel,stratix10-svc", 0))
+ return (ENXIO);
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ device_set_desc(dev, "Firmware node");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+firmware_attach(device_t dev)
+{
+ struct firmware_softc *sc;
+ phandle_t node;
+
+ sc = device_get_softc(dev);
+ sc->dev = dev;
+
+ node = ofw_bus_get_node(dev);
+ if (node == -1)
+ return (ENXIO);
+
+ simplebus_init(dev, node);
+
+ /*
+* Allow devices to identify.
+*/
+ bus_generic_probe(dev);
+
+ /*
+* Now walk the OFW tree and attach top-level devices.
+*/
+ for (node = OF_child(node); node > 0; node = OF_peer(node))
+ simplebus_add_device(dev, node, 0, NULL, -1, N
svn commit: r352301 - in head/sys: conf dev/psci
ude
typedef int (*psci_initfn_t)(device_t dev, int default_version);
-typedef int (*psci_callfn_t)(register_t, register_t, register_t, register_t);
+typedef int (*psci_callfn_t)(register_t, register_t, register_t, register_t,
+ register_t, register_t, register_t, register_t,
+ struct arm_smccc_res *res);
extern int psci_present;
@@ -47,12 +50,8 @@ static inline int
psci_call(register_t a, register_t b, register_t c, register_t d)
{
- return (psci_callfn(a, b, c, d));
+ return (psci_callfn(a, b, c, d, 0, 0, 0, 0, NULL));
}
-/* One of these handlers will be selected during the boot */
-intpsci_hvc_despatch(register_t, register_t, register_t, register_t);
-intpsci_smc_despatch(register_t, register_t, register_t, register_t);
-
/*
* PSCI return codes.
Modified: head/sys/dev/psci/smccc.h
==
--- head/sys/dev/psci/smccc.h Fri Sep 13 15:49:04 2019(r352300)
+++ head/sys/dev/psci/smccc.h Fri Sep 13 15:56:33 2019(r352301)
@@ -49,6 +49,21 @@
#defineSMCCC_32BIT_CALL0
#defineSMCCC_64BIT_CALL1
+#defineSMCCC_ARM_ARCH_CALLS0
+#defineSMCCC_CPU_SERVICE_CALLS 1
+#defineSMCCC_SIP_SERVICE_CALLS 2
+#defineSMCCC_OEM_SERVICE_CALLS 3
+#defineSMCCC_STD_SECURE_SERVICE_CALLS 4
+#defineSMCCC_STD_HYP_SERVICE_CALLS 5
+#defineSMCCC_VENDOR_HYP_SERVICE_CALLS 6
+
+struct arm_smccc_res {
+ register_t a0;
+ register_t a1;
+ register_t a2;
+ register_t a3;
+};
+
/*
* Arm Architecture Calls.
* These are documented in the document ARM DEN 0070A.
@@ -71,5 +86,9 @@ int32_t smccc_arch_features(uint32_t);
int smccc_arch_workaround_1(void);
int smccc_arch_workaround_2(int);
+int arm_smccc_smc(register_t, register_t, register_t, register_t, register_t,
+register_t, register_t, register_t, struct arm_smccc_res *res);
+int arm_smccc_hvc(register_t, register_t, register_t, register_t, register_t,
+register_t, register_t, register_t, struct arm_smccc_res *res);
#endif /* _PSCI_SMCCC_H_ */
Added: head/sys/dev/psci/smccc_arm.S
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/psci/smccc_arm.S Fri Sep 13 15:56:33 2019
(r352301)
@@ -0,0 +1,74 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Ruslan Bukin
+ * Copyright (c) 2015 Andrew Turner
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+.arch_extension sec/* For smc */
+.arch_extension virt /* For hvc */
+
+/*
+ * int arm_smccc_hvc(register_t, register_t, register_t, register_t,
+ * register_t, register_t, register_t, register_t,
+ * struct arm_smccc_res *res)
+ */
+ENTRY(arm_smccc_hvc)
+ mov r12, sp
+ push{r4-r7}
+ ldm r12, {r4-r7}
+ hvc #0
+ pop {r4-r7}
+ ldr r12, [sp, #(4 * 4)]
+ cmp r12, #0
+ beq 1f
+ stm r12, {r0-r3}
+1: bx lr
+END(arm_smccc_hvc)
+
+/*
+ * int arm_smccc_smc(register_t, register_t, register_t, register_t,
+ * register_t, register_t, register_t, register_t,
+ * struct arm_smccc_res *res)
+ */
+ENTRY(arm_smccc_smc)
+ mov r
Re: svn commit: r351918 - head/sys/kern
On Fri, Sep 06, 2019 at 12:15:07PM +0800, Philip Paeps wrote:
> On 2019-09-06 11:15:12 (+0800), Ian Lepore wrote:
> > On Fri, 2019-09-06 at 01:19 +, Philip Paeps wrote:
> >> Author: philip
> >> Date: Fri Sep 6 01:19:31 2019
> >> New Revision: 351918
> >> URL: https://svnweb.freebsd.org/changeset/base/351918
> >>
> >> Log:
> >> riscv: default to HZ=100
> >>
> >> Most current RISC-V development platforms are not fast enough to
> >> benefit
> >> from the increased granularity provided by HZ=1000.
> >>
> >> Sponsored by:Axiado
> >>
> >> Modified:
> >> head/sys/kern/subr_param.c
> >>
> >> Modified: head/sys/kern/subr_param.c
> >> =
> >> =
> >> --- head/sys/kern/subr_param.c Fri Sep 6 00:06:55 2019(r351
> >> 917)
> >> +++ head/sys/kern/subr_param.c Fri Sep 6 01:19:31 2019(r351
> >> 918)
> >> @@ -61,7 +61,7 @@ __FBSDID("$FreeBSD$");
> >> */
> >>
> >> #ifndef HZ
> >> -# if defined(__mips__) || defined(__arm__)
> >> +# if defined(__mips__) || defined(__arm__) || defined(__riscv)
> >> #define HZ 100
> >> # else
> >> #define HZ 1000
> >>
> >
> > This seems like a bad idea. I've run a 90mhz armv4 chip with HZ=1000
> > and didn't notice any performance hit from doing so. Almost all arm
> > kernel config files set HZ as an option, so that define doesn't do
> > much for arm these days. It probably does still set HZ for various
> > mips platforms.
> >
> > I would think 1000 is appropriate for anything modern running at
> > 200mhz or more.
> >
> > Setting it to 100 has the bad side effect of making things like
> > msleep(), tsleep(), and pause() (which show up in plenty of drivers)
> > all have a minimum timeout of 10ms, which is a long long time on
> > modern hardware.
> >
> > What benefit do you think you'll get from the lower number?
>
> On systems running at 10s of MHz (or slower, ick), with HZ=1000 you
> spend an awful lot of time servicing the timer interrupt and not very
> much time doing anything else.
>
> My rationale was that most RISC-V systems (including emulation and FPGA
> prototypes) I've encountered are running slower than the tipping point
> where HZ=1000 makes sense. With the default of HZ=100, faster
> exceptions can still set HZ=1000 in their individual configs.
>
> When the RISC-V world evolves to having more actual silicon and fewer
> slow prototypes, I definitely agree this default should be flipped again
> for HZ=1000 by default and HZ=100 in the config files for the
> exceptions.
>
Hi Philip
I only worry about HiFive Unleashed board, which is the only real hardware
available at the moment for community and it does not require this change (it
is 1.5 GHz clock).
With an amount of real silicons growing we may want to keep HZ set to 1000 in
GENERIC soon-ish so users download/build the GENERIC image and have immediate
fun.
For FPGA I usually tune (increase) timer clock frequency locally in the DTS
file based on the timing of a synthesized core.
Ruslan
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Re: svn commit: r351818 - in head/sys: arm/conf arm64/conf conf
On Wed, Sep 04, 2019 at 11:16:00AM -0600, Ian Lepore wrote: > On Wed, 2019-09-04 at 15:55 +0000, Ruslan Bukin wrote: > > Author: br > > Date: Wed Sep 4 15:55:44 2019 > > New Revision: 351818 > > URL: https://svnweb.freebsd.org/changeset/base/351818 > > > > Log: > > Include dwgpio to the build. > > > > Sponsored by: DARPA, AFRL > > > > Modified: > > head/sys/arm/conf/GENERIC > > head/sys/arm64/conf/GENERIC > > head/sys/conf/files > > > > This should probably also be added to sys/conf/NOTES so it gets built > in LINT kernels. > Added! Thanks Ruslan ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r351880 - head/sys/conf
Author: br Date: Thu Sep 5 17:54:57 2019 New Revision: 351880 URL: https://svnweb.freebsd.org/changeset/base/351880 Log: Add dwgpio to NOTES so it gets built in LINT kernels. Sponsored by: DARPA, AFRL Modified: head/sys/conf/NOTES Modified: head/sys/conf/NOTES == --- head/sys/conf/NOTES Thu Sep 5 17:53:41 2019(r351879) +++ head/sys/conf/NOTES Thu Sep 5 17:54:57 2019(r351880) @@ -2385,6 +2385,7 @@ devicelpbb device pcfclock # General Purpose I/O pins +device dwgpio # Synopsys DesignWare APB GPIO Controller device gpio# gpio interfaces and bus support device gpiobacklight # sysctl control of gpio-based backlight device gpioiic # i2c via gpio bitbang ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r351818 - in head/sys: arm/conf arm64/conf conf
Author: br Date: Wed Sep 4 15:55:44 2019 New Revision: 351818 URL: https://svnweb.freebsd.org/changeset/base/351818 Log: Include dwgpio to the build. Sponsored by: DARPA, AFRL Modified: head/sys/arm/conf/GENERIC head/sys/arm64/conf/GENERIC head/sys/conf/files Modified: head/sys/arm/conf/GENERIC == --- head/sys/arm/conf/GENERIC Wed Sep 4 15:37:24 2019(r351817) +++ head/sys/arm/conf/GENERIC Wed Sep 4 15:55:44 2019(r351818) @@ -153,6 +153,7 @@ device nxprtc # NXP RTCs: PCA/PFC212x PCA/PCF85xx device s35390a # Seiko s3539x RTCs # GPIO +device dwgpio # Synopsys DesignWare APB GPIO Controller device gpio device gpiobacklight device gpioled Modified: head/sys/arm64/conf/GENERIC == --- head/sys/arm64/conf/GENERIC Wed Sep 4 15:37:24 2019(r351817) +++ head/sys/arm64/conf/GENERIC Wed Sep 4 15:55:44 2019(r351818) @@ -228,6 +228,7 @@ device a31_dmac # GPIO / PINCTRL device a37x0_gpio # Marvell Armada 37x0 GPIO controller device aw_gpio # Allwinner GPIO controller +device dwgpio # Synopsys DesignWare APB GPIO Controller device gpio device gpioled device fdt_pinctrl Modified: head/sys/conf/files == --- head/sys/conf/files Wed Sep 4 15:37:24 2019(r351817) +++ head/sys/conf/files Wed Sep 4 15:55:44 2019(r351818) @@ -1734,6 +1734,9 @@ dev/fxp/inphy.c optional fxp dev/gem/if_gem.c optional gem dev/gem/if_gem_pci.c optional gem pci dev/gem/if_gem_sbus.c optional gem sbus +dev/gpio/dwgpio/dwgpio.c optional gpio dwgpio fdt +dev/gpio/dwgpio/dwgpio_bus.c optional gpio dwgpio fdt +dev/gpio/dwgpio/dwgpio_if.moptional gpio dwgpio fdt dev/gpio/gpiobacklight.c optional gpiobacklight fdt dev/gpio/gpiokeys.coptional gpiokeys fdt dev/gpio/gpiokeys_codes.c optional gpiokeys fdt ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r351817 - in head/sys: arm/altera/socfpga dev/gpio/dwgpio
Author: br
Date: Wed Sep 4 15:37:24 2019
New Revision: 351817
URL: https://svnweb.freebsd.org/changeset/base/351817
Log:
o Add support for multi-port instances of Synopsys DesignWare APB GPIO
Controller.
o Rename the driver to dwgpio.
Sponsored by: DARPA, AFRL
Added:
head/sys/dev/gpio/dwgpio/
head/sys/dev/gpio/dwgpio/dwgpio.c
- copied, changed from r351816, head/sys/arm/altera/socfpga/socfpga_gpio.c
head/sys/dev/gpio/dwgpio/dwgpio_bus.c (contents, props changed)
head/sys/dev/gpio/dwgpio/dwgpio_if.m (contents, props changed)
Deleted:
head/sys/arm/altera/socfpga/socfpga_gpio.c
Modified:
head/sys/arm/altera/socfpga/files.socfpga
Modified: head/sys/arm/altera/socfpga/files.socfpga
==
--- head/sys/arm/altera/socfpga/files.socfpga Wed Sep 4 14:32:04 2019
(r351816)
+++ head/sys/arm/altera/socfpga/files.socfpga Wed Sep 4 15:37:24 2019
(r351817)
@@ -5,7 +5,6 @@ arm/altera/socfpga/socfpga_machdep.cstandard
arm/altera/socfpga/socfpga_manager.c standard
arm/altera/socfpga/socfpga_rstmgr.cstandard
arm/altera/socfpga/socfpga_mp.coptional smp
-arm/altera/socfpga/socfpga_gpio.c optional gpio
dev/mmc/host/dwmmc.c optional dwmmc
dev/mmc/host/dwmmc_altera.coptional dwmmc
Copied and modified: head/sys/dev/gpio/dwgpio/dwgpio.c (from r351816,
head/sys/arm/altera/socfpga/socfpga_gpio.c)
==
--- head/sys/arm/altera/socfpga/socfpga_gpio.c Wed Sep 4 14:32:04 2019
(r351816, copy source)
+++ head/sys/dev/gpio/dwgpio/dwgpio.c Wed Sep 4 15:37:24 2019
(r351817)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2015 Ruslan Bukin
+ * Copyright (c) 2015, 2019 Ruslan Bukin
* All rights reserved.
*
* This software was developed by SRI International and the University of
@@ -29,15 +29,12 @@
*/
/*
- * SOCFPGA General-Purpose I/O Interface.
+ * Synopsys® DesignWare® APB General Purpose Programming I/O
+ * (DW_apb_gpio) peripheral.
+ *
* Chapter 22, Cyclone V Device Handbook (CV-5V2 2014.07.22)
*/
-/*
- * The GPIO modules are instances of the Synopsys® DesignWare® APB General
- * Purpose Programming I/O (DW_apb_gpio) peripheral.
- */
-
#include
__FBSDID("$FreeBSD$");
@@ -53,6 +50,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
@@ -64,14 +62,13 @@ __FBSDID("$FreeBSD$");
#include
#include "gpio_if.h"
+#include "dwgpio_if.h"
-#define READ4(_sc, _reg) \
- bus_read_4((_sc)->res[0], _reg)
-#define WRITE4(_sc, _reg, _val) \
- bus_write_4((_sc)->res[0], _reg, _val)
+#define READ4(_sc, _reg) DWGPIO_READ((_sc)->parent, _reg)
+#define WRITE4(_sc, _reg, _val)DWGPIO_WRITE((_sc)->parent, _reg, _val)
-#defineGPIO_SWPORTA_DR 0x00/* Port A Data Register */
-#defineGPIO_SWPORTA_DDR0x04/* Port A Data Direction
Register */
+#defineGPIO_SWPORT_DR(n) (0x00 + 0xc * (n)) /* Port n Data
Register */
+#defineGPIO_SWPORT_DDR(n) (0x04 + 0xc * (n)) /* Port n Data
Direction */
#defineGPIO_INTEN 0x30/* Interrupt Enable Register */
#defineGPIO_INTMASK0x34/* Interrupt Mask Register */
#defineGPIO_INTTYPE_LEVEL 0x38/* Interrupt Level Register */
@@ -80,7 +77,7 @@ __FBSDID("$FreeBSD$");
#defineGPIO_RAW_INTSTATUS 0x44/* Raw Interrupt Status
Register */
#defineGPIO_DEBOUNCE 0x48/* Debounce Enable Register */
#defineGPIO_PORTA_EOI 0x4C/* Clear Interrupt Register */
-#defineGPIO_EXT_PORTA 0x50/* External Port A Register */
+#defineGPIO_EXT_PORT(n)(0x50 + 0x4 * (n)) /* External Port n */
#defineGPIO_LS_SYNC0x60/* Synchronization Level
Register */
#defineGPIO_ID_CODE0x64/* ID Code Register */
#defineGPIO_VER_ID_CODE0x6C/* GPIO Version Register */
@@ -89,13 +86,6 @@ __FBSDID("$FreeBSD$");
#define ENCODED_ID_PWIDTH_S(n) (5 * n) /* Width of GPIO Port N Shift */
#defineGPIO_CONFIG_REG10x74/* Configuration Register 1 */
-enum port_no {
- PORTA,
- PORTB,
- PORTC,
- PORTD,
-};
-
#defineNR_GPIO_MAX 32 /* Maximum pins per port */
#defineGPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
@@ -106,43 +96,35 @@ enum port_no {
/*
* GPIO interface
*/
-static device_t socfpga_gpio_get_bus(device_t);
-static int socfpga_gpio_pin_max(device_t, int *);
-static int socfpga_gpio_pin_getcaps(device_t, uint32_t, uint32_t *);
-static int socfpga_gpio_pin_getname(device_t, uint32_t, ch
svn commit: r346633 - head/sys/riscv/riscv
Author: br
Date: Wed Apr 24 13:41:46 2019
New Revision: 346633
URL: https://svnweb.freebsd.org/changeset/base/346633
Log:
Implement pic_pre_ithread(), pic_post_ithread().
Reviewed by: markj
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D19819
Modified:
head/sys/riscv/riscv/plic.c
Modified: head/sys/riscv/riscv/plic.c
==
--- head/sys/riscv/riscv/plic.c Wed Apr 24 13:32:04 2019(r346632)
+++ head/sys/riscv/riscv/plic.c Wed Apr 24 13:41:46 2019(r346633)
@@ -249,6 +249,30 @@ plic_attach(device_t dev)
return (intr_pic_claim_root(sc->dev, xref, plic_intr, sc, 0));
}
+static void
+plic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
+{
+ struct plic_softc *sc;
+ struct plic_irqsrc *src;
+
+ sc = device_get_softc(dev);
+ src = (struct plic_irqsrc *)isrc;
+
+ WR4(sc, PLIC_PRIORITY(src->irq), 0);
+}
+
+static void
+plic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
+{
+ struct plic_softc *sc;
+ struct plic_irqsrc *src;
+
+ sc = device_get_softc(dev);
+ src = (struct plic_irqsrc *)isrc;
+
+ WR4(sc, PLIC_PRIORITY(src->irq), 1);
+}
+
static device_method_t plic_methods[] = {
DEVMETHOD(device_probe, plic_probe),
DEVMETHOD(device_attach,plic_attach),
@@ -256,6 +280,8 @@ static device_method_t plic_methods[] = {
DEVMETHOD(pic_disable_intr, plic_disable_intr),
DEVMETHOD(pic_enable_intr, plic_enable_intr),
DEVMETHOD(pic_map_intr, plic_map_intr),
+ DEVMETHOD(pic_pre_ithread, plic_pre_ithread),
+ DEVMETHOD(pic_post_ithread, plic_post_ithread),
DEVMETHOD_END
};
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svn commit: r346634 - head/sys/dev/cadence
Author: br
Date: Wed Apr 24 13:44:30 2019
New Revision: 346634
URL: https://svnweb.freebsd.org/changeset/base/346634
Log:
Add support for Cadence network controller found in HiFive Unleashed board.
Reviewed by: markj
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D19798
Modified:
head/sys/dev/cadence/if_cgem.c
Modified: head/sys/dev/cadence/if_cgem.c
==
--- head/sys/dev/cadence/if_cgem.c Wed Apr 24 13:41:46 2019
(r346633)
+++ head/sys/dev/cadence/if_cgem.c Wed Apr 24 13:44:30 2019
(r346634)
@@ -98,6 +98,12 @@ __FBSDID("$FreeBSD$");
#define CGEM_CKSUM_ASSIST (CSUM_IP | CSUM_TCP | CSUM_UDP | \
CSUM_TCP_IPV6 | CSUM_UDP_IPV6)
+static struct ofw_compat_data compat_data[] = {
+ { "cadence,gem",1 },
+ { "cdns,macb", 1 },
+ { NULL, 0 },
+};
+
struct cgem_softc {
if_tifp;
struct mtx sc_mtx;
@@ -1635,7 +1641,7 @@ cgem_probe(device_t dev)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
- if (!ofw_bus_is_compatible(dev, "cadence,gem"))
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "Cadence CGEM Gigabit Ethernet Interface");
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Re: svn commit: r346250 - in head: share/man/man4 share/man/man9 sys/dev/random sys/kern sys/libkern sys/sys
Hi I just got this: UART 16550 configured with options: baud = 115200 | freq = 5000 bbl loader r vv rr rr rr vv r vv rrvv rr rr vv rr vv rr vv rr vv rr vv rr vv rr vv rr rr rr rr INSTRUCTION SETS WANT TO BE FREE physmap[0] = 0xc000 physmap[1] = 0xc120 physmap[2] = 0xc130 physmap[3] = 0x0001 pmap_bootstrap ffc0005c6000 c000 e00958 ffc0005c6000 100 physmap_idx 4 min_pa c000 max_pa 1 ---<>--- KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2019 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 13.0-CURRENT #496 999d9e9b642(master)-dirty: Tue Apr 16 16:23:48 BST 2019 br@pie:/usr/home/br/obj/usr/home/br/dev/freebsd-riscv/riscv.riscv64/sys/GENERIC riscv gcc version 8.2.0 (GCC) Preloaded elf64 kernel "kernel" at 0xffc000dfeda0. CPU(0): Unknown Implementer Unknown Processor random: randomdev_wait_until_seeded unblock wait t[0] == 0x t[1] == 0x t[2] == 0xffc0004e86d8 t[3] == 0x t[4] == 0x t[5] == 0x t[6] == 0x s[0] == 0xffc03b00 s[1] == 0xffc000da5920 s[2] == 0xffc000da5920 s[3] == 0x s[4] == 0x s[5] == 0xffc0005cf4d0 s[6] == 0xffc0004fc948 s[7] == 0xffc000da5920 s[8] == 0x s[9] == 0xffc000d45a80 s[10] == 0x s[11] == 0x197c a[0] == 0xffc000da5920 a[1] == 0x a[2] == 0xffc0004fc948 a[3] == 0x0900 a[4] == 0xffc000da5920 a[5] == 0x a[6] == 0x0100 a[7] == 0x0001 sepc == 0xffc0001f8d3c sstatus == 0x80026100 panic: Fatal page fault at 0xffc0001f8d3c: 0x18 time = 1 KDB: stack backtrace: db_trace_self() at db_read_token+0x5e2 pc = 0xffc0004c726a ra = 0xffcca1de sp = 0xffc035f8 fp = 0xffc03818 db_read_token() at kdb_backtrace+0x2e pc = 0xffcca1de ra = 0xffc00024c9d2 sp = 0xffc03818 fp = 0xffc03828 kdb_backtrace() at vpanic+0x124 pc = 0xffc00024c9d2 ra = 0xffc000212aaa sp = 0xffc03828 fp = 0xffc03868 vpanic() at panic+0x22 pc = 0xffc000212aaa ra = 0xffc000212ae2 sp = 0xffc03868 fp = 0xffc03888 panic() at sysarch+0x3ba pc = 0xffc000212ae2 ra = 0xffc0004d2cfc sp = 0xffc03888 fp = 0xffc03998 sysarch() at do_trap_supervisor+0x4e pc = 0xffc0004d2cfc ra = 0xffc0004d2df6 sp = 0xffc03998 fp = 0xffc039b8 do_trap_supervisor() at cpu_exception_handler_supervisor+0x68 pc = 0xffc0004d2df6 ra = 0xffc0004c78f8 sp = 0xffc039b8 fp = 0xffc03b00 cpu_exception_handler_supervisor() at sleepq_add+0x46 pc = 0xffc0004c78f8 ra = 0xffc00025919e sp = 0xffc03b00 fp = 0xffc03b40 sleepq_add() at _sleep+0x2d0 pc = 0xffc00025919e ra = 0xffc00021b892 sp = 0xffc03b40 fp = 0xffc03be0 _sleep() at random_harvest_deregister_source+0x132 pc = 0xffc00021b892 ra = 0xffced172 sp = 0xffc03be0 fp = 0xffc03c50 random_harvest_deregister_source() at read_random+0xc4 pc = 0xffced172 ra = 0xffced752 sp = 0xffc03c50 fp = 0xffc03ca0 read_random() at vn_fsync_buf+0x594 pc = 0xffced752 ra = 0xffc0002caa40 sp = 0xffc03ca0 fp = 0xffc03d00 vn_fsync_buf() at arc4rand+0xd4 pc = 0xffc0002caa40 ra = 0xffc0002cac04 sp = 0xffc03d00 fp = 0xffc03d90 arc4rand() at sched_tdname+0x4c pc = 0xffc0002cac04 ra =
svn commit: r345796 - head/sys/riscv/riscv
Author: br
Date: Tue Apr 2 12:02:35 2019
New Revision: 345796
URL: https://svnweb.freebsd.org/changeset/base/345796
Log:
o Grab the number of devices supported by PLIC from FDT.
o Fix bug in PLIC_ENABLE macro when irq >= 32.
Tested on the real hardware, which is HiFive Unleashed board.
Thanks to SiFive, Inc. for the board provided.
Reviewed by: markj
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D19775
Modified:
head/sys/riscv/riscv/plic.c
Modified: head/sys/riscv/riscv/plic.c
==
--- head/sys/riscv/riscv/plic.c Tue Apr 2 09:33:30 2019(r345795)
+++ head/sys/riscv/riscv/plic.c Tue Apr 2 12:02:35 2019(r345796)
@@ -52,9 +52,9 @@ __FBSDID("$FreeBSD$");
#include "pic_if.h"
-#definePLIC_NIRQS 32
+#definePLIC_MAX_IRQS 2048
#definePLIC_PRIORITY(n)(0x00 + (n) * 0x4)
-#definePLIC_ENABLE(n, h) (0x002000 + (h) * 0x80 + (n) / 32)
+#definePLIC_ENABLE(n, h) (0x002000 + (h) * 0x80 + 4 * ((n) / 32))
#definePLIC_THRESHOLD(h) (0x20 + (h) * 0x1000 + 0x0)
#definePLIC_CLAIM(h) (0x20 + (h) * 0x1000 + 0x4)
@@ -66,7 +66,8 @@ struct plic_irqsrc {
struct plic_softc {
device_tdev;
struct resource * intc_res;
- struct plic_irqsrc isrcs[PLIC_NIRQS];
+ struct plic_irqsrc isrcs[PLIC_MAX_IRQS];
+ int ndev;
};
#defineRD4(sc, reg)\
@@ -158,7 +159,7 @@ plic_map_intr(device_t dev, struct intr_map_data *data
return (ENOTSUP);
daf = (struct intr_map_data_fdt *)data;
- if (daf->ncells != 1 || daf->cells[0] >= PLIC_NIRQS)
+ if (daf->ncells != 1 || daf->cells[0] > sc->ndev)
return (EINVAL);
*isrcp = >isrcs[daf->cells[0]].isrc;
@@ -189,6 +190,7 @@ plic_attach(device_t dev)
struct intr_pic *pic;
uint32_t irq;
const char *name;
+ phandle_t node;
phandle_t xref;
uint32_t cpu;
int error;
@@ -198,6 +200,20 @@ plic_attach(device_t dev)
sc->dev = dev;
+ node = ofw_bus_get_node(dev);
+ if ((OF_getencprop(node, "riscv,ndev", >ndev,
+ sizeof(sc->ndev))) < 0) {
+ device_printf(dev,
+ "Error: could not get number of devices\n");
+ return (ENXIO);
+ }
+
+ if (sc->ndev >= PLIC_MAX_IRQS) {
+ device_printf(dev,
+ "Error: invalid ndev (%d)\n", sc->ndev);
+ return (ENXIO);
+ }
+
/* Request memory resources */
rid = 0;
sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, ,
@@ -211,7 +227,7 @@ plic_attach(device_t dev)
isrcs = sc->isrcs;
name = device_get_nameunit(sc->dev);
cpu = PCPU_GET(cpuid);
- for (irq = 0; irq < PLIC_NIRQS; irq++) {
+ for (irq = 1; irq <= sc->ndev; irq++) {
isrcs[irq].irq = irq;
error = intr_isrc_register([irq].isrc, sc->dev,
0, "%s,%u", name, irq);
@@ -223,7 +239,7 @@ plic_attach(device_t dev)
}
WR4(sc, PLIC_THRESHOLD(cpu), 0);
- xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
+ xref = OF_xref_from_node(node);
pic = intr_pic_register(sc->dev, xref);
if (pic == NULL)
return (ENXIO);
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svn commit: r345581 - head/sys/riscv/riscv
Author: br
Date: Wed Mar 27 16:26:03 2019
New Revision: 345581
URL: https://svnweb.freebsd.org/changeset/base/345581
Log:
Grab timer frequency from FDT.
RISC-V timer has no dedicated DTS node and we have to get timer
frequency from cpus node.
Tested on Government Furnished Equipment (GFE) cores synthesized
on Xilinx VCU118.
Reviewed by: markj
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D19727
Modified:
head/sys/riscv/riscv/timer.c
Modified: head/sys/riscv/riscv/timer.c
==
--- head/sys/riscv/riscv/timer.cWed Mar 27 16:19:02 2019
(r345580)
+++ head/sys/riscv/riscv/timer.cWed Mar 27 16:26:03 2019
(r345581)
@@ -61,7 +61,10 @@ __FBSDID("$FreeBSD$");
#include
#include
-#defineDEFAULT_FREQ1000
+#include
+#include
+#include
+#include
#defineTIMER_COUNTS0x00
#defineTIMER_MTIMECMP(cpu) (cpu * 8)
@@ -157,6 +160,32 @@ riscv_timer_intr(void *arg)
}
static int
+riscv_timer_get_timebase(device_t dev, uint32_t *freq)
+{
+ phandle_t node;
+ int len;
+
+ node = OF_finddevice("/cpus");
+ if (node == -1) {
+ if (bootverbose)
+ device_printf(dev, "Can't find cpus node.\n");
+ return (ENXIO);
+ }
+
+ len = OF_getproplen(node, "timebase-frequency");
+ if (len != 4) {
+ if (bootverbose)
+ device_printf(dev,
+ "Can't find timebase-frequency property.\n");
+ return (ENXIO);
+ }
+
+ OF_getencprop(node, "timebase-frequency", freq, len);
+
+ return (0);
+}
+
+static int
riscv_timer_probe(device_t dev)
{
@@ -176,10 +205,9 @@ riscv_timer_attach(device_t dev)
return (ENXIO);
if (device_get_unit(dev) != 0)
- return ENXIO;
+ return (ENXIO);
- sc->clkfreq = DEFAULT_FREQ;
- if (sc->clkfreq == 0) {
+ if (riscv_timer_get_timebase(dev, >clkfreq) != 0) {
device_printf(dev, "No clock frequency specified\n");
return (ENXIO);
}
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Re: svn commit: r350444 - head/stand/efi/loader
Hi
No, this is linking-stage fix only.
efinet.c, efihttp.c are still included to the build
I guess we could exclude them from compilation as it makes no sense
Ruslan
On Tue, Jul 30, 2019 at 07:00:34PM +0300, Toomas Soome wrote:
> hi!
>
> efihttp is also using network, is it intentionally left untouched?
>
> rgds,
> toomas
>
> > On 30 Jul 2019, at 17:54, Ruslan Bukin wrote:
> >
> > Author: br
> > Date: Tue Jul 30 14:54:18 2019
> > New Revision: 350444
> > URL: https://svnweb.freebsd.org/changeset/base/350444
> >
> > Log:
> > Fix EFI loader build when LOADER_NET_SUPPORT=no.
> >
> > Sponsored by: DARPA, AFRL
> >
> > Modified:
> > head/stand/efi/loader/conf.c
> >
> > Modified: head/stand/efi/loader/conf.c
> > ==
> > --- head/stand/efi/loader/conf.cTue Jul 30 14:21:00 2019
> > (r350443)
> > +++ head/stand/efi/loader/conf.cTue Jul 30 14:54:18 2019
> > (r350444)
> > @@ -40,7 +40,9 @@ struct devsw *devsw[] = {
> > _cddev,
> > _hddev,
> > _dev, /* ordering with efinet_dev matters */
> > +#if defined(LOADER_NET_SUPPORT)
> > _dev,
> > +#endif
> > _dev,
> > #ifdef EFI_ZFS_BOOT
> > _dev,
> > @@ -64,7 +66,9 @@ struct fs_ops *file_system[] = {
> > };
> >
> > struct netif_driver *netif_drivers[] = {
> > +#if defined(LOADER_NET_SUPPORT)
> > ,
> > +#endif
> > NULL
> > };
> >
> >
>
>
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svn commit: r350444 - head/stand/efi/loader
Author: br
Date: Tue Jul 30 14:54:18 2019
New Revision: 350444
URL: https://svnweb.freebsd.org/changeset/base/350444
Log:
Fix EFI loader build when LOADER_NET_SUPPORT=no.
Sponsored by: DARPA, AFRL
Modified:
head/stand/efi/loader/conf.c
Modified: head/stand/efi/loader/conf.c
==
--- head/stand/efi/loader/conf.cTue Jul 30 14:21:00 2019
(r350443)
+++ head/stand/efi/loader/conf.cTue Jul 30 14:54:18 2019
(r350444)
@@ -40,7 +40,9 @@ struct devsw *devsw[] = {
_cddev,
_hddev,
_dev, /* ordering with efinet_dev matters */
+#if defined(LOADER_NET_SUPPORT)
_dev,
+#endif
_dev,
#ifdef EFI_ZFS_BOOT
_dev,
@@ -64,7 +66,9 @@ struct fs_ops *file_system[] = {
};
struct netif_driver *netif_drivers[] = {
+#if defined(LOADER_NET_SUPPORT)
,
+#endif
NULL
};
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svn commit: r350443 - head/sys/dev/mmc/host
Author: br
Date: Tue Jul 30 14:21:00 2019
New Revision: 350443
URL: https://svnweb.freebsd.org/changeset/base/350443
Log:
Fix MMCCAM kernel build.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/mmc/host/dwmmc_altera.c
Modified: head/sys/dev/mmc/host/dwmmc_altera.c
==
--- head/sys/dev/mmc/host/dwmmc_altera.cTue Jul 30 14:19:18 2019
(r350442)
+++ head/sys/dev/mmc/host/dwmmc_altera.cTue Jul 30 14:21:00 2019
(r350443)
@@ -41,6 +41,8 @@ __FBSDID("$FreeBSD$");
#include
+#include "opt_mmccam.h"
+
static struct ofw_compat_data compat_data[] = {
{"altr,socfpga-dw-mshc",1},
{NULL, 0},
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