Author: adrian
Date: Wed Oct 31 06:27:58 2012
New Revision: 242391
URL: http://svn.freebsd.org/changeset/base/242391
Log:
I give up - introduce a TX lock to serialise TX operations.
I've tried serialising TX using queues and such but unfortunately
due to how this interacts with the
Author: adrian
Date: Wed Oct 31 06:35:50 2012
New Revision: 242392
URL: http://svn.freebsd.org/changeset/base/242392
Log:
I've had some feedback that CCK rates are more reliable than MCS 0
in some very degenerate conditions.
However, until ath_rate_form_aggr() is taught to not form
On 30.10.2012 03:25, YongHyeon PYUN wrote:
On Mon, Oct 29, 2012 at 09:20:59AM +0100, Andre Oppermann wrote:
On 29.10.2012 22:40, YongHyeon PYUN wrote:
On Mon, Oct 29, 2012 at 09:21:00AM +0400, Gleb Smirnoff wrote:
On Mon, Oct 29, 2012 at 01:41:04PM -0700, YongHyeon PYUN wrote:
Y On Sun, Oct
Author: attilio
Date: Wed Oct 31 13:38:56 2012
New Revision: 242395
URL: http://svn.freebsd.org/changeset/base/242395
Log:
Give mtx(9) the ability to crunch different type of structures, with the
only constraint that they have a lock cookie named mtx_lock.
This name, then, becames reserved
Author: gavin
Date: Wed Oct 31 13:52:03 2012
New Revision: 242396
URL: http://svn.freebsd.org/changeset/base/242396
Log:
Genericise the (out of date) instructions from moving from stable to
current.
MFC after:3 days
Modified:
head/UPDATING
Modified: head/UPDATING
Author: des
Date: Wed Oct 31 15:04:27 2012
New Revision: 242398
URL: http://svn.freebsd.org/changeset/base/242398
Log:
Correct attribution.
Modified:
head/lib/libutil/pw_util.3
Modified: head/lib/libutil/pw_util.3
Author: jimharris
Date: Wed Oct 31 17:12:12 2012
New Revision: 242401
URL: http://svn.freebsd.org/changeset/base/242401
Log:
Pad and align the callout_cpu mtx to its own cacheline to reduce false
sharing especially on the default CPU 0 callout_cpu structure.
This will be followed up by
Author: attilio
Date: Wed Oct 31 18:07:18 2012
New Revision: 242402
URL: http://svn.freebsd.org/changeset/base/242402
Log:
Rework the known mutexes to benefit about staying on their own
cache line in order to avoid manual frobbing but using
struct mtx_padalign.
The sole exception being
On Wed, Oct 31, 2012 at 6:07 PM, Attilio Rao atti...@freebsd.org wrote:
Author: attilio
Date: Wed Oct 31 18:07:18 2012
New Revision: 242402
URL: http://svn.freebsd.org/changeset/base/242402
Log:
Rework the known mutexes to benefit about staying on their own
cache line in order to avoid
Author: jfv
Date: Wed Oct 31 18:16:42 2012
New Revision: 242403
URL: http://svn.freebsd.org/changeset/base/242403
Log:
Correct code that was lost somewhere in the past,
this was designed to keep duplicate null vlan tags from
being added. When doing vlans purely via the switch
this problem
On Wed, 2012-10-31 at 18:10 +, Attilio Rao wrote:
On Wed, Oct 31, 2012 at 6:07 PM, Attilio Rao atti...@freebsd.org wrote:
Author: attilio
Date: Wed Oct 31 18:07:18 2012
New Revision: 242402
URL: http://svn.freebsd.org/changeset/base/242402
Log:
Rework the known mutexes to
On Wed, Oct 31, 2012 at 6:26 PM, Ian Lepore
free...@damnhippie.dyndns.org wrote:
On Wed, 2012-10-31 at 18:10 +, Attilio Rao wrote:
On Wed, Oct 31, 2012 at 6:07 PM, Attilio Rao atti...@freebsd.org wrote:
Author: attilio
Date: Wed Oct 31 18:07:18 2012
New Revision: 242402
URL:
On 31 October 2012 11:33, Attilio Rao atti...@freebsd.org wrote:
Doesn't this padding to cache line size only help x86 processors in an
SMP kernel? I was expecting to see some #ifdef SMP so that we don't pay
a big price for no gain in small-memory ARM systems and such. But maybe
I'm
On 10/31/12, Adrian Chadd adr...@freebsd.org wrote:
On 31 October 2012 11:33, Attilio Rao atti...@freebsd.org wrote:
Doesn't this padding to cache line size only help x86 processors in an
SMP kernel? I was expecting to see some #ifdef SMP so that we don't pay
a big price for no gain in
On 2012-Oct-31 18:57:37 +, Attilio Rao atti...@freebsd.org wrote:
On 10/31/12, Adrian Chadd adr...@freebsd.org wrote:
Right, but you didn't make it configurable for us embedded peeps who
still care about memory usage.
How is this possible without breaking the module/kernel ABI?
Memory
On Thu, 2012-11-01 at 06:30 +1100, Peter Jeremy wrote:
On 2012-Oct-31 18:57:37 +, Attilio Rao atti...@freebsd.org wrote:
On 10/31/12, Adrian Chadd adr...@freebsd.org wrote:
Right, but you didn't make it configurable for us embedded peeps who
still care about memory usage.
How is this
On Wed, Oct 31, 2012 at 12:30 PM, Peter Jeremy pe...@rulingia.com wrote:
On 2012-Oct-31 18:57:37 +, Attilio Rao atti...@freebsd.org wrote:
On 10/31/12, Adrian Chadd adr...@freebsd.org wrote:
Right, but you didn't make it configurable for us embedded peeps who
still care about memory
On 31.10.2012 20:40, Ian Lepore wrote:
On Thu, 2012-11-01 at 06:30 +1100, Peter Jeremy wrote:
On 2012-Oct-31 18:57:37 +, Attilio Rao atti...@freebsd.org wrote:
On 10/31/12, Adrian Chadd adr...@freebsd.org wrote:
Right, but you didn't make it configurable for us embedded peeps who
still
We definitely can't define CACHE_LINE_SIZE=0 on those platforms, as
there are other reasons you need to know the cache line size. :)
Adrian
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On 31.10.2012 19:10, Attilio Rao wrote:
On Wed, Oct 31, 2012 at 6:07 PM, Attilio Rao atti...@freebsd.org wrote:
Author: attilio
Date: Wed Oct 31 18:07:18 2012
New Revision: 242402
URL: http://svn.freebsd.org/changeset/base/242402
Log:
Rework the known mutexes to benefit about staying on
Author: adrian
Date: Wed Oct 31 20:58:24 2012
New Revision: 242406
URL: http://svn.freebsd.org/changeset/base/242406
Log:
Add the emulation PCI device id - these days, 0xabcd shows up all over
the internet as AR9380 and later which didn't get its PCI ID written
in at power-on, so it's
Author: adrian
Date: Wed Oct 31 21:00:01 2012
New Revision: 242407
URL: http://svn.freebsd.org/changeset/base/242407
Log:
Add in the last random assortment of missing bits for the AR9380 HAL.
Obtained from:Qualcomm Atheros
Modified:
head/sys/dev/ath/ath_hal/ah.h
Author: adrian
Date: Wed Oct 31 21:03:55 2012
New Revision: 242408
URL: http://svn.freebsd.org/changeset/base/242408
Log:
HAL updates!
* Add some more ANI spur immunity levels.
* For AR5111 radios attached to an AR5212, limit the 5GHz channels
that are available. A later revision of
Author: adrian
Date: Wed Oct 31 21:04:23 2012
New Revision: 242409
URL: http://svn.freebsd.org/changeset/base/242409
Log:
Oops - missing from the last commit - add ANI immunity levels for AR9160.
Obtained from:Qualcomm Atheros
Modified:
Author: adrian
Date: Wed Oct 31 21:06:55 2012
New Revision: 242411
URL: http://svn.freebsd.org/changeset/base/242411
Log:
Oops - this was incorrectly removed in a previous commit.
Modified:
head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
Modified:
Author: adrian
Date: Wed Oct 31 21:14:25 2012
New Revision: 242412
URL: http://svn.freebsd.org/changeset/base/242412
Log:
Since the PLL changes aren't in here yet for the AR9130 half/quarter
rate support, disable it.
Modified:
head/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
Author: mav
Date: Wed Oct 31 22:11:51 2012
New Revision: 242417
URL: http://svn.freebsd.org/changeset/base/242417
Log:
ASUS EeePC 1001px has strange variant of ALC269 CODEC, that mutes speaker
if unused in that configuration mixer at NID 15 is muted. Probably CODEC
incorrectly reports its
On Wed, Oct 31, 2012 at 8:31 PM, Andre Oppermann an...@freebsd.org wrote:
On 31.10.2012 20:40, Ian Lepore wrote:
On Thu, 2012-11-01 at 06:30 +1100, Peter Jeremy wrote:
On 2012-Oct-31 18:57:37 +, Attilio Rao atti...@freebsd.org wrote:
On 10/31/12, Adrian Chadd adr...@freebsd.org wrote:
On Wed, Oct 31, 2012 at 3:55 PM, Attilio Rao atti...@freebsd.org wrote:
On Wed, Oct 31, 2012 at 8:31 PM, Andre Oppermann an...@freebsd.org
wrote:
You can define CACHE_LINE_SIZE to 0 on those platforms.
Or to make it even more granular there could be a CACHE_LINE_SIZE_LOCKS
that is used
Author: jimharris
Date: Wed Oct 31 23:44:19 2012
New Revision: 242420
URL: http://svn.freebsd.org/changeset/base/242420
Log:
Use callout_reset_curcpu to allow the callout to be handled by the
current CPU and not always CPU 0.
This has the added benefit of reducing a huge amount of
Author: jfv
Date: Wed Oct 31 23:50:36 2012
New Revision: 242421
URL: http://svn.freebsd.org/changeset/base/242421
Log:
A few important fixes:
- Testing TSO6 has led me to discover that HW RSC is
a problematic feature, it is ONLY designed to work
with IPv4 in the first place, and
Author: mav
Date: Thu Nov 1 00:09:01 2012
New Revision: 242422
URL: http://svn.freebsd.org/changeset/base/242422
Log:
Only four specific ATA PIO commands transfer several sectors per DRQ block
(interrupt). All other ATA PIO commands transfer one sector or 512 bytes
at one time. Hardcode
On 10/27/2012 12:29 PM, Pawel Jakub Dawidek wrote:
On behalf of Mother Earth thank you:)
Thank You, Mother Earth, for noticing my humble attempts to make
worl^HFreeBSD a better place. :)
-Maxim
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On Wed, Oct 31, 2012 at 08:59:06AM +0100, Andre Oppermann wrote:
On 30.10.2012 03:25, YongHyeon PYUN wrote:
On Mon, Oct 29, 2012 at 09:20:59AM +0100, Andre Oppermann wrote:
On 29.10.2012 22:40, YongHyeon PYUN wrote:
On Mon, Oct 29, 2012 at 09:21:00AM +0400, Gleb Smirnoff wrote:
On Mon, Oct
Author: jmallett
Date: Thu Nov 1 03:45:33 2012
New Revision: 242423
URL: http://svn.freebsd.org/changeset/base/242423
Log:
Handle the management port on the EBT5600 and disable loopback. The XAUI
port connected to the Broadcom switch does not seem operable, but it's unclear
if that's
Author: alfred
Date: Thu Nov 1 04:07:08 2012
New Revision: 242424
URL: http://svn.freebsd.org/changeset/base/242424
Log:
Small textdump enhancements.
Allow textdumps to be called explicitly from DDB.
If dump is called in DDB and textdumps are enabled then abort the
dump and tell
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