Author: jhibbits
Date: Sun Oct 20 15:50:33 2019
New Revision: 353777
URL: https://svnweb.freebsd.org/changeset/base/353777
Log:
powerpc/booke: Don't zero MAS8, it's unnecessary
MAS8 is hypervisor privileged, defining the logical partition (VM) to
operate on for TLB accesses. It's already guaranteed to be cleared when
booting bare metal (bootloader needs it zeroed to work), and we can't touch
it from a guest. Assume that if/when we eventually port bhyve to PowerPC
(and Book-E) the hypervisor module will take care of managing MAS8. This
saves several (tens) of clocks on each TLB miss.
MFC after: 2 weeks
Modified:
head/sys/powerpc/booke/locore.S
head/sys/powerpc/booke/trap_subr.S
Modified: head/sys/powerpc/booke/locore.S
==============================================================================
--- head/sys/powerpc/booke/locore.S Sun Oct 20 14:45:19 2019
(r353776)
+++ head/sys/powerpc/booke/locore.S Sun Oct 20 15:50:33 2019
(r353777)
@@ -252,7 +252,6 @@ __start:
isync
li %r4, 0
mtspr SPR_MAS7, %r4
- bl zero_mas8
isync
tlbwe
isync
@@ -510,7 +509,6 @@ bp_kernload:
isync
li %r4, 0
mtspr SPR_MAS7, %r4
- bl zero_mas8
isync
tlbwe
isync
@@ -702,7 +700,6 @@ tlb1_temp_mapping_as1:
mflr %r3
li %r4, 0
mtspr SPR_MAS7, %r4
- bl zero_mas8
mtlr %r3
isync
tlbwe
@@ -738,24 +735,6 @@ tlb1_inval_all_but_current:
2: addi %r4, %r4, 1
cmpw %r4, %r3 /* Check if this is the last entry */
bne 1b
- blr
-
-/*
- * MAS8 conditional zeroing.
- */
-.globl zero_mas8
-zero_mas8:
- mfpvr %r20
- rlwinm %r20, %r20, 16, 16, 31
- cmpli 0, 0, %r20, FSL_E500mc
- beq 1f
- cmpli 0, 0, %r20, FSL_E5500
- beq 1f
-
- blr
-1:
- li %r20, 0
- mtspr SPR_MAS8, %r20
blr
#endif
Modified: head/sys/powerpc/booke/trap_subr.S
==============================================================================
--- head/sys/powerpc/booke/trap_subr.S Sun Oct 20 14:45:19 2019
(r353776)
+++ head/sys/powerpc/booke/trap_subr.S Sun Oct 20 15:50:33 2019
(r353777)
@@ -767,7 +767,6 @@ search_failed:
li %r23, 0
mtspr SPR_MAS7, %r23
- bl zero_mas8
isync
tlbwe
@@ -903,10 +902,6 @@ tlb_fill_entry:
mtspr SPR_MAS2, %r27
mtspr SPR_MAS3, %r22
mtspr SPR_MAS7, %r23
-
- mflr %r21
- bl zero_mas8
- mtlr %r21
isync
tlbwe
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