svn commit: r368473 - head/sys/dev/mfi

[Justin Hibbits]

Author: jhibbits
Date: Wed Dec  9 02:07:01 2020
New Revision: 368473
URL: https://svnweb.freebsd.org/changeset/base/368473

Log:
  dev/mfi: Make a seemingly bogus conditional unconditional
  
  Summary:
  r358689 attempted to fix a clang warning/error by inferring the intent
  of the condition "(cdb[0] != 0x28 || cdb[0] != 0x2A)".  Unfortunately, it 
looks
  like this broke things.  Instead, fix this by making this path unconditional,
  effectively reverting to the previous state.
  
  PR:   kern/251483
  Reviewed By:  ambrisko
  MFC after:2 days
  Differential Revision: https://reviews.freebsd.org/D27515

Modified:
  head/sys/dev/mfi/mfi_tbolt.c

Modified: head/sys/dev/mfi/mfi_tbolt.c
==
--- head/sys/dev/mfi/mfi_tbolt.cWed Dec  9 02:05:14 2020
(r368472)
+++ head/sys/dev/mfi/mfi_tbolt.cWed Dec  9 02:07:01 2020
(r368473)
@@ -1104,16 +1104,12 @@ mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_
 
if (hdr->cmd == MFI_CMD_PD_SCSI_IO) {
/* check for inquiry commands coming from CLI */
-   if (cdb[0] != 0x28 && cdb[0] != 0x2A) {
-   if ((req_desc = mfi_tbolt_build_mpt_cmd(sc, cm)) ==
-   NULL) {
-   device_printf(sc->mfi_dev, "Mapping from MFI "
-   "to MPT Failed \n");
-   return 1;
-   }
+   if ((req_desc = mfi_tbolt_build_mpt_cmd(sc, cm)) ==
+   NULL) {
+   device_printf(sc->mfi_dev, "Mapping from MFI "
+   "to MPT Failed \n");
+   return 1;
}
-   else
-   device_printf(sc->mfi_dev, "DJA NA XXX SYSPDIO\n");
} else if (hdr->cmd == MFI_CMD_LD_SCSI_IO ||
hdr->cmd == MFI_CMD_LD_READ || hdr->cmd == MFI_CMD_LD_WRITE) {
cm->cm_flags |= MFI_CMD_SCSI;
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svn commit: r367807 - head/sys/mips/cavium

[Justin Hibbits]

Author: jhibbits
Date: Wed Nov 18 17:37:01 2020
New Revision: 367807
URL: https://svnweb.freebsd.org/changeset/base/367807

Log:
  Fix octeon_pmc post-r334827
  
  MFC after:3 days
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/mips/cavium/octeon_pmc.c

Modified: head/sys/mips/cavium/octeon_pmc.c
==
--- head/sys/mips/cavium/octeon_pmc.c   Wed Nov 18 16:21:37 2020
(r367806)
+++ head/sys/mips/cavium/octeon_pmc.c   Wed Nov 18 17:37:01 2020
(r367807)
@@ -111,7 +111,7 @@ octeon_pmc_intr(void *arg)
struct trapframe *tf = PCPU_GET(curthread)->td_intr_frame;
 
if (pmc_intr)
-   (*pmc_intr)(PCPU_GET(tf);
+   (*pmc_intr)(tf);
 
return (FILTER_HANDLED);
 }
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svn commit: r367355 - head/sys/mips/mips

[Justin Hibbits]

Author: jhibbits
Date: Wed Nov  4 23:29:27 2020
New Revision: 367355
URL: https://svnweb.freebsd.org/changeset/base/367355

Log:
  Fix UMA alignment for COP2 context structure.
  
  UMA alignment needs specified as (power-of-2) - 1, not power-of-2.
  
  Discussed with:   gonzo
  MFC after:3 days

Modified:
  head/sys/mips/mips/octeon_cop2.c

Modified: head/sys/mips/mips/octeon_cop2.c
==
--- head/sys/mips/mips/octeon_cop2.cWed Nov  4 23:26:15 2020
(r367354)
+++ head/sys/mips/mips/octeon_cop2.cWed Nov  4 23:29:27 2020
(r367355)
@@ -46,7 +46,7 @@ octeon_cop2_init(void* dummy)
printf("Create COP2 context zone\n");
ctxzone = uma_zcreate("COP2 context",
sizeof(struct octeon_cop2_state), 
-   NULL, NULL, NULL, NULL, 8, 0);
+   NULL, NULL, NULL, NULL, UMA_ALIGN_LONG, 0);
 }
 
 struct octeon_cop2_state *
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svn commit: r366188 - head/sys/mips/include

[Justin Hibbits]

Author: jhibbits
Date: Sat Sep 26 21:47:11 2020
New Revision: 366188
URL: https://svnweb.freebsd.org/changeset/base/366188

Log:
  Check for the only 32-bit MIPS ABIs we support, rather than !n64
  
  There may be additional 64-bit ABIs supported, so use a positive check rather
  than a negative check.
  Suggested by: imp
  MFC after:1 week
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/mips/include/elf.h

Modified: head/sys/mips/include/elf.h
==
--- head/sys/mips/include/elf.h Sat Sep 26 21:45:33 2020(r366187)
+++ head/sys/mips/include/elf.h Sat Sep 26 21:47:11 2020(r366188)
@@ -105,7 +105,7 @@ typedef struct {/* Auxiliary vector entry on initial 
int a_type; /* Entry type. */
union {
int a_val;  /* Integer value. */
-#ifndef __mips_n64
+#if defined(__mips_o32) || defined(__mips_n32)
void*a_ptr; /* Address. */
void(*a_fcn)(void); /* Function pointer (not used). */
 #endif
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svn commit: r366171 - head/sys/mips/mips

[Justin Hibbits]

Author: jhibbits
Date: Fri Sep 25 20:27:36 2020
New Revision: 366171
URL: https://svnweb.freebsd.org/changeset/base/366171

Log:
  Fix mips64 build
  
  Original patch was against FreeBSD 12, and a test compile wasn't run against
  head.  md_tls_tcb_offset field was moved from mdthread to mdproc in the
  meantime.
  
  MFC after:1 week
  Sponsored by: Juniper Networks, Inc.

Modified:
  head/sys/mips/mips/freebsd32_machdep.c

Modified: head/sys/mips/mips/freebsd32_machdep.c
==
--- head/sys/mips/mips/freebsd32_machdep.c  Fri Sep 25 19:11:21 2020
(r366170)
+++ head/sys/mips/mips/freebsd32_machdep.c  Fri Sep 25 20:27:36 2020
(r366171)
@@ -465,7 +465,7 @@ freebsd32_sysarch(struct thread *td, struct freebsd32_
 */
if (cpuinfo.userlocal_reg == true) {
mips_wr_userlocal((unsigned long)(uap->parms +
-   td->td_md.md_tls_tcb_offset));
+   td->td_proc->p_md.md_tls_tcb_offset));
}
return (0);
case MIPS_GET_TLS: 
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svn commit: r366169 - head/sys/mips/include

[Justin Hibbits]

Author: jhibbits
Date: Fri Sep 25 19:04:03 2020
New Revision: 366169
URL: https://svnweb.freebsd.org/changeset/base/366169

Log:
  mips: Fix compat32 library builds from r366162
  
  Re-add the a_ptr and a_fcn fields to Elf32_Auxinfo.
  
  MFC after:1 week
  Sponsored by: Juniper Networks, Inc.

Modified:
  head/sys/mips/include/elf.h

Modified: head/sys/mips/include/elf.h
==
--- head/sys/mips/include/elf.h Fri Sep 25 19:02:49 2020(r366168)
+++ head/sys/mips/include/elf.h Fri Sep 25 19:04:03 2020(r366169)
@@ -105,6 +105,10 @@ typedef struct {   /* Auxiliary vector entry on initial 
int a_type; /* Entry type. */
union {
int a_val;  /* Integer value. */
+#ifndef __mips_n64
+   void*a_ptr; /* Address. */
+   void(*a_fcn)(void); /* Function pointer (not used). */
+#endif
} a_un;
 } Elf32_Auxinfo;
 
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svn commit: r366162 - in head/sys/mips: include mips

[Justin Hibbits]

Author: jhibbits
Date: Fri Sep 25 17:13:45 2020
New Revision: 366162
URL: https://svnweb.freebsd.org/changeset/base/366162

Log:
  Fix compat32 on mips64
  
  Summary:
  Two bugs:
  * Elf32_Auxinfo is broken, using pointers in the union, which are 64-bits not
32.
  * freebsd32_sysarch() doesn't update the 'user local' register when handling
MIPS_SET_TLS, leading to a NULL pointer dereference in the 32-bit
application.
  
  Reviewed by:  #mips, brooks
  MFC after:1 week
  Sponsored by: Juniper Networks, Inc
  Differential Revision:https://reviews.freebsd.org/D26556

Modified:
  head/sys/mips/include/elf.h
  head/sys/mips/mips/freebsd32_machdep.c

Modified: head/sys/mips/include/elf.h
==
--- head/sys/mips/include/elf.h Fri Sep 25 16:44:01 2020(r366161)
+++ head/sys/mips/include/elf.h Fri Sep 25 17:13:45 2020(r366162)
@@ -105,8 +105,6 @@ typedef struct {/* Auxiliary vector entry on initial 
int a_type; /* Entry type. */
union {
int a_val;  /* Integer value. */
-   void*a_ptr; /* Address. */
-   void(*a_fcn)(void); /* Function pointer (not used). */
} a_un;
 } Elf32_Auxinfo;
 

Modified: head/sys/mips/mips/freebsd32_machdep.c
==
--- head/sys/mips/mips/freebsd32_machdep.c  Fri Sep 25 16:44:01 2020
(r366161)
+++ head/sys/mips/mips/freebsd32_machdep.c  Fri Sep 25 17:13:45 2020
(r366162)
@@ -58,6 +58,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -455,6 +456,17 @@ freebsd32_sysarch(struct thread *td, struct freebsd32_
switch (uap->op) {
case MIPS_SET_TLS:
td->td_md.md_tls = (void *)(intptr_t)uap->parms;
+
+   /*
+* If there is an user local register implementation (ULRI)
+* update it as well.  Add the TLS and TCB offsets so the
+* value in this register is adjusted like in the case of the
+* rdhwr trap() instruction handler.
+*/
+   if (cpuinfo.userlocal_reg == true) {
+   mips_wr_userlocal((unsigned long)(uap->parms +
+   td->td_md.md_tls_tcb_offset));
+   }
return (0);
case MIPS_GET_TLS: 
tlsbase = (int32_t)(intptr_t)td->td_md.md_tls;
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Re: svn commit: r365054 - in head/sys: conf dev/sdhci

[Justin Hibbits]

Sep 1, 2020 11:17:35 Marcin Wojtas :

> Author: mw
> Date: Tue Sep  1 16:17:21 2020
> New Revision: 365054
> URL: https://svnweb.freebsd.org/changeset/base/365054
>
> Log:
> Introduce the SDHCI driver for NXP QorIQ Layerscape SoCs
>
> Implement support for an eSDHC controller found in NXP QorIQ Layerscape SoCs.
>
> This driver has been tested with NXP LS1046A and LX2160A (Honeycomb board),
> which is incompatible with the existing sdhci_fsl driver (aiming at older
> chips from this family). As such, it is not intended as replacement for
> the old driver, but rather serves as an improved alternative for SoCs that
> support it.
> It comes with support for both PIO and Single DMA modes and samples the
> clock from the extres clk API.

How is it incompatible?

>
> Submitted by: Artur Rojek 
> Reviewed by: manu, mmel, kibab
> Obtained from: Semihalf
> Sponsored by: Alstom Group
> Differential Revision: https://reviews.freebsd.org/D26153
>
> Added:
> head/sys/dev/sdhci/sdhci_fsl_fdt.c   (contents, props changed)

The name choice here is odd, given there is already fsl_sdhci.c

> Modified:
> head/sys/conf/files
>
> Modified: head/sys/conf/files
> ==
> --- head/sys/conf/files Tue Sep  1 16:13:09 2020  (r365053)
> +++ head/sys/conf/files Tue Sep  1 16:17:21 2020  (r365054)
> @@ -3058,6 +3058,7 @@ dev/scc/scc_dev_z8530.c   optional scc
> dev/sdhci/sdhci.c    optional sdhci
> dev/sdhci/sdhci_fdt.c    optional sdhci fdt
> dev/sdhci/sdhci_fdt_gpio.c optional sdhci fdt gpio
> +dev/sdhci/sdhci_fsl_fdt.c  optional sdhci fdt gpio
> dev/sdhci/sdhci_if.m   optional sdhci
> dev/sdhci/sdhci_acpi.c   optional sdhci acpi
> dev/sdhci/sdhci_pci.c    optional sdhci pci
>
> Added: head/sys/dev/sdhci/sdhci_fsl_fdt.c
> ==
> --- /dev/null 00:00:00 1970 (empty, because file is newly added)
> +++ head/sys/dev/sdhci/sdhci_fsl_fdt.c  Tue Sep  1 16:17:21 2020  (r365054)
> @@ -0,0 +1,680 @@
> +/*-
> + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
> + *
> + * Copyright (c) 2020 Alstom Group.
> + * Copyright (c) 2020 Semihalf.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + *    notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + *    notice, this list of conditions and the following disclaimer in the
> + *    documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
> + * SUCH DAMAGE.
> + */
> +
> +/* eSDHC controller driver for NXP QorIQ Layerscape SoCs. */
> +
> +#include 
> +__FBSDID("$FreeBSD$");
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "mmcbr_if.h"
> +#include "sdhci_if.h"
> +
> +#define  RD4 (sc->read)
> +#define  WR4 (sc->write)
> +
> +#define  SDHCI_FSL_PRES_STATE    0x24
> +#define  SDHCI_FSL_PRES_SDSTB    (1 << 3)
> +#define  SDHCI_FSL_PRES_COMPAT_MASK  0x000f0f07
> +
> +#define  SDHCI_FSL_PROT_CTRL   0x28
> +#define  SDHCI_FSL_PROT_CTRL_WIDTH_1BIT  (0 << 1)
> +#define  SDHCI_FSL_PROT_CTRL_WIDTH_4BIT  (1 << 1)
> +#define  SDHCI_FSL_PROT_CTRL_WIDTH_8BIT  (2 << 1)
> +#define  SDHCI_FSL_PROT_CTRL_WIDTH_MASK  (3 << 1)
> +#define  SDHCI_FSL_PROT_CTRL_BYTE_SWAP (0 << 4)
> +#define  SDHCI_FSL_PROT_CTRL_BYTE_NATIVE (2 << 4)
> +#define  SDHCI_FSL_PROT_CTRL_BYTE_MASK (3 << 4)
> +#define  SDHCI_FSL_PROT_CTRL_DMA_MASK  (3 << 8)
> +
> +#define  SDHCI_FSL_SYS_CTRL    0x2c
> +#define  SDHCI_FSL_CLK_IPGEN   (1 << 0)
> +#define  SDHCI_FSL_CLK_SDCLKEN   (1 << 3)
> +#define  SDHCI_FSL_CLK_DIVIDER_MASK  0x00f0
> +#define  SDHCI_FSL_CLK_DIVIDER_SHIFT 4
> +#define  SDHCI_FSL_CLK_PRESCALE_MASK 0xff00
> +#define  SDHCI_FSL_CLK_PRESCALE_SHIFT  8
> +
> +#define  SDHCI_FSL_WTMK_LVL    0x44
> +#define  SDHCI_FSL_WTMK_RD_512B    (0 << 0)
> 

Re: svn commit: r362466 - in head: contrib/file/magic/Magdir contrib/tcpdump lib/geom/part stand/efi/include stand/i386/boot0 sys/dev/hptmv sys/geom/part usr.bin/fortune/datfiles usr.bin/mkimg usr.sbi

[Justin Hibbits]

On Sun, Jun 21, 2020, 09:38 Hans Petter Selasky  wrote:

> On 2020-06-21 15:47, Emmanuel Vadot wrote:
> >   What's more clear about calling something that is called Master Boot
> > Record something else ?
> >   What's next ? Will you contact the BBC so they redub all Doctor Who
> > episode where "The Master" appears ? Contact Disney so the release a
> > new version of Tron where the Master Control Program is call the Main
> > Control Program ?
>
> Hi Manu,
>
> I didn't know BBC made such episodes.
>
> And no, I won't contact BBC nor Disney about this.
>
> The point here is that the Master's Boot Record may be very badly
> perceived by some people. Do I need to explain that?
>
> --HPS
>

No it can't. It's an absurd change.

- Justin

>
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Re: svn commit: r360233 - in head: contrib/jemalloc . . . : This partially breaks a 2-socket 32-bit powerpc (old PowerMac G4) based on head -r360311

[Justin Hibbits]

On Thu, 11 Jun 2020 17:30:24 -0700
Mark Millard  wrote:

> On 2020-Jun-11, at 16:49, Mark Millard  wrote:
> 
> > On 2020-Jun-11, at 14:42, Justin Hibbits 
> > wrote:
> > 
> > On Thu, 11 Jun 2020 14:36:37 -0700
> > Mark Millard  wrote:
> >   
> >> On 2020-Jun-11, at 13:55, Justin Hibbits 
> >> wrote:
> >>   
> >>> On Wed, 10 Jun 2020 18:56:57 -0700
> >>> Mark Millard  wrote:  
> > . . .  
> >> 
> >>   
> >>> That said, the attached patch effectively copies
> >>> what's done in OEA6464 into OEA pmap.  Can you test it?
> >> 
> >> I'll try it once I get a chance, probably later
> >> today.
> >> . . .  
> > 
> > No luck at the change being a fix, I'm afraid.
> > 
> > I verified that the build ended up with
> > 
> > 00926cb0  bl  008e8dc8 
> > 00926cb4  mr  r27,r3
> > 00926cb8  addir3,r3,36
> > 00926cbc  hwsync
> > 00926cc0  lwarx   r25,0,r3
> > 00926cc4  li  r4,0
> > 00926cc8  stwcx.  r4,0,r3
> > 00926ccc  bne-00926cc0 
> > 00926cd0  andi.   r3,r25,128
> > 00926cd4  beq 00926ce0 
> > 00926cd8  mr  r3,r27
> > 00926cdc  bl  008e9874 
> > 
> > in the installed kernel. So I doubt a
> > mis-build would be involved. It is a
> > head -r360311 based context still. World is
> > without MALLOC_PRODUCTION so that jemalloc
> > code executes its asserts, catching more
> > and earlier than otherwise.
> > 
> > First test . . .
> > 
> > The only thing that the witness kernel reported was:
> > 
> > Jun 11 15:58:16 FBSDG4S2 kernel: lock order reversal:
> > Jun 11 15:58:16 FBSDG4S2 kernel:  1st 0x216fb00 Mountpoints (UMA
> > zone) @ /usr/src/sys/vm/uma_core.c:4387 Jun 11 15:58:16 FBSDG4S2
> > kernel:  2nd 0x1192d2c kernelpmap (kernelpmap) @
> > /usr/src/sys/powerpc/aim/mmu_oea.c:1524 Jun 11 15:58:16 FBSDG4S2
> > kernel: stack backtrace: Jun 11 15:58:16 FBSDG4S2 kernel: #0
> > 0x5ec164 at witness_debugger+0x94 Jun 11 15:58:16 FBSDG4S2 kernel:
> > #1 0x5ebe3c at witness_checkorder+0xb50 Jun 11 15:58:16 FBSDG4S2
> > kernel: #2 0x536d5c at __mtx_lock_flags+0xcc Jun 11 15:58:16
> > FBSDG4S2 kernel: #3 0x92636c at moea_kextract+0x5c Jun 11 15:58:16
> > FBSDG4S2 kernel: #4 0x965d30 at pmap_kextract+0x98 Jun 11 15:58:16
> > FBSDG4S2 kernel: #5 0x8bfdbc at zone_release+0xf0 Jun 11 15:58:16
> > FBSDG4S2 kernel: #6 0x8c7854 at bucket_drain+0x2f0 Jun 11 15:58:16
> > FBSDG4S2 kernel: #7 0x8c728c at bucket_free+0x54 Jun 11 15:58:16
> > FBSDG4S2 kernel: #8 0x8c74fc at bucket_cache_reclaim+0x1bc Jun 11
> > 15:58:16 FBSDG4S2 kernel: #9 0x8c7004 at zone_reclaim+0x128 Jun 11
> > 15:58:16 FBSDG4S2 kernel: #10 0x8c3a40 at uma_reclaim+0x170 Jun 11
> > 15:58:16 FBSDG4S2 kernel: #11 0x8c3f70 at uma_reclaim_worker+0x68
> > Jun 11 15:58:16 FBSDG4S2 kernel: #12 0x50fbac at fork_exit+0xb0 Jun
> > 11 15:58:16 FBSDG4S2 kernel: #13 0x9684ac at fork_trampoline+0xc
> > 
> > The processes that were hit were listed as:
> > 
> > Jun 11 15:59:11 FBSDG4S2 kernel: pid 971 (cron), jid 0, uid 0:
> > exited on signal 11 (core dumped) Jun 11 16:02:59 FBSDG4S2 kernel:
> > pid  (stress), jid 0, uid 0: exited on signal 6 (core dumped)
> > Jun 11 16:03:27 FBSDG4S2 kernel: pid 871 (mountd), jid 0, uid 0:
> > exited on signal 6 (core dumped) Jun 11 16:03:40 FBSDG4S2 kernel:
> > pid 1065 (su), jid 0, uid 0: exited on signal 6 Jun 11 16:04:13
> > FBSDG4S2 kernel: pid 1088 (su), jid 0, uid 0: exited on signal 6
> > Jun 11 16:04:28 FBSDG4S2 kernel: pid 968 (sshd), jid 0, uid 0:
> > exited on signal 6
> > 
> > Jun 11 16:05:42 FBSDG4S2 kernel: pid 1028 (login), jid 0, uid 0:
> > exited on signal 6
> > 
> > Jun 11 16:05:46 FBSDG4S2 kernel: pid 873 (nfsd), jid 0, uid 0:
> > exited on signal 6 (core dumped)
> > 
> > 
> > Rebooting and rerunning and showing the stress output and such
> > (I did not capture copies during the first test, but the first
> > test had similar messages at the same sort of points):
> > 
> > Second test . . .
> > 
> > # stress -m 2 --vm-bytes 1700M
> > stress: info: [1166] dispatching hogs: 0 cpu, 0 io, 2 vm, 0 hdd
> > :
> > /usr/src/contrib/jemalloc/include/jemalloc/internal/arena_inlines_b.h:258:
> > Failed assertion: "slab == extent_slab_get(extent)" :
> > /usr/src/contrib/jemalloc/include/jemalloc/internal/arena_inlines_b.h:258:
> > Failed assertion: "slab == extent_slab_get(extent)" ^C
> > 
> > # exit
> > :
> > /usr/s

Re: svn commit: r360233 - in head: contrib/jemalloc . . . : This partially breaks a 2-socket 32-bit powerpc (old PowerMac G4) based on head -r360311

[Justin Hibbits]

On Thu, 11 Jun 2020 14:36:37 -0700
Mark Millard  wrote:

> On 2020-Jun-11, at 13:55, Justin Hibbits 
> wrote:
> 
> > On Wed, 10 Jun 2020 18:56:57 -0700
> > Mark Millard  wrote:
> >   
> >> On 2020-May-13, at 08:56, Justin Hibbits 
> >> wrote: 
> >>> Hi Mark,
> >> 
> >> Hello Justin.  
> > 
> > Hi Mark,  
> 
> Hello again, Justin.
> 
> >> 
> >> I've been avoiding the old PowerMacs and leaving
> >> them at head -r360311 , pending an update that
> >> would avoid the kernel zeroing pages that it
> >> should not zero. But I've seen that you were busy
> >> with more modern contexts this last about a month.
> >> 
> >> And, clearly, my own context has left pending
> >> (for much longer) other more involved activities
> >> (compared to just periodically updating to
> >> more recent FreeBSD vintages).
> >> 
> >> . . .
> >>   
> > 
> > Sorry for the delay, I got sidetracked with a bunch of other
> > development.  
> 
> > I did install a newer FreeBSD on my dual G4 and couldn't
> > see the problem.  
> 
> How did you test?
> 
> In my context it was far easier to see the problem
> with builds that did not use MALLOC_PRODUCTION. In
> other words: jemalloc having its asserts tested.
> 
> The easiest way I found to get the asserts to fail
> was to do (multiple processes (-m) and totaling to
> more than enough to force paging/swapping):
> 
> stress -m 2 --vm-bytes 1700M &
> 
> (Possibly setting up some shells first
> to potentially later exit.)
> 
> Normally stress itself would hit jemalloc
> asserts. Apparently the asserts did not
> stop the code and it ran until a failure
> occurred (via dtv=0x0). I never had to
> manually stop the stress processes.
> 
> If no failures during, then exit shells
> that likely were swapped out or partially
> paged out during the stress run. They
> hit jemalloc asserts during their cleanup
> activity in my testing.

My testing was only with a WITNESS kernel, and wasn't an exhaustive
test, so obviously is not a straight apples-to-apples comparison.
Unfortunately, my backlog of other work got in the way of doing a
meaningful extensive test.

> 
> 
> > That said, the attached patch effectively copies
> > what's done in OEA6464 into OEA pmap.  Can you test it?  
> 
> I'll try it once I get a chance, probably later
> today.
> 
> I gather from what I see that moea64_protect did not
> need the changes that you originally thought might
> be required? I only see moea_protect changes in the
> patch.

The wording was a little ambiguous.  I had meant to convey that I was
looking at mmu_oea64.c for inspiration for what's missing in mmu_oea.c.

> 
> ===
> Mark Millard
> marklmi at yahoo.com
> ( dsl-only.net went
> away in early 2018-Mar)
> 

- Justin
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Re: svn commit: r360233 - in head: contrib/jemalloc . . . : This partially breaks a 2-socket 32-bit powerpc (old PowerMac G4) based on head -r360311

[Justin Hibbits]

On Wed, 10 Jun 2020 18:56:57 -0700
Mark Millard  wrote:

> On 2020-May-13, at 08:56, Justin Hibbits  wrote:
> 
> > Hi Mark,  
> 
> Hello Justin.

Hi Mark,


> 
> > On Wed, 13 May 2020 01:43:23 -0700
> > Mark Millard  wrote:
> >   
> >> [I'm adding a reference to an old arm64/aarch64 bug that had
> >> pages turning to zero, in case this 32-bit powerpc issue is
> >> somewhat analogous.]
> >>   
> >>> . . .  
> > ...  
> >> . . .
> >> 
> >> (Note: dsl-only.net closed down, so the E-mail
> >> address reference is no longer valid.)
> >> 
> >> Author: kib
> >> Date: Mon Apr 10 15:32:26 2017
> >> New Revision: 316679
> >> URL: 
> >> https://svnweb.freebsd.org/changeset/base/316679
> >> 
> >> 
> >> Log:
> >> Do not lose dirty bits for removing PROT_WRITE on arm64.
> >> 
> >> Arm64 pmap interprets accessed writable ptes as modified, since
> >> ARMv8.0 does not track Dirty Bit Modifier in hardware. If writable
> >> bit is removed, page must be marked as dirty for MI VM.
> >> 
> >> This change is most important for COW, where fork caused losing
> >> content of the dirty pages which were not yet scanned by
> >> pagedaemon.
> >> 
> >> Reviewed by:   alc, andrew
> >> Reported and tested by:Mark Millard  >> dsl-only.net> PR:  217138, 217239
> >> Sponsored by:  The FreeBSD Foundation
> >> MFC after: 2 weeks
> >> 
> >> Modified:
> >> head/sys/arm64/arm64/pmap.c
> >> 
> >> Modified: head/sys/arm64/arm64/pmap.c
> >> ==
> >> --- head/sys/arm64/arm64/pmap.cMon Apr 10 12:35:58
> >> 2017   (r316678) +++ head/sys/arm64/arm64/pmap.c   Mon
> >> Apr 10 15:32:26 2017   (r316679) @@ -2481,6 +2481,11 @@
> >> pmap_protect(pmap_t pmap, vm_offset_t sv sva += L3_SIZE) {
> >>l3 = pmap_load(l3p);
> >>if (pmap_l3_valid(l3)) {
> >> +  if ((l3 & ATTR_SW_MANAGED) &&
> >> +  pmap_page_dirty(l3)) {
> >> +
> >> vm_page_dirty(PHYS_TO_VM_PAGE(l3 &
> >> +  ~ATTR_MASK));
> >> +  }
> >>pmap_set(l3p, ATTR_AP(ATTR_AP_RO));
> >>PTE_SYNC(l3p);
> >>/* XXX: Use pmap_invalidate_range
> >> */
> >> 
> >> . . .
> >>   
> > 
> > Thanks for this reference.  I took a quick look at the 3 pmap
> > implementations we have (haven't check the new radix pmap yet), and
> > it looks like only mmu_oea.c (32-bit AIM pmap, for G3 and G4) is
> > missing vm_page_dirty() calls in its pmap_protect() implementation,
> > analogous to the change you posted right above. Given this, I think
> > it's safe to say that this missing piece is necessary.  We'll work
> > on a fix for this; looking at moea64_protect(), there may be
> > additional work needed to support this as well, so it may take a
> > few days.  
> 
> Ping? Any clue when the above might happen?
> 
> I've been avoiding the old PowerMacs and leaving
> them at head -r360311 , pending an update that
> would avoid the kernel zeroing pages that it
> should not zero. But I've seen that you were busy
> with more modern contexts this last about a month.
> 
> And, clearly, my own context has left pending
> (for much longer) other more involved activities
> (compared to just periodically updating to
> more recent FreeBSD vintages).
> 
> ===
> Mark Millard
> marklmi at yahoo.com
> ( dsl-only.net went
> away in early 2018-Mar)
> 

Sorry for the delay, I got sidetracked with a bunch of other
development.  I did install a newer FreeBSD on my dual G4 and couldn't
see the problem.  That said, the attached patch effectively copies
what's done in OEA6464 into OEA pmap.  Can you test it?

- Justin
diff --git a/sys/powerpc/aim/mmu_oea.c b/sys/powerpc/aim/mmu_oea.c
index c5b0b048a41..2f1422b36c4 100644
--- a/sys/powerpc/aim/mmu_oea.c
+++ b/sys/powerpc/aim/mmu_oea.c
@@ -1776,6 +1776,9 @@ moea_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva,
 {
 	struct	pvo_entry *pvo, *tpvo, key;
 	struct	pte *pt;
+	struct	pte old_pte;
+	vm_page_t	m;
+	int32_t	refchg;
 
 	KASSERT(pm == >p_vmspace->vm_pmap || pm == kernel_pmap,
 	("moea_protect: non current pmap"));
@@ -1803,12 +1806,31 @@ moea_protect(pma

svn commit: r362034 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Wed Jun 10 23:03:35 2020
New Revision: 362034
URL: https://svnweb.freebsd.org/changeset/base/362034

Log:
  powerpc/pmap: Fix pte_find_next() iterators for booke64 pmap
  
  After r361988 fixed the reference count leak on booke64, it became possible
  for an iteration somewhere in the middle of a page to become stale, with the
  page vanishing (correctly) due to all PTEs on that page going away.
  pte_find_next() would start at that iterator, and move along 'higher' order
  directory pages until it finds a valid one, without zeroing out the lower
  order pages.  For instance:
  
/* Find next pte at or above 0x10002000. */
pte = pte_find_next(pmap, &(0x10002000));
pte_remove(pmap, pte);
/* This pte was the last reference in the page table page, page is
 * gone.
 */
pte = pte_find_next(pmap, 0x10002000);
/* pte_find_next will see 0x10002000's page is gone, and jump to the
 * next one, but starting iteration at the '0x2000' slot, skipping
 * 0x and 0x1000.
 */
  
  This caused some processes, like git, to trip the KASSERT() in
  pmap_release().
  
  Fix this by zeroing all lower order iterators at each level.

Modified:
  head/sys/powerpc/booke/pmap_64.c

Modified: head/sys/powerpc/booke/pmap_64.c
==
--- head/sys/powerpc/booke/pmap_64.cWed Jun 10 22:30:32 2020
(r362033)
+++ head/sys/powerpc/booke/pmap_64.cWed Jun 10 23:03:35 2020
(r362034)
@@ -220,12 +220,13 @@ pte_find_next(pmap_t pmap, vm_offset_t *pva)
k = PDIR_IDX(va);
l = PTBL_IDX(va);
pm_root = pmap->pm_root;
+
/* truncate the VA for later. */
va &= ~((1UL << (PG_ROOT_H + 1)) - 1);
-   for (; i < PG_ROOT_NENTRIES; i++, j = 0) {
+   for (; i < PG_ROOT_NENTRIES; i++, j = 0, k = 0, l = 0) {
if (pm_root[i] == 0)
continue;
-   for (; j < PDIR_L1_NENTRIES; j++, k = 0) {
+   for (; j < PDIR_L1_NENTRIES; j++, k = 0, l = 0) {
if (pm_root[i][j] == 0)
continue;
for (; k < PDIR_NENTRIES; k++, l = 0) {
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svn commit: r362003 - head/sys/powerpc/powernv

[Justin Hibbits]

Author: jhibbits
Date: Wed Jun 10 04:08:16 2020
New Revision: 362003
URL: https://svnweb.freebsd.org/changeset/base/362003

Log:
  powerpc/powernv: Don't use the vmem quantum cache for OPAL PCI MSI allocations
  
  vmem quantum cache is only needed when doing a lot of concurrent allocations,
  which doesn't happen when allocating MSIs.  This wastes memory for the cache
  zones.  Avoid this waste and don't use the quantum cache.
  
  Reported by:  markj

Modified:
  head/sys/powerpc/powernv/opal_pci.c

Modified: head/sys/powerpc/powernv/opal_pci.c
==
--- head/sys/powerpc/powernv/opal_pci.c Wed Jun 10 04:04:59 2020
(r362002)
+++ head/sys/powerpc/powernv/opal_pci.c Wed Jun 10 04:08:16 2020
(r362003)
@@ -427,7 +427,7 @@ opalpci_attach(device_t dev)
sc->msi_base = msi_ranges[0];
 
sc->msi_vmem = vmem_create("OPAL MSI", msi_ranges[0],
-   msi_ranges[1], 1, 16, M_BESTFIT | M_WAITOK);
+   msi_ranges[1], 1, 0, M_BESTFIT | M_WAITOK);
 
sc->base_msi_irq = powerpc_register_pic(dev,
OF_xref_from_node(node),
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svn commit: r362002 - head/sys/powerpc/mpc85xx

[Justin Hibbits]

Author: jhibbits
Date: Wed Jun 10 04:04:59 2020
New Revision: 362002
URL: https://svnweb.freebsd.org/changeset/base/362002

Log:
  powerpc/mpc85xx: Don't use the quantum cache in vmem for MPIC MSIs
  
  The qcache is unnecessary for this purpose, it's only needed when there are
  lots of concurrent allocations.
  
  Reported by:  markj

Modified:
  head/sys/powerpc/mpc85xx/pci_mpc85xx.c

Modified: head/sys/powerpc/mpc85xx/pci_mpc85xx.c
==
--- head/sys/powerpc/mpc85xx/pci_mpc85xx.c  Wed Jun 10 03:57:10 2020
(r362001)
+++ head/sys/powerpc/mpc85xx/pci_mpc85xx.c  Wed Jun 10 04:04:59 2020
(r362002)
@@ -896,7 +896,7 @@ fsl_msi_attach(device_t dev)
sc = device_get_softc(dev);
 
if (msi_vmem == NULL)
-   msi_vmem = vmem_create("MPIC MSI", 0, 0, 1, 1, M_BESTFIT | 
M_WAITOK);
+   msi_vmem = vmem_create("MPIC MSI", 0, 0, 1, 0, M_BESTFIT | 
M_WAITOK);
 
/* Manually play with resource entries. */
sc->sc_base = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
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svn commit: r361988 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Tue Jun  9 21:59:13 2020
New Revision: 361988
URL: https://svnweb.freebsd.org/changeset/base/361988

Log:
  powerpc/pmap: Fix wired memory leak in booke64 page directories
  
  Properly handle reference counts in the 64-bit pmap page directories.
  Otherwise all page table pages would leak due to over-referencing.  This
  would cause a quick enter to swap on a desktop system (AmigaOne X5000) when
  quitting and rerunning applications, or just building world.
  
  Add an INVARIANTS check to validate no leakage at pmap release time.

Modified:
  head/sys/powerpc/booke/pmap_64.c

Modified: head/sys/powerpc/booke/pmap_64.c
==
--- head/sys/powerpc/booke/pmap_64.cTue Jun  9 21:07:58 2020
(r361987)
+++ head/sys/powerpc/booke/pmap_64.cTue Jun  9 21:59:13 2020
(r361988)
@@ -251,9 +251,7 @@ static bool
 unhold_free_page(pmap_t pmap, vm_page_t m)
 {
 
-   m->ref_count--;
-   if (m->ref_count == 0) {
-   vm_wire_sub(1);
+   if (vm_page_unwire_noq(m)) {
vm_page_free_zero(m);
return (true);
}
@@ -262,8 +260,8 @@ unhold_free_page(pmap_t pmap, vm_page_t m)
 }
 
 static vm_offset_t
-alloc_or_hold_page(pmap_t pmap, vm_offset_t *ptr_tbl, uint32_t index,
-bool nosleep, bool hold, bool *isnew)
+get_pgtbl_page(pmap_t pmap, vm_offset_t *ptr_tbl, uint32_t index,
+bool nosleep, bool hold_parent, bool *isnew)
 {
vm_offset_t page;
vm_page_t   m;
@@ -276,18 +274,18 @@ alloc_or_hold_page(pmap_t pmap, vm_offset_t *ptr_tbl, 
if (ptr_tbl[index] == 0) {
*isnew = true;
ptr_tbl[index] = page;
+   if (hold_parent) {
+   m = 
PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)ptr_tbl));
+   m->ref_count++;
+   }
return (page);
}
m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS(page));
page = ptr_tbl[index];
-   vm_wire_sub(1);
+   vm_page_unwire_noq(m);
vm_page_free_zero(m);
}
 
-   if (hold) {
-   m = PHYS_TO_VM_PAGE(pmap_kextract(page));
-   m->ref_count++;
-   }
*isnew = false;
 
return (page);
@@ -301,19 +299,18 @@ ptbl_alloc(pmap_t pmap, vm_offset_t va, bool nosleep, 
unsigned intpdir_l1_idx = PDIR_L1_IDX(va);
unsigned intpdir_idx = PDIR_IDX(va);
vm_offset_t pdir_l1, pdir, ptbl;
-   boolhold_page;
 
-   hold_page = (pmap != kernel_pmap);
-   pdir_l1 = alloc_or_hold_page(pmap, (vm_offset_t *)pmap->pm_root,
-   pg_root_idx, nosleep, hold_page, is_new);
+   /* When holding a parent, no need to hold the root index pages. */
+   pdir_l1 = get_pgtbl_page(pmap, (vm_offset_t *)pmap->pm_root,
+   pg_root_idx, nosleep, false, is_new);
if (pdir_l1 == 0)
return (NULL);
-   pdir = alloc_or_hold_page(pmap, (vm_offset_t *)pdir_l1, pdir_l1_idx,
-   nosleep, hold_page, is_new);
+   pdir = get_pgtbl_page(pmap, (vm_offset_t *)pdir_l1, pdir_l1_idx,
+   nosleep, !*is_new, is_new);
if (pdir == 0)
return (NULL);
-   ptbl = alloc_or_hold_page(pmap, (vm_offset_t *)pdir, pdir_idx,
-   nosleep, false, is_new);
+   ptbl = get_pgtbl_page(pmap, (vm_offset_t *)pdir, pdir_idx,
+   nosleep, !*is_new, is_new);
 
return ((pte_t *)ptbl);
 }
@@ -629,6 +626,15 @@ mmu_booke_release(pmap_t pmap)
KASSERT(pmap->pm_stats.resident_count == 0,
("pmap_release: pmap resident count %ld != 0",
pmap->pm_stats.resident_count));
+#ifdef INVARIANTS
+   /*
+* Verify that all page directories are gone.
+* Protects against reference count leakage.
+*/
+   for (int i = 0; i < PG_ROOT_NENTRIES; i++)
+   KASSERT(pmap->pm_root[i] == 0,
+   ("Index %d on root page %p is non-zero!\n", i, 
pmap->pm_root));
+#endif
uma_zfree(ptbl_root_zone, pmap->pm_root);
 }
 
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svn commit: r361901 - head/sys/powerpc/powernv

[Justin Hibbits]

Author: jhibbits
Date: Mon Jun  8 02:28:00 2020
New Revision: 361901
URL: https://svnweb.freebsd.org/changeset/base/361901

Log:
  powerpc/powernv: Don't configure disabled CPUs
  
  If the POWER firmware detects a bad CPU core, it will "GUARD" it out,
  marking it disabled.  Any attempt to spin up a bad CPU will trigger a panic
  later on when waiting for threads on said core to wake up.  Support limping
  along on fewer cores instead.

Modified:
  head/sys/powerpc/powernv/platform_powernv.c

Modified: head/sys/powerpc/powernv/platform_powernv.c
==
--- head/sys/powerpc/powernv/platform_powernv.c Mon Jun  8 00:46:19 2020
(r361900)
+++ head/sys/powerpc/powernv/platform_powernv.c Mon Jun  8 02:28:00 2020
(r361901)
@@ -49,6 +49,8 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -332,6 +334,8 @@ powernv_cpuref_init(void)
for (cpu = OF_child(dev); cpu != 0; cpu = OF_peer(cpu)) {
res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
if (res > 0 && strcmp(buf, "cpu") == 0) {
+   if (!ofw_bus_node_status_okay(cpu))
+   continue;
res = OF_getproplen(cpu, "ibm,ppc-interrupt-server#s");
if (res > 0) {
OF_getencprop(cpu, "ibm,ppc-interrupt-server#s",
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svn commit: r361874 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Sat Jun  6 18:56:40 2020
New Revision: 361874
URL: https://svnweb.freebsd.org/changeset/base/361874

Log:
  powerpc: Fix nits in copyinout comments from r361861
  
  Also, remove useless nested #ifdefs in the IFUNC block.
  
  Reported by:  bdragon@

Modified:
  head/sys/powerpc/powerpc/copyinout.c

Modified: head/sys/powerpc/powerpc/copyinout.c
==
--- head/sys/powerpc/powerpc/copyinout.cSat Jun  6 18:43:08 2020
(r361873)
+++ head/sys/powerpc/powerpc/copyinout.cSat Jun  6 18:56:40 2020
(r361874)
@@ -75,7 +75,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 /*
- * On powerpc64 (AIM only) the copy functions are IFUNcs, selecting the best
+ * On powerpc64 (AIM only) the copy functions are IFUNCs, selecting the best
  * option based on the PMAP in use.
  *
  * There are two options for copy functions on powerpc64:
@@ -85,10 +85,10 @@ __FBSDID("$FreeBSD$");
  *   remapping user segments into kernel.  This is used by the 'radix' pmap for
  *   performance.
  *
- * Book-E does not use the C functions, opting instead to use the 'direct'
- * copies, directly, avoiding the IFUNC overhead.
+ * Book-E does not use the C 'remap' functions, opting instead to use the
+ * 'direct' copies, directly, avoiding the IFUNC overhead.
  *
- * On 32-bit AIM these functions are direct, not IFUNCs, for performance.
+ * On 32-bit AIM these functions bypass the IFUNC machinery for performance.
  */
 #ifdef __powerpc64__
 int subyte_remap(volatile void *addr, int byte);
@@ -125,8 +125,8 @@ int casueword_direct(volatile u_long *addr, u_long old
u_long new);
 
 /*
- * The IFUNC resolver determines the copy based on if the PMAP implementation
- * includes a pmap_map_user_ptr function.
+ * The IFUNC resolver determines the copy based on whether the PMAP
+ * implementation includes a pmap_map_user_ptr function.
  */
 #define DEFINE_COPY_FUNC(ret, func, args)  \
DEFINE_IFUNC(, ret, func, args) \
@@ -140,15 +140,11 @@ DEFINE_COPY_FUNC(int, copyin, (const void *, void *, s
 DEFINE_COPY_FUNC(int, copyout, (const void *, void *, size_t))
 DEFINE_COPY_FUNC(int, suword, (volatile void *, long))
 DEFINE_COPY_FUNC(int, suword32, (volatile void *, int))
-#ifdef __powerpc64__
 DEFINE_COPY_FUNC(int, suword64, (volatile void *, int64_t))
-#endif
 DEFINE_COPY_FUNC(int, fubyte, (volatile const void *))
 DEFINE_COPY_FUNC(int, fuword16, (volatile const void *))
 DEFINE_COPY_FUNC(int, fueword32, (volatile const void *, int32_t *))
-#ifdef __powerpc64__
 DEFINE_COPY_FUNC(int, fueword64, (volatile const void *, int64_t *))
-#endif
 DEFINE_COPY_FUNC(int, fueword, (volatile const void *, long *))
 DEFINE_COPY_FUNC(int, casueword32,
 (volatile uint32_t *, uint32_t, uint32_t *, uint32_t))
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svn commit: r361861 - in head/sys: conf powerpc/aim powerpc/booke powerpc/include powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Sat Jun  6 03:09:12 2020
New Revision: 361861
URL: https://svnweb.freebsd.org/changeset/base/361861

Log:
  powerpc: Use IFUNCs for copyin/copyout/etc
  
  Summary:
  Radix on AIM, and all of Book-E (currently), can do direct addressing of
  user space, instead of needing to map user addresses into kernel space.
  Take advantage of this to optimize the copy(9) functions for this
  behavior, and avoid effectively NOP translations.
  
  Test Plan: Tested on powerpcspe, powerpc64/booke, powerpc64/AIM
  
  Reviewed by:  bdragon
  Differential Revision:https://reviews.freebsd.org/D25129

Added:
  head/sys/powerpc/powerpc/support.S   (contents, props changed)
Modified:
  head/sys/conf/files.powerpc
  head/sys/powerpc/aim/mmu_radix.c
  head/sys/powerpc/booke/pmap.c
  head/sys/powerpc/include/asm.h
  head/sys/powerpc/include/mmuvar.h
  head/sys/powerpc/include/param.h
  head/sys/powerpc/powerpc/copyinout.c
  head/sys/powerpc/powerpc/pmap_dispatch.c
  head/sys/powerpc/powerpc/trap.c

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Sat Jun  6 02:45:57 2020(r361860)
+++ head/sys/conf/files.powerpc Sat Jun  6 03:09:12 2020(r361861)
@@ -239,7 +239,7 @@ powerpc/powerpc/autoconf.c  standard
 powerpc/powerpc/bus_machdep.c  standard
 powerpc/powerpc/busdma_machdep.c standard
 powerpc/powerpc/clock.cstandard
-powerpc/powerpc/copyinout.cstandard
+powerpc/powerpc/copyinout.coptionalaim
 powerpc/powerpc/cpu.c  standard
 powerpc/powerpc/cpu_subr64.S   optionalpowerpc64
 powerpc/powerpc/db_disasm.coptionalddb
@@ -274,6 +274,7 @@ powerpc/powerpc/sigcode64.S optionalpowerpc64
 powerpc/powerpc/swtch32.S  optionalpowerpc | powerpcspe
 powerpc/powerpc/swtch64.S  optionalpowerpc64
 powerpc/powerpc/stack_machdep.coptionalddb | stack
+powerpc/powerpc/support.S  optionalpowerpc64 | booke
 powerpc/powerpc/syncicache.c   standard
 powerpc/powerpc/sys_machdep.c  standard
 powerpc/powerpc/trap.c standard

Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cSat Jun  6 02:45:57 2020
(r361860)
+++ head/sys/powerpc/aim/mmu_radix.cSat Jun  6 03:09:12 2020
(r361861)
@@ -412,8 +412,6 @@ void mmu_radix_align_superpage(vm_object_t, vm_ooffset
 vm_size_t);
 void mmu_radix_clear_modify(vm_page_t);
 void mmu_radix_copy(pmap_t, pmap_t, vm_offset_t, vm_size_t, vm_offset_t);
-int mmu_radix_map_user_ptr(pmap_t pm,
-volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen);
 int mmu_radix_decode_kernel_ptr(vm_offset_t, int *, vm_offset_t *);
 int mmu_radix_enter(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int, int8_t);
 void mmu_radix_enter_object(pmap_t, vm_offset_t, vm_offset_t, vm_page_t,
@@ -538,7 +536,6 @@ static struct pmap_funcs mmu_radix_methods = {
.kextract = mmu_radix_kextract,
.kremove = mmu_radix_kremove,
.change_attr = mmu_radix_change_attr,
-   .map_user_ptr = mmu_radix_map_user_ptr,
.decode_kernel_ptr =  mmu_radix_decode_kernel_ptr,
 
.tlbie_all = mmu_radix_tlbie_all,
@@ -5996,20 +5993,6 @@ mmu_radix_kremove(vm_offset_t va)
 
pte = kvtopte(va);
pte_clear(pte);
-}
-
-int mmu_radix_map_user_ptr(pmap_t pm,
-volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen)
-{
-   if ((uintptr_t)uaddr + ulen >= VM_MAXUSER_ADDRESS ||
-   (uintptr_t)uaddr + ulen < (uintptr_t)uaddr)
-   return (EFAULT);
-
-   *kaddr = (void *)(uintptr_t)uaddr;
-   if (klen)
-   *klen = ulen;
-
-   return (0);
 }
 
 int

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Sat Jun  6 02:45:57 2020
(r361860)
+++ head/sys/powerpc/booke/pmap.c   Sat Jun  6 03:09:12 2020
(r361861)
@@ -349,8 +349,6 @@ static vm_offset_t  mmu_booke_quick_enter_page(vm_page_
 static voidmmu_booke_quick_remove_page(vm_offset_t addr);
 static int mmu_booke_change_attr(vm_offset_t addr,
 vm_size_t sz, vm_memattr_t mode);
-static int mmu_booke_map_user_ptr(pmap_t pm,
-volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen);
 static int mmu_booke_decode_kernel_ptr(vm_offset_t addr,
 int *is_user, vm_offset_t *decoded_addr);
 static voidmmu_booke_page_array_startup(long);
@@ -410,7 +408,6 @@ static struct pmap_funcs mmu_booke_methods = {
.kremove = mmu_booke_kremove,
.unmapdev = mmu_booke_unmapdev,
.change_attr = mmu_booke_change_attr,
-   .map_user_ptr = mmu_booke_map_user_ptr,
.decode_kernel_ptr =  

svn commit: r361859 - in head/sys/powerpc: aim include powerpc

[Justin Hibbits]

Author: jhibbits
Date: Sat Jun  6 02:40:52 2020
New Revision: 361859
URL: https://svnweb.freebsd.org/changeset/base/361859

Log:
  powerpc: Add a (CPU/runtime features) flags set to pcpu struct
  
  Summary:
  The point of this addition is to cache CPU behavior 'features', to avoid
  having to recompute based on CPU, etc.
  
  The first such use case is to avoid the unnecessary manipulation of the
  SLBs (Segment Lookaside Buffers) when using the Radix pmap on POWER9.
  Since we already get the PCPU pointer wherever we swap the SLB entries,
  we can use a cached flag to check if it's necessary to perform the
  operation anyway, and skip it when not.
  
  Reviewed by:  bdragon
  Differential Revision:https://reviews.freebsd.org/D24908

Modified:
  head/sys/powerpc/aim/mmu_radix.c
  head/sys/powerpc/aim/trap_subr64.S
  head/sys/powerpc/include/pcpu.h
  head/sys/powerpc/powerpc/db_interface.c
  head/sys/powerpc/powerpc/genassym.c
  head/sys/powerpc/powerpc/mp_machdep.c

Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cSat Jun  6 02:28:21 2020
(r361858)
+++ head/sys/powerpc/aim/mmu_radix.cSat Jun  6 02:40:52 2020
(r361859)
@@ -2327,6 +2327,7 @@ mmu_radix_bootstrap(vm_offset_t start, vm_offset_t end
printf("%s done\n", __func__);
pmap_bootstrapped = 1;
dmaplimit = roundup2(powerpc_ptob(Maxmem), L2_PAGE_SIZE);
+   PCPU_SET(flags, PCPU_GET(flags) | PC_FLAG_NOSRS);
 }
 
 static void

Modified: head/sys/powerpc/aim/trap_subr64.S
==
--- head/sys/powerpc/aim/trap_subr64.S  Sat Jun  6 02:28:21 2020
(r361858)
+++ head/sys/powerpc/aim/trap_subr64.S  Sat Jun  6 02:40:52 2020
(r361859)
@@ -87,6 +87,9 @@ restore_usersrs:
  */
 restore_kernsrs:
GET_CPUINFO(%r28)
+   lwz %r29, PC_FLAGS(%r28)
+   mtcr%r29
+   btlr0
addi%r28,%r28,PC_KERNSLB
ld  %r29,16(%r28)   /* One past USER_SLB_SLOT */
cmpdi   %r29,0
@@ -270,9 +273,13 @@ restore_kernsrs:
std %r29,(savearea+CPUSAVE_R29)(%r3);   \
std %r30,(savearea+CPUSAVE_R30)(%r3);   \
std %r31,(savearea+CPUSAVE_R31)(%r3);   \
+   lwz %r28,PC_FLAGS(%r3); \
+   mtcr%r28;   \
+   bt  0, 0f;  /* Check to skip restoring SRs. */  \
mflr%r27;   /* preserve LR */   \
bl  restore_usersrs;/* uses r28-r31 */  \
mtlr%r27;   \
+0: \
ld  %r31,(savearea+CPUSAVE_R31)(%r3);   \
ld  %r30,(savearea+CPUSAVE_R30)(%r3);   \
ld  %r29,(savearea+CPUSAVE_R29)(%r3);   \

Modified: head/sys/powerpc/include/pcpu.h
==
--- head/sys/powerpc/include/pcpu.h Sat Jun  6 02:28:21 2020
(r361858)
+++ head/sys/powerpc/include/pcpu.h Sat Jun  6 02:40:52 2020
(r361859)
@@ -50,6 +50,7 @@ struct pvo_entry;
int pc_bsp; \
volatile intpc_awake;   \
uint32_tpc_ipimask; \
+   uint32_tpc_flags;   /* cpu feature flags */ \
register_t  pc_tempsave[CPUSAVE_LEN];   \
register_t  pc_disisave[CPUSAVE_LEN];   \
register_t  pc_dbsave[CPUSAVE_LEN]; \
@@ -76,6 +77,9 @@ struct pvo_entry;
 #else
 #define PCPU_MD_AIM_FIELDS PCPU_MD_AIM32_FIELDS
 #endif
+
+/* CPU feature flags, can be used for cached flow control. */
+#definePC_FLAG_NOSRS   0x8000
 
 #defineBOOKE_CRITSAVE_LEN  (CPUSAVE_LEN + 2)
 #defineBOOKE_TLB_MAXNEST   4

Modified: head/sys/powerpc/powerpc/db_interface.c
==
--- head/sys/powerpc/powerpc/db_interface.c Sat Jun  6 02:28:21 2020
(r361858)
+++ head/sys/powerpc/powerpc/db_interface.c Sat Jun  6 02:40:52 2020
(r361859)
@@ -91,4 +91,5 @@ db_show_mdpcpu(struct pcpu *pc)
 
db_printf("PPC: hwref   = %#zx\n", pc->pc_hwref);
db_printf("PPC: ipimask = %#x\n", pc->pc_ipimask);
+   db_printf("PPC: flags   = %#x\n", pc->pc_flags);
 }

Modified: head/sys/powerpc/powerpc/genassym.c
==
--- 

svn commit: r361615 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Fri May 29 00:46:31 2020
New Revision: 361615
URL: https://svnweb.freebsd.org/changeset/base/361615

Log:
  powerpc: Stop advertising that POWER8 and POWER9 support HTM
  
  HTM is on the chopping block, doesn't work on FreeBSD, and has only token
  support in PowerISA 3.1 and POWER10.  Don't advertise something we'll never
  support.

Modified:
  head/sys/powerpc/powerpc/cpu.c

Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c  Fri May 29 00:10:19 2020
(r361614)
+++ head/sys/powerpc/powerpc/cpu.c  Fri May 29 00:46:31 2020
(r361615)
@@ -170,30 +170,26 @@ static const struct cputab models[] = {
   PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
   PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
   PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
-  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR | 
-  PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
-  PPC_FEATURE2_HTM_NOSC, cpu_powerx_setup },
+  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_ISEL |
+  PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO, cpu_powerx_setup },
 { "IBM POWER8NVL", IBMPOWER8NVL,   REVFMT_MAJMIN,
   PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
   PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
   PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
-  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR | 
-  PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
-  PPC_FEATURE2_HTM_NOSC, cpu_powerx_setup },
+  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_ISEL |
+  PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO, cpu_powerx_setup },
 { "IBM POWER8",IBMPOWER8,  REVFMT_MAJMIN,
   PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
   PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
   PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
-  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR | 
-  PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
-  PPC_FEATURE2_HTM_NOSC, cpu_powerx_setup },
+  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_ISEL |
+  PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO, cpu_powerx_setup },
 { "IBM POWER9",IBMPOWER9,  REVFMT_MAJMIN,
   PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
   PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 |
   PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE,
-  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR |
-  PPC_FEATURE2_EBB | PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR |
-  PPC_FEATURE2_HAS_VEC_CRYPTO | PPC_FEATURE2_HTM_NOSC |
+  PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_EBB |
+  PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO | 
   PPC_FEATURE2_ARCH_3_00 | PPC_FEATURE2_HAS_IEEE128 |
   PPC_FEATURE2_DARN, cpu_powerx_setup },
 { "Motorola PowerPC 7400", MPC7400,REVFMT_MAJMIN,
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svn commit: r361570 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Thu May 28 03:08:50 2020
New Revision: 361570
URL: https://svnweb.freebsd.org/changeset/base/361570

Log:
  powerpc/pmap: Remove some debug from r361544

Modified:
  head/sys/powerpc/powerpc/pmap_dispatch.c

Modified: head/sys/powerpc/powerpc/pmap_dispatch.c
==
--- head/sys/powerpc/powerpc/pmap_dispatch.cThu May 28 01:53:35 2020
(r361569)
+++ head/sys/powerpc/powerpc/pmap_dispatch.cThu May 28 03:08:50 2020
(r361570)
@@ -205,19 +205,15 @@ pmap_mmu_install(char *name, int prio)
mmu_t   *mmupp, mmup;
static int  curr_prio = 0;
 
-   printf("Trying to install pmap %s\n", name);
-
/*
 * Try and locate the MMU kobj corresponding to the name
 */
SET_FOREACH(mmupp, mmu_set) {
mmup = *mmupp;
 
-   printf("Checking %s(%p)\n", mmup->name, mmup->name);
if (mmup->name &&
!strcmp(mmup->name, name) &&
(prio >= curr_prio || mmu_obj == NULL)) {
-   printf("match found: %p\n", mmup);
curr_prio = prio;
mmu_obj = mmup;
return (TRUE);
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Re: svn commit: r361568 - head/sys/powerpc/aim

[Justin Hibbits]

On Thu, 28 May 2020 00:49:03 + (UTC)
Brandon Bergren  wrote:

> Author: bdragon
> Date: Thu May 28 00:49:02 2020
> New Revision: 361568
> URL: https://svnweb.freebsd.org/changeset/base/361568
> 
> Log:
>   [PowerPC] Fix radix crash when passing -1 from userspace
>   
>   Found by running libc tests with radix enabled.
>   
>   Detect unsigned integer wrapping with a postcondition.
>   
>   Note: Radix MMU is not enabled by default yet.
>   
>   Sponsored by:   Tag1 Consulting, Inc.
> 
> Modified:
>   head/sys/powerpc/aim/mmu_radix.c
> 
> Modified: head/sys/powerpc/aim/mmu_radix.c
> ==
> --- head/sys/powerpc/aim/mmu_radix.c  Wed May 27 23:20:35
> 2020  (r361567) +++ head/sys/powerpc/aim/mmu_radix.c  Thu
> May 28 00:49:02 2020  (r361568) @@ -6000,7 +6000,8 @@
> mmu_radix_kremove(vm_offset_t va) int mmu_radix_map_user_ptr(pmap_t
> pm, volatile const void *uaddr, void **kaddr, size_t ulen, size_t
> *klen) {
> - if ((uintptr_t)uaddr + ulen >= VM_MAXUSER_ADDRESS)
> + if ((uintptr_t)uaddr + ulen >= VM_MAXUSER_ADDRESS ||
> + (uintptr_t)uaddr + ulen < (uintptr_t)uaddr)
>   return (EFAULT);
>  
>   *kaddr = (void *)(uintptr_t)uaddr;

Wouldn't

if ((uintptr_t)uaddr >= VM_MAXUSER_ADDRESS ||
(uintptr_t)uaddr + ulen >= VM_MAXUSER_ADDRESS)

be more appropriate?

- Justin
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Re: svn commit: r361544 - in head/sys: conf powerpc/aim powerpc/booke powerpc/include powerpc/powerpc powerpc/ps3 powerpc/pseries

[Justin Hibbits]

On Tue, May 26, 2020, 20:24 Justin Hibbits  wrote:

> Author: jhibbits
> Date: Wed May 27 01:24:12 2020
> New Revision: 361544
> URL: https://svnweb.freebsd.org/changeset/base/361544
>
> Log:
>   powerpc/mmu: Convert PowerPC pmap drivers to ifunc from kobj
>
>   With IFUNC support in the kernel, we can finally get rid of our
> poor-man's
>   ifunc for pmap, utilizing kobj.  Since moea64 uses a second tier kobj as
>   well, for its own private methods, this adds a second pmap install
> function
>   (pmap_mmu_init()) to perform pmap 'post-install pre-bootstrap'
>   initialization, before the IFUNCs get initialized.
>
>   Reviewed by:  bdragon


Differential revision: https://reviews.freebsd.org/D24993

>
>
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svn commit: r361545 - head/sys/vm

[Justin Hibbits]

Author: jhibbits
Date: Wed May 27 01:35:46 2020
New Revision: 361545
URL: https://svnweb.freebsd.org/changeset/base/361545

Log:
  Properly sort ifdef archs in vm_fault_soft_fast superpage guards.
  
  Sort broken in r360887.

Modified:
  head/sys/vm/vm_fault.c

Modified: head/sys/vm/vm_fault.c
==
--- head/sys/vm/vm_fault.c  Wed May 27 01:24:12 2020(r361544)
+++ head/sys/vm/vm_fault.c  Wed May 27 01:35:46 2020(r361545)
@@ -299,9 +299,9 @@ static int
 vm_fault_soft_fast(struct faultstate *fs)
 {
vm_page_t m, m_map;
-#if (defined(__aarch64__) || defined(__amd64__) || defined(__powerpc64__) || 
(defined(__arm__) && \
-__ARM_ARCH >= 6) || defined(__i386__) || defined(__riscv)) && \
-VM_NRESERVLEVEL > 0
+#if (defined(__aarch64__) || defined(__amd64__) || (defined(__arm__) && \
+__ARM_ARCH >= 6) || defined(__i386__) || defined(__powerpc64__) || \
+defined(__riscv)) && VM_NRESERVLEVEL > 0
vm_page_t m_super;
int flags;
 #endif
@@ -320,9 +320,9 @@ vm_fault_soft_fast(struct faultstate *fs)
}
m_map = m;
psind = 0;
-#if (defined(__aarch64__) || defined(__amd64__) || defined(__powerpc64__) || 
(defined(__arm__) && \
-__ARM_ARCH >= 6) || defined(__i386__) || defined(__riscv)) && \
-VM_NRESERVLEVEL > 0
+#if (defined(__aarch64__) || defined(__amd64__) || (defined(__arm__) && \
+__ARM_ARCH >= 6) || defined(__i386__) || defined(__powerpc64__) || \
+defined(__riscv)) && VM_NRESERVLEVEL > 0
if ((m->flags & PG_FICTITIOUS) == 0 &&
(m_super = vm_reserv_to_superpage(m)) != NULL &&
rounddown2(vaddr, pagesizes[m_super->psind]) >= fs->entry->start &&
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svn commit: r361544 - in head/sys: conf powerpc/aim powerpc/booke powerpc/include powerpc/powerpc powerpc/ps3 powerpc/pseries

[Justin Hibbits]

Author: jhibbits
Date: Wed May 27 01:24:12 2020
New Revision: 361544
URL: https://svnweb.freebsd.org/changeset/base/361544

Log:
  powerpc/mmu: Convert PowerPC pmap drivers to ifunc from kobj
  
  With IFUNC support in the kernel, we can finally get rid of our poor-man's
  ifunc for pmap, utilizing kobj.  Since moea64 uses a second tier kobj as
  well, for its own private methods, this adds a second pmap install function
  (pmap_mmu_init()) to perform pmap 'post-install pre-bootstrap'
  initialization, before the IFUNCs get initialized.
  
  Reviewed by:  bdragon

Deleted:
  head/sys/powerpc/aim/moea64_if.m
  head/sys/powerpc/powerpc/mmu_if.m
Modified:
  head/sys/conf/files.powerpc
  head/sys/powerpc/aim/mmu_oea.c
  head/sys/powerpc/aim/mmu_oea64.c
  head/sys/powerpc/aim/mmu_oea64.h
  head/sys/powerpc/aim/mmu_radix.c
  head/sys/powerpc/aim/moea64_native.c
  head/sys/powerpc/booke/booke_machdep.c
  head/sys/powerpc/booke/pmap.c
  head/sys/powerpc/booke/pmap_32.c
  head/sys/powerpc/booke/pmap_64.c
  head/sys/powerpc/include/mmuvar.h
  head/sys/powerpc/include/pmap.h
  head/sys/powerpc/powerpc/machdep.c
  head/sys/powerpc/powerpc/pmap_dispatch.c
  head/sys/powerpc/ps3/mmu_ps3.c
  head/sys/powerpc/pseries/mmu_phyp.c

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Wed May 27 01:04:03 2020(r361543)
+++ head/sys/conf/files.powerpc Wed May 27 01:24:12 2020(r361544)
@@ -135,7 +135,6 @@ powerpc/aim/aim_machdep.c   optionalaim
 powerpc/aim/mmu_oea.c  optionalaim powerpc
 powerpc/aim/mmu_oea64.coptionalaim
 powerpc/aim/mmu_radix.coptionalaim powerpc64
-powerpc/aim/moea64_if.moptionalaim
 powerpc/aim/moea64_native.coptionalaim
 powerpc/aim/mp_cpudep.coptionalaim
 powerpc/aim/slb.c  optionalaim powerpc64
@@ -260,7 +259,6 @@ powerpc/powerpc/iommu_if.m  standard
 powerpc/powerpc/machdep.c  standard
 powerpc/powerpc/mem.c  optionalmem
 powerpc/powerpc/minidump_machdep.c optionalpowerpc64
-powerpc/powerpc/mmu_if.m   standard
 powerpc/powerpc/mp_machdep.c   optionalsmp
 powerpc/powerpc/nexus.cstandard
 powerpc/powerpc/openpic.c  standard

Modified: head/sys/powerpc/aim/mmu_oea.c
==
--- head/sys/powerpc/aim/mmu_oea.c  Wed May 27 01:04:03 2020
(r361543)
+++ head/sys/powerpc/aim/mmu_oea.c  Wed May 27 01:24:12 2020
(r361544)
@@ -149,8 +149,6 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#include "mmu_if.h"
-
 #defineMOEA_DEBUG
 
 #define TODO   panic("%s: not implemented", __func__);
@@ -267,125 +265,123 @@ static int  moea_enter_locked(pmap_t, 
vm_offset_t, vm_
 static voidmoea_syncicache(vm_paddr_t, vm_size_t);
 static boolean_t   moea_query_bit(vm_page_t, int);
 static u_int   moea_clear_bit(vm_page_t, int);
-static voidmoea_kremove(mmu_t, vm_offset_t);
+static voidmoea_kremove(vm_offset_t);
 intmoea_pte_spill(vm_offset_t);
 
 /*
  * Kernel MMU interface
  */
-void moea_clear_modify(mmu_t, vm_page_t);
-void moea_copy_page(mmu_t, vm_page_t, vm_page_t);
-void moea_copy_pages(mmu_t mmu, vm_page_t *ma, vm_offset_t a_offset,
+void moea_clear_modify(vm_page_t);
+void moea_copy_page(vm_page_t, vm_page_t);
+void moea_copy_pages(vm_page_t *ma, vm_offset_t a_offset,
 vm_page_t *mb, vm_offset_t b_offset, int xfersize);
-int moea_enter(mmu_t, pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int,
+int moea_enter(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int,
 int8_t);
-void moea_enter_object(mmu_t, pmap_t, vm_offset_t, vm_offset_t, vm_page_t,
+void moea_enter_object(pmap_t, vm_offset_t, vm_offset_t, vm_page_t,
 vm_prot_t);
-void moea_enter_quick(mmu_t, pmap_t, vm_offset_t, vm_page_t, vm_prot_t);
-vm_paddr_t moea_extract(mmu_t, pmap_t, vm_offset_t);
-vm_page_t moea_extract_and_hold(mmu_t, pmap_t, vm_offset_t, vm_prot_t);
-void moea_init(mmu_t);
-boolean_t moea_is_modified(mmu_t, vm_page_t);
-boolean_t moea_is_prefaultable(mmu_t, pmap_t, vm_offset_t);
-boolean_t moea_is_referenced(mmu_t, vm_page_t);
-int moea_ts_referenced(mmu_t, vm_page_t);
-vm_offset_t moea_map(mmu_t, vm_offset_t *, vm_paddr_t, vm_paddr_t, int);
-boolean_t moea_page_exists_quick(mmu_t, pmap_t, vm_page_t);
-void moea_page_init(mmu_t, vm_page_t);
-int moea_page_wired_mappings(mmu_t, vm_page_t);
-void moea_pinit(mmu_t, pmap_t);
-void moea_pinit0(mmu_t, pmap_t);
-void moea_protect(mmu_t, pmap_t, vm_offset_t, vm_offset_t, vm_prot_t);
-void moea_qenter(mmu_t, vm_offset_t, vm_page_t *, int);
-void moea_qremove(mmu_t, vm_offset_t, int);
-void moea_release(mmu_t, pmap_t);
-void moea_remove(mmu_t, pmap_t, vm_offset_t, vm_offset_t);
-void moea_remove_all(mmu_t, 

svn commit: r361494 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Tue May 26 03:58:19 2020
New Revision: 361494
URL: https://svnweb.freebsd.org/changeset/base/361494

Log:
  powerpc/booke pmap: Fix iteration for 64-bit kernel page table creation
  
  Kernel page tables actually start at index 4096, given kernel base address
  of 0xc008, not index 0, which would yield 0xc000.
  Fix this by indexing at the real base, instead of the assumed base.

Modified:
  head/sys/powerpc/booke/pmap_64.c

Modified: head/sys/powerpc/booke/pmap_64.c
==
--- head/sys/powerpc/booke/pmap_64.cTue May 26 02:27:10 2020
(r361493)
+++ head/sys/powerpc/booke/pmap_64.cTue May 26 03:58:19 2020
(r361494)
@@ -553,7 +553,8 @@ kernel_pte_alloc(vm_offset_t data_end, vm_offset_t add
}
 
va = VM_MIN_KERNEL_ADDRESS;
-   for (i = 0; i < pdir_l1s; i++, l1_va += PAGE_SIZE) {
+   for (i = PG_ROOT_IDX(va); i < PG_ROOT_IDX(va) + pdir_l1s;
+   i++, l1_va += PAGE_SIZE) {
kernel_pmap->pm_root[i] = (pte_t ***)l1_va;
for (j = 0;
j < PDIR_L1_NENTRIES && va < VM_MAX_KERNEL_ADDRESS;
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Re: svn commit: r361460 - in head/sys: arm64/conf arm64/qoriq conf

[Justin Hibbits]

Hi Marcin,

On Mon, 25 May 2020 14:55:37 + (UTC)
Marcin Wojtas  wrote:

> Author: mw
> Date: Mon May 25 14:55:37 2020
> New Revision: 361460
> URL: https://svnweb.freebsd.org/changeset/base/361460
> 
> Log:
>   Add GPIO support for QorIQ boards.
>   
>   This patch adds a GPIO controller support targeted for NXP LS1046A
>   SoC. The driver implements the following features:
>* setting direction of each pin (IN or OUT)
>* setting the mode of output pins (PUSHPULL or OPENDRAIN)
>* setting the state of each output pin (1 or 0)
>* reading the state of each input pin (1 or 0)
>   
>   Submitted by: Kamil Koczurek 
> Dawid Gorecki 
>   Reviewed by: manu
>   Obtained from: Semihalf
>   Sponsored by: Alstom Group
>   Differential Revision: https://reviews.freebsd.org/D24353
> 
> Added:
>   head/sys/arm64/qoriq/ls1046_gpio.c   (contents, props changed)
> Modified:
>   head/sys/arm64/conf/GENERIC
>   head/sys/conf/files.arm64
> 
> Modified: head/sys/arm64/conf/GENERIC
> ==
> --- head/sys/arm64/conf/GENERIC   Mon May 25 14:45:18
> 2020  (r361459) +++ head/sys/arm64/conf/GENERIC   Mon May
> 25 14:55:37 2020  (r361460) @@ -248,6 +248,7 @@ device
>   gpio device gpioled
>  device   fdt_pinctrl
>  device   gpioregulator
> +device   ls1046_gpio # LS1046A GPIO controller
>  device   mv_gpio # Marvell GPIO
> controller device mvebu_pinctrl   # Marvell
> Pinmux Controller device  rk_gpio #
> RockChip GPIO Controller
> 
> Added: head/sys/arm64/qoriq/ls1046_gpio.c
> ==
> --- /dev/null 00:00:00 1970   (empty, because file is
> newly added) +++ head/sys/arm64/qoriq/ls1046_gpio.c   Mon May 25
> 14:55:37 2020 (r361460) @@ -0,0 +1,586 @@
> +/*-
> + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
> + *
> + * Copyright (c) 2020 Alstom Group.
> + * Copyright (c) 2020 Semihalf.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + *notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above
> copyright
> + *notice, this list of conditions and the following disclaimer
> in the
> + *documentation and/or other materials provided with the
> distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS
> IS'' AND
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
> THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
> PARTICULAR PURPOSE
> + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
> LIABLE
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
> GOODS
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> INTERRUPTION)
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> CONTRACT, STRICT
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
> ANY WAY
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> POSSIBILITY OF
> + * SUCH DAMAGE.
> + */
> +
> +#include 
> +__FBSDID("$FreeBSD$");
> +
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +#include "gpio_if.h"
> +
> +/* constants */
> +enum {
> + DIRECTION  = 0x0,
> + OPEN_DRAIN = 0x4,
> + DATA   = 0x8,
> + INT_EV = 0xC,
> + INT_MASK   = 0x10,
> + INT_CTRL   = 0x14
> +};

This looks a lot like the GPIO module whose driver is in
sys/powerpc/mpc85xx/qoriq_gpio.c.  Is there any difference in hardware?
 If not, can you merge this driver with that, if there's anything to
 merge, to reduce duplication?

- Justin
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svn commit: r361317 - in head/sys/powerpc: aim include powerpc

[Justin Hibbits]

Author: jhibbits
Date: Thu May 21 03:33:20 2020
New Revision: 361317
URL: https://svnweb.freebsd.org/changeset/base/361317

Log:
  powerpc: Handle machine checks caused by D-ERAT multihit
  
  Instead of crashing the user process when a D-ERAT multihit is detected, try
  to flush the ERAT, and continue.  This machine check indicates a likely PMAP
  invalidation shortcoming that will need to be addressed, but it's
  recoverable, so just recover.  The recovery is pmap-specific to flush the
  ERAT, so add a pmap function to do so, currently only implemented by the
  POWER9 radix pmap.

Modified:
  head/sys/powerpc/aim/aim_machdep.c
  head/sys/powerpc/aim/mmu_radix.c
  head/sys/powerpc/include/pmap.h
  head/sys/powerpc/powerpc/mmu_if.m
  head/sys/powerpc/powerpc/pmap_dispatch.c

Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c  Thu May 21 02:10:45 2020
(r361316)
+++ head/sys/powerpc/aim/aim_machdep.c  Thu May 21 03:33:20 2020
(r361317)
@@ -539,6 +539,10 @@ cpu_machine_check(struct thread *td, struct trapframe 
/* SLB multi-hit is recoverable. */
if ((frame->cpu.aim.dsisr & DSISR_MC_SLB_MULTIHIT) != 0)
return (0);
+   if ((frame->cpu.aim.dsisr & DSISR_MC_DERAT_MULTIHIT) != 0) {
+   pmap_tlbie_all();
+   return (0);
+   }
/* TODO: Add other machine check recovery procedures. */
} else {
if ((frame->srr1 & SRR1_MCHK_IFETCH_M) == 
SRR1_MCHK_IFETCH_SLBMH)

Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cThu May 21 02:10:45 2020
(r361316)
+++ head/sys/powerpc/aim/mmu_radix.cThu May 21 03:33:20 2020
(r361317)
@@ -482,6 +482,7 @@ static void mmu_radix_dumpsys_map(mmu_t mmu, vm_paddr_
 void **va);
 static void mmu_radix_scan_init(mmu_t mmu);
 static voidmmu_radix_cpu_bootstrap(mmu_t, int ap);
+static voidmmu_radix_tlbie_all(mmu_t);
 
 static mmu_method_t mmu_radix_methods[] = {
MMUMETHOD(mmu_bootstrap,mmu_radix_bootstrap),
@@ -543,6 +544,8 @@ static mmu_method_t mmu_radix_methods[] = {
MMUMETHOD(mmu_change_attr,  mmu_radix_change_attr),
MMUMETHOD(mmu_map_user_ptr, mmu_radix_map_user_ptr),
MMUMETHOD(mmu_decode_kernel_ptr, mmu_radix_decode_kernel_ptr),
+
+   MMUMETHOD(mmu_tlbie_all,mmu_radix_tlbie_all),
{ 0, 0 }
 };
 
@@ -772,6 +775,13 @@ mmu_radix_tlbiel_flush(int scope)
 
tlbiel_flush_isa3(POWER9_TLB_SETS_RADIX, is);
__asm __volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
+}
+
+static void
+mmu_radix_tlbie_all(mmu_t __unused mmu)
+{
+   /* TODO: LPID invalidate */
+   mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL);
 }
 
 static void

Modified: head/sys/powerpc/include/pmap.h
==
--- head/sys/powerpc/include/pmap.h Thu May 21 02:10:45 2020
(r361316)
+++ head/sys/powerpc/include/pmap.h Thu May 21 03:33:20 2020
(r361317)
@@ -341,6 +341,7 @@ vm_offset_t pmap_early_io_map(vm_paddr_t pa, vm_size_t
 void pmap_early_io_unmap(vm_offset_t va, vm_size_t size);
 void pmap_track_page(pmap_t pmap, vm_offset_t va);
 void pmap_page_print_mappings(vm_page_t m);
+void pmap_tlbie_all(void);
 
 static inline int
 pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused)

Modified: head/sys/powerpc/powerpc/mmu_if.m
==
--- head/sys/powerpc/powerpc/mmu_if.m   Thu May 21 02:10:45 2020
(r361316)
+++ head/sys/powerpc/powerpc/mmu_if.m   Thu May 21 03:33:20 2020
(r361317)
@@ -1100,3 +1100,11 @@ METHOD boolean_t ps_enabled {
mmu_t   _mmu;
pmap_t  _pmap;
 } DEFAULT mmu_null_ps_enabled;
+
+
+/**
+ * @brief Flush the TLB (used by machine check handler).
+ */
+METHOD void tlbie_all {
+   mmu_t   _mmu;
+};

Modified: head/sys/powerpc/powerpc/pmap_dispatch.c
==
--- head/sys/powerpc/powerpc/pmap_dispatch.cThu May 21 02:10:45 2020
(r361316)
+++ head/sys/powerpc/powerpc/pmap_dispatch.cThu May 21 03:33:20 2020
(r361317)
@@ -631,6 +631,13 @@ pmap_ps_enabled(pmap_t pmap)
return (MMU_PS_ENABLED(mmu_obj, pmap));
 }
 
+void
+pmap_tlbie_all(void)
+{
+   CTR1(KTR_PMAP, "%s()", __func__);
+   return (MMU_TLBIE_ALL(mmu_obj));
+}
+
 /*
  * MMU install routines. Highest priority wins, equal priority also
  * overrides allowing last-set to win.
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svn commit: r361271 - in head/sys/powerpc: aim include

[Justin Hibbits]

Author: jhibbits
Date: Wed May 20 02:33:41 2020
New Revision: 361271
URL: https://svnweb.freebsd.org/changeset/base/361271

Log:
  powerpc/radix mmu: No need for delayed TLB invalidation
  
  x86 needs delayed TLB invalidation because invalidation requires an
  expensive IPI.  PowerPC has had a TLB invalidation instruction since the
  POWER1 in 1990, so there's no need to delay anything.

Modified:
  head/sys/powerpc/aim/mmu_radix.c
  head/sys/powerpc/include/proc.h

Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cWed May 20 01:25:46 2020
(r361270)
+++ head/sys/powerpc/aim/mmu_radix.cWed May 20 02:33:41 2020
(r361271)
@@ -33,7 +33,6 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -406,7 +405,6 @@ static u_int64_tKPTphys;/* phys addr of kernel 
level
 
 static vm_offset_t qframe = 0;
 static struct mtx qframe_mtx;
-static epoch_t pmap_epoch;
 
 void mmu_radix_activate(mmu_t mmu, struct thread *);
 void mmu_radix_advise(mmu_t mmu, pmap_t, vm_offset_t, vm_offset_t, int);
@@ -849,43 +847,6 @@ pa_cmp(const void *a, const void *b)
PG_M | PG_A | RPTE_EAA_MASK | PG_V)
 
 
-static void
-pmap_epoch_init(void *arg __unused)
-{
-   pmap_epoch = epoch_alloc("pmap", EPOCH_PREEMPT | EPOCH_LOCKED);
-}
-SYSINIT(epoch, SI_SUB_EPOCH + 1, SI_ORDER_ANY, pmap_epoch_init, NULL);
-
-static bool
-pmap_not_in_di(void)
-{
-
-   return (curthread->td_md.md_invl_gen.gen == 0);
-}
-
-#definePMAP_ASSERT_NOT_IN_DI() \
-KASSERT(pmap_not_in_di(), ("DI already started"))
-
-static void
-pmap_delayed_invl_started(epoch_tracker_t et)
-{
-   epoch_enter_preempt(pmap_epoch, et);
-   curthread->td_md.md_invl_gen.gen = 1;
-}
-
-static void
-pmap_delayed_invl_finished(epoch_tracker_t et)
-{
-   curthread->td_md.md_invl_gen.gen = 0;
-   epoch_exit_preempt(pmap_epoch, et);
-}
-
-static void
-pmap_delayed_invl_wait(vm_page_t m __unused)
-{
-   epoch_wait_preempt(pmap_epoch);
-}
-
 static __inline void
 pmap_resident_count_inc(pmap_t pmap, int count)
 {
@@ -1370,8 +1331,7 @@ out:
 }
 
 static void
-reclaim_pv_chunk_leave_pmap(pmap_t pmap, pmap_t locked_pmap, bool start_di,
-   epoch_tracker_t et)
+reclaim_pv_chunk_leave_pmap(pmap_t pmap, pmap_t locked_pmap)
 {
 
if (pmap == NULL)
@@ -1379,8 +1339,6 @@ reclaim_pv_chunk_leave_pmap(pmap_t pmap, pmap_t locked
pmap_invalidate_all(pmap);
if (pmap != locked_pmap)
PMAP_UNLOCK(pmap);
-   if (start_di)
-   pmap_delayed_invl_finished(et);
 }
 
 /*
@@ -1410,8 +1368,6 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **l
struct spglist free;
uint64_t inuse;
int bit, field, freed;
-   bool start_di;
-   struct epoch_tracker et;
 
PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED);
KASSERT(lockp != NULL, ("reclaim_pv_chunk: lockp is NULL"));
@@ -1423,13 +1379,6 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **l
pc_marker = (struct pv_chunk *)_marker_b;
pc_marker_end = (struct pv_chunk *)_marker_end_b;
 
-   /*
-* A delayed invalidation block should already be active if
-* pmap_advise() or pmap_remove() called this function by way
-* of pmap_demote_l3e_locked().
-*/
-   start_di = pmap_not_in_di();
-
mtx_lock(_chunks_mutex);
active_reclaims++;
TAILQ_INSERT_HEAD(_chunks, pc_marker, pc_lru);
@@ -1454,21 +1403,16 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **l
 * corresponding pmap is locked.
 */
if (pmap != next_pmap) {
-   reclaim_pv_chunk_leave_pmap(pmap, locked_pmap,
-   start_di, );
+   reclaim_pv_chunk_leave_pmap(pmap, locked_pmap);
pmap = next_pmap;
/* Avoid deadlock and lock recursion. */
if (pmap > locked_pmap) {
RELEASE_PV_LIST_LOCK(lockp);
PMAP_LOCK(pmap);
-   if (start_di)
-   pmap_delayed_invl_started();
mtx_lock(_chunks_mutex);
continue;
} else if (pmap != locked_pmap) {
if (PMAP_TRYLOCK(pmap)) {
-   if (start_di)
-   pmap_delayed_invl_started();
mtx_lock(_chunks_mutex);
continue;
} else {
@@ -1480,8 +1424,7 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **l
continue;
   

svn commit: r361232 - head/sys/powerpc/aim

[Justin Hibbits]

Author: jhibbits
Date: Tue May 19 01:06:31 2020
New Revision: 361232
URL: https://svnweb.freebsd.org/changeset/base/361232

Log:
  powerpc/mmu: Don't use the cache instructions to zero pages
  
  A page (even physmem) can be marked as cache-inhibited.  Attempting to use
  'dcbz' to zero a page mapped cache-inhibited triggers an alignment
  exception, which is fatal in kernel.  This was seen when testing hardware
  acceleration with X on POWER9.
  
  At some point in the future, this should be changed to a more straight
  forward zero loop instead of bzero(), and a similar change be made to the
  other pmaps.
  
  Reported by:  pkubaj@

Modified:
  head/sys/powerpc/aim/mmu_radix.c

Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cTue May 19 01:05:13 2020
(r361231)
+++ head/sys/powerpc/aim/mmu_radix.cTue May 19 01:06:31 2020
(r361232)
@@ -909,10 +909,8 @@ static void
 pagezero(vm_offset_t va)
 {
va = trunc_page(va);
-   int off;
 
-   for (off = 0; off < PAGE_SIZE; off += cacheline_size)
-   __asm __volatile("dcbz 0,%0" :: "r"(va + off));
+   bzero((void *)va, PAGE_SIZE);
 }
 
 static uint64_t
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svn commit: r361104 - head/contrib/elftoolchain/libelf

[Justin Hibbits]

Author: jhibbits
Date: Sat May 16 03:52:30 2020
New Revision: 361104
URL: https://svnweb.freebsd.org/changeset/base/361104

Log:
  elftoolchain: Add powerpc64 definition to elftoolchain config
  
  powerpc is already in place, but powerpc64 is needed separately.

Modified:
  head/contrib/elftoolchain/libelf/_libelf_config.h

Modified: head/contrib/elftoolchain/libelf/_libelf_config.h
==
--- head/contrib/elftoolchain/libelf/_libelf_config.h   Sat May 16 03:45:15 
2020(r361103)
+++ head/contrib/elftoolchain/libelf/_libelf_config.h   Sat May 16 03:52:30 
2020(r361104)
@@ -91,6 +91,12 @@
 #endif
 #defineLIBELF_CLASSELFCLASS32
 
+#elif  defined(__powerpc64__)
+
+#defineLIBELF_ARCH EM_PPC64
+#defineLIBELF_BYTEORDERELFDATA2MSB
+#defineLIBELF_CLASSELFCLASS64
+
 #elif  defined(__powerpc__)
 
 #defineLIBELF_ARCH EM_PPC
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svn commit: r361102 - head/sys/powerpc/conf

[Justin Hibbits]

Author: jhibbits
Date: Sat May 16 03:33:28 2020
New Revision: 361102
URL: https://svnweb.freebsd.org/changeset/base/361102

Log:
  powerpc/qoriq: Add more devices to config for desktop usage
  
  The most likely users of the QORIQ64 config nowadays are users of AmigaOne
  X5000 systems, which are desktops.  They need a framebuffer and
  keyboard/mouse, so add these to the config so it works by default once
  drm-current-kmod is installed.

Modified:
  head/sys/powerpc/conf/QORIQ64

Modified: head/sys/powerpc/conf/QORIQ64
==
--- head/sys/powerpc/conf/QORIQ64   Sat May 16 02:43:27 2020
(r361101)
+++ head/sys/powerpc/conf/QORIQ64   Sat May 16 03:33:28 2020
(r361102)
@@ -113,3 +113,10 @@ device ehci
 device umass
 device usb
 device vlan
+
+# Desktop related
+device vt
+device fbd
+optionsKBD_INSTALL_CDEV
+device ukbd
+device ums
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Re: svn commit: r360233 - in head: contrib/jemalloc . . . : This partially breaks a 2-socket 32-bit powerpc (old PowerMac G4) based on head -r360311

[Justin Hibbits]

Hi Mark,

On Wed, 13 May 2020 01:43:23 -0700
Mark Millard  wrote:

> [I'm adding a reference to an old arm64/aarch64 bug that had
> pages turning to zero, in case this 32-bit powerpc issue is
> somewhat analogous.]
> 
> On 2020-May-13, at 00:29, Mark Millard  wrote:
> 
> > [stress alone is sufficient to have jemalloc asserts fail
> > in stress, no need for a multi-socket G4 either. No need
> > to involve nfsd, mountd, rpcbind or the like. This is not
> > a claim that I know all the problems to be the same, just
> > that a jemalloc reported failure in this simpler context
> > happens and zeroed pages are involved.]
> > 
> > Reminder: head -r360311 based context.
> > 
> > 
> > First I show a single CPU/core PowerMac G4 context failing
> > in stress. (I actually did this later, but it is the
> > simpler context.) I simply moved the media from the
> > 2-socket G4 to this slower, single-cpu/core one.
> > 
> > cpu0: Motorola PowerPC 7400 revision 2.9, 466.42 MHz
> > cpu0: Features 9c00
> > cpu0: HID0 8094c0a4
> > real memory  = 1577857024 (1504 MB)
> > avail memory = 1527508992 (1456 MB)
> > 
> > # stress -m 1 --vm-bytes 1792M
> > stress: info: [1024] dispatching hogs: 0 cpu, 0 io, 1 vm, 0 hdd
> > :
> > /usr/src/contrib/jemalloc/include/jemalloc/internal/arena_inlines_b.h:258:
> > Failed assertion: "slab == extent_slab_get(extent)" stress: FAIL:
> > [1024] (415) <-- worker 1025 got signal 6 stress: WARN: [1024]
> > (417) now reaping child worker processes stress: FAIL: [1024] (451)
> > failed run completed in 243s
> > 
> > (Note: 1792 is the biggest it allowed with M.)
> > 
> > The following still pages in and out and fails:
> > 
> > # stress -m 1 --vm-bytes 1290M
> > stress: info: [1163] dispatching hogs: 0 cpu, 0 io, 1 vm, 0 hdd
> > :
> > /usr/src/contrib/jemalloc/include/jemalloc/internal/arena_inlines_b.h:258:
> > Failed assertion: "slab == extent_slab_get(extent)" . . .
> > 
> > By contrast, the following had no problem for as
> > long as I let it run --and did not page in or out:
> > 
> > # stress -m 1 --vm-bytes 1280M
> > stress: info: [1181] dispatching hogs: 0 cpu, 0 io, 1 vm, 0 hdd
> > 
...
> The following is was a fix for a "pages magically
> turn into zeros" problem on amd64/aarch64. The
> original 32-bit powerpc context did not seem a
> match to me --but the stress test behavior that
> I've just observed seems closer from an
> external-test point of view: swapping is involved.
> 
> My be this will suggest something to someone that
> knows what they are doing.
> 
> (Note: dsl-only.net closed down, so the E-mail
> address reference is no longer valid.)
> 
> Author: kib
> Date: Mon Apr 10 15:32:26 2017
> New Revision: 316679
> URL: 
> https://svnweb.freebsd.org/changeset/base/316679
> 
> 
> Log:
>  Do not lose dirty bits for removing PROT_WRITE on arm64.
> 
>  Arm64 pmap interprets accessed writable ptes as modified, since
>  ARMv8.0 does not track Dirty Bit Modifier in hardware. If writable
> bit is removed, page must be marked as dirty for MI VM.
> 
>  This change is most important for COW, where fork caused losing
>  content of the dirty pages which were not yet scanned by pagedaemon.
> 
>  Reviewed by: alc, andrew
>  Reported and tested by:  Mark Millard 
>  PR:  217138, 217239
>  Sponsored by:The FreeBSD Foundation
>  MFC after:   2 weeks
> 
> Modified:
>  head/sys/arm64/arm64/pmap.c
> 
> Modified: head/sys/arm64/arm64/pmap.c
> ==
> --- head/sys/arm64/arm64/pmap.c   Mon Apr 10 12:35:58
> 2017  (r316678) +++ head/sys/arm64/arm64/pmap.c   Mon Apr
> 10 15:32:26 2017  (r316679) @@ -2481,6 +2481,11 @@
> pmap_protect(pmap_t pmap, vm_offset_t sv sva += L3_SIZE) {
>   l3 = pmap_load(l3p);
>   if (pmap_l3_valid(l3)) {
> + if ((l3 & ATTR_SW_MANAGED) &&
> + pmap_page_dirty(l3)) {
> +
> vm_page_dirty(PHYS_TO_VM_PAGE(l3 &
> + ~ATTR_MASK));
> + }
>   pmap_set(l3p, ATTR_AP(ATTR_AP_RO));
>   PTE_SYNC(l3p);
>   /* XXX: Use pmap_invalidate_range */
> 
> 
> ===
> Mark Millard
> marklmi at yahoo.com
> ( dsl-only.net went
> away in early 2018-Mar)
> 

Thanks for this reference.  I took a quick look at the 3 pmap
implementations we have (haven't check the new radix pmap yet), and it
looks like only mmu_oea.c (32-bit AIM pmap, for G3 and G4) is missing
vm_page_dirty() calls in its pmap_protect() implementation, analogous
to the change you posted right above. Given this, I think it's safe to
say that this missing piece is necessary.  We'll work on a fix for
this; looking at moea64_protect(), there may be additional work needed
to support this as well, so it may take a few days.

- Justin
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Re: svn commit: r360887 - in head/sys: conf powerpc/aim powerpc/booke powerpc/include powerpc/powerpc vm

[Justin Hibbits]

On Mon, 11 May 2020 13:43:58 -0700
Kevin Bowling  wrote:

> Were there any major changes you can summarize from the P9BSD
> integration, and any TODO list (perhaps wiki for this question)?

The committed version lacks minidumps, which luporl@ had implemented in
OEA64 a few months ago, so I still have to pull that in.  Also, Radix
pmap is currently disabled by default, enabled with 'radix_mmu=1' boot
arg, because it's extremely unstable in anything but the most mundane
cases (can pass buildworld, but a lot of ports trigger machine checks),
so that all needs fixed.

The rest of the TODO list from POWER9BSD consists of:
* IFUNCify pmap and its ancillary functions (copy*())
* Bring in the soft-interrupt-disable feature

Someone (Alfredo?) is working on IFUNCifying pmap, but nobody's yet
done the soft interrupt disabling.  I have a patch to implement it, but
last time I tested it, it fell over quite quickly, so I must've missed
something.

I think that's it.

- Justin

> 
> On Sun, May 10, 2020 at 7:33 PM Justin Hibbits 
> wrote:
> >
> > Author: jhibbits
> > Date: Mon May 11 02:33:37 2020
> > New Revision: 360887
> > URL: https://svnweb.freebsd.org/changeset/base/360887
> >
> > Log:
> >   powerpc64: Implement Radix MMU for POWER9 CPUs
> >
> >   Summary:
> >   POWER9 supports two MMU formats: traditional hashed page tables,
> > and Radix page tables, similar to what's presesnt on most other
> > architectures.  The PowerISA also specifies a process table -- a
> > table of page table pointers-- which on the POWER9 is only
> > available with the Radix MMU, so we can take advantage of it with
> > the Radix MMU driver.
> >
> >   Written by Matt Macy.
> >
> >   Differential Revision: https://reviews.freebsd.org/D19516
> >
> > Added:
> >   head/sys/powerpc/aim/mmu_radix.c   (contents, props changed)
> > Modified:
> >   head/sys/conf/files.powerpc
> >   head/sys/powerpc/aim/aim_machdep.c
> >   head/sys/powerpc/aim/mmu_oea.c
> >   head/sys/powerpc/aim/mmu_oea64.c
> >   head/sys/powerpc/booke/pmap.c
> >   head/sys/powerpc/include/cpufunc.h
> >   head/sys/powerpc/include/mmuvar.h
> >   head/sys/powerpc/include/param.h
> >   head/sys/powerpc/include/pmap.h
> >   head/sys/powerpc/include/proc.h
> >   head/sys/powerpc/include/pte.h
> >   head/sys/powerpc/include/spr.h
> >   head/sys/powerpc/include/sr.h
> >   head/sys/powerpc/include/vmparam.h
> >   head/sys/powerpc/powerpc/machdep.c
> >   head/sys/powerpc/powerpc/mmu_if.m
> >   head/sys/powerpc/powerpc/pmap_dispatch.c
> >   head/sys/powerpc/powerpc/trap.c
> >   head/sys/vm/vm_fault.c
> >
> > Modified: head/sys/conf/files.powerpc
> > ==
> > --- head/sys/conf/files.powerpc Mon May 11 01:20:40 2020
> > (r360886) +++ head/sys/conf/files.powerpc Mon May 11 02:33:37 2020
> >   (r360887) @@ -135,6 +135,7 @@ powerpc/aim/locore.S
> > optionalaim no-obj powerpc/aim/aim_machdep.c
> > optionalaim powerpc/aim/mmu_oea.c  optional
> > aim powerpc powerpc/aim/mmu_oea64.coptional
> > aim +powerpc/aim/mmu_radix.coptionalaim
> > powerpc64 powerpc/aim/moea64_if.moptionalaim
> >  powerpc/aim/moea64_native.coptionalaim
> >  powerpc/aim/mp_cpudep.coptionalaim
> >
> > Modified: head/sys/powerpc/aim/aim_machdep.c
> > ==
> > --- head/sys/powerpc/aim/aim_machdep.c  Mon May 11 01:20:40 2020
> > (r360886) +++ head/sys/powerpc/aim/aim_machdep.c  Mon May 11
> > 02:33:37 2020(r360887) @@ -136,6 +136,8 @@
> > __FBSDID("$FreeBSD$"); struct bat battable[16];
> >  #endif
> >
> > +int radix_mmu = 0;
> > +
> >  #ifndef __powerpc64__
> >  /* Bits for running on 64-bit systems in 32-bit mode. */
> >  extern void*testppc64, *testppc64size;
> > @@ -451,7 +453,14 @@ aim_cpu_init(vm_offset_t toc)
> >  * in case the platform module had a better idea of what we
> >  * should do.
> >  */
> > -   if (cpu_features & PPC_FEATURE_64)
> > +   if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) {
> > +   radix_mmu = 0;
> > +   TUNABLE_INT_FETCH("radix_mmu", _mmu);
> > +   if (radix_mmu)
> > +   pmap_mmu_install(MMU_TYPE_RADIX,
> > BUS_PROBE_GENERIC);
> > +   else
> > +   pmap_mmu_ins

svn commit: r360887 - in head/sys: conf powerpc/aim powerpc/booke powerpc/include powerpc/powerpc vm

[Justin Hibbits]

Author: jhibbits
Date: Mon May 11 02:33:37 2020
New Revision: 360887
URL: https://svnweb.freebsd.org/changeset/base/360887

Log:
  powerpc64: Implement Radix MMU for POWER9 CPUs
  
  Summary:
  POWER9 supports two MMU formats: traditional hashed page tables, and Radix
  page tables, similar to what's presesnt on most other architectures.  The
  PowerISA also specifies a process table -- a table of page table pointers--
  which on the POWER9 is only available with the Radix MMU, so we can take
  advantage of it with the Radix MMU driver.
  
  Written by Matt Macy.
  
  Differential Revision: https://reviews.freebsd.org/D19516

Added:
  head/sys/powerpc/aim/mmu_radix.c   (contents, props changed)
Modified:
  head/sys/conf/files.powerpc
  head/sys/powerpc/aim/aim_machdep.c
  head/sys/powerpc/aim/mmu_oea.c
  head/sys/powerpc/aim/mmu_oea64.c
  head/sys/powerpc/booke/pmap.c
  head/sys/powerpc/include/cpufunc.h
  head/sys/powerpc/include/mmuvar.h
  head/sys/powerpc/include/param.h
  head/sys/powerpc/include/pmap.h
  head/sys/powerpc/include/proc.h
  head/sys/powerpc/include/pte.h
  head/sys/powerpc/include/spr.h
  head/sys/powerpc/include/sr.h
  head/sys/powerpc/include/vmparam.h
  head/sys/powerpc/powerpc/machdep.c
  head/sys/powerpc/powerpc/mmu_if.m
  head/sys/powerpc/powerpc/pmap_dispatch.c
  head/sys/powerpc/powerpc/trap.c
  head/sys/vm/vm_fault.c

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Mon May 11 01:20:40 2020(r360886)
+++ head/sys/conf/files.powerpc Mon May 11 02:33:37 2020(r360887)
@@ -135,6 +135,7 @@ powerpc/aim/locore.Soptionalaim 
no-obj
 powerpc/aim/aim_machdep.c  optionalaim
 powerpc/aim/mmu_oea.c  optionalaim powerpc
 powerpc/aim/mmu_oea64.coptionalaim
+powerpc/aim/mmu_radix.coptionalaim powerpc64
 powerpc/aim/moea64_if.moptionalaim
 powerpc/aim/moea64_native.coptionalaim
 powerpc/aim/mp_cpudep.coptionalaim

Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c  Mon May 11 01:20:40 2020
(r360886)
+++ head/sys/powerpc/aim/aim_machdep.c  Mon May 11 02:33:37 2020
(r360887)
@@ -136,6 +136,8 @@ __FBSDID("$FreeBSD$");
 struct bat battable[16];
 #endif
 
+int radix_mmu = 0;
+
 #ifndef __powerpc64__
 /* Bits for running on 64-bit systems in 32-bit mode. */
 extern void*testppc64, *testppc64size;
@@ -451,7 +453,14 @@ aim_cpu_init(vm_offset_t toc)
 * in case the platform module had a better idea of what we
 * should do.
 */
-   if (cpu_features & PPC_FEATURE_64)
+   if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) {
+   radix_mmu = 0;
+   TUNABLE_INT_FETCH("radix_mmu", _mmu);
+   if (radix_mmu)
+   pmap_mmu_install(MMU_TYPE_RADIX, BUS_PROBE_GENERIC);
+   else
+   pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
+   } else if (cpu_features & PPC_FEATURE_64)
pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
else
pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC);

Modified: head/sys/powerpc/aim/mmu_oea.c
==
--- head/sys/powerpc/aim/mmu_oea.c  Mon May 11 01:20:40 2020
(r360886)
+++ head/sys/powerpc/aim/mmu_oea.c  Mon May 11 02:33:37 2020
(r360887)
@@ -322,6 +322,7 @@ void moea_dumpsys_map(mmu_t mmu, vm_paddr_t pa, size_t
 void moea_scan_init(mmu_t mmu);
 vm_offset_t moea_quick_enter_page(mmu_t mmu, vm_page_t m);
 void moea_quick_remove_page(mmu_t mmu, vm_offset_t addr);
+boolean_t moea_page_is_mapped(mmu_t mmu, vm_page_t m);
 static int moea_map_user_ptr(mmu_t mmu, pmap_t pm,
 volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen);
 static int moea_decode_kernel_ptr(mmu_t mmu, vm_offset_t addr,
@@ -364,6 +365,7 @@ static mmu_method_t moea_methods[] = {
MMUMETHOD(mmu_page_set_memattr, moea_page_set_memattr),
MMUMETHOD(mmu_quick_enter_page, moea_quick_enter_page),
MMUMETHOD(mmu_quick_remove_page, moea_quick_remove_page),
+   MMUMETHOD(mmu_page_is_mapped,   moea_page_is_mapped),
 
/* Internal interfaces */
MMUMETHOD(mmu_bootstrap,moea_bootstrap),
@@ -1102,6 +1104,12 @@ moea_quick_enter_page(mmu_t mmu, vm_page_t m)
 void
 moea_quick_remove_page(mmu_t mmu, vm_offset_t addr)
 {
+}
+
+boolean_t
+moea_page_is_mapped(mmu_t mmu, vm_page_t m)
+{
+   return (!LIST_EMPTY(&(m)->md.mdpg_pvoh));
 }
 
 /*

Modified: head/sys/powerpc/aim/mmu_oea64.c
==
--- head/sys/powerpc/aim/mmu_oea64.cMon May 11 01:20:40 2020   

svn commit: r360881 - in head/sys/powerpc: aim booke include powerpc

[Justin Hibbits]

Author: jhibbits
Date: Sun May 10 19:00:57 2020
New Revision: 360881
URL: https://svnweb.freebsd.org/changeset/base/360881

Log:
  powerpc: Add a CPU-custom machine check handler
  
  Summary:
  Some machine checks are process-recoverable, others are not.  Let a
  CPU-specific handler decide what to do.
  
  This works around a machine check error hit while building www/firefox
  and mail/thunderbird, which would otherwise cause the build to fail.
  
  More work is needed to handle all possible machine check conditions, but
  this is sufficient to unblock some ports building.
  
  Differential Revision: https://reviews.freebsd.org/D23731

Modified:
  head/sys/powerpc/aim/aim_machdep.c
  head/sys/powerpc/aim/trap_subr64.S
  head/sys/powerpc/booke/machdep_e500.c
  head/sys/powerpc/include/cpu.h
  head/sys/powerpc/include/spr.h
  head/sys/powerpc/powerpc/trap.c

Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c  Sun May 10 18:17:25 2020
(r360880)
+++ head/sys/powerpc/aim/aim_machdep.c  Sun May 10 19:00:57 2020
(r360881)
@@ -515,6 +515,32 @@ memcpy(pcpu->pc_aim.slb, PCPU_GET(aim.slb), sizeof(pcp
 #endif
 }
 
+/* Return 0 on handled success, otherwise signal number. */
+int
+cpu_machine_check(struct thread *td, struct trapframe *frame, int *ucode)
+{
+#ifdef __powerpc64__
+   /*
+* This block is 64-bit CPU specific currently.  Punt running in 32-bit
+* mode on 64-bit CPUs.
+*/
+   /* Check if the important information is in DSISR */
+   if ((frame->srr1 & SRR1_MCHK_DATA) != 0) {
+   printf("Machine check, DSISR: %016lx\n", frame->cpu.aim.dsisr);
+   /* SLB multi-hit is recoverable. */
+   if ((frame->cpu.aim.dsisr & DSISR_MC_SLB_MULTIHIT) != 0)
+   return (0);
+   /* TODO: Add other machine check recovery procedures. */
+   } else {
+   if ((frame->srr1 & SRR1_MCHK_IFETCH_M) == 
SRR1_MCHK_IFETCH_SLBMH)
+   return (0);
+   }
+#endif
+   *ucode = BUS_OBJERR;
+   return (SIGBUS);
+}
+
+
 #ifndef __powerpc64__
 uint64_t
 va_to_vsid(pmap_t pm, vm_offset_t va)

Modified: head/sys/powerpc/aim/trap_subr64.S
==
--- head/sys/powerpc/aim/trap_subr64.S  Sun May 10 18:17:25 2020
(r360880)
+++ head/sys/powerpc/aim/trap_subr64.S  Sun May 10 19:00:57 2020
(r360881)
@@ -797,6 +797,8 @@ generictrap:
std %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
mfdar   %r30
std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1)
+   mfdsisr %r30
+   std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1)
mfsprg1 %r1 /* restore SP, in case of branch */
mfsprg2 %r28/* save LR */
mfcr%r29/* save CR */

Modified: head/sys/powerpc/booke/machdep_e500.c
==
--- head/sys/powerpc/booke/machdep_e500.c   Sun May 10 18:17:25 2020
(r360880)
+++ head/sys/powerpc/booke/machdep_e500.c   Sun May 10 19:00:57 2020
(r360881)
@@ -119,3 +119,15 @@ void
 booke_disable_l2_cache(void)
 {
 }
+
+/* Return 0 on handled success, otherwise signal number. */
+int
+cpu_machine_check(struct thread *td, struct trapframe *frame, int *ucode)
+{
+   register_t mcsr;
+
+   mcsr = mfspr(SPR_MCSR);
+
+   *ucode = BUS_OBJERR;
+   return (SIGBUS);
+}

Modified: head/sys/powerpc/include/cpu.h
==
--- head/sys/powerpc/include/cpu.h  Sun May 10 18:17:25 2020
(r360880)
+++ head/sys/powerpc/include/cpu.h  Sun May 10 19:00:57 2020
(r360881)
@@ -134,6 +134,8 @@ get_cyclecount(void)
 extern char btext[];
 extern char etext[];
 
+struct thread;
+
 #ifdef __powerpc64__
 extern void enter_idle_powerx(void);
 extern uint64_t can_wakeup;
@@ -146,5 +148,6 @@ voidcpu_sleep(void);
 void   flush_disable_caches(void);
 void   fork_trampoline(void);
 void   swi_vm(void *);
+intcpu_machine_check(struct thread *, struct trapframe *, int *);
 
 #endif /* _MACHINE_CPU_H_ */

Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h  Sun May 10 18:17:25 2020
(r360880)
+++ head/sys/powerpc/include/spr.h  Sun May 10 19:00:57 2020
(r360881)
@@ -108,6 +108,15 @@
 #define  DSISR_DABR  0x0040 /* DABR match */
 #define  DSISR_SEGMENT   0x0020 /* XXX; not in 6xx PEM */
 #define  DSISR_EAR   0x0010 /* eciwx/ecowx && EAR[E] 
== 0 */
+#define  DSISR_MC_UE_DEFERRED0x8000 /* UE deferred error */
+#define  

Re: svn commit: r360241 - head/sys/dev/ichiic

[Justin Hibbits]

On Fri, 24 Apr 2020 19:07:35 +0300
Andriy Gapon  wrote:

> On 24/04/2020 18:11, Warner Losh wrote:
> > 
> > 
> > On Fri, Apr 24, 2020 at 8:47 AM Andriy Gapon  > > wrote:
> > 
> > On 24/04/2020 17:29, Warner Losh wrote:  
> > >
> > >
> > > On Fri, Apr 24, 2020 at 1:49 AM Andriy Gapon  > >  
> >   
> > > >> wrote:
> > >
> > >     Author: avg
> > >     Date: Fri Apr 24 07:49:21 2020
> > >     New Revision: 360241
> > >     URL: https://svnweb.freebsd.org/changeset/base/360241
> > >
> > >     Log:
> > >       ig4: ensure that drivers always attach in correct order
> > >
> > >       Use DRIVER_MODULE_ORDERED(SI_ORDER_ANY) so that ig4's
> > >ACPI attachment happens after iicbus and acpi_iicbus drivers
> > >are registered.
> > >
> > >       I have seen a problem where iicbus attached under ig4
> > >instead of acpi_iicbus when ig4.ko was loaded with kldload.  I
> > >believe that that happened because ig4 driver was a first
> > >driver to register, it attached and created an iicbus child.
> > >Then iicbus driver was registered and, since it was the only
> > >driver that could attach to the iicbus child device, it did
> > >exactly that.  After that acpi_iicbus driver was registered.
> > >It would be able to attach to the iicbus device, but it was
> > >already attached, so nothing happened.
> > >
> > >
> > > Can you post more details of which devices are affected? From
> > > the description and the patch, I don't see how this could fix
> > > things.  
> > 
> > I think I listed them all: ig4iic with acpi attachment, iicbus
> > and acpi_iicbus. acpi
> >  \--- ig4iic
> >        \ iicbus vs acpi_iicbus
> > 
> > I tried to explain the problem and the fix in the commit
> > message.  If you want to discuss any specifics, let's continue with
> > specifics.  If there is anything unclear in my explanation, I can
> > clarify, but I need to understand what needs to be clarified.
> > 
> > 
> > That won't fix the stated problem.  
> 
> It will.  It does.  You made me write an essay to explain why :)
> 
> > If changing the module order fixes something,
> > it's the wrong fix. Which is why I asked to make sure I understood
> > the issue (it was unclear if it was at the level indicated, or for
> > the children of the iicbus).
> > 
> > iicbus returns BUS_PROBE_GENERIC (-100) from its probe routine,
> > while acpi_iicbus returns BUS_PROBE_DEFAULT (-20). This means that
> > acpi_iicbus should always win. So something else is going on. We
> > don't specify order on other devices except for some weird, special
> > needs drivers (this is not such a driver).  
> 
> This driver, along with all of other I2C controller drivers, has a
> particular quirk, so it can be called weird.
> 
> It does not matter what the probe routines return if one of the
> drivers is not added to "newbus" at all (even if its code is loaded).
>  Its probe method is not executed.  And that's what I tried to
> explain in the commit message.
> 
> Now, why this driver as well as all SMBus and I2C controller drivers
> are somewhat weird...  There is a multitude of drivers for SMBus and
> I2C controllers.  Those drivers have different names.  So, using
> newbus speak, smbus and iicbus drivers can attach to [newbus] devices
> under many different [newbus] buses.  For that reason, the
> corresponding DRIVER_MODULE declarations are not consolidated in
> smbus.c and iicbus.c; instead, they are spread over individual
> controller drivers.  So, loading of smbus or iicbus module does not
> result in a call to devclass_add_driver() that would register these
> drivers under some bus. And that's an unusual thing comparing to the
> most straightforward drivers.
> 
> Let's use ig4 as an example.
> Across its source files we had the following DRIVER_MODULE
> declarations: DRIVER_MODULE(ig4iic, acpi, ... -- in ig4_acpi.c
> DRIVER_MODULE(iicbus, ig4iic, ... -- in ig4_iic.c
> DRIVER_MODULE(acpi_iicbus, ig4iic, ... -- in ig4_iic.c
> The first one is needed to register ig4iic driver under acpi bus.
> Other two are needed to register iicbus and acpi_iicbus drivers under
> ig4iic bus. The order is not explicitly defined, so the corresponding
> declaration can be processed in any order when ig4.ko is loaded and
> so the corresponding devclass_add_driver() can be called in any order.
> 
> So, I observed in practice the scenario where the drivers were added
> in the written order.  First, ig4iic was added under acpi, it found
> the corresponding device, probed and attached to it.  In its attach
> method it added a new device named "iicbus" as a child.  Then, iicbus
> driver was added under ig4iic bus. That driver found the child device
> and attached to it.  Only then acpi_iicbus was added and it was too
> late to the party.
> 
> So, this is 

Re: svn commit: r360126 - head/sys/dev/evdev

[Justin Hibbits]

On Mon, 20 Apr 2020 22:13:51 +0300
Vladimir Kondratyev  wrote:

> On 20.04.2020 19:39, Justin Hibbits wrote:
> > But I'm curious, why not attach to sysmouse(4) and kbdmux(4)?  What
> > breakage does that cause?  I could maybe see not attaching to
> > sysmouse(4) by default, if the protocol isn't expressive enough, but
> > kbdmux(4) should be sufficient.
> >
> > - Justin  
> 
> kbdmux(4) is pretty good for standard 102-104-keys keyboards found at
> common desktops.
> 
> But it does not work that good with some laptop ones.
> 
> There are no "Flight mode on/off", "Touchpad on/off" e.t.c. events
> defined in AT-keyset but they exist in evdev-keyset.
> 
> Unfortunately, we do not support keymap uploading in our drivers yet
> to make utilization of this advantage easy
> 
> but IMO its better to switch to direct key-event reporting earlier
> rather than later.
> 

Thanks for that explanation.  I tried thinking of any way these
capabilities could be added to kbdmux, but they really are keyboard
specific events, so wouldn't belong in kbdmux anyway.

I'd be interested in adding the necessary capabilities to adb(4), to
remove this special casing.  I have a PowerBook G4 Ti to use for such a
task.

- Justin
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Re: svn commit: r360126 - head/sys/dev/evdev

[Justin Hibbits]

On Mon, 20 Apr 2020 16:17:17 + (UTC)
Niclas Zeising  wrote:

> Author: zeising (doc,ports committer)
> Date: Mon Apr 20 16:17:16 2020
> New Revision: 360126
> URL: https://svnweb.freebsd.org/changeset/base/360126
> 
> Log:
>   Change kern.evdev.rcpt_mask to 12 by default
>   
>   Change kern.evdev.rcpt_mask from 3 to 12 by default.  This makes us
> much more evdev-friendly, and will prevent everyone using xorg and
> wayland with evdev devices (the default) from needing to change this
> locally. 
>   powerpc32 still uses the old value for the keyboard part, becaues
> the adb keyboard driver used there is not evdev compatible.
>   
>   Reviewed by:wulf
>   Approved by:wulf
>   MFC after:  2 weeks
>   X-MFC-Note: 12 only
>   Relnotes:   yes
>   Differential Revision:  https://reviews.freebsd.org/D24370
> 
> Modified:
>   head/sys/dev/evdev/evdev.c
> 
> Modified: head/sys/dev/evdev/evdev.c
> ==
> --- head/sys/dev/evdev/evdev.cMon Apr 20 16:14:44 2020
> (r360125) +++ head/sys/dev/evdev/evdev.c  Mon Apr 20 16:17:16
> 2020  (r360126) @@ -66,7 +66,12 @@ enum evdev_sparse_result
>  
>  MALLOC_DEFINE(M_EVDEV, "evdev", "evdev memory");
>  
> -int evdev_rcpt_mask = EVDEV_RCPT_SYSMOUSE | EVDEV_RCPT_KBDMUX;
> +/* adb keyboard driver used on powerpc does not support evdev yet */
> +#ifdef __powerpc__

This affects *all* powerpc, not just powerpc32.  For just powerpc32,
you should have:

#if defined(__powerpc__) && !defined(__powerpc64__)

But I'm curious, why not attach to sysmouse(4) and kbdmux(4)?  What
breakage does that cause?  I could maybe see not attaching to
sysmouse(4) by default, if the protocol isn't expressive enough, but
kbdmux(4) should be sufficient.


- Justin
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svn commit: r359793 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Sat Apr 11 00:17:55 2020
New Revision: 359793
URL: https://svnweb.freebsd.org/changeset/base/359793

Log:
  powerpc/booke: Use power-of-two mappings in 64-bit pmap_mapdev
  
  Summary:
  This reduces the precious TLB1 entry consumption (64 possible in
  existing 64-bit cores), by adjusting the size and alignment of a device
  mapping to a power of 2, to encompass the full mapping and its
  surroundings.
  
  One caveat with this: If a mapping really is smaller than a power of 2,
  it's possible to get a machine check or hang if the 'missing' physical
  space is accessed.  In practice this should not be an issue for users,
  as devices overwhelmingly have physical spaces on power-of-two sizes and
  alignments, and any design that includes devices which don't follow this
  can be addressed by undefining the POW2_MAPPINGS guard.
  
  Reviewed by:  bdragon
  Differential Revision: https://reviews.freebsd.org/D24248

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Sat Apr 11 00:16:50 2020
(r359792)
+++ head/sys/powerpc/booke/pmap.c   Sat Apr 11 00:17:55 2020
(r359793)
@@ -128,6 +128,10 @@ __FBSDID("$FreeBSD$");
 #include "mmu_if.h"
 
 #defineSPARSE_MAPDEV
+
+/* Use power-of-two mappings in mmu_booke_mapdev(), to save entries. */
+#definePOW2_MAPPINGS
+
 #ifdef  DEBUG
 #define debugf(fmt, args...) printf(fmt, ##args)
 #else
@@ -2211,6 +2215,8 @@ tlb1_find_pa(vm_paddr_t pa, tlb_entry_t *e)
for (i = 0; i < TLB1_ENTRIES; i++) {
tlb1_read_entry(e, i);
if ((e->mas1 & MAS1_VALID) == 0)
+   continue;
+   if (e->phys == pa)
return (i);
}
return (-1);
@@ -2224,7 +2230,7 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
 #ifndef __powerpc64__
uintptr_t tmpva;
 #endif
-   uintptr_t va;
+   uintptr_t va, retva;
vm_size_t sz;
int i;
int wimge;
@@ -2245,7 +2251,7 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
if (tmppa >= e.phys && tmppa < e.phys + e.size) {
va = e.virt + (pa - e.phys);
tmppa = e.phys + e.size;
-   sz -= MIN(sz, e.size);
+   sz -= MIN(sz, e.size - (pa - e.phys));
while (sz > 0 && (i = tlb1_find_pa(tmppa, )) != -1) {
if (wimge != (e.mas2 & (MAS2_WIMGE_MASK & 
~_TLB_ENTRY_SHARED)))
break;
@@ -2264,6 +2270,25 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
KASSERT(pa < VM_MAPDEV_PA_MAX,
("Unsupported physical address! %lx", pa));
va = VM_MAPDEV_BASE + pa;
+   retva = va;
+#ifdef POW2_MAPPINGS
+   /*
+* Align the mapping to a power of 2 size, taking into account that we
+* may need to increase the size multiple times to satisfy the size and
+* alignment requirements.
+*
+* This works in the general case because it's very rare (near never?)
+* to have different access properties (WIMG) within a single
+* power-of-two region.  If a design does call for that, POW2_MAPPINGS
+* can be undefined, and exact mappings will be used instead.
+*/
+   sz = size;
+   size = roundup2(size, 1 << ilog2(size));
+   while (rounddown2(va, size) + size < va + sz)
+   size <<= 1;
+   va = rounddown2(va, size);
+   pa = rounddown2(pa, size);
+#endif
 #else
/*
 * The device mapping area is between VM_MAXUSER_ADDRESS and
@@ -2288,14 +2313,15 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
sz = sz ? min(roundup(sz + 3, 4), flsl(size) - 1) : flsl(size) - 1;
va = roundup(tlb1_map_base, 1 << sz) | (((1 << sz) - 1) & pa);
} while (!atomic_cmpset_int(_map_base, tmpva, va + size));
+#endif
va = atomic_fetchadd_int(_map_base, size);
+   retva = va;
 #endif
-#endif
 
if (tlb1_mapin_region(va, pa, size, tlb_calc_wimg(pa, ma)) != size)
return (NULL);
 
-   return ((void *)va);
+   return ((void *)retva);
 }
 
 /*
@@ -2584,6 +2610,24 @@ tlb1_find_free(void)
 }
 
 static void
+tlb1_purge_va_range(vm_offset_t va, vm_size_t size)
+{
+   tlb_entry_t e;
+   int i;
+
+   for (i = 0; i < TLB1_ENTRIES; i++) {
+   tlb1_read_entry(, i);
+   if ((e.mas1 & MAS1_VALID) == 0)
+   continue;
+   if ((e.mas2 & MAS2_EPN_MASK) >= va &&
+   (e.mas2 & MAS2_EPN_MASK) < va + size) {
+   mtspr(SPR_MAS1, e.mas1 & ~MAS1_VALID);
+   __asm __volatile("isync; tlbwe; isync; msync");
+   }
+   }
+}
+
+static void
 

svn commit: r359792 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Sat Apr 11 00:16:50 2020
New Revision: 359792
URL: https://svnweb.freebsd.org/changeset/base/359792

Log:
  powerpc/booke: Add pte_find_next() to find the next in-use PTE
  
  Summary:
  Iterating over VM_MIN_ADDRESS->VM_MAXUSER_ADDRESS can take a very long
  time iterating one page at a time (2**(log_2(SIZE)-12) operations),
  yielding possibly several days or even weeks on 64-bit Book-E, even for
  a largely empty, which can happen when swapping out a process by
  vmdaemon.  Speed this up by instead finding the next PTE at or equal to
  the given VA.
  
  Reviewed by:  bdragon
  Differential Revision: https://reviews.freebsd.org/D24238

Modified:
  head/sys/powerpc/booke/pmap.c
  head/sys/powerpc/booke/pmap_32.c
  head/sys/powerpc/booke/pmap_64.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Sat Apr 11 00:12:34 2020
(r359791)
+++ head/sys/powerpc/booke/pmap.c   Sat Apr 11 00:16:50 2020
(r359792)
@@ -1532,9 +1532,12 @@ mmu_booke_remove(mmu_t mmu, pmap_t pmap, vm_offset_t v
rw_wlock(_global_lock);
PMAP_LOCK(pmap);
for (; va < endva; va += PAGE_SIZE) {
-   pte = pte_find(mmu, pmap, va);
-   if ((pte != NULL) && PTE_ISVALID(pte))
-   pte_remove(mmu, pmap, va, hold_flag);
+   pte = pte_find_next(mmu, pmap, );
+   if ((pte == NULL) || !PTE_ISVALID(pte))
+   break;
+   if (va >= endva)
+   break;
+   pte_remove(mmu, pmap, va, hold_flag);
}
PMAP_UNLOCK(pmap);
rw_wunlock(_global_lock);

Modified: head/sys/powerpc/booke/pmap_32.c
==
--- head/sys/powerpc/booke/pmap_32.cSat Apr 11 00:12:34 2020
(r359791)
+++ head/sys/powerpc/booke/pmap_32.cSat Apr 11 00:16:50 2020
(r359792)
@@ -598,6 +598,35 @@ pte_find(mmu_t mmu, pmap_t pmap, vm_offset_t va)
return (NULL);
 }
 
+/* Get a pointer to a PTE in a page table, or the next closest (greater) one. 
*/
+static __inline pte_t *
+pte_find_next(mmu_t mmu, pmap_t pmap, vm_offset_t *pva)
+{
+   vm_offset_t va;
+   pte_t **pdir;
+   pte_t  *pte;
+   unsigned long   i, j;
+
+   KASSERT((pmap != NULL), ("pte_find: invalid pmap"));
+
+   va = *pva;
+   i = PDIR_IDX(va);
+   j = PTBL_IDX(va);
+   pdir = pmap->pm_pdir;
+   for (; i < PDIR_NENTRIES; i++, j = 0) {
+   if (pdir[i] == NULL)
+   continue;
+   for (; j < PTBL_NENTRIES; j++) {
+   pte = [i][j];
+   if (!PTE_ISVALID(pte))
+   continue;
+   *pva = PDIR_SIZE * i + PAGE_SIZE * j;
+   return (pte);
+   }
+   }
+   return (NULL);
+}
+
 /* Set up kernel page tables. */
 static void
 kernel_pte_alloc(vm_offset_t data_end, vm_offset_t addr)

Modified: head/sys/powerpc/booke/pmap_64.c
==
--- head/sys/powerpc/booke/pmap_64.cSat Apr 11 00:12:34 2020
(r359791)
+++ head/sys/powerpc/booke/pmap_64.cSat Apr 11 00:16:50 2020
(r359792)
@@ -145,6 +145,7 @@ static vm_paddr_t pte_vatopa(mmu_t, pmap_t, vm_offset_
 static int pte_enter(mmu_t, pmap_t, vm_page_t, vm_offset_t, uint32_t, 
boolean_t);
 static int pte_remove(mmu_t, pmap_t, vm_offset_t, uint8_t);
 static pte_t *pte_find(mmu_t, pmap_t, vm_offset_t);
+static pte_t *pte_find_next(mmu_t, pmap_t, vm_offset_t *);
 static void kernel_pte_alloc(vm_offset_t, vm_offset_t);
 
 /**/
@@ -202,6 +203,50 @@ pte_find(mmu_t mmu, pmap_t pmap, vm_offset_t va)
ptbl = pdir[PDIR_IDX(va)];
 
return ((ptbl != NULL) ? [PTBL_IDX(va)] : NULL);
+}
+
+/* Get a pointer to a PTE in a page table, or the next closest (greater) one. 
*/
+static __inline pte_t *
+pte_find_next(mmu_t mmu, pmap_t pmap, vm_offset_t *pva)
+{
+   vm_offset_t va;
+   pte_t   pm_root;
+   pte_t  *pte;
+   unsigned long   i, j, k, l;
+
+   KASSERT((pmap != NULL), ("pte_find: invalid pmap"));
+
+   va = *pva;
+   i = PG_ROOT_IDX(va);
+   j = PDIR_L1_IDX(va);
+   k = PDIR_IDX(va);
+   l = PTBL_IDX(va);
+   pm_root = pmap->pm_root;
+   /* truncate the VA for later. */
+   va &= ~((1UL << (PG_ROOT_H + 1)) - 1);
+   for (; i < PG_ROOT_NENTRIES; i++, j = 0) {
+   if (pm_root[i] == 0)
+   continue;
+   for (; j < PDIR_L1_NENTRIES; j++, k = 0) {
+   if (pm_root[i][j] == 0)
+   continue;
+   for (; k < PDIR_NENTRIES; k++, l 

svn commit: r359791 - in head/sys/powerpc: booke include powerpc

[Justin Hibbits]

l_pmap->pm_pdir = (pte_t **)kernel_ptbl_root;
-#endif
 
debugf("kernel_pmap = 0x%"PRI0ptrX"\n", (uintptr_t)kernel_pmap);
-   kernel_pte_alloc(virtual_avail, kernstart, kernel_pdir);
+   kernel_pte_alloc(virtual_avail, kernstart);
for (i = 0; i < MAXCPU; i++) {
kernel_pmap->pm_tid[i] = TID_KERNEL;

@@ -1327,7 +1282,7 @@ mmu_booke_enter_locked(mmu_t mmu, pmap_t pmap, vm_offs
 {
pte_t *pte;
vm_paddr_t pa;
-   uint32_t flags;
+   pte_t flags;
int error, su, sync;
 
pa = VM_PAGE_TO_PHYS(m);

Modified: head/sys/powerpc/booke/pmap_32.c
==
--- head/sys/powerpc/booke/pmap_32.cFri Apr 10 23:58:07 2020
(r359790)
+++ head/sys/powerpc/booke/pmap_32.cSat Apr 11 00:12:34 2020    
(r359791)
@@ -1,6 +1,7 @@
 /*-
  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
  *
+ * Copyright (C) 2020 Justin Hibbits
  * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski 
  * Copyright (C) 2006 Semihalf, Marian Balakowicz 
  * All rights reserved.
@@ -109,6 +110,9 @@ static vm_offset_t copy_page_src_va;
 static vm_offset_t copy_page_dst_va;
 static struct mtx copy_page_mutex;
 
+static vm_offset_t kernel_ptbl_root;
+static unsigned int kernel_ptbls;  /* Number of KVA ptbls. */
+
 /**/
 /* PMAP */
 /**/
@@ -137,7 +141,6 @@ static vm_paddr_t pte_vatopa(mmu_t, pmap_t, vm_offset_
 static int pte_enter(mmu_t, pmap_t, vm_page_t, vm_offset_t, uint32_t, 
boolean_t);
 static int pte_remove(mmu_t, pmap_t, vm_offset_t, uint8_t);
 static pte_t *pte_find(mmu_t, pmap_t, vm_offset_t);
-static void kernel_pte_alloc(vm_offset_t, vm_offset_t, vm_offset_t);
 
 struct ptbl_buf {
TAILQ_ENTRY(ptbl_buf) link; /* list link */
@@ -597,16 +600,23 @@ pte_find(mmu_t mmu, pmap_t pmap, vm_offset_t va)
 
 /* Set up kernel page tables. */
 static void
-kernel_pte_alloc(vm_offset_t data_end, vm_offset_t addr, vm_offset_t pdir)
+kernel_pte_alloc(vm_offset_t data_end, vm_offset_t addr)
 {
-   int i;
-   vm_offset_t va;
pte_t   *pte;
+   vm_offset_t va;
+   vm_offset_t pdir_start;
+   int i;
 
+   kptbl_min = VM_MIN_KERNEL_ADDRESS / PDIR_SIZE;
+   kernel_pmap->pm_pdir = (pte_t **)kernel_ptbl_root;
+
+   pdir_start = kernel_ptbl_root + PDIR_NENTRIES * sizeof(pte_t);
+
/* Initialize kernel pdir */
-   for (i = 0; i < kernel_ptbls; i++)
+   for (i = 0; i < kernel_ptbls; i++) {
kernel_pmap->pm_pdir[kptbl_min + i] =
-   (pte_t *)(pdir + (i * PAGE_SIZE * PTBL_PAGES));
+   (pte_t *)(pdir_start + (i * PAGE_SIZE * PTBL_PAGES));
+   }
 
/*
 * Fill in PTEs covering kernel code and data. They are not required
@@ -616,10 +626,36 @@ kernel_pte_alloc(vm_offset_t data_end, vm_offset_t add
 */
for (va = addr; va < data_end; va += PAGE_SIZE) {
pte = &(kernel_pmap->pm_pdir[PDIR_IDX(va)][PTBL_IDX(va)]);
+   powerpc_sync();
*pte = PTE_RPN_FROM_PA(kernload + (va - kernstart));
*pte |= PTE_M | PTE_SR | PTE_SW | PTE_SX | PTE_WIRED |
PTE_VALID | PTE_PS_4KB;
}
+}
+
+static vm_offset_t
+mmu_booke_alloc_kernel_pgtables(vm_offset_t data_end)
+{
+   /* Allocate space for ptbl_bufs. */
+   ptbl_bufs = (struct ptbl_buf *)data_end;
+   data_end += sizeof(struct ptbl_buf) * PTBL_BUFS;
+   debugf(" ptbl_bufs at 0x%"PRI0ptrX" end = 0x%"PRI0ptrX"\n",
+   (uintptr_t)ptbl_bufs, data_end);
+
+   data_end = round_page(data_end);
+
+   kernel_ptbl_root = data_end;
+   data_end += PDIR_NENTRIES * sizeof(pte_t*);
+
+   /* Allocate PTE tables for kernel KVA. */
+   kernel_ptbls = howmany(VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS,
+   PDIR_SIZE);
+   data_end += kernel_ptbls * PTBL_PAGES * PAGE_SIZE;
+   debugf(" kernel ptbls: %d\n", kernel_ptbls);
+   debugf(" kernel pdir at %#jx end = %#jx\n",
+   (uintmax_t)kernel_ptbl_root, (uintmax_t)data_end);
+
+   return (data_end);
 }
 
 /*

Modified: head/sys/powerpc/booke/pmap_64.c
==
--- head/sys/powerpc/booke/pmap_64.cFri Apr 10 23:58:07 2020
(r359790)
+++ head/sys/powerpc/booke/pmap_64.cSat Apr 11 00:12:34 2020
(r359791)
@@ -1,6 +1,7 @@
 /*-
  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
  *
+ * Copyright (C) 2020 Justin Hibbits
  * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski 
  * Copyright (C) 2006 Semihalf, Marian Balakowicz 
  * All rights reserved.
@@ -114,6 +115

svn commit: r359756 - head/sys/dev/mii

[Justin Hibbits]

Author: jhibbits
Date: Thu Apr  9 21:24:17 2020
New Revision: 359756
URL: https://svnweb.freebsd.org/changeset/base/359756

Log:
  Add support for BCM54618SE PHY
  
  MFC after:3 days
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/dev/mii/brgphy.c
  head/sys/dev/mii/miidevs

Modified: head/sys/dev/mii/brgphy.c
==
--- head/sys/dev/mii/brgphy.c   Thu Apr  9 20:49:01 2020(r359755)
+++ head/sys/dev/mii/brgphy.c   Thu Apr  9 21:24:17 2020(r359756)
@@ -152,6 +152,7 @@ static const struct mii_phydesc brgphys[] = {
 #ifdef notyet  /* better handled by ukphy(4) until WARs are implemented */
MII_PHY_DESC(BROADCOM2, BCM5785),
 #endif
+   MII_PHY_DESC(BROADCOM3, BCM54618SE),
MII_PHY_DESC(BROADCOM3, BCM5717C),
MII_PHY_DESC(BROADCOM3, BCM5719C),
MII_PHY_DESC(BROADCOM3, BCM5720C),

Modified: head/sys/dev/mii/miidevs
==
--- head/sys/dev/mii/miidevsThu Apr  9 20:49:01 2020(r359755)
+++ head/sys/dev/mii/miidevsThu Apr  9 21:24:17 2020(r359756)
@@ -190,6 +190,7 @@ model BROADCOM2 BCM5784 0x003a BCM5784 
10/100/1000bas
 model BROADCOM2 BCM5709C   0x003c BCM5709 10/100/1000baseT PHY
 model BROADCOM2 BCM57610x003d BCM5761 10/100/1000baseT PHY
 model BROADCOM2 BCM5709S   0x003f BCM5709S/5720S 1000/2500baseSX PHY
+model BROADCOM3 BCM54618SE 0x000d BCM54618SE 10/100/1000BASE-T PHY
 model BROADCOM3 BCM57780   0x0019 BCM57780 1000BASE-T media interface
 model BROADCOM3 BCM5717C   0x0020 BCM5717C 1000BASE-T media interface
 model BROADCOM3 BCM5719C   0x0022 BCM5719C 1000BASE-T media interface
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svn commit: r359614 - in head/sys: conf powerpc/amigaone

[Justin Hibbits]

Author: jhibbits
Date: Fri Apr  3 20:45:16 2020
New Revision: 359614
URL: https://svnweb.freebsd.org/changeset/base/359614

Log:
  powerpc/amigaone: Add CPLD driver for AmigaOne A1222 "Tabor"
  
  Like the X5000, the main CPLD on the A1222 is the communication medium
  between the CPU and the GPIO CPLD.  It provides a mailbox communication
  feature, along with dual-port RAM accessible from both the CPU and GPIO
  CPLD, and 3 fan speed reporting registers.

Added:
  head/sys/powerpc/amigaone/cpld_a1222.c   (contents, props changed)
Modified:
  head/sys/conf/files.powerpc

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Fri Apr  3 20:43:25 2020(r359613)
+++ head/sys/conf/files.powerpc Fri Apr  3 20:45:16 2020(r359614)
@@ -140,7 +140,8 @@ powerpc/aim/moea64_native.c optionalaim
 powerpc/aim/mp_cpudep.coptionalaim
 powerpc/aim/slb.c  optionalaim powerpc64
 powerpc/amigaone/platform_amigaone.c   optionalamigaone
-powerpc/amigaone/cpld_x5000.c  optionalpowerpc amigaone | 
powerpc64 amigaone
+powerpc/amigaone/cpld_a1222.c  optionalpowerpc amigaone | powerpcspe 
amigaone
+powerpc/amigaone/cpld_x5000.c  optionalpowerpc amigaone | powerpc64 
amigaone
 powerpc/booke/locore.S optionalbooke no-obj
 powerpc/booke/booke_machdep.c  optionalbooke
 powerpc/booke/machdep_e500.c   optionalbooke_e500

Added: head/sys/powerpc/amigaone/cpld_a1222.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/powerpc/amigaone/cpld_a1222.c  Fri Apr  3 20:45:16 2020
(r359614)
@@ -0,0 +1,401 @@
+/*-
+ * Copyright (c) 2020 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "cpld.h"
+
+/*
+ * A driver for the AmigaOne A1222 "Tabor" Main CPLD.
+ *
+ * The main CPLD is the interface between the CPU and the GPIO CPLD.
+ * Communication with the GPIO CPLD is over the main CPLD's mailbox interface,
+ * along with the dual-port RAM on the CPLD.
+ *
+ * Only one process can open the CPLD character device at a time.  The driver
+ * enforces this to simplify the communication protocol.
+ */
+
+/* Resource access addresses. */
+#defineCPLD_MEM_ADDR_H 0x00
+#defineCPLD_MEM_ADDR_L 0x01
+#defineCPLD_MEM_DATA   0x80
+
+#defineCPLD_MAX_DRAM_WORDS 0x800
+
+/* CPLD Registers. */
+#defineCPLD_REG_SIG1   0x00
+#defineCPLD_REG_SIG2   0x01
+#defineCPLD_REG_HWREV  0x02
+#defineCPLD_REG_CPLDREV0x03
+#defineCPLD_REG_MBC2X  0x04
+#defineCPLD_REG_MBX2C  0x05
+#defineCPLD_REG_FAN1_TACHO_U   0x10
+#defineCPLD_REG_FAN1_TACHO_L   0x11
+#defineCPLD_REG_FAN2_TACHO_U   0x12
+#defineCPLD_REG_FAN2_TACHO_L   0x13
+#defineCPLD_REG_FAN3_TACHO_U   0x14
+#defineCPLD_REG_FAN3_TACHO_L   0x15
+#defineCPLD_REG_DATE_UU0x20
+#defineCPLD_REG_DATE_UL0x21
+#defineCPLD_REG_DATE_LU0x22
+#defineCPLD_REG_DATE_LL0x23
+#defineCPLD_REG_TIME_UU0x24
+#defineCPLD_REG_TIME_UL0x25
+#defineCPLD_REG_TIME_LU0x26
+#defineCPLD_REG_TIME_LL0x27
+#de

svn commit: r359445 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Mon Mar 30 16:32:55 2020
New Revision: 359445
URL: https://svnweb.freebsd.org/changeset/base/359445

Log:
  powerpc/pmap: Replace a logical TAILQ_FOREACH_SAFE with the real thing
  
  No functional change, just cleanup.

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Mon Mar 30 16:24:05 2020
(r359444)
+++ head/sys/powerpc/booke/pmap.c   Mon Mar 30 16:32:55 2020
(r359445)
@@ -1597,9 +1597,7 @@ mmu_booke_remove_all(mmu_t mmu, vm_page_t m)
uint8_t hold_flag;
 
rw_wlock(_global_lock);
-   for (pv = TAILQ_FIRST(>md.pv_list); pv != NULL; pv = pvn) {
-   pvn = TAILQ_NEXT(pv, pv_link);
-
+   TAILQ_FOREACH_SAFE(pv, >md.pv_list, pv_link, pvn) {
PMAP_LOCK(pv->pv_pmap);
hold_flag = PTBL_HOLD_FLAG(pv->pv_pmap);
pte_remove(mmu, pv->pv_pmap, pv->pv_va, hold_flag);
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svn commit: r359444 - head/share/mk

[Justin Hibbits]

Author: jhibbits
Date: Mon Mar 30 16:24:05 2020
New Revision: 359444
URL: https://svnweb.freebsd.org/changeset/base/359444

Log:
  powerpc: --secure-plt only needs to pass to ld.bfd, not ld.lld
  
  ld.lld only supports secure-plt for powerpc, so no need to pass the argument
  in.

Modified:
  head/share/mk/bsd.cpu.mk

Modified: head/share/mk/bsd.cpu.mk
==
--- head/share/mk/bsd.cpu.mkMon Mar 30 16:22:16 2020(r359443)
+++ head/share/mk/bsd.cpu.mkMon Mar 30 16:24:05 2020(r359444)
@@ -340,7 +340,7 @@ CFLAGS += -mfloat-abi=softfp
 .endif
 
 .if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe"
-LDFLAGS+= -Wl,--secure-plt
+LDFLAGS.bfd+= -Wl,--secure-plt
 .endif
 
 .if ${MACHINE_ARCH} == "powerpcspe"
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svn commit: r359285 - head/sys/dev/ichwd

[Justin Hibbits]

Author: jhibbits
Date: Tue Mar 24 21:28:48 2020
New Revision: 359285
URL: https://svnweb.freebsd.org/changeset/base/359285

Log:
  ichwd: Add Atom C3000 watchdog ID.
  
  MFC after:3 days
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/dev/ichwd/ichwd.c
  head/sys/dev/ichwd/ichwd.h

Modified: head/sys/dev/ichwd/ichwd.c
==
--- head/sys/dev/ichwd/ichwd.c  Tue Mar 24 19:33:21 2020(r359284)
+++ head/sys/dev/ichwd/ichwd.c  Tue Mar 24 21:28:48 2020(r359285)
@@ -297,6 +297,7 @@ static struct ichwd_device ichwd_devices[] = {
 static struct ichwd_device ichwd_smb_devices[] = {
{ DEVICEID_LEWISBURG_SMB, "Lewisburg watchdog timer",   10, 4 },
{ DEVICEID_SRPTLP_SMB,"Sunrise Point-LP watchdog timer",10, 4 },
+   { DEVICEID_C3000, "Intel Atom C3000 watchdog timer",10, 4 },
{ 0, NULL, 0, 0 },
 };
 

Modified: head/sys/dev/ichwd/ichwd.h
==
--- head/sys/dev/ichwd/ichwd.h  Tue Mar 24 19:33:21 2020(r359284)
+++ head/sys/dev/ichwd/ichwd.h  Tue Mar 24 21:28:48 2020(r359285)
@@ -67,6 +67,7 @@ struct ichwd_softc {
 
 #defineVENDORID_INTEL  0x8086
 #defineDEVICEID_BAYTRAIL   0x0f1c
+#defineDEVICEID_C3000  0x19df
 #defineDEVICEID_CPT0   0x1c40
 #defineDEVICEID_CPT1   0x1c41
 #defineDEVICEID_CPT2   0x1c42
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svn commit: r359279 - head/sys/dev/ismt

[Justin Hibbits]

Author: jhibbits
Date: Tue Mar 24 18:35:33 2020
New Revision: 359279
URL: https://svnweb.freebsd.org/changeset/base/359279

Log:
  ismt: Fix ISMT_DESC_ADDR_RW macro, slave addresses are already left-shifted
  
  Reverts r293369.  The macro was orginally correct, since our SMBus
  framework, unlike i2c, already requires addresses to be 8-bit, LSB-cleared.
  
  MFC after:3 days
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/dev/ismt/ismt.c

Modified: head/sys/dev/ismt/ismt.c
==
--- head/sys/dev/ismt/ismt.cTue Mar 24 18:17:10 2020(r359278)
+++ head/sys/dev/ismt/ismt.cTue Mar 24 18:35:33 2020(r359279)
@@ -72,7 +72,7 @@ __FBSDID("$FreeBSD$");
 #define ISMT_DESC_LPR  0x80/* Large Packet Received */
 
 /* Macros */
-#define ISMT_DESC_ADDR_RW(addr, is_read) ((addr << 1) | (is_read))
+#define ISMT_DESC_ADDR_RW(addr, is_read) ((addr) | (is_read))
 
 /* iSMT General Register address offsets (SMBBAR + ) */
 #define ISMT_GR_GCTRL  0x000   /* General Control */
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svn commit: r359058 - in head/sys: conf powerpc/booke powerpc/conf powerpc/include powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Wed Mar 18 01:09:43 2020
New Revision: 359058
URL: https://svnweb.freebsd.org/changeset/base/359058

Log:
  powerpc: Axe PPC4xx support.
  
  Summary:
  The support was added almost a decade ago, and never completed.  Just axe
  it.  It was also inadvertently broken 5 years ago, and nobody noticed.
  
  Reviewed by:  bdragon
  Differential Revision:https://reviews.freebsd.org/D23753

Deleted:
  head/sys/powerpc/booke/machdep_ppc4xx.c
Modified:
  head/sys/conf/options.powerpc
  head/sys/powerpc/booke/machdep_e500.c
  head/sys/powerpc/conf/NOTES
  head/sys/powerpc/include/machdep.h
  head/sys/powerpc/include/profile.h
  head/sys/powerpc/include/pte.h
  head/sys/powerpc/include/spr.h
  head/sys/powerpc/include/tlb.h
  head/sys/powerpc/powerpc/db_disasm.c

Modified: head/sys/conf/options.powerpc
==
--- head/sys/conf/options.powerpc   Wed Mar 18 01:09:40 2020
(r359057)
+++ head/sys/conf/options.powerpc   Wed Mar 18 01:09:43 2020
(r359058)
@@ -4,7 +4,6 @@
 AIMopt_global.h
 BOOKE  opt_global.h
 BOOKE_E500 opt_global.h
-BOOKE_PPC4XX   opt_global.h
 CELL
 
 POWERPC

Modified: head/sys/powerpc/booke/machdep_e500.c
==
--- head/sys/powerpc/booke/machdep_e500.c   Wed Mar 18 01:09:40 2020
(r359057)
+++ head/sys/powerpc/booke/machdep_e500.c   Wed Mar 18 01:09:43 2020
(r359058)
@@ -53,12 +53,6 @@ extern void l2cache_inval(void);
 extern void bpred_enable(void);
 
 void
-booke_init_tlb(vm_paddr_t fdt_immr_pa)
-{
-
-}
-
-void
 booke_enable_l1_cache(void)
 {
uint32_t csr;

Modified: head/sys/powerpc/conf/NOTES
==
--- head/sys/powerpc/conf/NOTES Wed Mar 18 01:09:40 2020(r359057)
+++ head/sys/powerpc/conf/NOTES Wed Mar 18 01:09:43 2020(r359058)
@@ -36,7 +36,6 @@ options   KDTRACE_HOOKS
 # You must specify at least one CPU (the one you intend to run on).
 cpuAIM
 #cpu   BOOKE_E500
-#cpu   BOOKE_PPC440
 
 optionsFPU_EMU
 

Modified: head/sys/powerpc/include/machdep.h
==
--- head/sys/powerpc/include/machdep.h  Wed Mar 18 01:09:40 2020
(r359057)
+++ head/sys/powerpc/include/machdep.h  Wed Mar 18 01:09:43 2020
(r359058)
@@ -35,6 +35,5 @@ void booke_disable_l2_cache(void);
 void booke_enable_l1_cache(void);
 void booke_enable_l2_cache(void);
 void booke_enable_bpred(void);
-void booke_init_tlb(vm_paddr_t);
 
 #endif /* _POWERPC_MACHDEP_H_ */

Modified: head/sys/powerpc/include/profile.h
==
--- head/sys/powerpc/include/profile.h  Wed Mar 18 01:09:40 2020
(r359057)
+++ head/sys/powerpc/include/profile.h  Wed Mar 18 01:09:43 2020
(r359058)
@@ -190,7 +190,7 @@ extern char interrupt_vector_base[];
 extern char interrupt_vector_top[];
 #define__PROFILE_VECTOR_BASE   (uintfptr_t)interrupt_vector_base
 #define__PROFILE_VECTOR_TOP(uintfptr_t)interrupt_vector_top
-#endif /* BOOKE_E500 || BOOKE_PPC4XX */
+#endif /* BOOKE_E500 */
 
 #endif /* !COMPILING_LINT */
 

Modified: head/sys/powerpc/include/pte.h
==
--- head/sys/powerpc/include/pte.h  Wed Mar 18 01:09:40 2020
(r359057)
+++ head/sys/powerpc/include/pte.h  Wed Mar 18 01:09:43 2020
(r359058)
@@ -241,24 +241,6 @@ typedef uint64_t pte_t;
 #definePTE_PS_SHIFT8
 #definePTE_PS_4KB  (2 << PTE_PS_SHIFT)
 
-#elif defined(BOOKE_PPC4XX)
-
-#define PTE_WL1TLB_WL1
-#define PTE_IL2I   TLB_IL2I
-#define PTE_IL2D   TLB_IL2D
-
-#define PTE_W  TLB_W
-#define PTE_I  TLB_I
-#define PTE_M  TLB_M
-#define PTE_G  TLB_G
-
-#define PTE_UX TLB_UX
-#define PTE_SX TLB_SX
-#define PTE_UW TLB_UW
-#define PTE_SW TLB_SW
-#define PTE_UR TLB_UR
-#define PTE_SR TLB_SR
-
 #endif
 
 /* Other PTE flags */

Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h  Wed Mar 18 01:09:40 2020
(r359057)
+++ head/sys/powerpc/include/spr.h  Wed Mar 18 01:09:43 2020
(r359058)
@@ -144,16 +144,16 @@
 #define  FSCR_EBB0x0080 /* Event-based 
branch available */
 #define  FSCR_DSCR   0x0004 /* DSCR available 
in PR state */
 #defineSPR_DPDES   0x0b0   /* .6. Directed Privileged 
Doorbell Exception State Register */
-#defineSPR_USPRG0  0x100   /* 4.. User SPR General 0 */

svn commit: r358928 - in head/sys/powerpc: booke powerpc

[Justin Hibbits]

Author: jhibbits
Date: Fri Mar 13 01:27:37 2020
New Revision: 358928
URL: https://svnweb.freebsd.org/changeset/base/358928

Log:
  powerpc: Simplify _nodrop variants of FPU and vector register saves
  
  No need for an extra temporary.  It doesn't even help with readability.
  
  Suggested by: kib (almost 2 years ago)

Modified:
  head/sys/powerpc/booke/spe.c
  head/sys/powerpc/powerpc/altivec.c
  head/sys/powerpc/powerpc/fpu.c

Modified: head/sys/powerpc/booke/spe.c
==
--- head/sys/powerpc/booke/spe.cFri Mar 13 01:06:08 2020
(r358927)
+++ head/sys/powerpc/booke/spe.cFri Mar 13 01:27:37 2020
(r358928)
@@ -183,14 +183,11 @@ save_vec(struct thread *td)
 void
 save_vec_nodrop(struct thread *td)
 {
-   struct thread *vtd;
struct pcb *pcb;
int i;
 
-   vtd = PCPU_GET(vecthread);
-   if (td == vtd) {
+   if (td == PCPU_GET(vecthread))
save_vec_int(td);
-   }
 
pcb = td->td_pcb;
 

Modified: head/sys/powerpc/powerpc/altivec.c
==
--- head/sys/powerpc/powerpc/altivec.c  Fri Mar 13 01:06:08 2020
(r358927)
+++ head/sys/powerpc/powerpc/altivec.c  Fri Mar 13 01:27:37 2020
(r358928)
@@ -168,12 +168,7 @@ save_vec(struct thread *td)
 void
 save_vec_nodrop(struct thread *td)
 {
-   struct thread *vtd;
 
-   vtd = PCPU_GET(vecthread);
-   if (td != vtd) {
-   return;
-   }
-
-   save_vec_int(td);
+   if (td == PCPU_GET(vecthread))
+   save_vec_int(td);
 }

Modified: head/sys/powerpc/powerpc/fpu.c
==
--- head/sys/powerpc/powerpc/fpu.c  Fri Mar 13 01:06:08 2020
(r358927)
+++ head/sys/powerpc/powerpc/fpu.c  Fri Mar 13 01:27:37 2020
(r358928)
@@ -204,12 +204,7 @@ save_fpu(struct thread *td)
 void
 save_fpu_nodrop(struct thread *td)
 {
-   struct thread *ftd;
 
-   ftd = PCPU_GET(fputhread);
-   if (td != ftd) {
-   return;
-   }
-
-   save_fpu_int(td);
+   if (td == PCPU_GET(fputhread))
+   save_fpu_int(td);
 }
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svn commit: r358828 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Tue Mar 10 03:30:11 2020
New Revision: 358828
URL: https://svnweb.freebsd.org/changeset/base/358828

Log:
  powerpc/booke: Split out 32- and 64- bit pmap details from main body
  
  Summary:
  This is largely a straight-forward cleave of the 32-bit and 64-bit page
  table specifics, along with the mmu_booke_*() functions that are wholely
  different between the two implementations.
  
  The ultimate goal of this is to make it easier to reason about and
  update a specific implementation without wading through the other
  implementation details.  This is in support of further changes to the 64-bit
  pmap.
  
  Reviewed by: bdragon
  Differential Revision: https://reviews.freebsd.org/D23983

Added:
  head/sys/powerpc/booke/pmap_32.c   (contents, props changed)
  head/sys/powerpc/booke/pmap_64.c   (contents, props changed)
Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Mon Mar  9 23:40:25 2020
(r358827)
+++ head/sys/powerpc/booke/pmap.c   Tue Mar 10 03:30:11 2020
(r358828)
@@ -221,25 +221,7 @@ uint32_t tlb1_entries;
 
 #define TLB1_ENTRIES (tlb1_entries)
 
-/*
- * Base of the pmap_mapdev() region.  On 32-bit it immediately follows the
- * userspace address range.  On On 64-bit it's far above, at (1 << 63), and
- * ranges up to the DMAP, giving 62 bits of PA allowed.  This is far larger 
than
- * the widest Book-E address bus, the e6500 has a 40-bit PA space.  This allows
- * us to map akin to the DMAP, with addresses identical to the PA, offset by 
the
- * base.
- */
-#ifdef __powerpc64__
-#defineVM_MAPDEV_BASE  0x8000
-#defineVM_MAPDEV_PA_MAX0x4000 /* Don't encroach on 
DMAP */
-#else
-#defineVM_MAPDEV_BASE  ((vm_offset_t)VM_MAXUSER_ADDRESS + PAGE_SIZE)
-#endif
-
-static vm_offset_t tlb1_map_base = VM_MAPDEV_BASE;
-
 static tlbtid_t tid_alloc(struct pmap *);
-static void tid_flush(tlbtid_t tid);
 
 #ifdef DDB
 #ifdef __powerpc64__
@@ -254,6 +236,8 @@ static void tlb1_write_entry(tlb_entry_t *, unsigned i
 static int tlb1_iomapped(int, vm_paddr_t, vm_size_t, vm_offset_t *);
 static vm_size_t tlb1_mapin_region(vm_offset_t, vm_paddr_t, vm_size_t, int);
 
+static __inline uint32_t tlb_calc_wimg(vm_paddr_t pa, vm_memattr_t ma);
+
 static vm_size_t tsize2size(unsigned int);
 static unsigned int size2tsize(vm_size_t);
 static unsigned long ilog2(unsigned long);
@@ -279,26 +263,6 @@ static int pv_entry_count = 0, pv_entry_max = 0, pv_en
 #define PMAP_SHPGPERPROC   200
 #endif
 
-#ifdef __powerpc64__
-#define PMAP_ROOT_SIZE (sizeof(pte_t***) * PP2D_NENTRIES)
-static pte_t *ptbl_alloc(mmu_t, pmap_t, pte_t **,
-unsigned int, boolean_t);
-static void ptbl_free(mmu_t, pmap_t, pte_t **, unsigned int, vm_page_t);
-static void ptbl_hold(mmu_t, pmap_t, pte_t **, unsigned int);
-static int ptbl_unhold(mmu_t, pmap_t, vm_offset_t);
-#else
-#define PMAP_ROOT_SIZE (sizeof(pte_t**) * PDIR_NENTRIES)
-static void ptbl_init(void);
-static struct ptbl_buf *ptbl_buf_alloc(void);
-static void ptbl_buf_free(struct ptbl_buf *);
-static void ptbl_free_pmap_ptbl(pmap_t, pte_t *);
-
-static pte_t *ptbl_alloc(mmu_t, pmap_t, unsigned int, boolean_t);
-static void ptbl_free(mmu_t, pmap_t, unsigned int);
-static void ptbl_hold(mmu_t, pmap_t, unsigned int);
-static int ptbl_unhold(mmu_t, pmap_t, unsigned int);
-#endif
-
 static vm_paddr_t pte_vatopa(mmu_t, pmap_t, vm_offset_t);
 static int pte_enter(mmu_t, pmap_t, vm_page_t, vm_offset_t, uint32_t, 
boolean_t);
 static int pte_remove(mmu_t, pmap_t, vm_offset_t, uint8_t);
@@ -312,26 +276,9 @@ static void pv_remove(pmap_t, vm_offset_t, vm_page_t);
 
 static void booke_pmap_init_qpages(void);
 
-struct ptbl_buf {
-   TAILQ_ENTRY(ptbl_buf) link; /* list link */
-   vm_offset_t kva;/* va of mapping */
-};
+static inline void tlb_miss_lock(void);
+static inline void tlb_miss_unlock(void);
 
-#ifndef __powerpc64__
-/* Number of kva ptbl buffers, each covering one ptbl (PTBL_PAGES). */
-#define PTBL_BUFS  (128 * 16)
-
-/* ptbl free list and a lock used for access synchronization. */
-static TAILQ_HEAD(, ptbl_buf) ptbl_buf_freelist;
-static struct mtx ptbl_buf_freelist_lock;
-
-/* Base address of kva space allocated fot ptbl bufs. */
-static vm_offset_t ptbl_buf_pool_vabase;
-
-/* Pointer to ptbl_buf structures. */
-static struct ptbl_buf *ptbl_bufs;
-#endif
-
 #ifdef SMP
 extern tlb_entry_t __boot_tlb1[];
 void pmap_bootstrap_ap(volatile uint32_t *);
@@ -476,6 +423,14 @@ static mmu_method_t mmu_booke_methods[] = {
 
 MMU_DEF(booke_mmu, MMU_TYPE_BOOKE, mmu_booke_methods, 0);
 
+#ifdef __powerpc64__
+#include "pmap_64.c"
+#else
+#include "pmap_32.c"
+#endif
+
+static vm_offset_t tlb1_map_base = VM_MAPDEV_BASE;
+
 static __inline uint32_t
 tlb_calc_wimg(vm_paddr_t pa, vm_memattr_t 

svn commit: r358729 - head/share/mk

[Justin Hibbits]

Author: jhibbits
Date: Sat Mar  7 03:58:58 2020
New Revision: 358729
URL: https://svnweb.freebsd.org/changeset/base/358729

Log:
  compat: Allow explicit overriding of COMPAT_ARCH and COMPAT_CPUTYPE
  
  Summary:
  Allow src.conf to override the inferred COMPAT_ARCH and COMPAT_CPUTYPE
  variables, such that a different CPU target can be specified explicitly
  for the general target vs the compat target.
  
  Reviewed by:  imp
  Differential Revision:https://reviews.freebsd.org/D23992

Modified:
  head/share/mk/bsd.compat.mk

Modified: head/share/mk/bsd.compat.mk
==
--- head/share/mk/bsd.compat.mk Sat Mar  7 00:55:46 2020(r358728)
+++ head/share/mk/bsd.compat.mk Sat Mar  7 03:58:58 2020(r358729)
@@ -4,8 +4,8 @@
 __<${_this:T}>__:
 
 .if defined(_LIBCOMPAT)
-COMPAT_ARCH=   ${TARGET_ARCH}
-COMPAT_CPUTYPE=${TARGET_CPUTYPE}
+COMPAT_ARCH?=  ${TARGET_ARCH}
+COMPAT_CPUTYPE?= ${CPUTYPE_${_LIBCOMPAT}}
 .if (defined(WANT_COMPILER_TYPE) && ${WANT_COMPILER_TYPE} == gcc) || \
 (defined(X_COMPILER_TYPE) && ${X_COMPILER_TYPE} == gcc)
 COMPAT_COMPILER_TYPE=  gcc
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svn commit: r358691 - head/lib/libc/powerpc64/string

[Justin Hibbits]

Author: jhibbits
Date: Fri Mar  6 03:46:48 2020
New Revision: 358691
URL: https://svnweb.freebsd.org/changeset/base/358691

Log:
  powerpc/memcpy: Don't predict the src and dst will be misaligned
  
  Predicting misalignment will pessimize the expected common case.  Don't
  predict true or false in thise case.

Modified:
  head/lib/libc/powerpc64/string/memcpy.S

Modified: head/lib/libc/powerpc64/string/memcpy.S
==
--- head/lib/libc/powerpc64/string/memcpy.S Fri Mar  6 02:30:04 2020
(r358690)
+++ head/lib/libc/powerpc64/string/memcpy.S Fri Mar  6 03:46:48 2020
(r358691)
@@ -58,7 +58,7 @@ ENTRY(FN_NAME)
andi.   %r7, %r4, ALIGN_MASK
cmpd%r8, %r7
mr  %r7, %r5
-   bne+.Lcopy_remaining_fix_index_byte
+   bne .Lcopy_remaining_fix_index_byte
mr  %r8, %r3/* save dst */
 
/* align src */
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svn commit: r358690 - head/lib/libc/powerpc64/string

[Justin Hibbits]

Author: jhibbits
Date: Fri Mar  6 02:30:04 2020
New Revision: 358690
URL: https://svnweb.freebsd.org/changeset/base/358690

Log:
  Finish revert of r358672, missed in r358688.
  
  Manual reverts never succeed correctly.
  
  Reported by:  luporl

Modified:
  head/lib/libc/powerpc64/string/bcopy_resolver.c

Modified: head/lib/libc/powerpc64/string/bcopy_resolver.c
==
--- head/lib/libc/powerpc64/string/bcopy_resolver.c Fri Mar  6 01:50:15 
2020(r358689)
+++ head/lib/libc/powerpc64/string/bcopy_resolver.c Fri Mar  6 02:30:04 
2020(r358690)
@@ -66,7 +66,7 @@ DEFINE_UIFUNC(, FN_RET, FN_NAME, FN_PARAMS)
 * Since POWER ISA 2.07B this is solved transparently
 * by the hardware
 */
-   if (cpu_features2 & PPC_FEATURE_HAS_VSX)
+   if (cpu_features & PPC_FEATURE_HAS_VSX)
return (FN_NAME_VSX);
else
return (FN_NAME_NOVSX);
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svn commit: r358689 - head/sys/dev/mfi

[Justin Hibbits]

Author: jhibbits
Date: Fri Mar  6 01:50:15 2020
New Revision: 358689
URL: https://svnweb.freebsd.org/changeset/base/358689

Log:
  Fix a mistaken conditional in mfi_tbolt_send_frame()
  
  As written, the condition of (cdb[0] != 0x28 || cdb[0] != 0x2A) will always
  be true, since if it's one, it's obviously not the other.  Reading the code,
  the intent appears to be that it should only perform the operation if it's
  neither, otherwise the conditional can be elided.
  
  Found by clang 10.

Modified:
  head/sys/dev/mfi/mfi_tbolt.c

Modified: head/sys/dev/mfi/mfi_tbolt.c
==
--- head/sys/dev/mfi/mfi_tbolt.cFri Mar  6 01:45:03 2020
(r358688)
+++ head/sys/dev/mfi/mfi_tbolt.cFri Mar  6 01:50:15 2020
(r358689)
@@ -1109,7 +1109,7 @@ mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_
 
if (hdr->cmd == MFI_CMD_PD_SCSI_IO) {
/* check for inquiry commands coming from CLI */
-   if (cdb[0] != 0x28 || cdb[0] != 0x2A) {
+   if (cdb[0] != 0x28 && cdb[0] != 0x2A) {
if ((req_desc = mfi_tbolt_build_mpt_cmd(sc, cm)) ==
NULL) {
device_printf(sc->mfi_dev, "Mapping from MFI "
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svn commit: r358688 - head/lib/libc/powerpc64/string

[Justin Hibbits]

Author: jhibbits
Date: Fri Mar  6 01:45:03 2020
New Revision: 358688
URL: https://svnweb.freebsd.org/changeset/base/358688

Log:
  powerpc/powerpc64: Enforce natural alignment in memcpy
  
  Summary:
  POWER architecture CPUs (Book-S) require natural alignment for
  cache-inhibited storage accesses.  Since we can't know the caching model
  for a page ahead of time, always enforce natural alignment in memcpy.
  This fixes a SIGBUS in X with acceleration enabled on POWER9.
  
  As part of this, revert r358672, it's no longer necessary with this fix.
  
  Regression tested by alfredo.
  
  Reviewed by: alfredo
  Differential Revision: https://reviews.freebsd.org/D23969

Modified:
  head/lib/libc/powerpc64/string/bcopy_resolver.c
  head/lib/libc/powerpc64/string/memcpy.S
  head/lib/libc/powerpc64/string/memcpy_vsx.S

Modified: head/lib/libc/powerpc64/string/bcopy_resolver.c
==
--- head/lib/libc/powerpc64/string/bcopy_resolver.c Thu Mar  5 22:45:16 
2020(r358687)
+++ head/lib/libc/powerpc64/string/bcopy_resolver.c Fri Mar  6 01:45:03 
2020(r358688)
@@ -66,7 +66,7 @@ DEFINE_UIFUNC(, FN_RET, FN_NAME, FN_PARAMS)
 * Since POWER ISA 2.07B this is solved transparently
 * by the hardware
 */
-   if (cpu_features2 & PPC_FEATURE2_ARCH_2_07)
+   if (cpu_features2 & PPC_FEATURE_HAS_VSX)
return (FN_NAME_VSX);
else
return (FN_NAME_NOVSX);

Modified: head/lib/libc/powerpc64/string/memcpy.S
==
--- head/lib/libc/powerpc64/string/memcpy.S Thu Mar  5 22:45:16 2020
(r358687)
+++ head/lib/libc/powerpc64/string/memcpy.S Fri Mar  6 01:45:03 2020
(r358688)
@@ -39,6 +39,11 @@ WEAK_REFERENCE(__memcpy, memcpy);
 #define BLOCK_BYTES(1 << BLOCK_BITS)
 #define BLOCK_MASK (BLOCK_BYTES - 1)
 
+/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults. */
+#ifndef ALIGN_MASK
+#defineALIGN_MASK  0x7
+#endif
+
 /*
  * r3: dst
  * r4: src
@@ -48,6 +53,12 @@ ENTRY(FN_NAME)
cmpdi   %r5, 0  /* len == 0? nothing to do */
beqlr-
 
+   /* If src and dst are relatively misaligned, do byte copies. */
+   andi.   %r8, %r3, ALIGN_MASK
+   andi.   %r7, %r4, ALIGN_MASK
+   cmpd%r8, %r7
+   mr  %r7, %r5
+   bne+.Lcopy_remaining_fix_index_byte
mr  %r8, %r3/* save dst */
 
/* align src */

Modified: head/lib/libc/powerpc64/string/memcpy_vsx.S
==
--- head/lib/libc/powerpc64/string/memcpy_vsx.S Thu Mar  5 22:45:16 2020
(r358687)
+++ head/lib/libc/powerpc64/string/memcpy_vsx.S Fri Mar  6 01:45:03 2020
(r358688)
@@ -30,6 +30,7 @@
 
 #define FN_NAME__memcpy_vsx
 #define BLOCK_BITS 6
+#defineALIGN_MASK  0xf
 
 /*
  * r5: bytes to copy (multiple of BLOCK_BYTES)
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svn commit: r358619 - head/share/man/man4

[Justin Hibbits]

Author: jhibbits
Date: Wed Mar  4 14:56:32 2020
New Revision: 358619
URL: https://svnweb.freebsd.org/changeset/base/358619

Log:
  Update ismt(4) man page for r358595.
  
  Submitted by: Dmitry Luhtionov
  X-MFC-With:   r358595
  Sponsored by: Juniper Networks, Inc

Modified:
  head/share/man/man4/ismt.4

Modified: head/share/man/man4/ismt.4
==
--- head/share/man/man4/ismt.4  Wed Mar  4 14:03:59 2020(r358618)
+++ head/share/man/man4/ismt.4  Wed Mar  4 14:56:32 2020(r358619)
@@ -33,7 +33,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd January 11, 2016
+.Dd March 4, 2020
 .Dt ISMT 4
 .Os
 .Sh NAME
@@ -46,7 +46,7 @@
 .Cd device ismt
 .Sh DESCRIPTION
 This driver provides access to the SMBus 2.0 controller device contained
-in the Intel Atom S1200 and C2000 CPUs.
+in the Intel Atom S1200, C2000 and C3000 CPUs.
 .Sh SEE ALSO
 .Xr ichsmb 4 ,
 .Xr smb 4 ,
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svn commit: r358595 - head/sys/dev/ismt

[Justin Hibbits]

Author: jhibbits
Date: Tue Mar  3 22:23:56 2020
New Revision: 358595
URL: https://svnweb.freebsd.org/changeset/base/358595

Log:
  Add Atom C3000 (Denverton) SMT PCI ID
  
  MFC after:3 days
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/dev/ismt/ismt.c

Modified: head/sys/dev/ismt/ismt.c
==
--- head/sys/dev/ismt/ismt.cTue Mar  3 22:14:23 2020(r358594)
+++ head/sys/dev/ismt/ismt.cTue Mar  3 22:23:56 2020(r358595)
@@ -717,6 +717,7 @@ fail:
 #define ID_INTEL_S1200_SMT00x0c598086
 #define ID_INTEL_S1200_SMT10x0c5a8086
 #define ID_INTEL_C2000_SMT 0x1f158086
+#define ID_INTEL_C3000_SMT 0x19ac8086
 
 static int
 ismt_probe(device_t dev)
@@ -732,6 +733,9 @@ ismt_probe(device_t dev)
break;
case ID_INTEL_C2000_SMT:
desc = "Atom Processor C2000 SMBus 2.0";
+   break;
+   case ID_INTEL_C3000_SMT:
+   desc = "Atom Processor C3000 SMBus 2.0";
break;
default:
return (ENXIO);
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svn commit: r358565 - head/sys/powerpc/powernv

[Justin Hibbits]

Author: jhibbits
Date: Tue Mar  3 03:22:00 2020
New Revision: 358565
URL: https://svnweb.freebsd.org/changeset/base/358565

Log:
  powerpc/powernv: powernv_node_numa_domain() fix non-NUMA case
  
  If NUMA is not enabled in the kernel config, or is disabled at boot, this
  function should just return domain 0 regardless of what's in the device
  tree.
  
  Fixes a panic in iflib with NUMA disabled.
  
  Reported by:  luporl

Modified:
  head/sys/powerpc/powernv/platform_powernv.c

Modified: head/sys/powerpc/powernv/platform_powernv.c
==
--- head/sys/powerpc/powernv/platform_powernv.c Tue Mar  3 01:46:35 2020
(r358564)
+++ head/sys/powerpc/powernv/platform_powernv.c Tue Mar  3 03:22:00 2020
(r358565)
@@ -517,6 +517,12 @@ powernv_node_numa_domain(platform_t platform, phandle_
cell_t associativity[5];
int i, res;
 
+#ifndef NUMA
+   return (0);
+#endif
+   if (vm_ndomains == 1)
+   return (0);
+
res = OF_getencprop(node, "ibm,associativity",
associativity, sizeof(associativity));
 
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svn commit: r358431 - head/sys/dev/uart

[Justin Hibbits]

Author: jhibbits
Date: Fri Feb 28 15:59:35 2020
New Revision: 358431
URL: https://svnweb.freebsd.org/changeset/base/358431

Log:
  Add Denverton UART PCI ID
  
  MFC after:3 days
  Sponsored by: Juniper Networks, Inc

Modified:
  head/sys/dev/uart/uart_bus_pci.c

Modified: head/sys/dev/uart/uart_bus_pci.c
==
--- head/sys/dev/uart/uart_bus_pci.cFri Feb 28 15:42:51 2020
(r358430)
+++ head/sys/dev/uart/uart_bus_pci.cFri Feb 28 15:59:35 2020
(r358431)
@@ -133,6 +133,7 @@ static const struct pci_id pci_ns8250_ids[] = {
 { 0x8086, 0x0f0c, 0x, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
24 * DEFAULT_RCLK, 2 },
 { 0x8086, 0x108f, 0x, 0, "Intel AMT - SOL", 0x10 },
+{ 0x8086, 0x19d8, 0x, 0, "Intel Denverton UART", 0x10 },
 { 0x8086, 0x1c3d, 0x, 0, "Intel AMT - KT Controller", 0x10 },
 { 0x8086, 0x1d3d, 0x, 0, "Intel C600/X79 Series Chipset KT Controller", 
0x10 },
 { 0x8086, 0x1e3d, 0x, 0, "Intel Panther Point KT Controller", 0x10 },
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svn commit: r358306 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Tue Feb 25 02:42:43 2020
New Revision: 358306
URL: https://svnweb.freebsd.org/changeset/base/358306

Log:
  Unbreak the 32-bit powerpc builds
  
  Force unsigned integer usage by casting to vm_offset_t, to avoid integer
  overflow, from r358305

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Tue Feb 25 01:40:22 2020
(r358305)
+++ head/sys/powerpc/booke/pmap.c   Tue Feb 25 02:42:43 2020
(r358306)
@@ -233,7 +233,7 @@ uint32_t tlb1_entries;
 #defineVM_MAPDEV_BASE  0x8000
 #defineVM_MAPDEV_PA_MAX0x4000 /* Don't encroach on 
DMAP */
 #else
-#defineVM_MAPDEV_BASE  (VM_MAXUSER_ADDRESS + PAGE_SIZE)
+#defineVM_MAPDEV_BASE  ((vm_offset_t)VM_MAXUSER_ADDRESS + PAGE_SIZE)
 #endif
 
 static vm_offset_t tlb1_map_base = VM_MAPDEV_BASE;
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svn commit: r358305 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Tue Feb 25 01:40:22 2020
New Revision: 358305
URL: https://svnweb.freebsd.org/changeset/base/358305

Log:
  powerpc/booke: Use a pseudo-DMAP for the device mappings on booke64
  
  Since powerpc64 has such a large virtual address space, significantly larger
  than its physical address space, take advantage of this, and create yet
  another DMAP-like instance for the device mappings.  In this case, the
  device mapping "DMAP" is in the 0x8000 - 0xc000
  range, so as not to overlap the physical memory DMAP.
  
  This will allow us to add TLB1 entry coalescing in the future, especially
  useful for things like the radeonkms driver, which maps parts of the GPU at
  a time, but eventually maps all of it, using up a lot of TLB1 entries (~40).

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Tue Feb 25 00:45:09 2020
(r358304)
+++ head/sys/powerpc/booke/pmap.c   Tue Feb 25 01:40:22 2020
(r358305)
@@ -221,8 +221,23 @@ uint32_t tlb1_entries;
 
 #define TLB1_ENTRIES (tlb1_entries)
 
-static vm_offset_t tlb1_map_base = (vm_offset_t)VM_MAXUSER_ADDRESS + PAGE_SIZE;
+/*
+ * Base of the pmap_mapdev() region.  On 32-bit it immediately follows the
+ * userspace address range.  On On 64-bit it's far above, at (1 << 63), and
+ * ranges up to the DMAP, giving 62 bits of PA allowed.  This is far larger 
than
+ * the widest Book-E address bus, the e6500 has a 40-bit PA space.  This allows
+ * us to map akin to the DMAP, with addresses identical to the PA, offset by 
the
+ * base.
+ */
+#ifdef __powerpc64__
+#defineVM_MAPDEV_BASE  0x8000
+#defineVM_MAPDEV_PA_MAX0x4000 /* Don't encroach on 
DMAP */
+#else
+#defineVM_MAPDEV_BASE  (VM_MAXUSER_ADDRESS + PAGE_SIZE)
+#endif
 
+static vm_offset_t tlb1_map_base = VM_MAPDEV_BASE;
+
 static tlbtid_t tid_alloc(struct pmap *);
 static void tid_flush(tlbtid_t tid);
 
@@ -3475,8 +3490,10 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
 {
tlb_entry_t e;
vm_paddr_t tmppa;
-   void *res;
-   uintptr_t va, tmpva;
+#ifndef __powerpc64__
+   uintptr_t tmpva;
+#endif
+   uintptr_t va;
vm_size_t sz;
int i;
int wimge;
@@ -3512,6 +3529,11 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
 
size = roundup(size, PAGE_SIZE);
 
+#ifdef __powerpc64__
+   KASSERT(pa < VM_MAPDEV_PA_MAX,
+   ("Unsupported physical address! %lx", pa));
+   va = VM_MAPDEV_BASE + pa;
+#else
/*
 * The device mapping area is between VM_MAXUSER_ADDRESS and
 * VM_MIN_KERNEL_ADDRESS.  This gives 1GB of device addressing.
@@ -3534,24 +3556,15 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_siz
sz = ffsl((~((1 << flsl(size-1)) - 1)) & pa);
sz = sz ? min(roundup(sz + 3, 4), flsl(size) - 1) : flsl(size) - 1;
va = roundup(tlb1_map_base, 1 << sz) | (((1 << sz) - 1) & pa);
-#ifdef __powerpc64__
-   } while (!atomic_cmpset_long(_map_base, tmpva, va + size));
-#else
} while (!atomic_cmpset_int(_map_base, tmpva, va + size));
-#endif
-#else
-#ifdef __powerpc64__
-   va = atomic_fetchadd_long(_map_base, size);
-#else
va = atomic_fetchadd_int(_map_base, size);
 #endif
 #endif
-   res = (void *)va;
 
if (tlb1_mapin_region(va, pa, size, tlb_calc_wimg(pa, ma)) != size)
return (NULL);
 
-   return (res);
+   return ((void *)va);
 }
 
 /*
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svn commit: r358234 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Sat Feb 22 01:31:06 2020
New Revision: 358234
URL: https://svnweb.freebsd.org/changeset/base/358234

Log:
  powerpc/booke: Fix handling of pvh_global_lock and pmap lock
  
  ptbl_alloc() is expected to return with the pvh_global_lock and pmap
  lock held.  However, it will return with them unlocked if nosleep is
  specified.
  
  Along with this, fix lock ordering of pvh_global_lock with respect to
  the pmap lock in other places.
  
  Differential Revision: https://reviews.freebsd.org/D23692

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Fri Feb 21 22:44:22 2020
(r358233)
+++ head/sys/powerpc/booke/pmap.c   Sat Feb 22 01:31:06 2020
(r358234)
@@ -705,11 +705,10 @@ ptbl_alloc(mmu_t mmu, pmap_t pmap, pte_t ** pdir, unsi
 
req = VM_ALLOC_NOOBJ | VM_ALLOC_WIRED;
while ((m = vm_page_alloc(NULL, pdir_idx, req)) == NULL) {
+   if (nosleep)
+   return (NULL);
PMAP_UNLOCK(pmap);
rw_wunlock(_global_lock);
-   if (nosleep) {
-   return (NULL);
-   }
vm_wait(NULL);
rw_wlock(_global_lock);
PMAP_LOCK(pmap);
@@ -905,8 +904,6 @@ ptbl_alloc(mmu_t mmu, pmap_t pmap, unsigned int pdir_i
pidx = (PTBL_PAGES * pdir_idx) + i;
while ((m = vm_page_alloc(NULL, pidx,
VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
-   PMAP_UNLOCK(pmap);
-   rw_wunlock(_global_lock);
if (nosleep) {
ptbl_free_pmap_ptbl(pmap, ptbl);
for (j = 0; j < i; j++)
@@ -914,6 +911,8 @@ ptbl_alloc(mmu_t mmu, pmap_t pmap, unsigned int pdir_i
vm_wire_sub(i);
return (NULL);
}
+   PMAP_UNLOCK(pmap);
+   rw_wunlock(_global_lock);
vm_wait(NULL);
rw_wlock(_global_lock);
PMAP_LOCK(pmap);
@@ -2481,8 +2480,8 @@ mmu_booke_enter_object(mmu_t mmu, pmap_t pmap, vm_offs
PMAP_ENTER_NOSLEEP | PMAP_ENTER_QUICK_LOCKED, 0);
m = TAILQ_NEXT(m, listq);
}
-   rw_wunlock(_global_lock);
PMAP_UNLOCK(pmap);
+   rw_wunlock(_global_lock);
 }
 
 static void
@@ -2495,8 +2494,8 @@ mmu_booke_enter_quick(mmu_t mmu, pmap_t pmap, vm_offse
mmu_booke_enter_locked(mmu, pmap, va, m,
prot & (VM_PROT_READ | VM_PROT_EXECUTE), PMAP_ENTER_NOSLEEP |
PMAP_ENTER_QUICK_LOCKED, 0);
-   rw_wunlock(_global_lock);
PMAP_UNLOCK(pmap);
+   rw_wunlock(_global_lock);
 }
 
 /*
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svn commit: r358093 - head/sys/powerpc/amigaone

[Justin Hibbits]

Author: jhibbits
Date: Wed Feb 19 03:39:11 2020
New Revision: 358093
URL: https://svnweb.freebsd.org/changeset/base/358093

Log:
  powerpc/amigaone: Fix license header formatting on cpld files
  
  This should've been fixed before initial commit, but wasn't.  Not even sure
  how it happened in the first place.

Modified:
  head/sys/powerpc/amigaone/cpld.h
  head/sys/powerpc/amigaone/cpld_x5000.c

Modified: head/sys/powerpc/amigaone/cpld.h
==
--- head/sys/powerpc/amigaone/cpld.hWed Feb 19 02:35:43 2020
(r358092)
+++ head/sys/powerpc/amigaone/cpld.hWed Feb 19 03:39:11 2020
(r358093)
@@ -7,7 +7,8 @@
  *
  * 1. Redistributions of source code must retain the above copyright
  *notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright 
notice, this list of conditions and the following disclaimer in the
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
  *documentation and/or other materials provided with the distribution.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR

Modified: head/sys/powerpc/amigaone/cpld_x5000.c
==
--- head/sys/powerpc/amigaone/cpld_x5000.c  Wed Feb 19 02:35:43 2020
(r358092)
+++ head/sys/powerpc/amigaone/cpld_x5000.c  Wed Feb 19 03:39:11 2020
(r358093)
@@ -7,7 +7,8 @@
  *
  * 1. Redistributions of source code must retain the above copyright
  *notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright 
notice, this list of conditions and the following disclaimer in the
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
  *documentation and/or other materials provided with the distribution.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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svn commit: r357607 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Thu Feb  6 01:25:30 2020
New Revision: 357607
URL: https://svnweb.freebsd.org/changeset/base/357607

Log:
  powerpc: Fix altivec disabling in set_mcontext()
  
  We somewhat blindly copy the srr1 from the new context to the trap frame,
  but disable FPU and VSX unconditionally, relying on the trap to re-enable
  them.  This works because the FPU manages the VSX extended FP registers,
  which is governed by the PCB_FPFREGS flag.  However, with altivec, we
  would blindly disable PSL_VEC, without touching PCB_VEC.  Handle this case
  by disabling altivec in both srr1 and pcb_flags, if the mcontext doesn't
  have _MC_AV_VALID set.
  
  Reported by:  pkubaj

Modified:
  head/sys/powerpc/powerpc/exec_machdep.c

Modified: head/sys/powerpc/powerpc/exec_machdep.c
==
--- head/sys/powerpc/powerpc/exec_machdep.c Wed Feb  5 22:29:01 2020
(r357606)
+++ head/sys/powerpc/powerpc/exec_machdep.c Thu Feb  6 01:25:30 2020
(r357607)
@@ -526,6 +526,9 @@ set_mcontext(struct thread *td, mcontext_t *mcp)
pcb->pcb_vec.vscr = mcp->mc_vscr;
pcb->pcb_vec.vrsave = mcp->mc_vrsave;
memcpy(pcb->pcb_vec.vr, mcp->mc_avec, sizeof(mcp->mc_avec));
+   } else {
+   tf->srr1 &= ~PSL_VEC;
+   pcb->pcb_flags &= ~PCB_VEC;
}
 
return (0);
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svn commit: r357242 - head/lib/csu/powerpc64

[Justin Hibbits]

Author: jhibbits
Date: Wed Jan 29 04:32:06 2020
New Revision: 357242
URL: https://svnweb.freebsd.org/changeset/base/357242

Log:
  powerpc64/csu: Rename dummy asm file to force use of 'cc'
  
  Implicit make rules build .S asm files with the compiler, rather than the
  assembler.  r356889 removed GNU as from the build for powerpc targets,
  causing '.s' asm files to fail to build, due to a missing 'as'.  Rename the
  one dummy asm file we have to a '.S' to force the implicit rules to build
  with the compiler rather than the assembler.
  
  Reported by:  Francis Little

Modified:
  head/lib/csu/powerpc64/Makefile

Modified: head/lib/csu/powerpc64/Makefile
==
--- head/lib/csu/powerpc64/Makefile Wed Jan 29 04:31:26 2020
(r357241)
+++ head/lib/csu/powerpc64/Makefile Wed Jan 29 04:32:06 2020
(r357242)
@@ -18,7 +18,7 @@ FILESDIR= ${LIBDIR}
 .undef LIBRARIES_ONLY
 
 CLEANFILES=${OBJS}
-CLEANFILES+=   crt1.s crtsavres.s gcrt1.s Scrt1.s
+CLEANFILES+=   crt1.s crtsavres.S gcrt1.s Scrt1.s
 
 # See the comment in lib/csu/common/crtbrand.c for the reason crt1.c is not
 # directly compiled to .o files.
@@ -28,7 +28,7 @@ crt1.s: crt1.c
sed ${SED_FIX_NOTE} ${.TARGET}
 
 # On powerpc64 crtsavres is an empty file
-crtsavres.s:
+crtsavres.S:
touch ${.TARGET}
 
 crt1.o: crt1.s
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svn commit: r356904 - head/sys/powerpc/amigaone

[Justin Hibbits]

Author: jhibbits
Date: Mon Jan 20 04:01:35 2020
New Revision: 356904
URL: https://svnweb.freebsd.org/changeset/base/356904

Log:
  powerpc/amiga: Hide CPLD date and time printing behind bootverbose
  
  There's no need to see the CPLD build date and time every boot.

Modified:
  head/sys/powerpc/amigaone/cpld_x5000.c

Modified: head/sys/powerpc/amigaone/cpld_x5000.c
==
--- head/sys/powerpc/amigaone/cpld_x5000.c  Mon Jan 20 01:38:03 2020
(r356903)
+++ head/sys/powerpc/amigaone/cpld_x5000.c  Mon Jan 20 04:01:35 2020
(r356904)
@@ -164,15 +164,17 @@ cpld_attach(device_t dev)
return (ENXIO);
}
mtx_init(>sc_mutex, "cpld", NULL, MTX_DEF);
-   date = (cpld_read(sc, CPLD_REG_DATE_UW) << 16) |
-   cpld_read(sc, CPLD_REG_DATE_LW);
-   time = (cpld_read(sc, CPLD_REG_TIME_UW) << 16) |
-   cpld_read(sc, CPLD_REG_TIME_LW);
+   if (bootverbose) {
+   date = (cpld_read(sc, CPLD_REG_DATE_UW) << 16) |
+   cpld_read(sc, CPLD_REG_DATE_LW);
+   time = (cpld_read(sc, CPLD_REG_TIME_UW) << 16) |
+   cpld_read(sc, CPLD_REG_TIME_LW);
 
-   device_printf(dev, "Build date: %04x-%02x-%02x\n", (date >> 16) & 
0x,
-   (date >> 8) & 0xff, date & 0xff);
-   device_printf(dev, "Build time: %02x:%02x:%02x\n", (time >> 16) & 0xff,
-   (time >> 8) & 0xff, time & 0xff);
+   device_printf(dev, "Build date: %04x-%02x-%02x\n",
+   (date >> 16) & 0x, (date >> 8) & 0xff, date & 0xff);
+   device_printf(dev, "Build time: %02x:%02x:%02x\n",
+   (time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff);
+   }
 
tmp = cpld_read(sc, CPLD_REG_HWREV);
device_printf(dev, "Hardware revision: %d\n", tmp);
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svn commit: r356899 - in head/sys: conf powerpc/amigaone

[Justin Hibbits]

Author: jhibbits
Date: Sun Jan 19 21:43:15 2020
New Revision: 356899
URL: https://svnweb.freebsd.org/changeset/base/356899

Log:
  PowerPC: Add CPLD driver for AmigaOne X5000
  
  Summary:
  The CPLD is the communications medium between the CPU and the XMOS
  "Xena" event coprocessor.  It provides a mailbox communication feature,
  along with dual-port RAM to be used between the CPU and XMOS.  Also, it
  provides basic board stats as well, such as PCIe presence, JTAG signals,
  and CPU fan speed reporting (in revolutions per second).  Only fan speed
  reading is handled, as a sysctl.
  
  Reviewed by:  bdragon
  Differential Revision:https://reviews.freebsd.org/D23136

Added:
  head/sys/powerpc/amigaone/cpld.h   (contents, props changed)
  head/sys/powerpc/amigaone/cpld_x5000.c   (contents, props changed)
Modified:
  head/sys/conf/files.powerpc

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Sun Jan 19 21:41:34 2020(r356898)
+++ head/sys/conf/files.powerpc Sun Jan 19 21:43:15 2020(r356899)
@@ -107,6 +107,7 @@ powerpc/aim/moea64_native.c optionalaim
 powerpc/aim/mp_cpudep.coptionalaim
 powerpc/aim/slb.c  optionalaim powerpc64
 powerpc/amigaone/platform_amigaone.c   optionalamigaone
+powerpc/amigaone/cpld_x5000.c  optionalpowerpc amigaone | 
powerpc64 amigaone
 powerpc/booke/locore.S optionalbooke no-obj
 powerpc/booke/booke_machdep.c  optionalbooke
 powerpc/booke/machdep_e500.c   optionalbooke_e500

Added: head/sys/powerpc/amigaone/cpld.h
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/powerpc/amigaone/cpld.hSun Jan 19 21:43:15 2020
(r356899)
@@ -0,0 +1,45 @@
+/*-
+ * Copyright (c) 2020 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright 
notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef AMIGAONE_CPLD_H
+#define AMIGAONE_CPLD_H
+
+#include 
+
+/*
+ * Write 'words' to 'offset' offset in dual-port RAM, then write cmd to 
mailbox.
+ */
+struct cpld_cmd_data {
+   unsigned intcmd;
+   unsigned intlen;
+   unsigned intoffset;
+   void*words;
+};
+
+#defineIOCCPLDSEND _IOW('c', 2, struct cpld_cmd_data)
+#defineIOCCPLDRECV _IOW('c', 3, struct cpld_cmd_data)
+
+#endif /* AMIGAONE_CPLD_H */

Added: head/sys/powerpc/amigaone/cpld_x5000.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/powerpc/amigaone/cpld_x5000.c  Sun Jan 19 21:43:15 2020
(r356899)
@@ -0,0 +1,335 @@
+/*-
+ * Copyright (c) 2020 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright 
notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 

svn commit: r356896 - head/sys/powerpc/aim

[Justin Hibbits]

Author: jhibbits
Date: Sun Jan 19 21:17:57 2020
New Revision: 356896
URL: https://svnweb.freebsd.org/changeset/base/356896

Log:
  [PowerPC64] fix crash when using machdep.moea64_bpvo_pool_size tunable
  
  Summary:
  This fixes kernel crashing when tunable "machdep.moea64_bpvo_pool_size" is
  set to a value higher then 327680 (default value).  Function
  moea64_mid_bootstrap() relies on moea64_bpvo_pool_size, but at time of the
  use the variable wan't yet updated with the new value provided by user.
  
  Problem was detected after trying to use a VM with 64GB of RAM, and default
  moea64_bpvo_pool_size is insufficient (kernel boot used more than 47) .
  I think default value must be discussed to address this use case, or find a
  way to calculate pool size automatically based on amount of memory detected.
  
  Test Plan: Tested on QEMU VM with 64GB of RAM using "set
  machdep.moea64_bpvo_pool_size=655360" on loader prompt
  
  Submitted by: Alfredo Dal'Ava Júnior (alfredo.junior_eldorado.org.br)
  Differential Revision:https://reviews.freebsd.org/D23233

Modified:
  head/sys/powerpc/aim/mmu_oea64.c

Modified: head/sys/powerpc/aim/mmu_oea64.c
==
--- head/sys/powerpc/aim/mmu_oea64.cSun Jan 19 20:04:44 2020
(r356895)
+++ head/sys/powerpc/aim/mmu_oea64.cSun Jan 19 21:17:57 2020
(r356896)
@@ -185,7 +185,6 @@ uma_zone_t  moea64_pvo_zone; /* zone for pvo entries */
 static struct  pvo_entry *moea64_bpvo_pool;
 static int moea64_bpvo_pool_index = 0;
 static int moea64_bpvo_pool_size = 327680;
-TUNABLE_INT("machdep.moea64_bpvo_pool_size", _bpvo_pool_size);
 SYSCTL_INT(_machdep, OID_AUTO, moea64_allocated_bpvo_entries, CTLFLAG_RD, 
 _bpvo_pool_index, 0, "");
 
@@ -390,9 +389,11 @@ alloc_pvo_entry(int bootstrap)
 
if (!moea64_initialized || bootstrap) {
if (moea64_bpvo_pool_index >= moea64_bpvo_pool_size) {
-   panic("moea64_enter: bpvo pool exhausted, %d, %d, %zd",
- moea64_bpvo_pool_index, moea64_bpvo_pool_size,
- moea64_bpvo_pool_size * sizeof(struct pvo_entry));
+   panic("%s: bpvo pool exhausted, index=%d, size=%d, 
bytes=%zd."
+   "Try setting machdep.moea64_bpvo_pool_size tunable",
+   __func__, moea64_bpvo_pool_index,
+   moea64_bpvo_pool_size,
+   moea64_bpvo_pool_size * sizeof(struct pvo_entry));
}
pvo = _bpvo_pool[
atomic_fetchadd_int(_bpvo_pool_index, 1)];
@@ -914,6 +915,7 @@ moea64_mid_bootstrap(mmu_t mmup, vm_offset_t kernelsta
/*
 * Initialise the bootstrap pvo pool.
 */
+   TUNABLE_INT_FETCH("machdep.moea64_bpvo_pool_size", 
_bpvo_pool_size);
moea64_bpvo_pool = (struct pvo_entry *)moea64_bootstrap_alloc(
moea64_bpvo_pool_size*sizeof(struct pvo_entry), PAGE_SIZE);
moea64_bpvo_pool_index = 0;
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svn commit: r356860 - in head/sys: powerpc/aim powerpc/powerpc tools

[Justin Hibbits]

Author: jhibbits
Date: Sat Jan 18 02:39:38 2020
New Revision: 356860
URL: https://svnweb.freebsd.org/changeset/base/356860

Log:
  Add a 'SINGLETON' directive to kobj interface definition
  
  Summary:
  This makes the interface described in the definition file act like a
  pseudo-IFUNC service, by caching the found method locally.
  
  Applying this to the PowerPC MMU definitions, it yields a significant
  (15-20%) performance improvement, seen in both a 'make buildworld' and a
  parallel build of LLVM, on a POWER9 system.
  
  Reviewed By:  imp
  Differential Revision:https://reviews.freebsd.org/D23245

Modified:
  head/sys/powerpc/aim/moea64_if.m
  head/sys/powerpc/powerpc/mmu_if.m
  head/sys/tools/makeobjops.awk

Modified: head/sys/powerpc/aim/moea64_if.m
==
--- head/sys/powerpc/aim/moea64_if.mSat Jan 18 01:29:02 2020
(r356859)
+++ head/sys/powerpc/aim/moea64_if.mSat Jan 18 02:39:38 2020
(r356860)
@@ -43,6 +43,7 @@
  */
 
 INTERFACE moea64;
+SINGLETON;
 
 CODE {
static moea64_pte_replace_t moea64_pte_replace_default;

Modified: head/sys/powerpc/powerpc/mmu_if.m
==
--- head/sys/powerpc/powerpc/mmu_if.m   Sat Jan 18 01:29:02 2020
(r356859)
+++ head/sys/powerpc/powerpc/mmu_if.m   Sat Jan 18 02:39:38 2020
(r356860)
@@ -46,6 +46,7 @@
  */
 
 INTERFACE mmu;
+SINGLETON;
 
 #
 # Default implementations of some methods

Modified: head/sys/tools/makeobjops.awk
==
--- head/sys/tools/makeobjops.awk   Sat Jan 18 01:29:02 2020
(r356859)
+++ head/sys/tools/makeobjops.awk   Sat Jan 18 02:39:38 2020
(r356860)
@@ -325,13 +325,18 @@ function handle_method (static, doc)
line_width, length(prototype)));
}
printh("{");
-   printh("\tkobjop_t _m;");
+   if (singleton)
+   printh("\tstatic kobjop_t _m;");
+   else
+   printh("\tkobjop_t _m;");
if (ret != "void")
printh("\t" ret " rc;");
if (!static)
firstvar = "((kobj_t)" firstvar ")";
if (prolog != "")
printh(prolog);
+   if (singleton)
+   printh("\tif (_m == NULL)");
printh("\tKOBJOPLOOKUP(" firstvar "->ops," mname ");");
rceq = (ret != "void") ? "rc = " : "";
printh("\t" rceq "((" mname "_t *) _m)(" varname_list ");");
@@ -453,6 +458,7 @@ for (file_i = 0; file_i < num_files; file_i++) {
lastdoc = "";
prolog = "";
epilog = "";
+   singleton = 0;
 
while (!error && (getline < src) > 0) {
lineno++;
@@ -497,6 +503,8 @@ for (file_i = 0; file_i < num_files; file_i++) {
prolog = handle_code();
else if (/^EPILOG[  ]*{$/)
epilog = handle_code();
+   else if (/^SINGLETON/)
+   singleton = 1;
else {
debug($0);
warnsrc("Invalid line encountered");
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svn commit: r356858 - in head/sys/powerpc: include ofw powernv powerpc

[Justin Hibbits]

Author: jhibbits
Date: Sat Jan 18 01:26:54 2020
New Revision: 356858
URL: https://svnweb.freebsd.org/changeset/base/356858

Log:
  powerpc: Fix the NUMA domain list on powernv
  
  Summary:
  Consolidate the NUMA associativity handling into a platform function.
  Non-NUMA platforms will just fall back to the default (0).  Currently
  only implemented for powernv, which uses a lookup table to map the
  device tree associativity into a system NUMA domain.
  
  Fixes hangs on powernv after r356534, and corrects a fairly longstanding
  bug in powernv's NUMA handling, which ended up using domains 1 and 2 for
  devices and memory on power9, while CPUs were bound to domains 0 and 1.
  
  Reviewed by:  bdragon, luporl
  Differential Revision:https://reviews.freebsd.org/D23220

Modified:
  head/sys/powerpc/include/ofw_machdep.h
  head/sys/powerpc/include/platform.h
  head/sys/powerpc/ofw/ofw_machdep.c
  head/sys/powerpc/ofw/ofw_pcibus.c
  head/sys/powerpc/powernv/platform_powernv.c
  head/sys/powerpc/powerpc/platform.c
  head/sys/powerpc/powerpc/platform_if.m

Modified: head/sys/powerpc/include/ofw_machdep.h
==
--- head/sys/powerpc/include/ofw_machdep.h  Sat Jan 18 01:22:54 2020
(r356857)
+++ head/sys/powerpc/include/ofw_machdep.h  Sat Jan 18 01:26:54 2020
(r356858)
@@ -37,6 +37,9 @@
 #include 
 #include 
 
+struct mem_region;
+struct numa_mem_region;
+
 typedefuint32_tcell_t;
 
 void OF_getetheraddr(device_t dev, u_char *addr);

Modified: head/sys/powerpc/include/platform.h
==
--- head/sys/powerpc/include/platform.h Sat Jan 18 01:22:54 2020
(r356857)
+++ head/sys/powerpc/include/platform.h Sat Jan 18 01:26:54 2020
(r356858)
@@ -37,6 +37,7 @@
 #ifndef_MACHINE_PLATFORM_H_
 #define_MACHINE_PLATFORM_H_
   
+#include 
 #include 
 #include 
 
@@ -66,6 +67,7 @@ int   platform_smp_start_cpu(struct pcpu *);
 void   platform_smp_timebase_sync(u_long tb, int ap);
 void   platform_smp_ap_init(void);
 void   platform_smp_probe_threads(void);
+intplatform_node_numa_domain(phandle_t);
   
 const char *installed_platform(void);
 void platform_probe_and_attach(void);

Modified: head/sys/powerpc/ofw/ofw_machdep.c
==
--- head/sys/powerpc/ofw/ofw_machdep.c  Sat Jan 18 01:22:54 2020
(r356857)
+++ head/sys/powerpc/ofw/ofw_machdep.c  Sat Jan 18 01:26:54 2020
(r356858)
@@ -466,9 +466,8 @@ void
 ofw_numa_mem_regions(struct numa_mem_region *memp, int *memsz)
 {
phandle_t phandle;
-   int res, count, msz;
+   int count, msz;
char name[31];
-   cell_t associativity[5];
struct numa_mem_region *curmemp;
 
msz = 0;
@@ -486,13 +485,8 @@ ofw_numa_mem_regions(struct numa_mem_region *memp, int
if (count == 0)
continue;
curmemp = [msz];
-   res = OF_getproplen(phandle, "ibm,associativity");
-   if (res <= 0)
-   continue;
MPASS(count == 1);
-   OF_getencprop(phandle, "ibm,associativity",
-   associativity, res);
-   curmemp->mr_domain = associativity[3];
+   curmemp->mr_domain = platform_node_numa_domain(phandle);
if (bootverbose)
printf("%s %#jx-%#jx domain(%ju)\n",
name, (uintmax_t)curmemp->mr_start,

Modified: head/sys/powerpc/ofw/ofw_pcibus.c
==
--- head/sys/powerpc/ofw/ofw_pcibus.c   Sat Jan 18 01:22:54 2020
(r356857)
+++ head/sys/powerpc/ofw/ofw_pcibus.c   Sat Jan 18 01:26:54 2020
(r356858)
@@ -385,39 +385,13 @@ ofw_pcibus_get_devinfo(device_t bus, device_t dev)
return (>opd_obdinfo);
 }
 
-static int
-ofw_pcibus_parse_associativity(device_t dev, int *domain)
-{
-   phandle_t node;
-   cell_t associativity[5];
-   int res;
-
-   if ((node = ofw_bus_get_node(dev)) == -1) {
-   if (bootverbose)
-   device_printf(dev, "no ofw node found\n");
-   return (ENXIO);
-   }
-   res = OF_getproplen(node, "ibm,associativity");
-   if (res <= 0)
-   return (ENXIO);
-   OF_getencprop(node, "ibm,associativity",
-   associativity, res);
-
-   *domain = associativity[3];
-   if (bootverbose)
-   device_printf(dev, "domain(%d)\n", *domain);
-   return (0);
-}
-
 int
 ofw_pcibus_get_cpus(device_t dev, device_t child, enum cpu_sets op, size_t 
setsize,
 cpuset_t *cpuset)
 {
int d, error;
 
-   error = ofw_pcibus_parse_associativity(child, );
-   if (error)
-   return (bus_generic_get_cpus(dev, child, op, 

svn commit: r356710 - head/sys/powerpc/mpc85xx

[Justin Hibbits]

Author: jhibbits
Date: Mon Jan 13 23:09:00 2020
New Revision: 356710
URL: https://svnweb.freebsd.org/changeset/base/356710

Log:
  powerpc/mpc85xx: Partially revert r356640
  
  The count block was correct before.  r356640 caused a read past the end of
  the tuple.

Modified:
  head/sys/powerpc/mpc85xx/lbc.c

Modified: head/sys/powerpc/mpc85xx/lbc.c
==
--- head/sys/powerpc/mpc85xx/lbc.c  Mon Jan 13 22:36:29 2020
(r356709)
+++ head/sys/powerpc/mpc85xx/lbc.c  Mon Jan 13 23:09:00 2020
(r356710)
@@ -397,7 +397,7 @@ fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *s
}
for (j = 0; j < size_cells; j++) {
count <<= 32;
-   count |= reg[addr_cells + j];
+   count |= reg[addr_cells + j - 1];
}
reg += addr_cells - 1 + size_cells;
 
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svn commit: r356640 - head/sys/powerpc/mpc85xx

[Justin Hibbits]

Author: jhibbits
Date: Sat Jan 11 22:29:44 2020
New Revision: 356640
URL: https://svnweb.freebsd.org/changeset/base/356640

Log:
  powerpc/mpc85xx: Fix localbus child reg property decoding
  
  r302340, as an attempt to fix the localbus child handling post-rman change,
  actually broke child resource allocation, due to typos in
  fdt_lbc_reg_decode().  This went unnoticed because there aren't any drivers
  currently in tree that use localbus.

Modified:
  head/sys/powerpc/mpc85xx/lbc.c

Modified: head/sys/powerpc/mpc85xx/lbc.c
==
--- head/sys/powerpc/mpc85xx/lbc.c  Sat Jan 11 20:07:30 2020
(r356639)
+++ head/sys/powerpc/mpc85xx/lbc.c  Sat Jan 11 22:29:44 2020
(r356640)
@@ -391,13 +391,13 @@ fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *s
 
/* Get address/size. */
start = count = 0;
-   for (j = 0; j < addr_cells; j++) {
+   for (j = 0; j < addr_cells - 1; j++) {
start <<= 32;
start |= reg[j];
}
for (j = 0; j < size_cells; j++) {
count <<= 32;
-   count |= reg[addr_cells + j - 1];
+   count |= reg[addr_cells + j];
}
reg += addr_cells - 1 + size_cells;
 
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svn commit: r356595 - head/sys/powerpc/aim

[Justin Hibbits]

Author: jhibbits
Date: Fri Jan 10 04:13:16 2020
New Revision: 356595
URL: https://svnweb.freebsd.org/changeset/base/356595

Log:
  powerpc: Prevent infinite loop in moea_sync_icache()
  
  This applies r344049 to the 32-bit pmap.
  
  Reported by:  Mark Millard 

Modified:
  head/sys/powerpc/aim/mmu_oea.c

Modified: head/sys/powerpc/aim/mmu_oea.c
==
--- head/sys/powerpc/aim/mmu_oea.c  Fri Jan 10 03:46:58 2020
(r356594)
+++ head/sys/powerpc/aim/mmu_oea.c  Fri Jan 10 04:13:16 2020
(r356595)
@@ -2684,7 +2684,7 @@ moea_sync_icache(mmu_t mmu, pmap_t pm, vm_offset_t va,
 
PMAP_LOCK(pm);
while (sz > 0) {
-   lim = round_page(va);
+   lim = round_page(va + 1);
len = MIN(lim - va, sz);
pvo = moea_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
if (pvo != NULL) {
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svn commit: r356591 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Fri Jan 10 03:16:40 2020
New Revision: 356591
URL: https://svnweb.freebsd.org/changeset/base/356591

Log:
  powerpc: Mark cpu_feature-based sysctls as MP_SAFE
  
  hw.floatingpoint and hw.altivec are effectively runtime constants (bits from
  the cpu_feature bitfield), so don't need Giant, or any locking for that
  matter.

Modified:
  head/sys/powerpc/powerpc/cpu.c

Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c  Fri Jan 10 01:24:49 2020
(r356590)
+++ head/sys/powerpc/powerpc/cpu.c  Fri Jan 10 03:16:40 2020
(r356591)
@@ -259,10 +259,10 @@ register_tlpcr = LPCR_LPES;
 #endif
 
 /* Provide some user-friendly aliases for bits in cpu_features */
-SYSCTL_PROC(_hw, OID_AUTO, floatingpoint, CTLTYPE_INT | CTLFLAG_RD,
-0, PPC_FEATURE_HAS_FPU, cpu_feature_bit, "I",
-"Floating point instructions executed in hardware");
-SYSCTL_PROC(_hw, OID_AUTO, altivec, CTLTYPE_INT | CTLFLAG_RD,
+SYSCTL_PROC(_hw, OID_AUTO, floatingpoint,
+CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, 0, PPC_FEATURE_HAS_FPU,
+cpu_feature_bit, "I", "Floating point instructions executed in hardware");
+SYSCTL_PROC(_hw, OID_AUTO, altivec, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE,
 0, PPC_FEATURE_HAS_ALTIVEC, cpu_feature_bit, "I", "CPU supports Altivec");
 
 /*
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svn commit: r356590 - head/sys/powerpc/powernv

[Justin Hibbits]

Author: jhibbits
Date: Fri Jan 10 01:24:49 2020
New Revision: 356590
URL: https://svnweb.freebsd.org/changeset/base/356590

Log:
  powerpc/powernv: Un-Giant-ify opal_nvram driver
  
  It may be possible to make this completely lock free, but for now it's using
  a statically allocated bounce buffer in the softc, so it needs to be
  guarded.

Modified:
  head/sys/powerpc/powernv/opal_nvram.c

Modified: head/sys/powerpc/powernv/opal_nvram.c
==
--- head/sys/powerpc/powernv/opal_nvram.c   Fri Jan 10 00:55:37 2020
(r356589)
+++ head/sys/powerpc/powernv/opal_nvram.c   Fri Jan 10 01:24:49 2020
(r356590)
@@ -34,6 +34,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -56,6 +57,7 @@
 
 struct opal_nvram_softc {
device_t sc_dev;
+   struct mtx   sc_mtx;
uint32_t sc_size;
uint8_t *sc_buf;
vm_paddr_t   sc_buf_phys;
@@ -64,6 +66,9 @@ struct opal_nvram_softc {
int  sc_isopen;
 };
 
+#defineNVRAM_LOCK(sc)  mtx_lock(>sc_mtx)
+#defineNVRAM_UNLOCK(sc)mtx_unlock(>sc_mtx)
+
 /*
  * Device interface.
  */
@@ -105,7 +110,6 @@ static  d_ioctl_t   opal_nvram_ioctl;
 
 static struct cdevsw opal_nvram_cdevsw = {
.d_version =D_VERSION,
-   .d_flags =  D_NEEDGIANT,
.d_open =   opal_nvram_open,
.d_close =  opal_nvram_close,
.d_read =   opal_nvram_read,
@@ -153,6 +157,8 @@ opal_nvram_attach(device_t dev)
sc->sc_cdev = make_dev(_nvram_cdevsw, 0, 0, 0, 0600,
"nvram");
sc->sc_cdev->si_drv1 = sc;
+   
+   mtx_init(>sc_mtx, "opal_nvram", 0, MTX_DEF);
 
return (0);
 }
@@ -168,6 +174,8 @@ opal_nvram_detach(device_t dev)
destroy_dev(sc->sc_cdev);
if (sc->sc_buf != NULL)
contigfree(sc->sc_buf, NVRAM_BUFSIZE, M_DEVBUF);
+
+   mtx_destroy(>sc_mtx);

return (0);
 }
@@ -176,11 +184,18 @@ static int
 opal_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
 {
struct opal_nvram_softc *sc = dev->si_drv1;
+   int err;
 
+   err = 0;
+
+   NVRAM_LOCK(sc);
if (sc->sc_isopen)
-   return EBUSY;
-   sc->sc_isopen = 1;
-   return (0);
+   err = EBUSY;
+   else
+   sc->sc_isopen = 1;
+   NVRAM_UNLOCK(sc);
+
+   return (err);
 }
 
 static int
@@ -188,7 +203,10 @@ opal_nvram_close(struct cdev *dev, int fflag, int devt
 {
struct opal_nvram_softc *sc = dev->si_drv1;
 
+   NVRAM_LOCK(sc);
sc->sc_isopen = 0;
+   NVRAM_UNLOCK(sc);
+
return (0);
 }
 
@@ -199,6 +217,8 @@ opal_nvram_read(struct cdev *dev, struct uio *uio, int
int rv, amnt;
 
rv = 0;
+
+   NVRAM_LOCK(sc);
while (uio->uio_resid > 0) {
amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset);
amnt = MIN(amnt, NVRAM_BUFSIZE);
@@ -222,6 +242,8 @@ opal_nvram_read(struct cdev *dev, struct uio *uio, int
if (rv != 0)
break;
}
+   NVRAM_UNLOCK(sc);
+
return (rv);
 }
 
@@ -233,6 +255,8 @@ opal_nvram_write(struct cdev *dev, struct uio *uio, in
struct opal_nvram_softc *sc = dev->si_drv1;
 
rv = 0;
+
+   NVRAM_LOCK(sc);
while (uio->uio_resid > 0) {
amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset);
amnt = MIN(amnt, NVRAM_BUFSIZE);
@@ -258,6 +282,9 @@ opal_nvram_write(struct cdev *dev, struct uio *uio, in
break;
}
}
+
+   NVRAM_UNLOCK(sc);
+
return (rv);
 }
 
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Re: svn commit: r356379 - head/share/mk

[Justin Hibbits]

On Sun, 5 Jan 2020 12:21:53 -0500
Ed Maste  wrote:

> On Sun, 5 Jan 2020 at 11:59, Ed Maste  wrote:
> >
> > Author: emaste
> > Date: Sun Jan  5 16:59:24 2020
> > New Revision: 356379
> > URL: https://svnweb.freebsd.org/changeset/base/356379
> >
> > Log:
> >   src.opts.mk: disable BINUTILS_BOOTSTRAP on mips64*  
> 
> I should probably make this the case for all of mips* and sparc64.
> Using a decade-old binutils with a contemporary compiler (either Clang
> or GCC) isn't likely to be a combination used by anyone else and it's
> not going to be a good use of our time investigating and addressing
> any issues that arise.

powerpc and powerpcspe still use in-tree binutils (or external
binutils...  but in-tree works well enough, until we start adding
ifuncs), until such a time that lld is fully functional.

- Justin
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svn commit: r356346 - head/sys/powerpc/conf

[Justin Hibbits]

Author: jhibbits
Date: Sat Jan  4 01:13:00 2020
New Revision: 356346
URL: https://svnweb.freebsd.org/changeset/base/356346

Log:
  powerpc: Remove 'sec' device from QORIQ64 config
  
  The SEC crypto engine, as implemented in this driver, does not exist on any
  64-bit SoC, so don't bother compiling it in.

Modified:
  head/sys/powerpc/conf/QORIQ64

Modified: head/sys/powerpc/conf/QORIQ64
==
--- head/sys/powerpc/conf/QORIQ64   Sat Jan  4 01:09:33 2020
(r356345)
+++ head/sys/powerpc/conf/QORIQ64   Sat Jan  4 01:13:00 2020
(r356346)
@@ -103,7 +103,6 @@ device  pci
 device scbus
 device scc
 device sdhci
-device sec
 device spibus
 device spigen
 device tuntap
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Re: svn commit: r356113 - in head: libexec/rtld-elf sys/kern sys/sys

[Justin Hibbits]

On Fri, 27 Dec 2019 10:43:16 -0800
John Baldwin  wrote:

> On 12/26/19 8:07 PM, Justin Hibbits wrote:
> > Author: jhibbits
> > Date: Fri Dec 27 04:07:03 2019
> > New Revision: 356113
> > URL: https://svnweb.freebsd.org/changeset/base/356113
> > 
> > Log:
> >   Eliminate the last MI difference in AT_* definitions (for
> > powerpc). 
> >   Summary:
> >   As a transition aide, implement an alternative elfN_freebsd_fixup
> > which is called for old powerpc binaries.  Similarly, add a
> > translation to rtld to convert old values to new ones (as expected
> > by a new rtld). 
> >   Translation of old<->new values  is incomplete, but sufficient to
> > allow an installworld of a new userspace from an old one when a new
> > kernel is running. 
> >   Test Plan:
> >   Someone needs to see how a new kernel/rtld/libc works with an old
> >   binary.  If if works we can probalby ship this.  If not we
> > probalby need some more compat bits.
> >   
> >   Submitted by: brooks
> >   Reviewed by:  jhibbits
> >   Differential Revision:https://reviews.freebsd.org/D20799  
> 
> This would be much simpler as a 'sv_copyout_auxargs()' hook instead.
> You could even set it directly in the ELFv1 sysvec instead of needing
> a runtime check. You could also move it purely into the powerpc code
> at that point and not need to stick it in the MI file.
> 
> It probably should also be under COMPAT_FREEBSD12.
> 

Already addressed in r356129.  Not under COMPAT_FREEBSD12 just because
it's needed for 13 before "today", but I'll probably put it under
COMPAT_FREEBSD12 in a month or two, after some soak time.

- Justin
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svn commit: r356129 - in head/sys: kern powerpc/include powerpc/powerpc

[Justin Hibbits]

e file is newly added)
+++ head/sys/powerpc/powerpc/elf_common.c   Fri Dec 27 17:38:25 2019
(r356129)
@@ -0,0 +1,89 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2019 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer
+ *in this position and unchanged.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+static int
+__elfN(powerpc_copyout_auxargs)(struct image_params *imgp, uintptr_t base)
+{
+   Elf_Auxargs *args;
+   Elf_Auxinfo *argarray, *pos;
+   int error;
+
+   if (imgp->proc->p_osrel >= P_OSREL_POWERPC_NEW_AUX_ARGS)
+   return (__elfN(freebsd_copyout_auxargs)(imgp, base));
+
+   args = (Elf_Auxargs *)imgp->auxargs;
+   argarray = pos = malloc(AT_OLD_COUNT * sizeof(*pos), M_TEMP,
+   M_WAITOK | M_ZERO);
+
+   if (args->execfd != -1)
+   AUXARGS_ENTRY(pos, AT_OLD_EXECFD, args->execfd);
+   AUXARGS_ENTRY(pos, AT_OLD_PHDR, args->phdr);
+   AUXARGS_ENTRY(pos, AT_OLD_PHENT, args->phent);
+   AUXARGS_ENTRY(pos, AT_OLD_PHNUM, args->phnum);
+   AUXARGS_ENTRY(pos, AT_OLD_PAGESZ, args->pagesz);
+   AUXARGS_ENTRY(pos, AT_OLD_FLAGS, args->flags);
+   AUXARGS_ENTRY(pos, AT_OLD_ENTRY, args->entry);
+   AUXARGS_ENTRY(pos, AT_OLD_BASE, args->base);
+   AUXARGS_ENTRY(pos, AT_OLD_EHDRFLAGS, args->hdr_eflags);
+   if (imgp->execpathp != 0)
+   AUXARGS_ENTRY(pos, AT_OLD_EXECPATH, imgp->execpathp);
+   AUXARGS_ENTRY(pos, AT_OLD_OSRELDATE,
+   imgp->proc->p_ucred->cr_prison->pr_osreldate);
+   if (imgp->canary != 0) {
+   AUXARGS_ENTRY(pos, AT_OLD_CANARY, imgp->canary);
+   AUXARGS_ENTRY(pos, AT_OLD_CANARYLEN, imgp->canarylen);
+   }
+   AUXARGS_ENTRY(pos, AT_OLD_NCPUS, mp_ncpus);
+   if (imgp->pagesizes != 0) {
+   AUXARGS_ENTRY(pos, AT_OLD_PAGESIZES, imgp->pagesizes);
+   AUXARGS_ENTRY(pos, AT_OLD_PAGESIZESLEN, imgp->pagesizeslen);
+   }
+   if (imgp->sysent->sv_timekeep_base != 0) {
+   AUXARGS_ENTRY(pos, AT_OLD_TIMEKEEP,
+   imgp->sysent->sv_timekeep_base);
+   }
+   AUXARGS_ENTRY(pos, AT_OLD_STACKPROT, imgp->sysent->sv_shared_page_obj
+   != NULL && imgp->stack_prot != 0 ? imgp->stack_prot :
+   imgp->sysent->sv_stackprot);
+   if (imgp->sysent->sv_hwcap != NULL)
+   AUXARGS_ENTRY(pos, AT_OLD_HWCAP, *imgp->sysent->sv_hwcap);
+   if (imgp->sysent->sv_hwcap2 != NULL)
+   AUXARGS_ENTRY(pos, AT_OLD_HWCAP2, *imgp->sysent->sv_hwcap2);
+   AUXARGS_ENTRY(pos, AT_OLD_NULL, 0);
+
+   free(imgp->auxargs, M_TEMP);
+   imgp->auxargs = NULL;
+   KASSERT(pos - argarray <= AT_OLD_COUNT, ("Too many auxargs"));
+
+   error = copyout(argarray, (void *)base, sizeof(*argarray) * 
AT_OLD_COUNT);
+   free(argarray, M_TEMP);
+   return (error);
+}
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svn commit: r356117 - head/sys/kern

[Justin Hibbits]

Author: jhibbits
Date: Fri Dec 27 04:52:17 2019
New Revision: 356117
URL: https://svnweb.freebsd.org/changeset/base/356117

Log:
  Fix the build from r356113.
  
  Types had changed from when the patch was first created, and a final build
  was not done pre-commit.

Modified:
  head/sys/kern/imgact_elf.c

Modified: head/sys/kern/imgact_elf.c
==
--- head/sys/kern/imgact_elf.c  Fri Dec 27 04:42:03 2019(r356116)
+++ head/sys/kern/imgact_elf.c  Fri Dec 27 04:52:17 2019(r356117)
@@ -1353,7 +1353,7 @@ ret:
 #defineOLD_AT_COUNT27  /* Count of defined aux entry types. */
 
 static int
-__elfN(freebsd_fixup_old_auxargs)(register_t **stack_base,
+__elfN(freebsd_fixup_old_auxargs)(uintptr_t *stack_base,
 struct image_params *imgp)
 {
Elf_Auxargs *args = (Elf_Auxargs *)imgp->auxargs;
@@ -1414,7 +1414,7 @@ __elfN(freebsd_fixup_old_auxargs)(register_t **stack_b
base--;
if (suword(base, imgp->args->argc) == -1)
return (EFAULT);
-   *stack_base = (register_t *)base;
+   *stack_base = (uintptr_t)base;
return (0);
 }
 #endif /* __powerpc__ */
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svn commit: r356116 - head

[Justin Hibbits]

Author: jhibbits
Date: Fri Dec 27 04:42:03 2019
New Revision: 356116
URL: https://svnweb.freebsd.org/changeset/base/356116

Log:
  Add a note to UPDATING on the move to clang for powerpc*

Modified:
  head/UPDATING

Modified: head/UPDATING
==
--- head/UPDATING   Fri Dec 27 04:11:14 2019(r356115)
+++ head/UPDATING   Fri Dec 27 04:42:03 2019(r356116)
@@ -27,6 +27,12 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 13.x IS SLOW:
"ln -s 'abort:false,junk:false' /etc/malloc.conf".)
 
 20191226:
+   Clang/LLVM is now the default compiler for all powerpc architectures.
+   LLD is now the default linker for powerpc64.  The change for powerpc64
+   also includes a change to the ELFv2 ABI, incompatible with the existing
+   ABI.
+
+20191226:
Kernel-loadable random(4) modules are no longer unloadable.
 
 20191222:
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svn commit: r356113 - in head: libexec/rtld-elf sys/kern sys/sys

[Justin Hibbits]

Author: jhibbits
Date: Fri Dec 27 04:07:03 2019
New Revision: 356113
URL: https://svnweb.freebsd.org/changeset/base/356113

Log:
  Eliminate the last MI difference in AT_* definitions (for powerpc).
  
  Summary:
  As a transition aide, implement an alternative elfN_freebsd_fixup which
  is called for old powerpc binaries.  Similarly, add a translation to rtld to
  convert old values to new ones (as expected by a new rtld).
  
  Translation of old<->new values  is incomplete, but sufficient to allow an
  installworld of a new userspace from an old one when a new kernel is running.
  
  Test Plan:
  Someone needs to see how a new kernel/rtld/libc works with an old
  binary.  If if works we can probalby ship this.  If not we probalby need
  some more compat bits.
  
  Submitted by: brooks
  Reviewed by:  jhibbits
  Differential Revision:https://reviews.freebsd.org/D20799

Modified:
  head/libexec/rtld-elf/rtld.c
  head/sys/kern/imgact_elf.c
  head/sys/sys/elf_common.h
  head/sys/sys/param.h

Modified: head/libexec/rtld-elf/rtld.c
==
--- head/libexec/rtld-elf/rtld.cFri Dec 27 04:00:04 2019
(r356112)
+++ head/libexec/rtld-elf/rtld.cFri Dec 27 04:07:03 2019
(r356113)
@@ -382,6 +382,9 @@ _rtld(Elf_Addr *sp, func_ptr_type *exit_proc, Obj_Entr
 caddr_t imgentry;
 char buf[MAXPATHLEN];
 int argc, fd, i, phnum, rtld_argc;
+#ifdef __powerpc__
+int old_auxv_format = 1;
+#endif
 bool dir_enable, explicit_fd, search_in_path;
 
 /*
@@ -407,7 +410,28 @@ _rtld(Elf_Addr *sp, func_ptr_type *exit_proc, Obj_Entr
 for (auxp = aux;  auxp->a_type != AT_NULL;  auxp++) {
if (auxp->a_type < AT_COUNT)
aux_info[auxp->a_type] = auxp;
+#ifdef __powerpc__
+   if (auxp->a_type == 23) /* AT_STACKPROT */
+   old_auxv_format = 0;
+#endif
 }
+
+#ifdef __powerpc__
+if (old_auxv_format) {
+   /* Remap from old-style auxv numbers. */
+   aux_info[23] = aux_info[21];/* AT_STACKPROT */
+   aux_info[21] = aux_info[19];/* AT_PAGESIZESLEN */
+   aux_info[19] = aux_info[17];/* AT_NCPUS */
+   aux_info[17] = aux_info[15];/* AT_CANARYLEN */
+   aux_info[15] = aux_info[13];/* AT_EXECPATH */
+   aux_info[13] = NULL;/* AT_GID */
+
+   aux_info[20] = aux_info[18];/* AT_PAGESIZES */
+   aux_info[18] = aux_info[16];/* AT_OSRELDATE */
+   aux_info[16] = aux_info[14];/* AT_CANARY */
+   aux_info[14] = NULL;/* AT_EGID */
+}
+#endif
 
 /* Initialize and relocate ourselves. */
 assert(aux_info[AT_BASE] != NULL);

Modified: head/sys/kern/imgact_elf.c
==
--- head/sys/kern/imgact_elf.c  Fri Dec 27 04:00:04 2019(r356112)
+++ head/sys/kern/imgact_elf.c  Fri Dec 27 04:07:03 2019(r356113)
@@ -1323,6 +1323,102 @@ ret:
 
 #definesuword __CONCAT(suword, __ELF_WORD_SIZE)
 
+#ifdef __powerpc__
+#defineOLD_AT_NULL AT_NULL
+#defineOLD_AT_IGNORE   AT_IGNORE
+#defineOLD_AT_EXECFD   AT_EXECFD
+#defineOLD_AT_PHDR AT_PHDR
+#defineOLD_AT_PHENTAT_PHENT
+#defineOLD_AT_PHNUMAT_PHNUM
+#defineOLD_AT_PAGESZ   AT_PAGESZ
+#defineOLD_AT_BASE AT_BASE
+#defineOLD_AT_FLAGSAT_FLAGS
+#defineOLD_AT_ENTRYAT_ENTRY
+#defineOLD_AT_NOTELF   AT_NOTELF
+#defineOLD_AT_UID  AT_UID
+#defineOLD_AT_EUID AT_EUID
+#defineOLD_AT_EXECPATH 13
+#defineOLD_AT_CANARY   14
+#defineOLD_AT_CANARYLEN15
+#defineOLD_AT_OSRELDATE16
+#defineOLD_AT_NCPUS17
+#defineOLD_AT_PAGESIZES18
+#defineOLD_AT_PAGESIZESLEN 19
+#defineOLD_AT_STACKPROT21
+#defineOLD_AT_TIMEKEEP AT_TIMEKEEP
+#defineOLD_AT_EHDRFLAGSAT_EHDRFLAGS
+#defineOLD_AT_HWCAPAT_HWCAP
+#defineOLD_AT_HWCAP2   AT_HWCAP2
+
+#defineOLD_AT_COUNT27  /* Count of defined aux entry types. */
+
+static int
+__elfN(freebsd_fixup_old_auxargs)(register_t **stack_base,
+struct image_params *imgp)
+{
+   Elf_Auxargs *args = (Elf_Auxargs *)imgp->auxargs;
+   Elf_Auxinfo *argarray, *pos;
+   Elf_Addr *base, *auxbase;
+   int error;
+
+   base = (Elf_Addr *)*stack_base;
+   auxbase = base + imgp->args->argc + 1 + imgp->args->envc + 1;
+   argarray = pos = malloc(OLD_AT_COUNT * sizeof(*pos), M_TEMP,
+   M_WAITOK | M_ZERO);
+
+   if (args->execfd != -1)
+   AUXARGS_ENTRY(pos, OLD_AT_EXECFD, args->execfd);
+   AUXARGS_ENTRY(pos, OLD_AT_PHDR, args->phdr);
+   AUXARGS_ENTRY(pos, OLD_AT_PHENT, 

svn commit: r356112 - in head/contrib/llvm-project: clang/lib/Basic/Targets llvm/lib/Target/PowerPC

[Justin Hibbits]

Author: jhibbits
Date: Fri Dec 27 04:00:04 2019
New Revision: 356112
URL: https://svnweb.freebsd.org/changeset/base/356112

Log:
  [PowerPC64] Starting from FreeBSD 13.0, default to ELFv2 ABI
  
  This changes the LLVM default powerpc64 ABI to ELFv2, if target OS is
  FreeBSD >= 13.0
  
  This will also be sent upstream.
  
  Submitted by: alfredo.junior_eldorado.org.br
  Reviewed by:  dim, luporl
  Relnotes: YES
  Differential Revision:https://reviews.freebsd.org/D20383

Modified:
  head/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h
  head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

Modified: head/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h
==
--- head/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h Fri Dec 27 
03:54:27 2019(r356111)
+++ head/contrib/llvm-project/clang/lib/Basic/Targets/PPC.h Fri Dec 27 
04:00:04 2019(r356112)
@@ -375,12 +375,29 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public
 IntMaxType = SignedLong;
 Int64Type = SignedLong;
 
+if (Triple.getEnvironment() != llvm::Triple::UnknownEnvironment) {
+  switch (Triple.getEnvironment()){
+case llvm::Triple::ELFv1:
+  ABI = "elfv1";
+  break;
+   default:
+  ABI = "elfv2";
+   break;
+  }
+} else {
+  if ((Triple.getOS() == llvm::Triple::FreeBSD) &&
+ (Triple.getOSMajorVersion() < 13)) {
+ABI = "elfv1";
+  } else {
+ABI = "elfv2";
+  }
+}
+
+
 if ((Triple.getArch() == llvm::Triple::ppc64le)) {
   resetDataLayout("e-m:e-i64:64-n32:64");
-  ABI = "elfv2";
 } else {
   resetDataLayout("E-m:e-i64:64-n32:64");
-  ABI = Triple.getEnvironment() == llvm::Triple::ELFv2 ? "elfv2" : "elfv1";
 }
 
 if (Triple.getOS() == llvm::Triple::AIX)

Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
==
--- head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp  
Fri Dec 27 03:54:27 2019(r356111)
+++ head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp  
Fri Dec 27 04:00:04 2019(r356112)
@@ -209,6 +209,20 @@ static PPCTargetMachine::PPCABI computeTargetABI(const
   if (TT.isMacOSX())
 return PPCTargetMachine::PPC_ABI_UNKNOWN;
 
+  if (TT.isOSFreeBSD()) {
+switch (TT.getArch()) {
+case Triple::ppc64le:
+case Triple::ppc64:
+  if (TT.getOSMajorVersion() >= 13)
+return PPCTargetMachine::PPC_ABI_ELFv2;
+  else
+return PPCTargetMachine::PPC_ABI_ELFv1;
+case Triple::ppc:
+default:
+  return PPCTargetMachine::PPC_ABI_UNKNOWN;
+}
+  }
+
   switch (TT.getArch()) {
   case Triple::ppc64le:
 return PPCTargetMachine::PPC_ABI_ELFv2;
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svn commit: r356111 - in head/share: man/man7 mk

[Justin Hibbits]

Author: jhibbits
Date: Fri Dec 27 03:54:27 2019
New Revision: 356111
URL: https://svnweb.freebsd.org/changeset/base/356111

Log:
  Use LLVM as default toolchain for all PowerPC targets
  
  This enables LLVM as the default compiler for powerpc, powerpc64, and
  powerpcspe, as well as LLD as the default linker for powerpc64.
  
  LLD is not yet ready for prime time for powerpc and powerpcspe, but work is
  continuing on it.
  
  Submitted by: alfredo.junior_eldorado.org.br
  Relnotes: YES
  Differential Revision:https://reviews.freebsd.org/D20378

Modified:
  head/share/man/man7/arch.7
  head/share/mk/src.opts.mk

Modified: head/share/man/man7/arch.7
==
--- head/share/man/man7/arch.7  Fri Dec 27 03:00:18 2019(r356110)
+++ head/share/man/man7/arch.7  Fri Dec 27 03:54:27 2019(r356111)
@@ -323,9 +323,9 @@ This table shows the default tool chain for each archi
 .It mips64elTa GCC 4.2.1 Ta GNU ld 2.17.50
 .It mips64elhf  Ta GCC 4.2.1 Ta GNU ld 2.17.50
 .It mips64hfTa GCC 4.2.1 Ta GNU ld 2.17.50
-.It powerpc Ta GCC 4.2.1 Ta GNU ld 2.17.50
-.It powerpcspe  Ta GCC 4.2.1 Ta GNU ld 2.17.50
-.It powerpc64   Ta GCC 4.2.1 Ta GNU ld 2.17.50
+.It powerpc Ta Clang Ta GNU ld 2.17.50
+.It powerpcspe  Ta Clang Ta GNU ld 2.17.50
+.It powerpc64   Ta Clang Ta lld
 .It riscv64 Ta GCC(1)Ta GNU ld(1)
 .It riscv64sf   Ta GCC(1)Ta GNU ld(1)
 .It sparc64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
@@ -339,7 +339,7 @@ Any CPU architectures not migrated by then
 may be removed from the tree after that date.
 Unless the make variable
 .Dv MAKE_OBSOLETE_GCC
-is defined, make universe will not build mips, powerpc, nor sparc64
+is defined, make universe will not build mips or sparc64
 architectures unless the xtoolchain binaries have been installed for
 the architecture.
 .Ss MACHINE_ARCH vs MACHINE_CPUARCH vs MACHINE

Modified: head/share/mk/src.opts.mk
==
--- head/share/mk/src.opts.mk   Fri Dec 27 03:00:18 2019(r356110)
+++ head/share/mk/src.opts.mk   Fri Dec 27 03:54:27 2019(r356111)
@@ -305,7 +305,8 @@ __DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF
 # build Clang without using an external compiler.
 
 .if ${COMPILER_FEATURES:Mc++11} && (${__T} == "aarch64" || \
-${__T} == "amd64" || ${__TT} == "arm" || ${__T} == "i386")
+${__T} == "amd64" || ${__TT} == "arm" || ${__T} == "i386" || \
+${__TT} == "powerpc")
 # Clang is enabled, and will be installed as the default /usr/bin/cc.
 __DEFAULT_YES_OPTIONS+=CLANG CLANG_BOOTSTRAP CLANG_IS_CC LLD
 __DEFAULT_NO_OPTIONS+=GCC GCC_BOOTSTRAP GNUCXX GPL_DTC
@@ -328,13 +329,13 @@ BROKEN_OPTIONS+=BINUTILS BINUTILS_BOOTSTRAP GCC GCC_BO
 BROKEN_OPTIONS+=OFED
 .endif
 .if ${__T} == "aarch64" || ${__T} == "amd64" || ${__T} == "i386" || \
-${__T:Mriscv*} != "" || ${__TT} == "mips"
+${__TT} == "powerpc" || ${__T:Mriscv*} != "" || ${__TT} == "mips"
 __DEFAULT_YES_OPTIONS+=LLVM_LIBUNWIND
 .else
 __DEFAULT_NO_OPTIONS+=LLVM_LIBUNWIND
 .endif
 .if ${__T} == "aarch64" || ${__T} == "amd64" || ${__T} == "armv6" || \
-${__T} == "armv7" || ${__T} == "i386"
+${__T} == "armv7" || ${__T} == "i386" || ${__T} == "powerpc64"
 __DEFAULT_YES_OPTIONS+=LLD_BOOTSTRAP LLD_IS_LD
 .else
 __DEFAULT_NO_OPTIONS+=LLD_BOOTSTRAP LLD_IS_LD
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svn commit: r356104 - in head: contrib/llvm-project/clang/lib/AST contrib/llvm-project/compiler-rt/lib/builtins lib/libcompiler_rt

[Justin Hibbits]

Author: jhibbits
Date: Thu Dec 26 23:06:28 2019
New Revision: 356104
URL: https://svnweb.freebsd.org/changeset/base/356104

Log:
  [PowerPC] enable atomic.c in compiler_rt and do not check and forces
  lock/lock_free decisions in compiled time
  
  Summary:
  Enables atomic.c in compiler_rt and forces clang to not emit a call for 
runtime
  decision about lock/lock_free.  At compiling time, if clang can't decide if
  atomic operation can be lock free, it emits calls to external functions  like
  `__atomic_is_lock_free`, `__c11_atomic_is_lock_free` and
  `__atomic_always_lock_free`, postponing decision to a runtime check.  
According
  to LLVM code documentation, the mechanism exists due to differences between
  x86_64 processors that can't be decided at runtime.
  
  On PowerPC and PowerPCSPE (32 bits), we already know in advance it can't be 
lock
  free, so we force the decision at compile time and avoid having to implement 
it
  in an external library.
  
  This patch was made after 32 bit users testing the PowePC32 bit ISO reported
  llvm could not be compiled with in-base llvm due to `__atomic_load8` not
  implemented.
  
  Submitted by: alfredo.junior_eldorado.org.br
  Reviewed by:  jhibbits, dim
  
  Differential Revision:https://reviews.freebsd.org/D22549

Modified:
  head/contrib/llvm-project/clang/lib/AST/ExprConstant.cpp
  head/contrib/llvm-project/compiler-rt/lib/builtins/atomic.c
  head/lib/libcompiler_rt/Makefile.inc

Modified: head/contrib/llvm-project/clang/lib/AST/ExprConstant.cpp
==
--- head/contrib/llvm-project/clang/lib/AST/ExprConstant.cppThu Dec 26 
22:49:19 2019(r356103)
+++ head/contrib/llvm-project/clang/lib/AST/ExprConstant.cppThu Dec 26 
23:06:28 2019(r356104)
@@ -9896,6 +9896,13 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const Call
   }
 }
 
+// Avoid emiting call for runtime decision on PowerPC 32-bit
+// The lock free possibilities on this platform are covered by the lines 
+// above and we know in advance other cases require lock
+if (Info.Ctx.getTargetInfo().getTriple().getArch() == llvm::Triple::ppc) {
+return Success(0, E);
+}
+
 return BuiltinOp == Builtin::BI__atomic_always_lock_free ?
 Success(0, E) : Error(E);
   }

Modified: head/contrib/llvm-project/compiler-rt/lib/builtins/atomic.c
==
--- head/contrib/llvm-project/compiler-rt/lib/builtins/atomic.c Thu Dec 26 
22:49:19 2019(r356103)
+++ head/contrib/llvm-project/compiler-rt/lib/builtins/atomic.c Thu Dec 26 
23:06:28 2019(r356104)
@@ -51,8 +51,8 @@ static const long SPINLOCK_MASK = SPINLOCK_COUNT - 1;
 

 #ifdef __FreeBSD__
 #include 
-#include 
 #include 
+#include 
 #include 
 typedef struct _usem Lock;
 __inline static void unlock(Lock *l) {
@@ -117,13 +117,20 @@ static __inline Lock *lock_for_pointer(void *ptr) {
   return locks + (hash & SPINLOCK_MASK);
 }
 
-/// Macros for determining whether a size is lock free.  Clang can not yet
-/// codegen __atomic_is_lock_free(16), so for now we assume 16-byte values are
-/// not lock free.
+/// Macros for determining whether a size is lock free.
 #define IS_LOCK_FREE_1 __c11_atomic_is_lock_free(1)
 #define IS_LOCK_FREE_2 __c11_atomic_is_lock_free(2)
 #define IS_LOCK_FREE_4 __c11_atomic_is_lock_free(4)
+
+/// 32 bit PowerPC doesn't support 8-byte lock_free atomics
+#if !defined(__powerpc64__) && defined(__powerpc__)
+#define IS_LOCK_FREE_8 0
+#else
 #define IS_LOCK_FREE_8 __c11_atomic_is_lock_free(8)
+#endif
+
+/// Clang can not yet codegen __atomic_is_lock_free(16), so for now we assume
+/// 16-byte values are not lock free.
 #define IS_LOCK_FREE_16 0
 
 /// Macro that calls the compiler-generated lock-free versions of functions

Modified: head/lib/libcompiler_rt/Makefile.inc
==
--- head/lib/libcompiler_rt/Makefile.incThu Dec 26 22:49:19 2019
(r356103)
+++ head/lib/libcompiler_rt/Makefile.incThu Dec 26 23:06:28 2019
(r356104)
@@ -205,6 +205,14 @@ CFLAGS+=   -DEMIT_SYNC_ATOMICS
 SRCF+= stdatomic
 .endif
 
+
+.if "${COMPILER_TYPE}" == "clang" && \
+(${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe")
+SRCS+=  atomic.c
+CFLAGS.atomic.c+=  -Wno-atomic-alignment
+.endif
+
+
 .for file in ${SRCF}
 .if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == 
"") \
 && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S)
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svn commit: r356102 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Thu Dec 26 22:47:24 2019
New Revision: 356102
URL: https://svnweb.freebsd.org/changeset/base/356102

Log:
  powerpc: Move ppc32_runtime_resolve() declaration to the right place
  
  The function is only used in 32-bit kernels, so move the declaration to
  !powerpc64.

Modified:
  head/sys/powerpc/powerpc/elf32_machdep.c

Modified: head/sys/powerpc/powerpc/elf32_machdep.c
==
--- head/sys/powerpc/powerpc/elf32_machdep.cThu Dec 26 22:33:20 2019
(r356101)
+++ head/sys/powerpc/powerpc/elf32_machdep.cThu Dec 26 22:47:24 2019
(r356102)
@@ -63,7 +63,6 @@
 
 extern const char *freebsd32_syscallnames[];
 static void ppc32_fixlimit(struct rlimit *rl, int which);
-static void ppc32_runtime_resolve(void);
 
 static SYSCTL_NODE(_compat, OID_AUTO, ppc32, CTLFLAG_RW, 0, "32-bit mode");
 
@@ -75,6 +74,8 @@ SYSCTL_ULONG(_compat_ppc32, OID_AUTO, maxdsiz, CTLFLAG
 u_long ppc32_maxssiz = PPC32_MAXSSIZ;
 SYSCTL_ULONG(_compat_ppc32, OID_AUTO, maxssiz, CTLFLAG_RWTUN, _maxssiz,
  0, "");
+#else
+static void ppc32_runtime_resolve(void);
 #endif
 
 struct sysentvec elf32_freebsd_sysvec = {
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svn commit: r356054 - in head: share/mk stand

[Justin Hibbits]

Author: jhibbits
Date: Tue Dec 24 16:03:33 2019
New Revision: 356054
URL: https://svnweb.freebsd.org/changeset/base/356054

Log:
  [PowerPC64]  Use ld.bfd to build LIB32 and STAND - when using llvm
  
  Summary:
  This patch is to support ongoing work for replacing "GCC/BFD" by "CLANG/LLD" 
on
  target PowerPC64 [1], by proposing a way to specify and/or locate a secondary
  ld.bfd linker.
  This is necessary as LLD currently doesn't support PowerPC 32 bits, so we keep
  using BFD for the 32 bit stuff on PowePC64(LIB32 compatibility and
  STAND/slof/loader.)
  
  - creates LD_BFD variable pointing to ld.bfd
  - use LD_BFD as linker for LIB32/compat
  - Default behavior for other platforms aren't changed.
  
  [1] https://wiki.freebsd.org/powerpc/llvm-elfv2
  
  Submitted by: alfredo.junior_eldorado.org.br
  Reviewed by:  imp
  Differential Revision: https://reviews.freebsd.org/D20261

Modified:
  head/share/mk/bsd.compat.mk
  head/share/mk/bsd.cpu.mk
  head/stand/defs.mk

Modified: head/share/mk/bsd.compat.mk
==
--- head/share/mk/bsd.compat.mk Tue Dec 24 15:56:24 2019(r356053)
+++ head/share/mk/bsd.compat.mk Tue Dec 24 16:03:33 2019(r356054)
@@ -47,11 +47,20 @@ LIB32CPUFLAGS=  -mcpu=powerpc
 .else
 LIB32CPUFLAGS= -mcpu=${COMPAT_CPUTYPE}
 .endif
+
+.if ${COMPAT_COMPILER_TYPE} == "gcc"
 LIB32CPUFLAGS+=-m32
+.else
+LIB32CPUFLAGS+=-target powerpc-unknown-freebsd13.0
+
+# Use BFD to workaround ld.lld issues on PowerPC 32 bit 
+LIB32CPUFLAGS+= -fuse-ld=${LD_BFD}
+.endif
+
 LIB32_MACHINE= powerpc
 LIB32_MACHINE_ARCH=powerpc
 LIB32WMAKEFLAGS=   \
-   LD="${XLD} -m elf32ppc_fbsd"
+   LD="${LD_BFD} -m elf32ppc_fbsd"
 
 .elif ${COMPAT_ARCH:Mmips64*} != ""
 HAS_COMPAT=32

Modified: head/share/mk/bsd.cpu.mk
==
--- head/share/mk/bsd.cpu.mkTue Dec 24 15:56:24 2019(r356053)
+++ head/share/mk/bsd.cpu.mkTue Dec 24 16:03:33 2019(r356054)
@@ -412,3 +412,17 @@ CFLAGS_NO_SIMD += ${CFLAGS_NO_SIMD.${COMPILER_TYPE}}
 # These come from make.conf or the command line or the environment.
 CFLAGS += ${CFLAGS.${MACHINE_ARCH}}
 CXXFLAGS += ${CXXFLAGS.${MACHINE_ARCH}}
+
+
+# Defines a variable for Binutils linker, to be used to workaround some
+# issue with LLVM LLD (i.e. support for PowerPC32 bit on PowerPC64)
+#
+# This is an unavoidable cross coupling with Makefile.inc1 and
+# normal builds works when CROSS_BINUTILS_PREFIX and could be removed
+# when LLD PowerPC 32 bit support is completed
+.if defined(CROSS_BINUTILS_PREFIX)
+LD_BFD=${LOCALBASE}/bin/${CROSS_BINUTILS_PREFIX}-ld.bfd
+.else
+LD_BFD=${OBJTOP}/tmp/usr/bin/ld.bfd
+.endif
+

Modified: head/stand/defs.mk
==
--- head/stand/defs.mk  Tue Dec 24 15:56:24 2019(r356053)
+++ head/stand/defs.mk  Tue Dec 24 16:03:33 2019(r356054)
@@ -99,6 +99,10 @@ CFLAGS+= -DLOADER_DISK_SUPPORT
 # or powerpc64.
 .if ${MACHINE_ARCH} == "powerpc64"
 CFLAGS+=   -m32 -mcpu=powerpc
+# Use ld.bfd to workaround ld.lld issues on PowerPC 32 bit
+.if "${COMPILER_TYPE}" == "clang" && "${LINKER_TYPE}" == "lld"
+CFLAGS+=   -fuse-ld=${LD_BFD}
+.endif
 .endif
 
 # For amd64, there's a bit of mixed bag. Some of the tree (i386, lib*32) is
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svn commit: r355977 - head/sys/conf

[Justin Hibbits]

Author: jhibbits
Date: Sat Dec 21 04:44:17 2019
New Revision: 355977
URL: https://svnweb.freebsd.org/changeset/base/355977

Log:
  powerpc: Only build mpc85xx i2c driver for mpc85xx
  
  No need to build it for every other platform.

Modified:
  head/sys/conf/files.powerpc

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Sat Dec 21 02:44:50 2019(r355976)
+++ head/sys/conf/files.powerpc Sat Dec 21 04:44:17 2019(r355977)
@@ -139,7 +139,7 @@ powerpc/mpc85xx/ds1553_core.c   optionalds1553
 powerpc/mpc85xx/fsl_diu.c  optionalmpc85xx diu
 powerpc/mpc85xx/fsl_espi.c optionalmpc85xx spibus
 powerpc/mpc85xx/fsl_sata.c optionalmpc85xx ata
-powerpc/mpc85xx/i2c.c  optionaliicbus
+powerpc/mpc85xx/i2c.c  optionalmpc85xx iicbus
 powerpc/mpc85xx/isa.c  optionalmpc85xx isa
 powerpc/mpc85xx/lbc.c  optionalmpc85xx
 powerpc/mpc85xx/mpc85xx.c  optionalmpc85xx
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svn commit: r355783 - head/sys/powerpc/powernv

[Justin Hibbits]

Author: jhibbits
Date: Sun Dec 15 21:20:18 2019
New Revision: 355783
URL: https://svnweb.freebsd.org/changeset/base/355783

Log:
  powerpc/powernv: Set the PTCR for the Nest MMU
  
  The Nest MMU manages address translation for accelerators on the POWER9.  To
  do so, it needs a page table, so export the system page table to the Nest
  MMU.  This will quietly fail on pre-POWER9 systems that do not have a NMMU.
  
  The NMMU is currently unused, so this change is currently effectively a NOP,
  but the NMMU and VAS will eventually be used.

Modified:
  head/sys/powerpc/powernv/opal.h
  head/sys/powerpc/powernv/platform_powernv.c

Modified: head/sys/powerpc/powernv/opal.h
==
--- head/sys/powerpc/powernv/opal.h Sun Dec 15 21:19:41 2019
(r355782)
+++ head/sys/powerpc/powernv/opal.h Sun Dec 15 21:20:18 2019
(r355783)
@@ -91,6 +91,7 @@ int opal_call(uint64_t token, ...);
 #defineOPAL_INT_EOI124
 #defineOPAL_INT_SET_MFRR   125
 #defineOPAL_PCI_TCE_KILL   126
+#defineOPAL_NMMU_SET_PTCR  127
 #defineOPAL_XIVE_RESET 128
 #defineOPAL_XIVE_GET_IRQ_INFO  129
 #defineOPAL_XIVE_GET_IRQ_CONFIG130

Modified: head/sys/powerpc/powernv/platform_powernv.c
==
--- head/sys/powerpc/powernv/platform_powernv.c Sun Dec 15 21:19:41 2019
(r355782)
+++ head/sys/powerpc/powernv/platform_powernv.c Sun Dec 15 21:20:18 2019
(r355783)
@@ -494,3 +494,14 @@ static void
 powernv_cpu_idle(sbintime_t sbt)
 {
 }
+
+/* Set up the Nest MMU on POWER9 relatively early, but after pmap is setup. */
+static void
+powernv_setup_nmmu(void *unused)
+{
+   if (opal_check() != 0)
+   return;
+   opal_call(OPAL_NMMU_SET_PTCR, -1, mfspr(SPR_PTCR));
+}
+
+SYSINIT(powernv_setup_nmmu, SI_SUB_CPU, SI_ORDER_ANY, powernv_setup_nmmu, 
NULL);
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svn commit: r355778 - head/sys/powerpc/mpc85xx

[Justin Hibbits]

Author: jhibbits
Date: Sun Dec 15 21:08:40 2019
New Revision: 355778
URL: https://svnweb.freebsd.org/changeset/base/355778

Log:
  powerpc/mpc85xx: Clean up Freescale SATA driver a little
  
  * Remove unused ATA_IN/OUT macros, they just clutter up the file.
  * Fix some RID management bits for the channel memory resource.

Modified:
  head/sys/powerpc/mpc85xx/fsl_sata.c

Modified: head/sys/powerpc/mpc85xx/fsl_sata.c
==
--- head/sys/powerpc/mpc85xx/fsl_sata.c Sun Dec 15 18:05:18 2019
(r355777)
+++ head/sys/powerpc/mpc85xx/fsl_sata.c Sun Dec 15 21:08:40 2019
(r355778)
@@ -253,7 +253,7 @@ struct fsl_sata_device {
 /* structure describing an ATA channel */
 struct fsl_sata_channel {
device_tdev;/* Device handle */
-   int unit;   /* Physical channel */
+   int  r_mid; /* Physical channel RID */
struct resource *r_mem; /* Memory of this channel */
struct resource *r_irq; /* Interrupt of this channel */
void*ih;/* Interrupt handle */
@@ -307,34 +307,10 @@ enum fsl_sata_err_type {
 };
 
 /* macros to hide busspace uglyness */
-#defineATA_INB(res, offset) \
-   bus_read_1((res), (offset))
-#defineATA_INW(res, offset) \
-   bus_read_2((res), (offset))
 #defineATA_INL(res, offset) \
bus_read_4((res), (offset))
-#defineATA_INSW(res, offset, addr, count) \
-   bus_read_multi_2((res), (offset), (addr), (count))
-#defineATA_INSW_STRM(res, offset, addr, count) \
-   bus_read_multi_stream_2((res), (offset), (addr), (count))
-#defineATA_INSL(res, offset, addr, count) \
-   bus_read_multi_4((res), (offset), (addr), (count))
-#defineATA_INSL_STRM(res, offset, addr, count) \
-   bus_read_multi_stream_4((res), (offset), (addr), (count))
-#defineATA_OUTB(res, offset, value) \
-   bus_write_1((res), (offset), (value))
-#defineATA_OUTW(res, offset, value) \
-   bus_write_2((res), (offset), (value))
 #defineATA_OUTL(res, offset, value) \
bus_write_4((res), (offset), (value))
-#defineATA_OUTSW(res, offset, addr, count) \
-   bus_write_multi_2((res), (offset), (addr), (count))
-#defineATA_OUTSW_STRM(res, offset, addr, count) \
-   bus_write_multi_stream_2((res), (offset), (addr), (count))
-#defineATA_OUTSL(res, offset, addr, count) \
-   bus_write_multi_4((res), (offset), (addr), (count))
-#defineATA_OUTSL_STRM(res, offset, addr, count) \
-   bus_write_multi_stream_4((res), (offset), (addr), (count))
 
 static int
 fsl_sata_probe(device_t dev)
@@ -356,7 +332,6 @@ fsl_sata_attach(device_t dev)
int rid, error, i, sata_rev = 0;
 
ch->dev = dev;
-   ch->unit = (intptr_t)device_get_ivars(dev);
mtx_init(>mtx, "FSL SATA channel lock", NULL, MTX_DEF);
ch->pm_level = 0;
resource_int_value(device_get_name(dev),
@@ -379,9 +354,9 @@ fsl_sata_attach(device_t dev)
}
ch->user[i].caps |= CTS_SATA_CAPS_H_AN;
}
-   rid = 0;
+   ch->r_mid = 0;
if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
-   , RF_ACTIVE)))
+   >r_mid, RF_ACTIVE)))
return (ENXIO);
rman_set_bustag(ch->r_mem, _le_tag);
fsl_sata_dmainit(dev);
@@ -445,7 +420,7 @@ err1:
mtx_unlock(>mtx);
bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq);
 err0:
-   bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem);
+   bus_release_resource(dev, SYS_RES_MEMORY, ch->r_mid, ch->r_mem);
mtx_destroy(>mtx);
return (error);
 }
@@ -472,7 +447,7 @@ fsl_sata_detach(device_t dev)
fsl_sata_slotsfree(dev);
fsl_sata_dmafini(dev);
 
-   bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem);
+   bus_release_resource(dev, SYS_RES_MEMORY, ch->r_mid, ch->r_mem);
mtx_destroy(>mtx);
return (0);
 }
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svn commit: r355521 - in head: stand/powerpc/kboot sys/conf sys/powerpc/include

[Justin Hibbits]

Author: jhibbits
Date: Sun Dec  8 04:36:42 2019
New Revision: 355521
URL: https://svnweb.freebsd.org/changeset/base/355521

Log:
  powerpc: Use builtins for fls/flsl
  
  Summary:
  There's no need to use the fallback fls() and flsl() libkern functions
  when the PowerISA includes instructions that already do the bulk of the
  work.  Take advantage of this through the GCC builtins __builtin_clz()
  and __builtin_clzl().
  
  Reviewed by:  luporl
  Differential Revision:https://reviews.freebsd.org/D22340

Modified:
  head/stand/powerpc/kboot/main.c
  head/sys/conf/files.powerpc
  head/sys/powerpc/include/cpufunc.h

Modified: head/stand/powerpc/kboot/main.c
==
--- head/stand/powerpc/kboot/main.c Sun Dec  8 04:19:05 2019
(r355520)
+++ head/stand/powerpc/kboot/main.c Sun Dec  8 04:36:42 2019
(r355521)
@@ -31,7 +31,6 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#define _KERNEL
 #include 
 #include "bootstrap.h"
 #include "host_syscall.h"

Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Sun Dec  8 04:19:05 2019(r355520)
+++ head/sys/conf/files.powerpc Sun Dec  8 04:36:42 2019(r355521)
@@ -88,8 +88,6 @@ libkern/divdi3.c  optionalpowerpc | 
powerpcspe
 libkern/ffs.c  standard
 libkern/ffsl.c standard
 libkern/ffsll.cstandard
-libkern/fls.c  standard
-libkern/flsl.c standard
 libkern/flsll.cstandard
 libkern/lshrdi3.c  optionalpowerpc | powerpcspe
 libkern/memcmp.c   standard

Modified: head/sys/powerpc/include/cpufunc.h
==
--- head/sys/powerpc/include/cpufunc.h  Sun Dec  8 04:19:05 2019
(r355520)
+++ head/sys/powerpc/include/cpufunc.h  Sun Dec  8 04:36:42 2019
(r355521)
@@ -212,6 +212,20 @@ get_pcpu(void)
return (ret);
 }
 
+#defineHAVE_INLINE_FLS
+static __inline __pure2 int
+fls(int mask)
+{
+   return (mask ? 32 - __builtin_clz(mask) : 0);
+}
+
+#define HAVE_INLINE_FLSL
+static __inline __pure2 int
+flsl(long mask)
+{
+   return (mask ? (8 * sizeof(long) - __builtin_clzl(mask)) : 0);
+}
+
 /* "NOP" operations to signify priorities to the kernel. */
 static __inline void
 nop_prio_vlow(void)
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svn commit: r355519 - head/sys/powerpc/aim

[Justin Hibbits]

Author: jhibbits
Date: Sun Dec  8 04:17:04 2019
New Revision: 355519
URL: https://svnweb.freebsd.org/changeset/base/355519

Log:
  powerpc64/pmap: micro-optimize some PVO-PTE logic
  
  Summary:
  moea64_pte_sync_native() and moea64_pte_unset_native() don't need the
  full PTE created, they only need to check that the PVO has a matching
  PTE to the PTE in the page table.  Don't waste time creating the full
  PTE in this case.
  
  Reviewed by:  luporl
  Differential Revision:https://reviews.freebsd.org/D22341

Modified:
  head/sys/powerpc/aim/mmu_oea64.c
  head/sys/powerpc/aim/mmu_oea64.h
  head/sys/powerpc/aim/moea64_native.c

Modified: head/sys/powerpc/aim/mmu_oea64.c
==
--- head/sys/powerpc/aim/mmu_oea64.cSun Dec  8 02:11:06 2019
(r355518)
+++ head/sys/powerpc/aim/mmu_oea64.cSun Dec  8 04:17:04 2019
(r355519)
@@ -435,8 +435,7 @@ void
 moea64_pte_from_pvo(const struct pvo_entry *pvo, struct lpte *lpte)
 {
 
-   lpte->pte_hi = (pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) &
-   LPTE_AVPN_MASK;
+   lpte->pte_hi = moea64_pte_vpn_from_pvo_vpn(pvo);
lpte->pte_hi |= LPTE_VALID;

if (pvo->pvo_vaddr & PVO_LARGE)

Modified: head/sys/powerpc/aim/mmu_oea64.h
==
--- head/sys/powerpc/aim/mmu_oea64.hSun Dec  8 02:11:06 2019
(r355518)
+++ head/sys/powerpc/aim/mmu_oea64.hSun Dec  8 04:17:04 2019
(r355519)
@@ -76,6 +76,13 @@ void moea64_mid_bootstrap(mmu_t mmup, vm_offset_t ker
 void   moea64_late_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
vm_offset_t kernelend);
 
+static inline uint64_t
+moea64_pte_vpn_from_pvo_vpn(const struct pvo_entry *pvo)
+{
+   return ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) &
+   LPTE_AVPN_MASK);
+}
+
 /*
  * Statistics
  */

Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cSun Dec  8 02:11:06 2019
(r355518)
+++ head/sys/powerpc/aim/moea64_native.cSun Dec  8 04:17:04 2019
(r355519)
@@ -257,16 +257,14 @@ static int64_t
 moea64_pte_synch_native(mmu_t mmu, struct pvo_entry *pvo)
 {
volatile struct lpte *pt = moea64_pteg_table + pvo->pvo_pte.slot;
-   struct lpte properpt;
-   uint64_t ptelo;
+   uint64_t ptelo, pvo_ptevpn;
 
PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED);
 
-   moea64_pte_from_pvo(pvo, );
+   pvo_ptevpn = moea64_pte_vpn_from_pvo_vpn(pvo);
 
rw_rlock(_eviction_lock);
-   if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) !=
-   (properpt.pte_hi & LPTE_AVPN_MASK)) {
+   if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != pvo_ptevpn) {
/* Evicted */
rw_runlock(_eviction_lock);
return (-1);
@@ -330,14 +328,12 @@ static int64_t
 moea64_pte_unset_native(mmu_t mmu, struct pvo_entry *pvo)
 {
volatile struct lpte *pt = moea64_pteg_table + pvo->pvo_pte.slot;
-   struct lpte properpt;
-   uint64_t ptelo;
+   uint64_t ptelo, pvo_ptevpn;
 
-   moea64_pte_from_pvo(pvo, );
+   pvo_ptevpn = moea64_pte_vpn_from_pvo_vpn(pvo);
 
rw_rlock(_eviction_lock);
-   if ((be64toh(pt->pte_hi & LPTE_AVPN_MASK)) !=
-   (properpt.pte_hi & LPTE_AVPN_MASK)) {
+   if ((be64toh(pt->pte_hi & LPTE_AVPN_MASK)) != pvo_ptevpn) {
/* Evicted */
STAT_MOEA64(moea64_pte_overflow--);
rw_runlock(_eviction_lock);
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svn commit: r355481 - in head/sys: powerpc/aim powerpc/booke powerpc/include powerpc/powerpc vm

[Justin Hibbits]

Author: jhibbits
Date: Sat Dec  7 03:34:03 2019
New Revision: 355481
URL: https://svnweb.freebsd.org/changeset/base/355481

Log:
  powerpc/pmap: NUMA-ize vm_page_array on powerpc
  
  Summary:
  This matches r351198 from amd64.  This only applies to AIM64 and Book-E.
  On AIM64 it short-circuits with one domain, to behave similar to
  existing.  Otherwise it will allocate 16MB huge pages to hold the page
  array, across all NUMA domains.  On the first domain it will shift the
  page array base up, to "upper-align" the page array in that domain, so
  as to reduce the number of pages from the next domain appearing in this
  domain.  After the first domain, subsequent domains will be allocated in
  full 16MB pages, until the final domain, which can be short.  This means
  some inner domains may have pages accounted in earlier domains.
  
  On Book-E the page array is setup at MMU bootstrap time so that it's
  always mapped in TLB1, on both 32-bit and 64-bit.  This reduces the TLB0
  overhead for touching the vm_page_array, which reduces up to one TLB
  miss per array access.
  
  Since page_range (vm_page_startup()) is no longer used on Book-E but is on
  32-bit AIM, mark the variable as potentially unused, rather than using a
  nasty #if defined() list.
  
  Reviewed by:  luporl
  Differential Revision:https://reviews.freebsd.org/D21449

Modified:
  head/sys/powerpc/aim/mmu_oea64.c
  head/sys/powerpc/aim/slb.c
  head/sys/powerpc/booke/pmap.c
  head/sys/powerpc/include/pmap.h
  head/sys/powerpc/include/vmparam.h
  head/sys/powerpc/powerpc/mmu_if.m
  head/sys/powerpc/powerpc/pmap_dispatch.c
  head/sys/vm/vm_page.c

Modified: head/sys/powerpc/aim/mmu_oea64.c
==
--- head/sys/powerpc/aim/mmu_oea64.cSat Dec  7 03:29:58 2019
(r355480)
+++ head/sys/powerpc/aim/mmu_oea64.cSat Dec  7 03:34:03 2019
(r355481)
@@ -309,6 +309,7 @@ static int moea64_decode_kernel_ptr(mmu_t mmu, vm_offs
 int *is_user, vm_offset_t *decoded_addr);
 static size_t moea64_scan_pmap(mmu_t mmu);
 static void *moea64_dump_pmap_init(mmu_t mmu, unsigned blkpgs);
+static void moea64_page_array_startup(mmu_t, long);
 
 
 static mmu_method_t moea64_methods[] = {
@@ -348,6 +349,7 @@ static mmu_method_t moea64_methods[] = {
MMUMETHOD(mmu_page_set_memattr, moea64_page_set_memattr),
MMUMETHOD(mmu_quick_enter_page, moea64_quick_enter_page),
MMUMETHOD(mmu_quick_remove_page, moea64_quick_remove_page),
+   MMUMETHOD(mmu_page_array_startup,   moea64_page_array_startup),
 
/* Internal interfaces */
MMUMETHOD(mmu_mapdev,   moea64_mapdev),
@@ -639,11 +641,33 @@ moea64_bootstrap_slb_prefault(vm_offset_t va, int larg
 }
 #endif
 
+static int
+moea64_kenter_large(mmu_t mmup, vm_offset_t va, vm_paddr_t pa, uint64_t attr, 
int bootstrap)
+{
+   struct pvo_entry *pvo;
+   uint64_t pte_lo;
+   int error;
+
+   pte_lo = LPTE_M;
+   pte_lo |= attr;
+
+   pvo = alloc_pvo_entry(bootstrap);
+   pvo->pvo_vaddr |= PVO_WIRED | PVO_LARGE;
+   init_pvo_entry(pvo, kernel_pmap, va);
+
+   pvo->pvo_pte.prot = VM_PROT_READ | VM_PROT_WRITE |
+   VM_PROT_EXECUTE;
+   pvo->pvo_pte.pa = pa | pte_lo;
+   error = moea64_pvo_enter(mmup, pvo, NULL, NULL);
+   if (error != 0)
+   panic("Error %d inserting large page\n", error);
+   return (0);
+}
+
 static void
 moea64_setup_direct_map(mmu_t mmup, vm_offset_t kernelstart,
 vm_offset_t kernelend)
 {
-   struct pvo_entry *pvo;
register_t msr;
vm_paddr_t pa, pkernelstart, pkernelend;
vm_offset_t size, off;
@@ -660,15 +684,6 @@ moea64_setup_direct_map(mmu_t mmup, vm_offset_t kernel
  for (pa = pregions[i].mr_start; pa < pregions[i].mr_start +
 pregions[i].mr_size; pa += moea64_large_page_size) {
pte_lo = LPTE_M;
-
-   pvo = alloc_pvo_entry(1 /* bootstrap */);
-   pvo->pvo_vaddr |= PVO_WIRED | PVO_LARGE;
-   init_pvo_entry(pvo, kernel_pmap, PHYS_TO_DMAP(pa));
-
-   /*
-* Set memory access as guarded if prefetch within
-* the page could exit the available physmem area.
-*/
if (pa & moea64_large_page_mask) {
pa &= moea64_large_page_mask;
pte_lo |= LPTE_G;
@@ -677,10 +692,7 @@ moea64_setup_direct_map(mmu_t mmup, vm_offset_t kernel
pregions[i].mr_start + pregions[i].mr_size)
pte_lo |= LPTE_G;
 
-   pvo->pvo_pte.prot = VM_PROT_READ | VM_PROT_WRITE |
-   VM_PROT_EXECUTE;
-   pvo->pvo_pte.pa = pa | pte_lo;
-   moea64_pvo_enter(mmup, pvo, NULL, NULL);
+  

svn commit: r355380 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Wed Dec  4 03:51:30 2019
New Revision: 355380
URL: https://svnweb.freebsd.org/changeset/base/355380

Log:
  powerpc/booke: Fix some formatting errors in debug printfs
  
  Use the right formats for the types given (vm_offset_t and vm_size_t are
  both uint32_t on 32-bit platforms, and uint64_t on 64-bit platforms, and
  match size_t in size, so we can use the size_t format as we do in other
  similar code).
  
  These were found by clang.

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c   Wed Dec  4 03:44:50 2019
(r355379)
+++ head/sys/powerpc/booke/pmap.c   Wed Dec  4 03:51:30 2019
(r355380)
@@ -1622,8 +1622,8 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_o
/* Pre-round up to 1MB.  This wastes some space, but saves TLB entries 
*/
data_end = roundup2(data_end, 1 << 20);
debugf(" data_end: 0x%"PRI0ptrX"\n", data_end);
-   debugf(" kernstart: %p\n", kernstart);
-   debugf(" kernsize: %lx\n", kernsize);
+   debugf(" kernstart: %#zx\n", kernstart);
+   debugf(" kernsize: %#zx\n", kernsize);
 
if (data_end - kernstart > kernsize) {
kernsize += tlb1_mapin_region(kernstart + kernsize,
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svn commit: r355378 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Wed Dec  4 03:41:55 2019
New Revision: 355378
URL: https://svnweb.freebsd.org/changeset/base/355378

Log:
  powerpc/booke: Fix 32-bit Book-E SMP AP bringup
  
  r354266 changed the type of bp_kernload to vm_paddr_t in platform_mpc85xx.c,
  but not the variable itself in locore.S.  This caused the AP to not come up,
  due to overwriting the following variable (bp_virtaddr).  Also, properly
  load bp_kernload into MAS3 and MAS7.  Prior to r354266, we required loading
  into the low 4GB, but now we can load from anywhere in memory that ubldr can
  access.

Modified:
  head/sys/powerpc/booke/locore.S

Modified: head/sys/powerpc/booke/locore.S
==
--- head/sys/powerpc/booke/locore.S Wed Dec  4 03:36:54 2019
(r355377)
+++ head/sys/powerpc/booke/locore.S Wed Dec  4 03:41:55 2019
(r355378)
@@ -443,7 +443,7 @@ bp_trace:
 
.globl  bp_kernload
 bp_kernload:
-   ADDR(0) /* Kern phys. load address. */
+   .llong 0/* Kern phys. load address. */
 
.globl  bp_virtaddr
 bp_virtaddr:
@@ -548,14 +548,15 @@ bp_virtaddr:
 #else
clrrwi  %r3, %r3, PAGE_SHIFT/* trunc_page(%r3) */
 #endif
-   LOAD%r4, (bp_kernload - __boot_page)(%r3)
+   /* Load lower half of the kernel loadaddr. */
+   lwz %r4, (bp_kernload - __boot_page + 4)(%r3)
LOAD%r5, (bp_virtaddr - __boot_page)(%r3)
 
/* Set RPN and protection */
ori %r4, %r4, (MAS3_SX | MAS3_SW | MAS3_SR)@l
mtspr   SPR_MAS3, %r4
isync
-   li  %r4, 0
+   lwz %r4, (bp_kernload - __boot_page)(%r3)
mtspr   SPR_MAS7, %r4
isync
tlbwe
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svn commit: r355289 - in head/sys: arm64/arm64 arm64/conf arm64/include conf

[Justin Hibbits]

Author: jhibbits
Date: Mon Dec  2 15:07:06 2019
New Revision: 355289
URL: https://svnweb.freebsd.org/changeset/base/355289

Log:
  revert r354714 "Boot arm64 kernel using booti command from U-boot."
  
  After discussing with mmel@, it was clear this is insufficient to address
  all the needs.  mmel@ will commit his original patch, from
  https://reviews.freebsd.org/D13861, and the additions needed from r354714
  will be made afterward.
  
  Requested by: mmel
  Sponsored by: Juniper Networks, Inc.

Deleted:
  head/sys/arm64/arm64/machdep_boot.c
Modified:
  head/sys/arm64/arm64/locore.S
  head/sys/arm64/arm64/machdep.c
  head/sys/arm64/conf/GENERIC
  head/sys/arm64/include/machdep.h
  head/sys/conf/Makefile.arm64
  head/sys/conf/files.arm64
  head/sys/conf/options.arm64

Modified: head/sys/arm64/arm64/locore.S
==
--- head/sys/arm64/arm64/locore.S   Mon Dec  2 14:22:55 2019
(r355288)
+++ head/sys/arm64/arm64/locore.S   Mon Dec  2 15:07:06 2019
(r355289)
@@ -54,29 +54,6 @@
.text
.globl _start
 _start:
-#ifdef LINUX_BOOT_ABI
-   /*
-* See Documentation/arm64/booting.txt in the Linux kernel.
-* This is needed to boot using U-Boot's booti command.
-*/
-
-#defineBOOTI_MAGIC 0x644d5241
-#defineUBOOT_IMAGE_OFFSET  0
-#defineUBOOT_IMAGE_SIZE_end - _start
-#defineUBOOT_IMAGE_FLAGS   0
-
-   b   1f  /* Executable code */
-   .long   0   /* Executable code */
-   .quad   UBOOT_IMAGE_OFFSET  /* Image load offset, little endian */
-   .quad   UBOOT_IMAGE_SIZE/* Effective Image size, little endian 
*/
-   .quad   UBOOT_IMAGE_FLAGS   /* kernel flags, little endian */
-   .quad   0   /* reserved */
-   .quad   0   /* reserved */
-   .quad   0   /* reserved */
-   .long   BOOTI_MAGIC /* Magic number, little endian, 
"ARM\x64" */
-   .long   0   /* reserved (used for PE COFF offset) */
-1:
-#endif
/* Drop to EL1 */
bl  drop_to_el1
 
@@ -371,25 +348,15 @@ create_pagetables:
 * Build the TTBR1 maps.
 */
 
+   /* Find the size of the kernel */
mov x6, #(KERNBASE)
-   and x7, x0, x6
-   cmp x7, x6
-   b.eq1f
-   /* booted from U-Boot */
-   ldr x7, .Lend
-   sub x8, x7, x6  /* kernel size = end - begin */
-   b   2f
-1:
-   /* booted from FreeBSD loader */
-   sub x8, x0, x6  /* size = modulep - begin */
+   /* Find modulep - begin */
+   sub x8, x0, x6
/* Add two 2MiB pages for the module data and round up */
ldr x7, =(3 * L2_SIZE - 1)
add x8, x8, x7
-2:
/* Get the number of l2 pages to allocate, rounded down */
lsr x10, x8, #(L2_SHIFT)
-   /* Add 1 to get actual count */
-   add x10, x10, #1
 
/* Create the kernel space L2 table */
mov x6, x26

Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c  Mon Dec  2 14:22:55 2019
(r355288)
+++ head/sys/arm64/arm64/machdep.c  Mon Dec  2 15:07:06 2019
(r355289)
@@ -964,16 +964,6 @@ try_load_dtb(caddr_t kmdp)
vm_offset_t dtbp;
 
dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
-
-#if defined(FDT_DTB_STATIC)
-   /*
-* In case the device tree blob was not retrieved (from metadata) try
-* to use the statically embedded one.
-*/
-   if (dtbp == 0)
-   dtbp = (vm_offset_t)_static_dtb;
-#endif
-
if (dtbp == (vm_offset_t)NULL) {
printf("ERROR loading DTB\n");
return;
@@ -1077,26 +1067,6 @@ cache_setup(void)
}
 }
 
-static vm_offset_t
-freebsd_parse_boot_param(struct arm64_bootparams *abp)
-{
-   vm_offset_t lastaddr;
-   void *kmdp;
-   static char *loader_envp;
-
-   preload_metadata = (caddr_t)(uintptr_t)(abp->modulep);
-   kmdp = preload_search_by_type("elf kernel");
-   if (kmdp == NULL)
-   return (0);
-
-   boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
-   loader_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
-   init_static_kenv(loader_envp, 0);
-   lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
-
-   return (lastaddr);
-}
-
 void
 initarm(struct arm64_bootparams *abp)
 {
@@ -1112,31 +1082,26 @@ initarm(struct arm64_bootparams *abp)
caddr_t kmdp;
bool valid;
 
-   if ((abp->modulep & VM_MIN_KERNEL_ADDRESS) ==
-   VM_MIN_KERNEL_ADDRESS)
-   /* Booted from loader. */
-   lastaddr = freebsd_parse_boot_param(abp);
-#ifdef 

svn commit: r355275 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Sun Dec  1 21:29:34 2019
New Revision: 355275
URL: https://svnweb.freebsd.org/changeset/base/355275

Log:
  powerpc: Add 'show frame ' to show an arbitrary trap frame
  
  This lets us print, for example, the user's trap frame when a panic occurs.
  The frame address is given in the backtrace at the trap point, which can
  then be passed to 'show frame'.  This is useful for debugging as it can show
  inputs that lead to a panic or fault.  It can also be used to print trap
  frames from other CPUs that get stuck.
  
  i386 already has a similar command, but no others do.

Modified:
  head/sys/powerpc/powerpc/machdep.c

Modified: head/sys/powerpc/powerpc/machdep.c
==
--- head/sys/powerpc/powerpc/machdep.c  Sun Dec  1 21:27:09 2019
(r355274)
+++ head/sys/powerpc/powerpc/machdep.c  Sun Dec  1 21:29:34 2019
(r355275)
@@ -557,6 +557,50 @@ DB_SHOW_COMMAND(spr, db_show_spr)
db_printf("SPR %d(%x): %lx\n", saved_sprno, saved_sprno,
(unsigned long)spr);
 }
+
+DB_SHOW_COMMAND(frame, db_show_frame)
+{
+   struct trapframe *tf;
+   long reg;
+   int i;
+
+   tf = have_addr ? (struct trapframe *)addr : curthread->td_frame;
+
+   /*
+* Everything casts through long to simplify the printing.
+* 'long' is native register size anyway.
+*/
+   db_printf("trap frame %p\n", tf);
+   for (i = 0; i < nitems(tf->fixreg); i++) {
+   reg = tf->fixreg[i];
+   db_printf("  r%d:\t%#lx (%ld)\n", i, reg, reg);
+   }
+   reg = tf->lr;
+   db_printf("  lr:\t%#lx\n", reg);
+   reg = tf->cr;
+   db_printf("  cr:\t%#lx\n", reg);
+   reg = tf->xer;
+   db_printf("  xer:\t%#lx\n", reg);
+   reg = tf->ctr;
+   db_printf("  ctr:\t%#lx (%ld)\n", reg, reg);
+   reg = tf->srr0;
+   db_printf("  srr0:\t%#lx\n", reg);
+   reg = tf->srr1;
+   db_printf("  srr1:\t%#lx\n", reg);
+   reg = tf->exc;
+   db_printf("  exc:\t%#lx\n", reg);
+   reg = tf->dar;
+   db_printf("  dar:\t%#lx\n", reg);
+#ifdef AIM
+   reg = tf->cpu.aim.dsisr;
+   db_printf("  dsisr:\t%#lx\n", reg);
+#else
+   reg = tf->cpu.booke.esr;
+   db_printf("  esr:\t%#lx\n", reg);
+   reg = tf->cpu.booke.dbcr0;
+   db_printf("  dbcr0:\t%#lx\n", reg);
+#endif
+}
 #endif
 
 #undef bzero
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Re: svn commit: r355045 - head/libexec/rtld-elf/powerpc

[Justin Hibbits]

On Sun, 24 Nov 2019 18:47:14 +0200
Konstantin Belousov  wrote:

> On Sun, Nov 24, 2019 at 10:32:23AM -0600, Brandon Bergren wrote:
> > On Sun, Nov 24, 2019, at 7:04 AM, Konstantin Belousov wrote:  
> > > On Sun, Nov 24, 2019 at 04:35:29AM +0000, Justin Hibbits wrote:  
> > > > Author: jhibbits
> > > > Date: Sun Nov 24 04:35:29 2019
> > > > New Revision: 355045
> > > > URL: https://svnweb.freebsd.org/changeset/base/355045
> > > > 
> > > > Log:
> > > >   rtld/powerpc: Fix _rtld_bind_start for powerpcspe
> > > >   
> > > >   Summary:
> > > >   We need to save off the full 64-bit register, not just the
> > > > low 32 bits, of all registers getting saved off in
> > > > _rtld_bind_start.  Additionally, we need to save off the other
> > > > SPE registers (SPEFSCR and accumulator), so that their program
> > > > state is not affected by the PLT resolver.  
> > > Why do you need to save these registers ?  Why would rtld touch
> > > them ? 
> > Out of a need to make the binder as invisible as possible when
> > interacting with code that may or may not be following the normal
> > ABI rules regarding who is responsible for saving stuff.
> > 
> > It's not just C code using it.  
> This was not the question.  If a register is saved at the bind entry,
> it means that it is used by rtld itself.  I am surprised that rtld
> needs anything from SPE.

This puzzled us to no end when debugging.  Brandon found that changes
to SPEFSCR got stomped if done before a PLT resolution, which doesn't
happen when LD_BIND_NOW=1 is used. Also, I found that sshd, when built
with clang, would have a weird hang, which was also 'fixed' with
LD_BIND_NOW=1.  Tracing through the sshd problem, the values in
question were stored in the nonvolatile registers, which shouldn't be
clobbered by rtld.  The SPEFSCR problem looks like the SPEFSCR was
being reverted to a 'last known state in kernel', which I couldn't find
a reason for.  The swtch32.S code looks correct, as does save_vec() and
enable_vec().  Unless I'm missing something there.  I've gone over it
at least a dozen times in the last week.

The ACC register probably doesn't need to be touched, though.

- Justin
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