Author: mmel
Date: Sun Jan 31 16:34:06 2016
New Revision: 295096
URL: https://svnweb.freebsd.org/changeset/base/295096
Log:
ARM: cpufunc_domains, cpufunc_faultstatus and cpufunc_faultaddress
functions are equal for all ARM variants. Remove them from cpu_functions
table.
Modified:
head/sys/arm/arm/cpufunc.c
head/sys/arm/arm/cpufunc_asm.S
head/sys/arm/include/cpufunc.h
Modified: head/sys/arm/arm/cpufunc.c
==============================================================================
--- head/sys/arm/arm/cpufunc.c Sun Jan 31 15:36:13 2016 (r295095)
+++ head/sys/arm/arm/cpufunc.c Sun Jan 31 16:34:06 2016 (r295096)
@@ -105,16 +105,12 @@ int ctrl;
struct cpu_functions arm9_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
arm9_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
/* TLB functions */
@@ -164,16 +160,12 @@ struct cpu_functions arm9_cpufuncs = {
struct cpu_functions armv5_ec_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
armv5_ec_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
/* TLB functions */
@@ -222,16 +214,12 @@ struct cpu_functions armv5_ec_cpufuncs =
struct cpu_functions sheeva_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
sheeva_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
/* TLB functions */
@@ -281,16 +269,12 @@ struct cpu_functions sheeva_cpufuncs = {
struct cpu_functions pj4bv7_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
armv7_drain_writebuf, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
armv7_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
/* TLB functions */
@@ -341,16 +325,12 @@ struct cpu_functions pj4bv7_cpufuncs = {
struct cpu_functions xscale_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
xscale_cpwait, /* cpwait */
/* MMU functions */
xscale_control, /* control */
- cpufunc_domains, /* domain */
xscale_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
/* TLB functions */
@@ -401,16 +381,12 @@ struct cpu_functions xscale_cpufuncs = {
struct cpu_functions xscalec3_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
xscale_cpwait, /* cpwait */
/* MMU functions */
xscale_control, /* control */
- cpufunc_domains, /* domain */
xscalec3_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
/* TLB functions */
@@ -460,16 +436,12 @@ struct cpu_functions xscalec3_cpufuncs =
struct cpu_functions fa526_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* domain */
fa526_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
/* TLB functions */
@@ -519,16 +491,12 @@ struct cpu_functions fa526_cpufuncs = {
struct cpu_functions arm1176_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
arm11x6_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
/* TLB functions */
@@ -578,16 +546,12 @@ struct cpu_functions arm1176_cpufuncs =
struct cpu_functions cortexa_cpufuncs = {
/* CPU functions */
- cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
armv7_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
/*
* TLB functions. ARMv7 does all TLB ops based on a unified TLB model
@@ -681,7 +645,7 @@ get_cachetype_cp15()
__asm __volatile("mrc p15, 0, %0, c0, c0, 1"
: "=r" (ctype));
- cpuid = cpufunc_id();
+ cpuid = cpu_ident();
/*
* ...and thus spake the ARM ARM:
*
@@ -788,7 +752,7 @@ get_cachetype_cp15()
int
set_cpufuncs()
{
- cputype = cpufunc_id();
+ cputype = cpu_ident();
cputype &= CPU_ID_CPU_MASK;
#ifdef CPU_ARM9
@@ -1074,7 +1038,7 @@ arm11x6_setup(void)
uint32_t sbz=0;
uint32_t cpuid;
- cpuid = cpufunc_id();
+ cpuid = cpu_ident();
cpuctrl =
CPU_CONTROL_MMU_ENABLE |
Modified: head/sys/arm/arm/cpufunc_asm.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm.S Sun Jan 31 15:36:13 2016
(r295095)
+++ head/sys/arm/arm/cpufunc_asm.S Sun Jan 31 16:34:06 2016
(r295096)
@@ -62,16 +62,11 @@ END(cpufunc_nullop)
*
*/
-ENTRY(cpufunc_id)
+ENTRY(cpu_ident)
mrc p15, 0, r0, c0, c0, 0
RET
END(cpufunc_id)
-ENTRY(cpufunc_cpuid)
- mrc p15, 0, r0, c0, c0, 0
- RET
-END(cpufunc_cpuid)
-
ENTRY(cpu_get_control)
mrc p15, 0, r0, c1, c0, 0
RET
@@ -82,15 +77,15 @@ ENTRY(cpu_read_cache_config)
RET
END(cpu_read_cache_config)
-ENTRY(cpufunc_faultstatus)
+ENTRY(cpu_faultstatus)
mrc p15, 0, r0, c5, c0, 0
RET
-END(cpufunc_faultstatus)
+END(cpu_faultstatus)
-ENTRY(cpufunc_faultaddress)
+ENTRY(cpu_faultaddress)
mrc p15, 0, r0, c6, c0, 0
RET
-END(cpufunc_faultaddress)
+END(cpu_faultaddress)
/*
* Generic functions to write the internal coprocessor registers
@@ -110,10 +105,10 @@ ENTRY(cpufunc_control)
END(cpufunc_control)
#endif
-ENTRY(cpufunc_domains)
+ENTRY(cpu_domains)
mcr p15, 0, r0, c3, c0, 0
RET
-END(cpufunc_domains)
+END(cpu_domains)
/*
* Generic functions to read/modify/write the internal coprocessor registers
Modified: head/sys/arm/include/cpufunc.h
==============================================================================
--- head/sys/arm/include/cpufunc.h Sun Jan 31 15:36:13 2016
(r295095)
+++ head/sys/arm/include/cpufunc.h Sun Jan 31 16:34:06 2016
(r295096)
@@ -60,16 +60,12 @@ struct cpu_functions {
/* CPU functions */
- u_int (*cf_id) (void);
void (*cf_cpwait) (void);
/* MMU functions */
u_int (*cf_control) (u_int bic, u_int eor);
- void (*cf_domains) (u_int domains);
void (*cf_setttb) (u_int ttb);
- u_int (*cf_faultstatus) (void);
- u_int (*cf_faultaddress) (void);
/* TLB functions */
@@ -170,14 +166,10 @@ struct cpu_functions {
extern struct cpu_functions cpufuncs;
extern u_int cputype;
-#define cpu_ident() cpufuncs.cf_id()
#define cpu_cpwait() cpufuncs.cf_cpwait()
#define cpu_control(c, e) cpufuncs.cf_control(c, e)
-#define cpu_domains(d) cpufuncs.cf_domains(d)
#define cpu_setttb(t) cpufuncs.cf_setttb(t)
-#define cpu_faultstatus() cpufuncs.cf_faultstatus()
-#define cpu_faultaddress() cpufuncs.cf_faultaddress()
#define cpu_tlb_flushID() cpufuncs.cf_tlb_flushID()
#define cpu_tlb_flushID_SE(e) cpufuncs.cf_tlb_flushID_SE(e)
@@ -214,12 +206,11 @@ int set_cpufuncs (void);
#define ARCHITECTURE_NOT_SUPPORTED 2 /* not known */
void cpufunc_nullop (void);
-u_int cpufunc_id (void);
-u_int cpufunc_cpuid (void);
+u_int cpu_ident (void);
u_int cpufunc_control (u_int clear, u_int bic);
-void cpufunc_domains (u_int domains);
-u_int cpufunc_faultstatus (void);
-u_int cpufunc_faultaddress (void);
+void cpu_domains (u_int domains);
+u_int cpu_faultstatus (void);
+u_int cpu_faultaddress (void);
u_int cpu_pfr (int);
#if defined(CPU_FA526)
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