Author: andrew
Date: Sun Jun 4 09:11:14 2017
New Revision: 319569
URL: https://svnweb.freebsd.org/changeset/base/319569
Log:
Start to rename files with common or generic names to be SoC specific. The
build system doesn't handle two files with the same name.
Added:
head/sys/arm/allwinner/aw_console.c
- copied unchanged from r319568, head/sys/arm/allwinner/console.c
head/sys/arm/annapurna/alpine/alpine_common.c
- copied unchanged from r319568, head/sys/arm/annapurna/alpine/common.c
head/sys/arm/freescale/imx/imx_console.c
- copied unchanged from r319568, head/sys/arm/freescale/imx/console.c
Deleted:
head/sys/arm/allwinner/console.c
head/sys/arm/annapurna/alpine/common.c
head/sys/arm/freescale/imx/console.c
Modified:
head/sys/arm/allwinner/files.allwinner
head/sys/arm/annapurna/alpine/files.alpine
head/sys/arm/freescale/imx/files.imx5
head/sys/arm/freescale/imx/files.imx6
Copied: head/sys/arm/allwinner/aw_console.c (from r319568,
head/sys/arm/allwinner/console.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/allwinner/aw_console.c Sun Jun 4 09:11:14 2017
(r319569, copy of r319568, head/sys/arm/allwinner/console.c)
@@ -0,0 +1,142 @@
+/*-
+ * Copyright (c) 2012 Ganbold Tsagaankhuu <ganb...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Simple UART console driver for Allwinner A10 */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/cons.h>
+#include <sys/consio.h>
+#include <sys/kernel.h>
+
+#ifndef A10_UART_BASE
+#define A10_UART_BASE 0xe1c28000 /* UART0 */
+#endif
+
+#define REG_SHIFT 2
+
+#define UART_DLL 0 /* Out: Divisor Latch Low */
+#define UART_DLM 1 /* Out: Divisor Latch High */
+#define UART_FCR 2 /* Out: FIFO Control Register */
+#define UART_LCR 3 /* Out: Line Control Register */
+#define UART_MCR 4 /* Out: Modem Control Register */
+#define UART_LSR 5 /* In: Line Status Register */
+#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
+#define UART_LSR_DR 0x01 /* Receiver data ready */
+#define UART_MSR 6 /* In: Modem Status Register */
+#define UART_SCR 7 /* I/O: Scratch Register */
+
+static uint32_t
+uart_getreg(uint32_t *bas)
+{
+ return *((volatile uint32_t *)(bas)) & 0xff;
+}
+
+static void
+uart_setreg(uint32_t *bas, uint32_t val)
+{
+ *((volatile uint32_t *)(bas)) = val;
+}
+
+static int
+ub_getc(void)
+{
+ while ((uart_getreg((uint32_t *)(A10_UART_BASE +
+ (UART_LSR << REG_SHIFT))) & UART_LSR_DR) == 0);
+ __asm __volatile("nop");
+
+ return (uart_getreg((uint32_t *)A10_UART_BASE) & 0xff);
+}
+
+static void
+ub_putc(unsigned char c)
+{
+ if (c == '\n')
+ ub_putc('\r');
+
+ while ((uart_getreg((uint32_t *)(A10_UART_BASE +
+ (UART_LSR << REG_SHIFT))) & UART_LSR_THRE) == 0)
+ __asm __volatile("nop");
+
+ uart_setreg((uint32_t *)A10_UART_BASE, c);
+}
+
+static cn_probe_t uart_cnprobe;
+static cn_init_t uart_cninit;
+static cn_term_t uart_cnterm;
+static cn_getc_t uart_cngetc;
+static cn_putc_t uart_cnputc;
+static cn_grab_t uart_cngrab;
+static cn_ungrab_t uart_cnungrab;
+
+static void
+uart_cngrab(struct consdev *cp)
+{
+}
+
+static void
+uart_cnungrab(struct consdev *cp)
+{
+}
+
+
+static void
+uart_cnprobe(struct consdev *cp)
+{
+ sprintf(cp->cn_name, "uart");
+ cp->cn_pri = CN_NORMAL;
+}
+
+static void
+uart_cninit(struct consdev *cp)
+{
+ uart_setreg((uint32_t *)(A10_UART_BASE +
+ (UART_FCR << REG_SHIFT)), 0x06);
+}
+
+void
+uart_cnputc(struct consdev *cp, int c)
+{
+ ub_putc(c);
+}
+
+int
+uart_cngetc(struct consdev * cp)
+{
+ return ub_getc();
+}
+
+static void
+uart_cnterm(struct consdev * cp)
+{
+}
+
+CONSOLE_DRIVER(uart);
+
Modified: head/sys/arm/allwinner/files.allwinner
==============================================================================
--- head/sys/arm/allwinner/files.allwinner Sun Jun 4 08:48:26 2017
(r319568)
+++ head/sys/arm/allwinner/files.allwinner Sun Jun 4 09:11:14 2017
(r319569)
@@ -30,7 +30,7 @@ arm/allwinner/aw_sid.c standard
arm/allwinner/aw_thermal.c standard
dev/iicbus/sy8106a.c optional sy8106a
arm/allwinner/aw_cir.c optional aw_cir evdev
-#arm/allwinner/console.c standard
+#arm/allwinner/aw_console.c standard
arm/allwinner/a10_fb.c optional vt
arm/allwinner/a10_hdmi.c optional hdmi
Copied: head/sys/arm/annapurna/alpine/alpine_common.c (from r319568,
head/sys/arm/annapurna/alpine/common.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/annapurna/alpine/alpine_common.c Sun Jun 4 09:11:14
2017 (r319569, copy of r319568, head/sys/arm/annapurna/alpine/common.c)
@@ -0,0 +1,159 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <b...@bsdpad.com>
+ * Copyright (c) 2015 Semihalf.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+
+#include <machine/bus.h>
+#include <machine/fdt.h>
+#include <machine/intr.h>
+
+#define WDTLOAD 0x000
+#define LOAD_MIN 0x00000001
+#define LOAD_MAX 0xFFFFFFFF
+#define WDTVALUE 0x004
+#define WDTCONTROL 0x008
+/* control register masks */
+#define INT_ENABLE (1 << 0)
+#define RESET_ENABLE (1 << 1)
+#define WDTLOCK 0xC00
+#define UNLOCK 0x1ACCE551
+#define LOCK 0x00000001
+
+extern bus_addr_t al_devmap_pa;
+
+static int alpine_get_wdt_base(uint32_t *pbase, uint32_t *psize);
+static int alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr,
+ int *interrupt, int *trig, int *pol);
+
+int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size);
+
+int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size)
+{
+ phandle_t node;
+
+ if ((node = OF_finddevice("/")) == 0)
+ return (ENXIO);
+
+ if ((node = fdt_find_compatible(node, "simple-bus", 1)) == 0)
+ return (ENXIO);
+
+ return fdt_get_range(node, 0, pa, size);
+}
+
+static int
+alpine_get_wdt_base(uint32_t *pbase, uint32_t *psize)
+{
+ phandle_t node;
+ u_long base = 0;
+ u_long size = 0;
+
+ if (pbase == NULL || psize == NULL)
+ return (EINVAL);
+
+ if ((node = OF_finddevice("/")) == -1)
+ return (EFAULT);
+
+ if ((node = fdt_find_compatible(node, "simple-bus", 1)) == 0)
+ return (EFAULT);
+
+ if ((node =
+ fdt_find_compatible(node, "arm,sp805", 1)) == 0)
+ return (EFAULT);
+
+ if (fdt_regsize(node, &base, &size))
+ return (EFAULT);
+
+ *pbase = base;
+ *psize = size;
+
+ return (0);
+}
+
+void
+cpu_reset(void)
+{
+ uint32_t wdbase, wdsize;
+ bus_addr_t wdbaddr;
+ int ret;
+
+ ret = alpine_get_wdt_base(&wdbase, &wdsize);
+ if (ret) {
+ printf("Unable to get WDT base, do power down manually...");
+ goto infinite;
+ }
+
+ ret = bus_space_map(fdtbus_bs_tag, al_devmap_pa + wdbase,
+ wdsize, 0, &wdbaddr);
+ if (ret) {
+ printf("Unable to map WDT base, do power down manually...");
+ goto infinite;
+ }
+
+ bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTLOCK, UNLOCK);
+ bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTLOAD, LOAD_MIN);
+ bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTCONTROL, INT_ENABLE |
RESET_ENABLE);
+
+infinite:
+ while (1) {}
+}
+
+#ifndef INTRNG
+static int
+alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
+ int *trig, int *pol)
+{
+ int rv = 0;
+
+ rv = gic_decode_fdt(iparent, intr, interrupt, trig, pol);
+ if (rv == 0) {
+ /* This was recognized as our PIC and decoded. */
+ interrupt = FDT_MAP_IRQ(iparent, interrupt);
+
+ /* Configure the interrupt if callback provided */
+ if (arm_config_irq)
+ (*arm_config_irq)(*interrupt, *trig, *pol);
+ }
+ return (rv);
+}
+
+fdt_pic_decode_t fdt_pic_table[] = {
+ &alpine_pic_decode_fdt,
+ NULL
+};
+#endif
Modified: head/sys/arm/annapurna/alpine/files.alpine
==============================================================================
--- head/sys/arm/annapurna/alpine/files.alpine Sun Jun 4 08:48:26 2017
(r319568)
+++ head/sys/arm/annapurna/alpine/files.alpine Sun Jun 4 09:11:14 2017
(r319569)
@@ -5,6 +5,6 @@ kern/kern_clocksource.c standard
arm/versatile/sp804.c standard
dev/uart/uart_dev_ns8250.c optional uart
-arm/annapurna/alpine/common.c standard
+arm/annapurna/alpine/alpine_common.c standard
arm/annapurna/alpine/alpine_machdep.c standard
arm/annapurna/alpine/alpine_machdep_mp.c optional smp
Modified: head/sys/arm/freescale/imx/files.imx5
==============================================================================
--- head/sys/arm/freescale/imx/files.imx5 Sun Jun 4 08:48:26 2017
(r319568)
+++ head/sys/arm/freescale/imx/files.imx5 Sun Jun 4 09:11:14 2017
(r319569)
@@ -8,7 +8,7 @@ arm/freescale/imx/imx51_machdep.c optional
soc_imx51
arm/freescale/imx/imx53_machdep.c optional soc_imx53
# Special serial console for debuging early boot code
-#arm/freescale/imx/console.c standard
+#arm/freescale/imx/imx_console.c standard
# UART driver (includes serial console support)
dev/uart/uart_dev_imx.c optional uart
Modified: head/sys/arm/freescale/imx/files.imx6
==============================================================================
--- head/sys/arm/freescale/imx/files.imx6 Sun Jun 4 08:48:26 2017
(r319568)
+++ head/sys/arm/freescale/imx/files.imx6 Sun Jun 4 09:11:14 2017
(r319569)
@@ -47,7 +47,7 @@ arm/freescale/imx/imx6_usbphy.c optional ehci
#
# Low-level serial console for debugging early kernel startup.
#
-#arm/freescale/imx/console.c standard
+#arm/freescale/imx/imx_console.c standard
#
# Not ready yet...
Copied: head/sys/arm/freescale/imx/imx_console.c (from r319568,
head/sys/arm/freescale/imx/console.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/freescale/imx/imx_console.c Sun Jun 4 09:11:14 2017
(r319569, copy of r319568, head/sys/arm/freescale/imx/console.c)
@@ -0,0 +1,177 @@
+/*-
+ * Copyright (c) 2012, 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * This software was developed by Oleksandr Rybalko under sponsorship
+ * from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Simple UART console driver for Freescale i.MX515 */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/cons.h>
+#include <sys/consio.h>
+#include <sys/kernel.h>
+
+/* Allow it to be predefined, to be able to use another UART for console */
+#ifndef IMX_UART_BASE
+#define IMX_UART_BASE 0xe3fbc000 /* imx51 UART1 */
+#endif
+
+#define IMX_RXD 0x00
+#define IMX_TXD 0x40
+
+#define IMX_UFCR 0x90
+#define IMX_USR1 0x94
+#define IMX_USR1_TRDY (1 << 13)
+
+#define IMX_USR2 0x98
+#define IMX_USR2_RDR (1 << 0)
+#define IMX_USR2_TXFE (1 << 14)
+#define IMX_USR2_TXDC (1 << 3)
+
+#define IMX_UTS 0xb4
+#define IMX_UTS_TXFULL (1 << 4)
+
+/*
+ * The base address of the uart registers.
+ *
+ * This is global so that it can be changed on the fly from the outside. For
+ * example, set imx_uart_base=physaddr and then call cninit() as the first two
+ * lines of initarm() and enjoy printf() availability through the tricky bits
of
+ * startup. After initarm() switches from physical to virtual addressing, just
+ * set imx_uart_base=virtaddr and printf keeps working.
+ */
+uint32_t imx_uart_base = IMX_UART_BASE;
+
+/*
+ * uart related funcs
+ */
+static uint32_t
+ub_getreg(uint32_t off)
+{
+
+ return *((volatile uint32_t *)(imx_uart_base + off));
+}
+
+static void
+ub_setreg(uint32_t off, uint32_t val)
+{
+
+ *((volatile uint32_t *)(imx_uart_base + off)) = val;
+}
+
+static int
+ub_tstc(void)
+{
+
+ return ((ub_getreg(IMX_USR2) & IMX_USR2_RDR) ? 1 : 0);
+}
+
+static int
+ub_getc(void)
+{
+
+ while (!ub_tstc());
+ __asm __volatile("nop");
+
+ return (ub_getreg(IMX_RXD) & 0xff);
+}
+
+static void
+ub_putc(unsigned char c)
+{
+
+ if (c == '\n')
+ ub_putc('\r');
+
+ while (ub_getreg(IMX_UTS) & IMX_UTS_TXFULL)
+ __asm __volatile("nop");
+
+ ub_setreg(IMX_TXD, c);
+}
+
+static cn_probe_t uart_cnprobe;
+static cn_init_t uart_cninit;
+static cn_term_t uart_cnterm;
+static cn_getc_t uart_cngetc;
+static cn_putc_t uart_cnputc;
+static cn_grab_t uart_cngrab;
+static cn_ungrab_t uart_cnungrab;
+
+static void
+uart_cngrab(struct consdev *cp)
+{
+
+}
+
+static void
+uart_cnungrab(struct consdev *cp)
+{
+
+}
+
+
+static void
+uart_cnprobe(struct consdev *cp)
+{
+
+ sprintf(cp->cn_name, "uart");
+ cp->cn_pri = CN_NORMAL;
+}
+
+static void
+uart_cninit(struct consdev *cp)
+{
+
+ /* Init fifo trigger levels to 32 bytes, refclock div to 2. */
+ ub_setreg(IMX_UFCR, 0x00004210);
+}
+
+static void
+uart_cnputc(struct consdev *cp, int c)
+{
+
+ ub_putc(c);
+}
+
+static int
+uart_cngetc(struct consdev * cp)
+{
+
+ return ub_getc();
+}
+
+static void
+uart_cnterm(struct consdev * cp)
+{
+
+}
+
+CONSOLE_DRIVER(uart);
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