Author: andrew
Date: Wed Jul 1 16:57:57 2020
New Revision: 362845
URL: https://svnweb.freebsd.org/changeset/base/362845
Log:
Read the CPU 0 arm64 ID registers early in initarm
We also update the kernel view early in the boot. This will allow the
use of the common kernel view in ifunc resolvers.
Sponsored by: Innovate UK
Modified:
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/arm64/machdep.c
head/sys/arm64/arm64/mp_machdep.c
head/sys/arm64/include/cpu.h
Modified: head/sys/arm64/arm64/identcpu.c
==============================================================================
--- head/sys/arm64/arm64/identcpu.c Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/arm64/identcpu.c Wed Jul 1 16:57:57 2020
(r362845)
@@ -992,7 +992,7 @@ update_lower_register(uint64_t val, uint64_t new_val,
return (val);
}
-static void
+void
update_special_regs(u_int cpu)
{
struct mrs_field *fields;
@@ -1072,7 +1072,8 @@ identify_cpu_sysinit(void *dummy __unused)
elf_hwcap = hwcap;
else
elf_hwcap &= hwcap;
- update_special_regs(cpu);
+ if (cpu != 0)
+ update_special_regs(cpu);
if (CTR_DIC_VAL(cpu_desc[cpu].ctr) == 0)
dic = false;
@@ -1457,23 +1458,15 @@ identify_cache(uint64_t ctr)
}
void
-identify_cpu(void)
+identify_cpu(u_int cpu)
{
u_int midr;
u_int impl_id;
u_int part_id;
- u_int cpu;
size_t i;
const struct cpu_parts *cpu_partsp = NULL;
- cpu = PCPU_GET(cpuid);
midr = get_midr();
-
- /*
- * Store midr to pcpu to allow fast reading
- * from EL0, EL1 and assembly code.
- */
- PCPU_SET(midr, midr);
impl_id = CPU_IMPL(midr);
for (i = 0; i < nitems(cpu_implementers); i++) {
Modified: head/sys/arm64/arm64/machdep.c
==============================================================================
--- head/sys/arm64/arm64/machdep.c Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/arm64/machdep.c Wed Jul 1 16:57:57 2020
(r362845)
@@ -172,7 +172,6 @@ cpu_startup(void *dummy)
{
undef_init();
- identify_cpu();
install_cpu_errata();
vm_ksubmap_init(&kmi);
@@ -1138,6 +1137,9 @@ initarm(struct arm64_bootparams *abp)
if (kmdp == NULL)
kmdp = preload_search_by_type("elf64 kernel");
+ identify_cpu(0);
+ update_special_regs(0);
+
link_elf_ireloc(kmdp);
try_load_dtb(kmdp);
@@ -1181,6 +1183,7 @@ initarm(struct arm64_bootparams *abp)
"msr tpidr_el1, %0" :: "r"(pcpup));
PCPU_SET(curthread, &thread0);
+ PCPU_SET(midr, get_midr());
/* Do basic tuning, hz etc */
init_param1();
Modified: head/sys/arm64/arm64/mp_machdep.c
==============================================================================
--- head/sys/arm64/arm64/mp_machdep.c Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/arm64/mp_machdep.c Wed Jul 1 16:57:57 2020
(r362845)
@@ -220,7 +220,7 @@ init_secondary(uint64_t cpu)
* We need this before signalling the CPU is ready to
* let the boot CPU use the results.
*/
- identify_cpu();
+ identify_cpu(cpu);
/* Ensure the stores in identify_cpu have completed */
atomic_thread_fence_acq_rel();
@@ -229,6 +229,8 @@ init_secondary(uint64_t cpu)
atomic_add_int(&aps_started, 1);
while (!atomic_load_int(&aps_ready))
__asm __volatile("wfe");
+
+ pcpup->pc_midr = get_midr();
/* Initialize curthread */
KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
Modified: head/sys/arm64/include/cpu.h
==============================================================================
--- head/sys/arm64/include/cpu.h Wed Jul 1 16:37:08 2020
(r362844)
+++ head/sys/arm64/include/cpu.h Wed Jul 1 16:57:57 2020
(r362845)
@@ -167,11 +167,12 @@ void cpu_halt(void) __dead2;
void cpu_reset(void) __dead2;
void fork_trampoline(void);
void identify_cache(uint64_t);
-void identify_cpu(void);
+void identify_cpu(u_int);
void install_cpu_errata(void);
void swi_vm(void *v);
/* Functions to read the sanitised view of the special registers */
+void update_special_regs(u_int);
bool extract_user_id_field(u_int, u_int, uint8_t *);
bool get_kernel_reg(u_int, uint64_t *);
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