Author: hselasky
Date: Fri Nov 6 13:34:55 2015
New Revision: 290443
URL: https://svnweb.freebsd.org/changeset/base/290443
Log:
MFC r290195:
Reduce the DWC OTG interrupt load by not reading all the host channel
status registers for every interrupt. Check a common host channel
status interrupt register first, then conditionally read the
individual host channel status registers.
Modified:
stable/10/sys/dev/usb/controller/dwc_otg.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/dev/usb/controller/dwc_otg.c
==============================================================================
--- stable/10/sys/dev/usb/controller/dwc_otg.c Fri Nov 6 13:08:16 2015
(r290442)
+++ stable/10/sys/dev/usb/controller/dwc_otg.c Fri Nov 6 13:34:55 2015
(r290443)
@@ -2559,6 +2559,7 @@ dwc_otg_interrupt_poll_locked(struct dwc
struct usb_xfer *xfer;
uint32_t count;
uint32_t temp;
+ uint32_t haint;
uint8_t got_rx_status;
uint8_t x;
@@ -2576,14 +2577,18 @@ repeat:
DPRINTF("Yield\n");
return;
}
+
/* get all host channel interrupts */
- for (x = 0; x != sc->sc_host_ch_max; x++) {
+ haint = DWC_OTG_READ_4(sc, DOTG_HAINT);
+ while (1) {
+ x = ffs(haint) - 1;
+ if (x >= sc->sc_host_ch_max)
+ break;
temp = DWC_OTG_READ_4(sc, DOTG_HCINT(x));
- if (temp != 0) {
- DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), temp);
- temp &= ~HCINT_SOFTWARE_ONLY;
- sc->sc_chan_state[x].hcint |= temp;
- }
+ DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), temp);
+ temp &= ~HCINT_SOFTWARE_ONLY;
+ sc->sc_chan_state[x].hcint |= temp;
+ haint &= ~(1U << x);
}
if (sc->sc_last_rx_status == 0) {
_______________________________________________
svn-src-stable-10@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-stable-10
To unsubscribe, send any mail to "svn-src-stable-10-unsubscr...@freebsd.org"
