Re: vmm(4): use monotonic base for pvclock

2021-06-01 Thread Mike Larkin
On Tue, Jun 01, 2021 at 08:03:43PM -0500, Scott Cheloha wrote: > The documentation for the Linux pvclock is pretty sparse but I am > pretty sure we want to use a monotonic base for ti_system_time. We > also have a function for converting a timespec into a 64-bit count of > nanoseconds we can use.

let ipv4_check remember if the ip checksum was good

2021-06-01 Thread David Gwynne
if a bridge checked the ipv4 checksum and it was good, we can avoid checking it again in ip_input. ok? Index: ip_input.c === RCS file: /cvs/src/sys/netinet/ip_input.c,v retrieving revision 1.361 diff -u -p -r1.361 ip_input.c ---

vmm(4): use monotonic base for pvclock

2021-06-01 Thread Scott Cheloha
The documentation for the Linux pvclock is pretty sparse but I am pretty sure we want to use a monotonic base for ti_system_time. We also have a function for converting a timespec into a 64-bit count of nanoseconds we can use. We may as well also use rdtsc_lfence() to ensure consistent behavior.

Re: vmd: Fix grammar for random lladdr

2021-06-01 Thread Dave Voutila
Martin Vahlensieck writes: > Hi > > The grammar for lladdr of interfaces is according to the manpage: > > [locked] lladdr [etheraddr] > > This implies that `locked lladdr' is OK but looking at parse.y this > does not seem to be the case. Making it optional would lead to a > `lladdr' all by

Re: Enable pool cache on knote_pool

2021-06-01 Thread Visa Hankala
On Tue, Jun 01, 2021 at 08:23:24AM +1000, David Gwynne wrote: > > > On 1 Jun 2021, at 02:58, Visa Hankala wrote: > > > > This patch enables the pool cache feature on the knote pool to reduce > > the overhead of knote management. > > > > Profiling done by mpi@ and bluhm@ indicate that the

Re: Ryzen 5800X hw.setperf vs hw.cpuspeed

2021-06-01 Thread Otto Moerbeek
On Mon, May 31, 2021 at 10:24:01PM +0200, Josh wrote: > thanks Otto for the dmesg. > > I'd like to get one B550 mobo as well. Which version of Gigabyte B550 > AORUS ELITE do you have exactly? ATX? mATX ? > Most of them listed here[1] have either RLT8118 or RLT8125 chipset and > re(4) doesn't

Re: vmd: Fix grammar for random lladdr

2021-06-01 Thread Martin Vahlensieck
Ping. On Sat, May 22, 2021 at 09:58:46AM +0200, Martin Vahlensieck wrote: > Hi > > The grammar for lladdr of interfaces is according to the manpage: > > [locked] lladdr [etheraddr] > > This implies that `locked lladdr' is OK but looking at parse.y this > does not seem to be the case. Making

Re: Kill SS_ASYNC

2021-06-01 Thread Vitaliy Makkoveev
On Sat, May 29, 2021 at 10:33:17AM +0200, Martin Pieuchot wrote: > The socket flag SS_ASYNC is redundant with the socket buffer flag > SB_ASYNC. Both are set & unset via FIOASYNC. So the diff below gets > rid of SS_ASYNC. > > Checking states on socket buffers will help reduce the scope of the >

Kill SS_ASYNC

2021-06-01 Thread Martin Pieuchot
The socket flag SS_ASYNC is redundant with the socket buffer flag SB_ASYNC. Both are set & unset via FIOASYNC. So the diff below gets rid of SS_ASYNC. Checking states on socket buffers will help reduce the scope of the NET_LOCK() when we'll introduce a socket buffer lock. ok? Index:

Re: sdmmc(4): check and retry bus width change

2021-06-01 Thread Patrick Wildt
Am Mon, Feb 22, 2021 at 08:10:21PM +0100 schrieb Patrick Wildt: > Hi, > > it seems like some eMMCs are not capable of doing 8-bit operation, > even if the controller supports it. I was questioning our drivers > first, but it looks like it's the same on Linux. In the case that > 8-bit doesn't