On Tue, Mar 29 2022, Theo Buehler wrote:
> On Tue, Mar 29, 2022 at 08:51:25PM +0200, Jeremie Courreges-Anglas wrote:
>> On Tue, Mar 29 2022, Raf Czlonka wrote:
>> > Hello,
>> >
>> > sparc and vax ports have been retired a while back; add riscv64
>> > while there.
>>
>> Committed, thanks.
>>
>>
On 2022/03/29 21:05, Theo Buehler wrote:
> On Tue, Mar 29, 2022 at 08:51:25PM +0200, Jeremie Courreges-Anglas wrote:
> > On Tue, Mar 29 2022, Raf Czlonka wrote:
> > > Hello,
> > >
> > > sparc and vax ports have been retired a while back; add riscv64
> > > while there.
> >
> > Committed, thanks.
>
On Tue, Mar 29, 2022 at 08:05:25PM BST, Theo Buehler wrote:
> On Tue, Mar 29, 2022 at 08:51:25PM +0200, Jeremie Courreges-Anglas wrote:
> > On Tue, Mar 29 2022, Raf Czlonka wrote:
> > > Hello,
> > >
> > > sparc and vax ports have been retired a while back; add riscv64
> > > while there.
> >
> > C
On Tue, Mar 29, 2022 at 08:51:25PM +0200, Jeremie Courreges-Anglas wrote:
> On Tue, Mar 29 2022, Raf Czlonka wrote:
> > Hello,
> >
> > sparc and vax ports have been retired a while back; add riscv64
> > while there.
>
> Committed, thanks.
>
> There are more missing entries I think. If I follow
On Tue, Mar 29, 2022 at 07:51:25PM BST, Jeremie Courreges-Anglas wrote:
> On Tue, Mar 29 2022, Raf Czlonka wrote:
> > Hello,
> >
> > sparc and vax ports have been retired a while back; add riscv64
> > while there.
>
> Committed, thanks.
>
> There are more missing entries I think. If I follow th
On Tue, Mar 29 2022, Raf Czlonka wrote:
> Hello,
>
> sparc and vax ports have been retired a while back; add riscv64
> while there.
Committed, thanks.
There are more missing entries I think. If I follow the existing
pattern, naming the cpu architectures and not the platforms:
- aarch64 is missi
Hello,
sparc and vax ports have been retired a while back; add riscv64
while there.
Regards,
Raf
Index: usr.bin/sendbug/sendbug.c
===
RCS file: /cvs/src/usr.bin/sendbug/sendbug.c,v
retrieving revision 1.78
diff -u -p -r1.78 sendbug
